TWI411069B - 銲錫層、使用該銲錫層之散熱基板及其製造方法 - Google Patents

銲錫層、使用該銲錫層之散熱基板及其製造方法 Download PDF

Info

Publication number
TWI411069B
TWI411069B TW095134416A TW95134416A TWI411069B TW I411069 B TWI411069 B TW I411069B TW 095134416 A TW095134416 A TW 095134416A TW 95134416 A TW95134416 A TW 95134416A TW I411069 B TWI411069 B TW I411069B
Authority
TW
Taiwan
Prior art keywords
layer
solder layer
solder
substrate
electrode layer
Prior art date
Application number
TW095134416A
Other languages
English (en)
Other versions
TW200721411A (en
Inventor
Masayuki Nakano
Yoshikazu Oshika
Original Assignee
Dowa Electronics Materials Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dowa Electronics Materials Co filed Critical Dowa Electronics Materials Co
Publication of TW200721411A publication Critical patent/TW200721411A/zh
Application granted granted Critical
Publication of TWI411069B publication Critical patent/TWI411069B/zh

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C5/00Alloys based on noble metals
    • C22C5/02Alloys based on gold
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/26Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/262Sn as the principal constituent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/26Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/264Bi as the principal constituent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/28Selection of soldering or welding materials proper with the principal constituent melting at less than 950 degrees C
    • B23K35/282Zn as the principal constituent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/28Selection of soldering or welding materials proper with the principal constituent melting at less than 950 degrees C
    • B23K35/286Al as the principal constituent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/30Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
    • B23K35/3006Ag as the principal constituent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/30Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
    • B23K35/3013Au as the principal constituent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/30Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
    • B23K35/302Cu as the principal constituent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/30Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
    • B23K35/3033Ni as the principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026Bonding areas specifically adapted for layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29109Indium [In] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01024Chromium [Cr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01028Nickel [Ni]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0103Zinc [Zn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01042Molybdenum [Mo]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01049Indium [In]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0105Tin [Sn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301Thyristor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15717Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400 C and less than 950 C
    • H01L2924/15724Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09745Recess in conductor, e.g. in pad or in metallic substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/4935Heat exchanger or boiler making
    • Y10T29/49393Heat exchanger or boiler making with metallurgical bonding

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Die Bonding (AREA)
  • Led Device Packages (AREA)
  • Semiconductor Lasers (AREA)

Description

銲錫層、使用該銲錫層之散熱基板及其製造方法
本發明係有關一種將半導體裝置進行封裝(packaging)時所使用的銲錫層與使用該銲錫層之散熱基板及其製造方法。
通常,將半導體裝置進行封裝時,藉由將半導體裝置載置於熱傳導性高的基板(亦即散熱基板),而有效率地釋出半導體裝置所產生的熱。並且,由於隔有設置在散熱基板與半導體裝置之間的小型散熱基板(亦即副載置件(sub-mount)),故更加有效率地將熱釋出。這種熱傳導率高的散熱基板係使用氮化鋁(AIN)等。
於上述散熱基板載置半導體元件晶片並進行接合時,或將散熱基板接合至散熱板時,係藉由於散熱基板的單面及/或兩面所形成的銲錫層來進行接合。銲錫層為了降低對環境的負擔,已提案了未使用鉛(Pb),亦即藉由無鉛(Pb-free)銲錫(例如Au-Sn、Ag-Sn、In-Sn、Zn-Sn等銲錫)來形成者。
非專利文獻1已報告下述問題:有於散熱基板或副載置件上形成由金(Au)所構成的電極層,且藉由Au-Sn等無鉛銲錫於該電極層上形成銲錫層時,銲錫層本身為非平衡狀態,放置於室溫下亦會進入平衡狀態,故電極層的金容易擴散。
於是,於最上層由金所構成的電極層上形成藉由Au-Sn所形成的銲錫層時,電極層中的金係向銲錫層擴散並改變銲錫層的組成。因此,由於向Au-Sn銲錫層擴散的金導致銲錫層中金的組成比例增加,故提昇銲錫層自身的熔點。因此,產生需要以比起最初形成的Au-Sn組成所決定的熔點高的溫度將半導體裝置進行銲錫接合的狀況。因此,產生了與半導體裝置的耐熱溫度之間的差距變小,而導致半導體裝置不良等問題。
為防止上述銲錫層與電極層的相互擴散,已知有於半導體層與電極層之間設置銲錫阻障層(barrier layer)之電極構造。
第8圖係為示意性地顯示具有習知的銲錫阻障層的副載置件構造之剖面圖。如第8圖所示,習知的副載置件50係由下述所構成者:副載置基板51、於副載置基板51上面(亦即於載置半導體裝置側的面上)所形成之密接層52、於該密接層52上所形成之電極層53、於電極層53上所形成之銲錫阻障層54、以及於銲錫阻障層54上所形成之銲錫層55。銲錫阻障層54係由白金(Pt)或鈀(Pd)等所構成,防止構成電極層53的金向銲錫層55擴散,且防止銲錫層熔點上昇等。
專利文獻1係揭示了一種技術,藉由堆積作為銲錫阻障層的白金、鈀等貴金屬與於銲錫層的正下方作為密接層的鈦(Ti)等遷移元素層,而將載置的半導體裝置與副載置件的接合強度提高至40MPa以上。
專利文獻1:日本專利公開第3509809號公報
非專利文獻1:S.Nakahara其他3位,“ROOM TEMPERATURE INTERDIFFUSION STUDIES OF Au/Sn THIN FILM COUPLES”,Thin Solid Films,Vol.84,pp185-196,1981
然而,於習知的副載置基板,由於能藉由設置銲錫阻障層來抑制電極層的金屬向銲錫層擴散,並亦能將接合強度設成30MPa以上,故能降低初期接合不良,唯銲錫層的剪切應變較小。因此,當發光元件間斷性地通電時,由於發光元件與散熱基板的熱膨脹係數差會導致銲錫層剝離,故產生發光元件的通電不良。此外,由於須以鉑或鈀等高價的貴金屬(precious metals)來形成銲錫阻障層,故導致副載置件成本高昂。
本發明乃有鑑於上述課題而研創者,係具有三個目的:第1目的係提供與所載置之半導體裝置之間具有高接合強度及大剪切應變的銲錫層;第2目的係提供使用了該銲錫層的散熱基板銲錫層;第3目的係提供該製造方法。
為達成上述第1目的,本發明的銲錫層其特徵係:接合強度係30MPa以上,且剪切應變係0.07以上。
構成銲錫層的材料,較佳為由無鉛銲錫所構成,而含有銀、金、銅、鋅、鎳、銦、鎵、鉍、鋁、以及錫之中兩種類以上的元素之銲錫者。
根據上述構成,由於在該銲錫層將半導體裝置進行接合時的接合強度高,且剪切應變大,故即使增大熱負荷(heat load),亦能防止半導體裝置由銲錫層剝離。
為達成上述第2目的,本發明的散熱基板係具備有基板、於基板上所形成的電極層、以及於基板上所形成的銲錫層,其特徵係:銲錫層的接合強度係30MPa以上,且剪切應變係0.07以上。
根據上述構成,由於電極層與銲錫層直接形成於散熱良好的基板上,或較佳為隔著密接層而形成,且連接電極層與銲錫層的重疊部,故能提供與電極層與半導體層電性連接的散熱基板。由於在銲錫層將半導體裝置進行接合時的接合強度高,且剪切應變大,故即使增大熱負荷亦能防止半導體裝置由銲錫層剝離。
上述銲錫層係較佳為填入於電極層的窗部,且銲錫層的外周部與電極層連接。更佳為銲錫層具有於電極層上面連接的重疊部,且將重疊部與電極層電性連接。銲錫層重疊部的寬度L1與銲錫層最表面的寬度L之比,較佳為10%以下。銲錫層重疊部的寬度L1與前述銲錫層最表面的寬度L之比,亦可為4.4%以下。
構成銲錫層的材料,較佳為由無鉛銲錫所構成,而含有銀、金、銅、鋅、鎳、銦、鎵、鉍、鋁、以及錫之中兩種類以上的元素之銲錫者。電極層係較佳為由含有金、鉑、銀、銅、鐵、鋁、鈦、以及鎢中任一種或兩種以上的材料所構成者。
根據上述構成,由於電極層與銲錫層形成於基板上,且連接電極層與銲錫層的重疊部,故能提供與電極層與半導體層電性連接的散熱基板。
於上述構成中,較佳為含有形成於基板上的密接層,與連接於密接層的電極層及銲錫層,且係於密接層上方配置銲錫層及電極層,其中,銲錫層係隔著密接層而與電極層接觸。
於基板與電極層及銲錫層之間較宜設置密接層。密接層係由將鈦、鎳、鉻、以及鉬中之任一者作為主成分之材料所構成者,亦可為將鈦、鎳、鉻、以及鉬中之任一者的合金作為主成分之材料所構成者。基板係較佳為由氮化鋁、碳矽化合物、以及矽中之任一個材料所構成者。
根據上述構成,係能提供一種散熱基板,其電極層與銲錫層係隔著密接層而電性連接,並且能提高與接合於銲錫層的半導體裝置之接合強度,且增大剪切應變。因此,能將由電極金屬向銲錫層之電極金屬的擴散抑制到最低,而能有效地防止銲錫層的熔點上昇。因此,由於無須於電極層與銲錫層之間設置使用了高價的貴金屬之銲錫阻障層,故能提供低價的散熱基板。
為達成上述第3目的,本發明的散熱基板之製造方法,其特徵係含有:於基板上形成具有窗部的電極層之步驟;以及於窗部形成與電極層電性連接的銲錫層之步驟。
於形成上述銲錫層的步驟中,較佳為於銲錫層設置連接在電極層上面的重疊部。
根據上述散熱基板的製造方法,由於將電極層與銲錫層形成於基板上,並且以覆蓋電極層上面之方式於銲錫層形成重疊部,故可在保持電極層與銲錫層的電性連接之同時,無須設置銲錫阻障層而能防止銲錫層的熔點上昇。由於無須於電極層與銲錫層之間設置使用了貴金屬的銲錫阻障層,故能低價製造散熱基板。
根據本發明的銲錫層與使用該銲錫層之散熱基板及其製造方法,能獲得接合強度30MPa以上,剪切應變0.07以上的銲錫層。
以下,依據圖面詳細說明本發明的實施例。在各個圖中,同樣或對應的材料係使用相同的符號。在本實施例中,以使用散熱基板作為副載置件之情形為例來說明。
第1圖係為示意性地顯示本發明的副載置件10的構造之剖面圖。如第1圖所示,本發明的副載置件10係具備有:副載置基板1、於副載置基板1上所形成的電極層2、以及於副載置基板1上鄰接電極層2而形成的銲錫層3,且電極層2係連接於銲錫層3的外周部而構成者。亦即,銲錫層3係隔著密接層4而填入電極層的窗部2A,並且,銲錫層3的外周部與電極層2係電性連接。此時,將電極層窗部2A的寬度設為L0
在此,電極層的窗部2A係用以於電極層2形成銲錫層3而開口的區域,而為藉由蝕刻等步驟而未形成電極層2之區域。亦可於電極層2與副載置基板1之間***圖示的密接層5。
銲錫層3係將厚度增加至比電極層2更加厚,並且具備有與電極層2重疊的部分,亦即於銲錫層3具備有重疊部3A時,則能容易地形成電極層2與銲錫層3的電性連接。此時,較佳為銲錫層的重疊部3A下部係隔著密接層4而與電極層2接觸,藉由該密接層4能有效地防止銲錫層3與電極層2之間的反應。如同圖示,銲錫層3最表面的寬度係L,其重疊部3A的寬度係L1 。於銲錫層所設置的重疊部3A的寬度其預定的尺寸只要能使於銲錫層3與電極層2之間產生的電阻很小即可。
第2圖係為示意性地顯示本發明的副載置件構造的變形例之剖面圖。如第2圖所示,在副載置件10A中,電極層2與銲錫層3的連接亦可藉由密接層4來進行。此時,銲錫層3的寬度L2 係以作成比電極層的窗部2A更加狹小,且將密接層外周部4A(寬度L1 )覆蓋於電極層上面2B的方式而形成者。該寬度L1 的外周部4A係形成與電極層2的重疊部。其他的構成由於與第1圖所示的副載置件10相同,故省略其說明。
電極層2窗部的形狀係可為四角形或圓形等任意的形狀,亦可根據電極層窗部2A而形成銲錫層的重疊部3A或密接層的重疊部4A。若為圓形時,則上述銲錫層3的寬度係其直徑。
在此,於副載置件10及10A中,所謂電極層2及銲錫層3的電性連接之意思為:於如上述於電極2與銲錫層的重疊部3A或與密接層的重疊部4A之連接中,於電極層2與銲錫層3之間所產生的電性電阻為非常小,而於後述的銲錫層3所載置的半導體裝置等,係定義為以與電極2為相同電位的方式而連接者。
該情形中,由於將重疊部3A、4A的寬度L1 對銲錫層3的寬度L的比例,亦即將L1 /L作成L1 /L≦10%,故能將後述的銲錫層3與於該銲錫層3所載置的半導體裝置予以銲錫接合過的密著強度作成30MPa以上,而能獲得實用的密著強度。較佳為,當設定成L1 /L≦4.4%時,能將銲錫層3銲錫接合時的密著強度作成40MPa以上,而能獲得可靠性高的密著強度。藉由將L1 /L以這種方式來設定,而能降低於銲錫層3與電極層2之間所產生的電阻,並且能提高與在銲錫層3所接合的半導體裝置之接合強度及銲錫層3的剪切應變。
副載置基板1係能使用熱傳導率高的氮化鋁(AIN)、碳化矽(SiC)、矽(Si)、以及鑽石IIa等絕緣性基板。
電極層2的材料較佳為電阻率小的金屬,係能使用金(Au)、鉑(Pt)、銀(Ag)、銅(Cu)、鐵(Fe)、鋁(Al)、鈦(Ti)、以及鎢(W)中的任一種。亦可含有這些金屬中的兩種以上。電極層2係可形成預定的電路圖案形狀,亦可於電極層2的一部分連接用以與外部端子連接用的金線或鋁線,並且形成電性電路。
銲錫層3較佳為未含鉛,亦即無鉛銲錫,較適宜為含有銀、金、銅、鋅(Zn)、鎳(Ni)、銦(In)、鎵(Ga)、鉍(Bi)、鋁、以及錫(Sn)中之兩種以上的元素之銲錫。銲錫層3的材料係能使用Au及Sn,其組成係能例如將Au與Sn的元素比作成70:30(Au:Sn=70:30)。
並且,如第1圖所示,為提高副載置基板1及電極層2的密著性,較佳為於副載置基板1及電極層2之間,亦即於電極層2下部設置密接層5。
如第1圖所示,例如於副載置基板1的下面,亦即,通常於散熱體所覆蓋的內面的一部分或整面形成基板內面側的密接層6,且於該密接層6上形成銲錫層7。此時,副載置基板1內面側的密接層6及銲錫層7,係可各以與設置在副載置基板1上面側的密接層4、5或銲錫層3相同的材料來形成,亦可使用不同的材料來形成。
上述密接層4、5、6較佳為使用與副載置基板1密著性良好、且不會產生與銲錫層3、7間之相互擴散之高熔點金屬。使用於密接層4、5、6的金屬係能使用鈦(Ti)、鉻(Cr)、鎳(Ni)、以及錳(Mo)等的任一種作為主成分的材料。此外,亦可使用與鈦、鉻、鎳、以及錳中的任一種之合金作為主成分的材料來形成。
如同上述之說明,本發明的副載置件10、10A係在副載置件基板1的上面(較佳為隔著密接層4),以令電極層2與銲錫層3鄰接之方式而形成電極層2與銲錫層3,銲錫層3的頂部3A係覆蓋電極層2窗部2A的開口端部上面2B,並保持電極層2與銲錫層3的電性連接。
接著,說明關於本發明的副載置件的半導體裝置之配置。
第3圖係為示意性地顯示於第1圖的副載置件10、10A載置了半導體裝置8的構造之剖面圖。如第3圖所示,在副載置件10、10A中,半導體裝置8係隔著其下部電極8A並藉由銲錫層3來進行銲錫接合。此時,由於半導體裝置的下部電極8A與銲錫層3係直接接觸,在銲錫層3的下部未隔有進行相互擴散的金等之金屬,故銲錫層3係藉由該組成來決定熔點溫度,即使藉由無鉛銲錫來形成銲錫層3,其熔點亦不高。因此,在本發明的副載置件10、10A中,能使用以無鉛銲錫層3的組成所決定的熔點附近之較低溫度,來實施與半導體裝置8的銲錫接合。因此,由於未如同習知地於銲錫層3的下部隔有進行相互擴散的金等之金屬,故能明顯地降低隨著銲錫接合溫度上昇所導致的半導體裝置8的不良。
半導體裝置8的下部電極係隔著銲錫層3而與電極層2電性連接。該電極層2係藉由金線9A與未圖示的外部端子及銲接線連接。然後,半導體裝置8的上部電極8B係藉由未圖示的外部端子與金線9B來進行銲接線連接。如此,藉由半導體裝置8、銲錫層3、電極層2、以及各金線9A與9B而形成電性電路。在此,半導體裝置8係能列舉雷射二極體或發光二極體等發光元件、二極體、以及使用於高頻放大或切換之電晶體或閘流體(thyristor)等之主動元件或積體電路。在電晶體或閘流體等主動元件之操作電力較大的電力用半導體裝置之情形中,根據其操作電力,亦可使用增大副載置件1面積的散熱基板。
根據本發明的副載置件10、10A,即使不於電極層2與銲錫層3之間設置銲錫阻障層,亦能將半導體裝置8與銲錫層3予以堅固地接合。根據本發明的副載置件10、10A,由於形成具有在副載置基板1上所形成的銲錫層3之窗部2A的電極層2,與形成埋入窗部2A的銲錫層3,並且將開口邊緣部與銲錫層3的接觸面積以最低限度之方式互相電性連接,故無須於電極層2與銲錫層3之間設置由鉑或鈀等貴金屬材料所構成的銲錫阻障層,而能抑制由電極層2向銲錫層3之擴散,並且防止因為銲錫層3的組成變化所導致的熔點上昇。因此,於半導體裝置8的晶片接合時,能防止因為銲錫層3的熔點上昇所導致銲錫接合時的晶片接合不良,並達到良率的提昇。
依據本發明的銲錫層3與使用該銲錫層3之副載置件或散熱基板10、10A,能提昇銲錫接合的密著強度與剪切應變。尤其是由於銲錫層3與半導體裝置8的接合強度係30MPa以上,且將剪切應變作成0.07以上,故能使半導體裝置8的接合不良減少,有效地防止銲錫接合後的剝離。剪切應變小時,銲錫層3很硬,會因為起因於副載置件10、10A與半導體裝置8間的膨脹差異的熱應力而導致半導體裝置8由銲錫層3剝離,故不佳。銲錫層3的剪切應變大時,由於銲錫層3很柔軟,故將應力緩和,對於因半導體裝置8的動作所產生的熱膨脹差異而導致的拉扯應力之承受也增強。當銲錫層3將應力緩和時,亦緩和了半導體裝置8通電時所產生的熱應力。例如,能緩和對載置於銲錫層3的發光二極體8通電時所產生的熱膨脹而導致的應力,故能抑制銲錫層3由副載置基板1剝離。當銲錫層3剝離時,半導體裝置8一部分的電流密度提昇,產生半導體裝置8的不良,然而藉由本發明的銲錫層3及散熱基板10、10A,銲錫層3不會剝離。
說明關於本發明的副載置件10的製造方法。
準備副載置基板1,藉由研磨(lapping)裝置研磨副載置基板1的兩側。並且,使用拋光(polishing)裝置等來實施拋光研磨。然後,將研磨完成的副載置基板1予以洗淨。
藉由微影法(photolithographic method)於洗淨過的底層封裝基版1施予電極層2的圖案化。具體而言,於副載置基板1的上面整體使用旋塗器(spinner)將阻劑均勻塗佈後,不在烘烤爐施予預定的烘烤,而是使用光罩對準(Mask Aligner)裝置來施予對比曝光。
曝光後,藉由四伸甲基(Tetramethylamine)系的顯像液將欲成為電極層2部分的阻劑予以溶解,使副載置基板1露出。結果,於形成銲錫層3的區域,亦即於欲成為窗部2A的部分係殘留著未溶解的阻劑。接著,於副載置基板1的表面整體形成密接層5。密接層5係能藉由使用了真空蒸鍍裝置或濺鍍裝置的蒸鍍法來形成。
接著,藉由真空蒸裝置等將欲成為電極層2的金屬進行蒸鍍,使用丙酮(acetone)等使阻劑整體溶解,藉由剝除(Lift-off)去除作為電極層2區域以外的金屬而形成預定的電極層2。藉此,藉由剝除而能形成具有窗部2A的電極層2。
與上述電極層2的形成相同,藉由微影法及使用了真空蒸鍍裝置的剝除,將銲錫層3以填入電極層2窗部2A之方式來形成。具體而言,於形成了電極層2及密接層5的副載置基板1上面將阻劑均勻塗佈後,不施予預定的烘烤,而是施予對比曝光。曝光後,藉由四伸甲基系的顯像液將欲成為銲錫層的部分,亦即將窗部2A上的阻劑予以溶解,使該部分的密接層5及電極層2的開口邊緣部露出。此時,去除了形成銲錫層3區域的阻劑。並且,為了形成銲錫層的重疊部3A,較宜使用使電極層窗部2A側的周緣部加大達重疊部3A的寬度L1 的窗部之遮罩圖案,而施予曝光。
接著,將成為銲錫層3下部側的密接層4之金屬進行真空蒸鍍。
然後,將成為銲錫層3的金屬予以蒸鍍加厚成比電極層2的厚度還厚,由於使用丙酮等使阻劑整體溶解,故藉由剝除,將作為密接層4及銲錫層3之區域以外的已蒸鍍過的銲錫層予以去除。藉此,能形成以銲錫層3填入了電極窗部2A之銲錫層3。並且,藉由調整遮罩圖案等,亦能容易形成具有重疊部3A的銲錫層3。如同前述,銲錫層重疊部3A的寬度較佳為作成用以維持電極層2與銲錫層3電性連接所需要的最低限度之寬度。
接著,於副載置基板1內面形成銲錫層7。此時,亦可於副載置基板1內面與銲錫層7之間***密接層6。
最後,藉由蝕刻將於副載置基板1表面所露出的密接層予以去除並使副載置基板1的表面露出,且使用切割裝置等,將獲得的副載置基板1分割成預定的副載置件10的尺寸。
在本發明的副載置件之製造方法中,較佳為以隔著密接層5並具有窗部2A之方式於副載置基板1上形成電極層2,接著,填入窗部2A,更佳為以具有與電極層重疊的重疊部3A之方式來形成密接層4及銲錫層3。因此,無須於電極層2與銲錫層3之間設置使用由Pt等所構成的貴金屬之銲錫阻障層,而能削減製造步驟數。如同上述,依據本發明的副載置件之製造方法,無須於電極層2與銲錫層3之間設置由高價的鉑或鈀等貴金屬材料所形成的銲錫阻障層,而能以低成本提供具有高接合強度及高剪切應變的銲錫層3。
(實施例1)
以下,根據實施例更詳細地說明本發明。
第4圖係為示意性地顯示在實施例1所製造的副載置件20之剖面圖。
首先,製造副載置件20。
藉由研磨裝置研磨具有高熱傳導性(230W/mK)的55mm×550mm、厚度0.3mm之燒結氮化鋁基板1的雙面,且使用拋光機實施拋光研磨。
接著,為施予藉由微影法之圖案化,使用旋塗器於基板表面整體均勻地塗佈阻劑後,不在烘烤爐施予預定的烘烤,而是使用光罩對準裝置來施予對比曝光。曝光用的遮罩係以能用1mm×1mm的副載置件尺寸來圖案化之方式所設計者。
曝光後,藉由四伸甲基系的顯像液將成為電極層2部分的阻劑予以溶解,使基板1的表面露出。並且,於欲成為窗部2A的部分則保持形成有阻劑的狀態。
將研磨過的氮化鋁基板1進行洗淨而將表面予以洗淨化,並藉由真空蒸鍍裝置於該基板1的表面整體堆積了50nm由鈦所構成的密接層5。
接著,使用真空蒸鍍裝置進行蒸鍍金,且使用丙酮使阻劑整體溶解,從而將電極層2以外的Au予以剝除,而以0.2 μ m之狀態形成具有窗部2A的電極層2。
與電極層2的形成相同,使用微影法及真空蒸鍍裝置,藉由剝除法,於氮化鋁基板1表面形成50nm的密接層4及3.5 μ m的銲錫層3。銲錫層3的成分係Au與Sn的元素比以70:30之方式所形成者。銲錫層3的尺寸係作成寬度L=500 μ m的正方形,銲錫層重疊部3A的寬度L1 係作成大約1 μ m。此時的L1 /L係0.2%。
最後,使用切割裝置將所獲得的氮化鋁基板切割成1mm×1mm,作為副載置件的尺寸,而製造出實施例的副載置件20。
(實施例2)
除了將銲錫層重疊部3A的寬度L1 設成22 μ m以外,係以與實施例1相同之方式來製造實施例2的副載置件20。此時的L1 /L係4.4%。
(實施例3)
除了將銲錫層重疊部3A的寬度L1 設成50 μ m以外,係以與實施例1相同之方式來製造實施例3的副載置件20。此時的L1 /L係10%。
接著,說明關於比較例。
(比較例1)
第5圖係為示意性地顯示比較例1的副載置件30之剖面圖。
除了於密接層5上使用金形成電極層32,且於其電極層32上的一部分形成密接層33及與實施例相同組成(As:Sn(元素比)=70:30)的銲錫層34以外,係藉由與實施例相同的製造方法來製造比較例1的副載置件30。
(比較例2)
第6圖係為示意性地顯示比較例2的副載置件40之剖面圖。除了於密接層5上使用金形成電極層32,且於其電極層32上的一部分形成密接層41及由Pt所構成的銲錫阻障層42,並且於銲錫阻障層42上形成與實施例相同組成(As:Sn(元素比)=70:30)的銲錫層34以外,係藉由與實施例相同的製造方法來製造比較例2的副載置件40。
對於實施例1至3及比較例1至2的副載置件20、30、40,藉由銲錫層3、34將半導體裝置8予以接合並製作樣品。亦即,藉由加熱裝置使副載置件的銲錫層3、34溶解後,由上部配置30 μ m×30 μ m的發光二極體以作為半導體裝置8,並藉由銲錫層3、34將副載置件20、30、40與半導體裝置8予以接合,而製作樣品。此時,銲錫接合溫度係設為290℃。關於樣品數,實施例與比較例係各為100個。
接著,進行樣品的發光二極體8之剝離測試。剝離測試係藉由晶片剪切測試(die shear test)來施行,即所謂測量晶片剪切強度。晶片剪切測試係以MIL規格(MIL-STD-883C、Method 2019.4)作為依據來施行,各條件N數=10,由其平均值得到晶片剪切強度。
第7圖係顯示於實施例1、2及比較例1的副載置件20、30、40之銲錫層3、34相對於剪力應變的剪切強度(τ)。在第7圖中,縱軸係表示剪切強度(MPa),橫軸係表示剪切應變。剪切強度係藉由晶片剪切測試機來測量。具體而言,於發光二極體8與銲錫層3的接合面、由垂直的發光二極體8側面的橫方向抵接剪切應變工具,使其向水平方向移動時,與發光二極體8接觸後,將這裡作為原點,而測量晶片剪切應變工具由發光二極體8所承受的荷重(kg)與發光二極體8由原點相對移動的位移(m)。
由上述測量所得到的荷重及位移,可藉由下記(1)及(2)式將剪切強度τ(MPa)及剪切應變γ各自予以算出。
剪切強度τ=荷重(kg)X重力加速度(m/s2 )/剪切應變面的面積(m2 )………(1) 剪切應變γ=位移(m)/剪切方向的剪切應變面長度(m)………(2)
在此,剪切應變面的面積係被銲錫接合的面,亦即發光二極體8底面的面積(300 μ mX300 μ m)。剪切方向的剪切應變面長度係於與發光二極體8的晶片側面垂直的方向之長度,而係為300 μ m。此外,銲錫層3與發光二極體8的接合強度係取剪切強度的最大值(τ c),銲錫層3的剪切應變係取為最大剪切強度時的剪切應變(γ c)。
如同由第7圖所理解的,於實施例1、3及比較例1中的銲錫層3、34的接合強度τ c各自為46MPa、32MPa、29MPa,實施例1及3的副載置件20的銲錫層3之接合強度約為30MPa以上,故能獲得安定的初期接合強度。
於表1中,係顯示藉由實施例1至3及比較例的副載置件之構成與晶片剪切測試所測量的銲錫層3與發光二極體8的接合強度(τ c)、銲錫層3的剪切應變(γ c)、及後述的熱循環測試中發光二極體的生存率(%)。
如同由表1所理解的,在實施例1中,銲錫層重疊部3A的寬度L1 與銲錫層寬度L的比(L1 /L)係0.2%,接合強度係46MPa,剪切應變係0.123。在實施例2中,L1 /L係4.4%,接合強度係41MPa,剪切應變係0.090。在實施例3中,L1 /L係10%,接合強度係32MPa,剪切應變係0.071。
另一方面,於比較例1及比較例2中的銲錫層重疊部3A的寬度L1 與銲錫層寬度L的比(L1 /L)係100%,接合強度係各為29MPa、41MPa,剪切應變係各為0.044、0.062。
接著,說明關於在實施例1至3及比較例1、2中,於隔著銲錫層3的副載置件所載置的發光二極體8的熱循環測試。
熱循環測試係使用ETAC公司製造之熱衝擊測試機(型號WINTECH)於室內中進行。1循環的條件係將施加了150mA電流的發光二極體8於165℃的大氣中保持15分鐘後,在1分鐘內冷卻至-50℃並保持15分鐘。重複進行該步驟50次。由該熱循環測試的結果,從測試的發光二極體中計算出未產生通電不良的發光二極體8的比率以作為生存率(%)。
如同由表1所理解的,重複50次熱循環的發光二極體8的生存率(%),於實施例1至3及比較例1、2中,各為100%、94%、82%、37%、以及67%,於實施例1至3的發光二極體8的情形中,銲錫層3未產生剝離,能獲得82%以上的生存率,故可靠性高。
另一方面,在比較例1、2中,重複50次熱循環後的發光二極體的生存率(%)係各為37%、67%,而產生通電不良,亦即銲錫層產生剝離,且生存率低於80%以下。
依據上述,得知了在實施例1至3的發光二極體8中,藉由將剪切應變設為0.07以上,而能提昇熱循環測試後發光二極體8的生存率,且提高可靠性。
由上述結果可知,如實施例1將銲錫層重疊部3A的寬度L1 與銲錫層寬度L的比(L1 /L)設為10%時的接合強度,係比於比較例1的金電極層32隔著由鈦所構成的密接層33並設置有Au-Sn所構成的銲錫層34之副載置件30更加提昇。然後,依據L1 /L為4.4%以下的實施例2及3,得知了其接合強度與隔有比較例2中由Pt所構成的銲錫阻障層41之副載置件40係為相等以上,且能獲得可靠性高的密著強度。並且,得知了亦能使剪切應變提昇,且能獲得不會產生因為發光二極體8的發光所導致的接合不良之高可靠性的銲錫接合。如同上述,藉由實施例的副載置件,由於未使用Pt等高價的貴金屬,故能以低成本獲得高可靠性的副載置件。
本發明係未限定為上述實施例所記載的副載置件,其可為散熱基板,亦可於申請範圍所記載的發明範圍內進行各種變形,此皆涵蓋於本發明的範圍中。
1、51...副載置基板(散熱用基板)
2、32、53...電極層
2A...窗部
2B...上面
3、7、34、55...銲錫層
3A...銲錫層的重疊部
4、33、41...密著部(銲錫層下部)
4A...密接層的重疊部
5...密接層(電極層下部)
6...密接層(基板內面側)
8...半導體裝置
8A...下部電極
8B...上部電極
9A、9B...金線
10、10A、20...副載置件(散熱基板)
30...比較例1的副載置件
40...比較例2的副載置件
42...比較例2的阻障層
50...副載置件
52...密接層
54...銲錫阻障層
第1圖係為示意性地顯示本發明的副載置件的構造之剖面圖。
第2圖係為示意性地顯示本發明的副載置件構造的變形例之剖面圖。
第3圖係為示意性地顯示於第1圖的副載置件載置有半導體裝置的狀態之剖面圖。
第4圖係為示意性地顯示在實施例中所製造的副載置件之剖面圖。
第5圖係為示意性地顯示比較例1的副載置件之剖面圖。
第6圖係為示意性地顯示比較例2的副載置件之剖面圖。
第7圖係顯示於實施例1、2及比較例1的副載置件的銲錫層中對於剪切應變的剪切強度(τ)之圖。
第8圖係具有習知的阻障層的副載置件構造之示意剖面圖。
1...副載置基板(散熱用基板)
2...電極層
2A...窗部
2B...上面
3、7...銲錫層
3A...銲錫層的重疊部
4...密著部(銲錫層下部)
5...密接層(電極層下部)
6...密接層(基板內面側)
10...副載置件(散熱基板)

Claims (12)

  1. 一種散熱基板,係具備有基板、形成於該基板上之電極層、以及形成於該基板上之銲錫層,該散熱基板之特徵係:前述銲錫層係填入於上述電極層的窗部,並且前述銲錫層的外周部係與前述電極層的前述窗部的內周部連接,且前述銲錫層之底部與前述基板的上表面係以未間隔有前述電極層之方式連接,上述銲錫層的接合強度係30MPa以上,且剪切應變係0.07以上。
  2. 如申請專利範圍第1項之散熱基板,其中,前述銲錫層係具有連接於前述電極層上面的重疊部,且將該重疊部與前述電極層電性連接。
  3. 如申請專利範圍第2項之散熱基板,其中,前述銲錫層重疊部的寬度L1 與前述銲錫層最表面的寬度L之比係10%以下。
  4. 如申請專利範圍第2項之散熱基板,其中,前述銲錫層重疊部的寬度L1 與前述銲錫層最表面的寬度L之比係4.4%以下。
  5. 如申請專利範圍第1項之散熱基板,其中,構成前述銲錫層的材料係由無鉛銲錫所構成者,其含有銀、金、銅、鋅、鎳、銦、鎵、鉍、鋁、以及錫之中兩種以上的元素。
  6. 如申請專利範圍第1項之散熱基板,其中,前述電極層係由含有金、鉑、銀、銅、鐵、鋁、鈦、以及鎢中之任 一種或兩種以上之材料所構成者。
  7. 如申請專利範圍第1項之散熱基板,其中,含有形成於前述基板上之密接層、與連接於該密接層之電極層及銲錫層,且係於前述密接層上方配置上述銲錫層及電極層,且前述銲錫層係隔著上述密接層而與前述電極層連接。
  8. 如申請專利範圍第1項之散熱基板,其中,於前述基板與前述電極層及前述銲錫層之間具備有密接層。
  9. 如申請專利範圍第7項或第8項之散熱基板,其中,前述密接層係將鈦、鎳、鉻、鉬中任一者作為主成分之材料,或將鈦、鎳、鉻、鉬中任一者之合金作為主成分之材料所構成者。
  10. 如申請專利範圍第1項之散熱基板,其中,前述基板係由氮化鋁、碳化矽、以及矽中之任一個材料所構成者。
  11. 一種散熱基板之製造方法,係含有:於基板上形成具有窗部的電極層之步驟;及於上述窗部形成與上述電極層電性連接的銲錫層之步驟;在上述形成銲錫層之步驟中,係使前述銲錫層的外周部係與前述電極層的前述窗部的內周部連接,且使前述銲錫層之底部與前述基板的上表面以未間隔有前述電極層之方式連接;其中,上述銲錫層的接合強度係30MPa以上,且剪切應變係0.07以上。
  12. 如申請專利範圍第11項之散熱基板之製造方法,其中,於形成前述銲錫層的步驟中,於前述銲錫層設置連接於前述電極層上面之重疊部。
TW095134416A 2005-09-26 2006-09-18 銲錫層、使用該銲錫層之散熱基板及其製造方法 TWI411069B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005278958A JP4822155B2 (ja) 2005-09-26 2005-09-26 サブマウント及びその製造方法

Publications (2)

Publication Number Publication Date
TW200721411A TW200721411A (en) 2007-06-01
TWI411069B true TWI411069B (zh) 2013-10-01

Family

ID=37888834

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095134416A TWI411069B (zh) 2005-09-26 2006-09-18 銲錫層、使用該銲錫層之散熱基板及其製造方法

Country Status (5)

Country Link
US (1) US8310047B2 (zh)
EP (1) EP1939929B1 (zh)
JP (1) JP4822155B2 (zh)
TW (1) TWI411069B (zh)
WO (1) WO2007034791A1 (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102008054415A1 (de) * 2008-12-09 2010-06-10 Robert Bosch Gmbh Anordnung zweier Substrate mit einer SLID-Bondverbindung und Verfahren zur Herstellung einer solchen Anordnung
US9352532B2 (en) 2013-04-30 2016-05-31 Hewlett-Packard Development Company, L.P. Film stack including adhesive layer
JP6305127B2 (ja) * 2014-03-12 2018-04-04 三菱電機株式会社 半導体レーザ光源
US10104759B2 (en) * 2016-11-29 2018-10-16 Nxp Usa, Inc. Microelectronic modules with sinter-bonded heat dissipation structures and methods for the fabrication thereof
JP6897141B2 (ja) * 2017-02-15 2021-06-30 株式会社デンソー 半導体装置とその製造方法
JP2019145546A (ja) * 2018-02-16 2019-08-29 住友電工デバイス・イノベーション株式会社 半導体装置の製造方法
JP7324665B2 (ja) * 2019-09-13 2023-08-10 シチズンファインデバイス株式会社 サブマウント

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5816554A (ja) * 1981-07-22 1983-01-31 Mitsubishi Electric Corp 半導体素子用冷却装置の製造方法
JPS63164326A (ja) * 1986-12-26 1988-07-07 Nec Corp 半導体装置容器
JP2000114685A (ja) * 1998-10-07 2000-04-21 Kyocera Corp 配線基板
JP2001274499A (ja) * 2000-03-27 2001-10-05 Toshiba Electronic Engineering Corp 半導体レーザ装置及び半導体レーザチップのマウント方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04275482A (ja) * 1991-03-04 1992-10-01 Fujitsu Ltd 半導体装置用マウント
JPH06140540A (ja) * 1992-10-22 1994-05-20 Matsushita Electric Works Ltd ヒートシンク及びそのヒートシンクを用いた半導体装置の実装方法
KR100306842B1 (ko) * 1999-09-30 2001-11-02 윤종용 범프 패드에 오목 패턴이 형성된 재배치 웨이퍼 레벨 칩 사이즈 패키지 및 그 제조방법
JP2001127370A (ja) * 1999-10-22 2001-05-11 Kyocera Corp 半導体素子搭載用サブマウント
JP3509809B2 (ja) 2002-04-30 2004-03-22 住友電気工業株式会社 サブマウントおよび半導体装置
JP3882712B2 (ja) * 2002-08-09 2007-02-21 住友電気工業株式会社 サブマウントおよび半導体装置
JP2005286274A (ja) * 2004-03-31 2005-10-13 Uchihashi Estec Co Ltd はんだ付け方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5816554A (ja) * 1981-07-22 1983-01-31 Mitsubishi Electric Corp 半導体素子用冷却装置の製造方法
JPS63164326A (ja) * 1986-12-26 1988-07-07 Nec Corp 半導体装置容器
JP2000114685A (ja) * 1998-10-07 2000-04-21 Kyocera Corp 配線基板
JP2001274499A (ja) * 2000-03-27 2001-10-05 Toshiba Electronic Engineering Corp 半導体レーザ装置及び半導体レーザチップのマウント方法

Also Published As

Publication number Publication date
EP1939929B1 (en) 2016-08-03
US8310047B2 (en) 2012-11-13
TW200721411A (en) 2007-06-01
US20100263849A1 (en) 2010-10-21
EP1939929A1 (en) 2008-07-02
WO2007034791A1 (ja) 2007-03-29
JP4822155B2 (ja) 2011-11-24
JP2007095715A (ja) 2007-04-12
EP1939929A4 (en) 2012-03-14

Similar Documents

Publication Publication Date Title
TWI411069B (zh) 銲錫層、使用該銲錫層之散熱基板及其製造方法
US8581106B2 (en) Submount
JP6128448B2 (ja) 半導体発光装置
TWI243488B (en) Electrical contact-area for optoelectronic semiconductor-chip and its production method
JP2006261569A (ja) サブマウントおよびその製造方法
TW201330206A (zh) 高溫應用所用之銲錫凸塊/凸塊下金屬層結構
JPWO2004084319A1 (ja) 発光素子搭載用部材およびそれを用いた半導体装置
WO2003094220A1 (fr) Embase et dispositif a semi-conducteur
JP5120653B2 (ja) 半田層及びそれを用いたデバイス接合用基板並びに該デバイス接合用基板の製造方法
US8193070B2 (en) Method for bonding layers, corresponding device and organic light-emitting diode
JP5526336B2 (ja) 半田層及びそれを用いたデバイス接合用基板並びにその製造方法
JP2006278463A (ja) サブマウント
US6653215B1 (en) Contact to n-GaN with Au termination
JP2006286944A (ja) サブマウント及びその製造方法
WO2004107438A1 (ja) サブマウントおよびそれを用いた半導体装置
TWI446577B (zh) Led晶圓之接合方法、led晶粒之製造方法及led晶圓與基體之接合結構
JP2007109829A (ja) 半田接合形成方法
TWI489596B (zh) 晶片結構
JPH038346A (ja) ろう付け材料
TW200840079A (en) Eutectic bonding material of LED and packaging method
JP2015056646A (ja) 半導体装置及び半導体モジュール
JP5062545B2 (ja) サブマウント及びその製造方法
JPS5842285A (ja) 半導体レ−ザ装置の製造方法
JP2006286943A (ja) サブマウント基板及びその製造方法
JPS6014445A (ja) 化合物半導体装置

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees