TW381334B - Semiconductor modules - Google Patents
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- TW381334B TW381334B TW087110874A TW87110874A TW381334B TW 381334 B TW381334 B TW 381334B TW 087110874 A TW087110874 A TW 087110874A TW 87110874 A TW87110874 A TW 87110874A TW 381334 B TW381334 B TW 381334B
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- H—ELECTRICITY
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
- H01L2225/1023—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being an insulating substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1047—Details of electrical connections between containers
- H01L2225/1052—Wire or wire-like electrical connections
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1094—Thermal management, e.g. cooling
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
經濟部中央標準局員工消費合作社印製 Λ7 B7五、發明説明(1 ) [發明所靥之技術領域] 本發明有關於裝載有樹脂密封型之半導體封裝之半導體 模組。 [習知之技術] 圖4是剖面圖,用來表示習知之半導體模組。在該圖中 ,符號1是半導體元件,8是安裝用基板,9是用Μ將半導 體元件1固定在安裝用基板8之接著材料,7是接線,用來 使形成在半導體元件1之電極(圖中未顯示)和形成在安裝 用基板8之電極(圖中未顯示)進行電連接,10是密封樹脂 。使用接著材料9將半導體元件1直接固定在安裝用基板8 ,使用接線7使半導體元件1上之電極(圖中未顧示)和安裝 用基板8上之電極(圖中未顯示)進行電連接,和利用用Κ 保護半導體元件1使其不會受到周圍環境之影響之密封樹 脂10,用來密封半導體元件1和接線7,經由形成半導體模 組,可Μ使半導體元件1之安裝面積縮小和可Μ使其重量 減輕。 [發明所欲解決之問題] 習知之半専體模組因為依上述方式構成,所Μ半導體元 件1之單體之特性檢査,由於轉送等之問題在技術上和成 本上很難解決,因為不能確認半導體元件1之可靠度,所 Κ在安裝後之半専體模組之階段才知道不良,因此會有半 導體模組之產量降低和成本變高之問題。 另外,在可攜帶式電子機器,例如可攜帶式電話或可攜 帶式個人電腦,随著更進一層小型化或減輕重量‘之要求, -----------裝-- (請先閱讀背面之注意事項再填寫本頁) 、-° 本紙張尺度適用中國國家標準(CNS ) Α4規格(210Χ 297公釐) -4 - ΑΊ Β7 經濟部中央標準局員工消費合作社印製 五、發明説明( 2 ) 1 1 要 求 經 由 零 件 之 小 型 化 和 半 導 體 封 裝 之 安 裝 面 積 和 體 積 之 1 1 1 m 小 用 來 使 半 導 體 模 組 小 型 化 〇 1 I 本 發 明 用 來 解 決 上 述 之 問 題 9 其 巨 的 是 提 供 半 導 體 模 組 請 先 1 1 閱 I 可 Μ 很 容 晃 進 行 半 導 體 元 件 之 單 體 之 特 性 檢 査 可 Μ Μ 讀 背 I 面 高1廣裝 載 可 靠 度 被 確 認 之 多 個 之 半 導 體 封 裝 0 之 注 1 1 意 1 | [解決問題之手段] 事 項 1 I 再 1 | 本 發 明 之 半 導 體 模 組 具 備 有 半 導 體 元 件 ! 配 線 圖 型 填 寫 本 形 成 與 半 導 體 元 件 之 電 極 產 生 電 連 接 半 導 體 封 裝 具 有 頁 1 I 密 封 樹 脂 除 了 配 線 圖 型 之 一 部 份 外 用 來 密 封 半 導 體 元 1 | 件 及 其 周 邊 和 安 裝 基 板 用 來 裝 載 半 導 體 封 裝 其 中 在 1 .1 安 裝 基 板 上 重 叠 的 固 定 多 個 之 半 導 體 封 裝 和 利 用 接 線 用 1 訂 來 連 接 被 引 出 到 密 封 樹 脂 之 外 部 之 配 線 圖 型 部 和 安 裝 基 板 1 | 上 之 電 極 〇 1 I 另 外 半 導 體 封 裝 之 電 極 經 由 塊 體 與 形 成 在 基 板 上 之 配 1 1 I 線 圖 型 連 接 0 1 另 外 在 重 叠 於 安 裝 基 板 上 之 多 個 半 導 體 封 裝 之 間 安 1 I 裝 有 散 熱 憐 構 〇 1 | [發明之實施形態] 1 實 施 形 態 1 . 1 1 下 面 將 參 照 附 圖 用 來 說 明 本 發 明 之 一 實 施 形 態 之 裝 載 有 1 1 樹 脂 密 封 型 半 導 體 裝 置 之 半 導 體 模 組 0 圖 1是剖面圖 用 1 1 來 表 示 本 發 明 之 實 施 形 態 1之半導體模組 圖2是 剖 面 圖 ) 1 | 用 來 表 示 被 裝 載 在 圖 1之半導體模組之半導體封装 5在該 1 I 圖 中 符 號 1 1 a、 1 b是半導體元件 2 Λ 2a 2b是 基 板 t 1 1 f紙張尺度適用中國國家標準·( CMS ) Α4規格(210X 297公釐) -^ 經濟部中央標準局員工消費合作社印製 Λ7 B7五、發明説明(3 ) 3、3a、3b是形成在基板2、2a、2b上之配線圖型,4、4a 、4b是塊體,5是用Μ密封半導體元件1、la、lb之密封樹 脂,6、6a、6b是半導體封裝,7是接線,8是安装用基板 ,9是接著材料,10是密封樹脂,用來密封被裝載在安裝 用基板8上之半導體封裝6a、6b。 被裝載在本實施形態之半導體模組之半専體封裝如圖2 所示,其構成方式是利用塊體4用來使形成在半導體元件1 之電極(圖中未顯示)和基板2上之配線圖型3進行電連接, 利用密封樹脂5用來保護半導體元件1和塊體4使其不會受 到周圍環境之影響。另外,基板2之大小比半導體元件1之 大小稍大,促成與塊體4連接之配線圖型3之另外一端被引 出到密封樹脂5之外側。具有此種構造之半等體封裝6因為 在尺寸上比半導體元件1稍大和半導體元件1被樹脂密封, 所以可Μ很容易進行半導體元件1之單體之特性檢測。 本實施形態之半導體模組被構建成利用塊體4a、4b將2 種之半導體元件la、lb分別連接到基板2a、2b上之配媒圖 型3a、3b,對於利用密封樹脂5之密封所形成之半導體封 裝6a、6b,利用接著材料9將半導體封装6b固定在安装用 基板8上,和利用接著材料9將半導體封裝6a固定在半導體 封裝6 b之上,在連接到被引出至密封樹脂5之外側之半導 體元件la之配線圖型3a和被連接到半導體元件lb之配線圖 型3 b之間*在被引出到密封樹脂5之外側之配線圖型3 a和 安裝用基板8上之電極(圖中未顯示)之間,和在被引出到 密封樹脂5之外側之配線圖型3b和安裝用基板8上之電極( (請先閲讀背面之注意事項再填寫本頁)
、1T 本紙張尺度適用中國國家標準(CNS ) Α4規格(210X 297公釐) 6 經濟部中央標隼局員工消費合作社印製 Λ7 B7 _五、發明説明(4 ) 圖中未顯示)之間,經由接線7進行電連接。另外,裝載在 安裝用基板8上之半導體封裝6a、6b和接線7被密封樹脂10 密封。 依照本發明時,所具有之構造是使用樹脂密封K塊體4a 、4bf連接到基板2a、2b上之配線圖型3a、3b之半導體元 件1 a、1 b,和配線圖型3 a、3 b之一部份被引出到密封樹脂 之外側,經由將尺寸比半導體元件la、lb稍大而且可靠度 被確認之半導體封裝6a、6b重叠的安裝在該安裝用基板8 上,可Μ大幅的縮小半導體封裝6a和半導體封裝6b之安裝 面積,可Μ用來使半導體模組小型化。 實施形態2 . 圖3是用Μ表示本發明之實施形態2之半導體模組之剖面 圖。在該圖中,符號11是散熱機構,被接著材料9固定在 重叠安裝於該安裝用基板δ上之半導體封裝6a和半導體封 裝6b之間。另外,其他之構造因為與實施形態1相同,故 其說明在此加Μ省略。 依照本實施形態時,將散熱機構(例如散熱板等)11配置 在重叠安裝於該安裝用基板8上之半導體封裝6a和半導體 封裝6 b之間,利用接著材料9分別固定到半導體封裝6 a和 半導體封裝6b,可Μ獲得與實施形態1同樣之效果,和可 Μ防止由於半導體元件la、lb之高速動作時之發熱而造成 之半導體元件la、lb之溫度上升。 [發明之效果] 如上所述,依照本發明時,使用塊體將半導體元件電連 ---------- ''衣---_---;-訂 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) 7 五、發明説明(5 Μ Β7 份配配 部的之 一 叠側 之重外 型裝之 S 封 指 OUH 線體樹 配導封 和半密 件個到 元多出 體之引 導造被 半構用 , 種 使 型此 , 圖有上 線具板 配將基 之 ,用 上封裝 板密安 基脂該 在樹在 接被置 半的 在幅 Μ 大I 可 Κ 式可 方和 ΒΟΕ 種 , 這度 用靠 利可 , 之 接件 連元 板體 基導 用半 裝認 安確 與段 來階 用之 部裝 型封 圖體 線導 獲 以 可 和 度 靠 可 高 提 Μ 可 積 面。 裝組 安模 之體 裝導 封半 體之 導化 半型 小 小 縮得 半之 之件 上元 板體 基導 用半 装於 安由 於止 叠防 重Μ 在可 由 , 經構 , 機 時 热 ΠΡ ^3/ 明散 發置 本配 照間 依之 ’ 裝 外封 另體 導 升 上 度 溫 之 件 元 體 導 半 之 成 造 而 熱 發 之 時 作 動 a 高 明 說 單 簡 之 圖 附 模 體 導 半 之 IX 態 形 施 實 之 明 發 本 示 表 來 用 圖 面 剖 是 1A 圖 ^--.-----.装-- (請先閱讀背面之注意事項再填寫本頁) -55 組 圖 面 剖 是 導 半 之 組 模 2 體 圖導 半 之 1X 態 形 施 實 之 明 發 本 在 載 裝 被 示 表 來 用 裝 封 體 模 體 導 半 之 2 態 形 施 實 之 明 發 本 示 表 來 用 圖 面 剖 是 3 圖 組 經濟部中央標隼局員工消費合作 組 模 體 導 半 -f--種 此 之 知 習 示 表 來 用 圖 1 面明 剖說 是之 4 號 符 件 元 體 導 半 型 圖 線 配 a 脂 樹 封 密 裝 封 體 導 半 板 基 線 接 板 基 用 裝 安 料 材 著 接 脂 樹 封 密 構 機 熱 散 |用中國國家標準(〇奶)六4規格(210'/ 297公釐) 8
Claims (1)
- ABCD 六、申請專利範圍 1 . 一種半導體模組,具備有: 半導體元件; 配線圖型,形成與上述之半導體元件之電極產生電連接; 半導體封裝,具有密封樹脂,除了上述配線圖型之一部 份外,用來密封上述之半導體元件及其周邊;和 安裝基板,用來裝載上述之半導體封裝; 其特激是 在上述之安裝基板上重叠的固定多個之上述半導體封裝 ,和利用接線用來連接被引出到上述密封樹脂之外部之上 述配線圖型和上述安裝基板上之電極。 2. 如申請專利範圍第1項之半導體模組,其中 半導體封裝之電極經由塊體與形成在基板上之配線圖型 連接。 3. 如申請專利範圍第1或2項之半導體模組,其中 在重叠於安裝基板上之多個半導體封裝之間,安裝有散 熱機構。 In nn tl —^|€ In I I I n^i n^t ill —mne i—J *'-° (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) Λ4規格(210 X 2<Π公釐》
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JP29728897A JP3644662B2 (ja) | 1997-10-29 | 1997-10-29 | 半導体モジュール |
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TW087110874A TW381334B (en) | 1997-10-29 | 1998-07-06 | Semiconductor modules |
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JP (1) | JP3644662B2 (zh) |
TW (1) | TW381334B (zh) |
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JP2816244B2 (ja) * | 1990-07-11 | 1998-10-27 | 株式会社日立製作所 | 積層型マルチチップ半導体装置およびこれに用いる半導体装置 |
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-
1997
- 1997-10-29 JP JP29728897A patent/JP3644662B2/ja not_active Expired - Lifetime
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- 1998-05-06 US US09/073,836 patent/US5903049A/en not_active Expired - Lifetime
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US5903049A (en) | 1999-05-11 |
JPH11135713A (ja) | 1999-05-21 |
JP3644662B2 (ja) | 2005-05-11 |
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