KR950024359A - 반도체장치 - Google Patents

반도체장치 Download PDF

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Publication number
KR950024359A
KR950024359A KR1019950000749A KR19950000749A KR950024359A KR 950024359 A KR950024359 A KR 950024359A KR 1019950000749 A KR1019950000749 A KR 1019950000749A KR 19950000749 A KR19950000749 A KR 19950000749A KR 950024359 A KR950024359 A KR 950024359A
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KR
South Korea
Prior art keywords
insulating film
film
trench
capacitor
sio
Prior art date
Application number
KR1019950000749A
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English (en)
Inventor
히데유키 가마타
줌페이 구마가이
Original Assignee
사토 후미오
가부시키가이샤 도시바
오카모토 세이시
도시바 마이크로일렉트로닉스 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 사토 후미오, 가부시키가이샤 도시바, 오카모토 세이시, 도시바 마이크로일렉트로닉스 가부시키가이샤 filed Critical 사토 후미오
Publication of KR950024359A publication Critical patent/KR950024359A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78642—Vertical transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H10B12/0383—Making the capacitor or connections thereto the capacitor being in a trench in the substrate wherein the transistor is vertical
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/39—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench
    • H10B12/395—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench the transistor being vertical
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/906—Dram with capacitor electrodes used for accessing, e.g. bit line is capacitor plate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)

Abstract

본 발명은 컷오프특성을 향상시킴과 더불어 캐패시터의 용량을 증가시킴에 그 목적이 있다.
워드선(23), SiO2막(22, 23) 및 P형 실리콘기판(21에 트렌치(25)를 형성하고, 이 트렌치(25)내의 워드선(23)의 측면위 및 P형 실리콘기판(21)의 측면상에 게이트절연막(26) 및 캐패시터절연막(27)을 형성한다. 다음에 트렌치(25)내의 게이트절연막(26), 캐패시터절연막(27), SiO2막(22, 24) 각각의 측면상 및 제2 SiO2막(24)의 위면에 Si막(28)을 퇴적시키고, 이 Si막(28)에 채널영역의 P형 확산층(34)과, 소스·드레인영역의 N형 확산층(35, 36), 비트선(40) 및 전하축적층(36a)을 형성한다. 다음에 트렌치(25)내측 및 Si막(28)상에 제4 SiO2막(37)을 형성하고, 트렌치(25)내에 Si기둥(39)을 형성한다. 따라서 컷오프 특성을 향상시킴과 더불어 캐패시터의 용량을 증가시킬 수 있다.

Description

반도체장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 제1실시예에 따른 반도체장치의 제조방법을 나타낸 것으로, 제1도의 다음 공정을 나타낸 종방향의 단면도,
제2도는 본 발명의 제1도에 나타낸 2-2선에 따른 단면도,
제3도는 본 발명의 제1도에 나타낸 3-3선에 따른 단면도.

Claims (4)

  1. 반도체기판과, 이 반도체기판의 표면상에 설치된 제1절연막, 이 제1절연막의 위에 설치된 게이트 전극, 이 게이트전극 및 상기 제1절연막의 위에 설치된 제2절연막, 상기 제1및 제2절연막과, 상기 게이트전극 및 상기 반도체기판에 설치된 트렌치, 이 트렌치내의 게이트전극의 표면상에 형성된 게이트절연막, 상기 트렌치내의 반도체기판의 측면상에 형성된 캐패시터절연막, 상기 캐패시터절연막과, 상기 게이트절연막 및 상기 제1, 제2절연막 각각의 표면상에 설치되고, 소스·드레인영역, 채널영역 및 캐패시터 전극 각각의 영역이 형성된 도전막 및, 상기 도전막내에 설치된 도전성의 기둥을 구비하여 구성된 것을 특징으로 하는 반도체장치.
  2. 제1항에 있어서, 상기 도전성의 기둥과 상기 도전막 사이에 제3절연막이 끼워져 있는 것을 특징으로 하는 반도체장치.
  3. 제2항에 있어서, 상기 제3절연막의 두께는 상기 캐패시터절연막의 그것 보다 얇은 것을 특징으로 하는 반도체장치.
  4. 제1항 또는 제2항에 있어서, 상기 도전성의 기둥은 상기 반도체기판과 전기적으로 접속되어 있는 것을 특징으로 하는 반도체장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950000749A 1994-01-18 1995-01-18 반도체장치 KR950024359A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP00355094A JP3197134B2 (ja) 1994-01-18 1994-01-18 半導体装置
JP94-3550 1994-01-18

Publications (1)

Publication Number Publication Date
KR950024359A true KR950024359A (ko) 1995-08-21

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ID=11560535

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950000749A KR950024359A (ko) 1994-01-18 1995-01-18 반도체장치

Country Status (3)

Country Link
US (1) US5561308A (ko)
JP (1) JP3197134B2 (ko)
KR (1) KR950024359A (ko)

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0165398B1 (ko) * 1995-05-26 1998-12-15 윤종용 버티칼 트랜지스터의 제조방법
JPH098290A (ja) * 1995-06-20 1997-01-10 Mitsubishi Electric Corp 半導体装置及びその製造方法
US5700727A (en) * 1995-07-24 1997-12-23 Micron Technology, Inc. Method of forming a thin film transistor
KR100214074B1 (ko) * 1995-11-03 1999-08-02 김영환 박막트랜지스터 및 그 제조방법
KR19980028402A (ko) * 1996-10-22 1998-07-15 문정환 디램(dram) 셀의 구조 및 그 제조 방법
US6033919A (en) * 1996-10-25 2000-03-07 Texas Instruments Incorporated Method of forming sidewall capacitance structure
US6037620A (en) * 1998-06-08 2000-03-14 International Business Machines Corporation DRAM cell with transfer device extending along perimeter of trench storage capacitor
US6563155B2 (en) 1998-09-08 2003-05-13 Texas Instruments Incorporated Cross point type DRAM cell composed of a pillar having an active region
US6262448B1 (en) * 1999-04-30 2001-07-17 Infineon Technologies North America Corp. Memory cell having trench capacitor and vertical, dual-gated transistor
US6228706B1 (en) * 1999-08-26 2001-05-08 International Business Machines Corporation Vertical DRAM cell with TFT over trench capacitor
US6603168B1 (en) * 2000-04-20 2003-08-05 Agere Systems Inc. Vertical DRAM device with channel access transistor and stacked storage capacitor and associated method
US6794242B1 (en) * 2000-09-29 2004-09-21 Infineon Technologies Ag Extendible process for improved top oxide layer for DRAM array and the gate interconnects while providing self-aligned gate contacts
DE10130766B4 (de) * 2001-06-26 2005-08-11 Infineon Technologies Ag Vertikal-Transistor, Speicheranordnung sowie Verfahren zum Herstellen eines Vertikal-Transistors
DE10226583B4 (de) * 2002-06-14 2010-07-08 Qimonda Ag DRAM-Speicherzelle für schnellen Schreib-/Lesezugriff und Speicherzellenfeld
DE10260770B4 (de) 2002-12-23 2005-10-27 Infineon Technologies Ag DRAM-Speicher mit vertikal angeordneten Auswahltransistoren und Verfahren zur Herstellung
DE10260769A1 (de) * 2002-12-23 2004-07-15 Infineon Technologies Ag DRAM-Speicher mit vertikal angeordneten Auswahltransistoren
DE10348006B4 (de) * 2003-10-15 2006-07-20 Infineon Technologies Ag Feldeffekttransistor, insbesondere vertikaler Feldeffekttransistor, Speicherzelle und Herstellungsverfahren
US7098540B1 (en) * 2003-12-04 2006-08-29 National Semiconductor Corporation Electrical interconnect with minimal parasitic capacitance
US7473596B2 (en) * 2003-12-19 2009-01-06 Micron Technology, Inc. Methods of forming memory cells
JP3930486B2 (ja) * 2004-02-26 2007-06-13 株式会社東芝 半導体装置およびその製造方法
US7309900B2 (en) * 2004-03-23 2007-12-18 Advanced Lcd Technologies Development Center Co., Ltd. Thin-film transistor formed on insulating substrate
KR100541515B1 (ko) * 2004-07-22 2006-01-11 삼성전자주식회사 수직 채널 패턴을 갖는 반도체 장치 및 이를 제조하는 방법
US7388248B2 (en) * 2004-09-01 2008-06-17 Micron Technology, Inc. Dielectric relaxation memory
US7120046B1 (en) 2005-05-13 2006-10-10 Micron Technology, Inc. Memory array with surrounding gate access transistors and capacitors with global and staggered local bit lines
US7371627B1 (en) 2005-05-13 2008-05-13 Micron Technology, Inc. Memory array with ultra-thin etched pillar surround gate access transistors and buried data/bit lines
US7888721B2 (en) 2005-07-06 2011-02-15 Micron Technology, Inc. Surround gate access transistors with grown ultra-thin bodies
JP5118347B2 (ja) * 2007-01-05 2013-01-16 株式会社東芝 半導体装置
JP2009038201A (ja) * 2007-08-01 2009-02-19 Elpida Memory Inc 半導体装置および半導体装置の製造方法
US8153482B2 (en) * 2008-09-22 2012-04-10 Sharp Laboratories Of America, Inc. Well-structure anti-punch-through microwire device
US8871576B2 (en) * 2011-02-28 2014-10-28 International Business Machines Corporation Silicon nanotube MOSFET
WO2012119053A1 (en) * 2011-03-02 2012-09-07 King Abdullah University Of Science And Technology Cylindrical-shaped nanotube field effect transistor
US8766404B1 (en) * 2013-01-10 2014-07-01 Intermolecular, Inc. Device design for partially oriented rutile dielectrics
CN104882487B (zh) * 2015-05-15 2017-12-08 合肥鑫晟光电科技有限公司 薄膜晶体管、阵列基板及其制造方法和显示装置
WO2018182689A1 (en) * 2017-03-31 2018-10-04 Intel Corporation Vertical shared gate thin-film transistor-based charge storage memory
US10818324B2 (en) * 2018-12-18 2020-10-27 Micron Technology, Inc. Memory array decoding and interconnects
US11043496B2 (en) 2018-12-18 2021-06-22 Micron Technology, Inc. Thin film transistors and related fabrication techniques
CN109713042A (zh) * 2018-12-28 2019-05-03 上海集成电路研发中心有限公司 场效应管和半导体器件
CN110729360B (zh) * 2019-10-25 2022-12-09 中国科学院微电子研究所 一种纳米管器件及其制造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4673962A (en) * 1985-03-21 1987-06-16 Texas Instruments Incorporated Vertical DRAM cell and method
US5164917A (en) * 1985-06-26 1992-11-17 Texas Instruments Incorporated Vertical one-transistor DRAM with enhanced capacitance and process for fabricating
US4829017A (en) * 1986-09-25 1989-05-09 Texas Instruments Incorporated Method for lubricating a high capacity dram cell
JP2661156B2 (ja) * 1988-07-14 1997-10-08 ソニー株式会社 半導体メモリ装置
JP3158462B2 (ja) * 1991-03-11 2001-04-23 松下電器産業株式会社 半導体記憶装置及びその製造方法
JPH0621462A (ja) * 1992-06-30 1994-01-28 Nec Corp 薄膜トランジスタ
JP2748072B2 (ja) * 1992-07-03 1998-05-06 三菱電機株式会社 半導体装置およびその製造方法
US5365097A (en) * 1992-10-05 1994-11-15 International Business Machines Corporation Vertical epitaxial SOI transistor, memory cell and fabrication methods

Also Published As

Publication number Publication date
JPH07211792A (ja) 1995-08-11
US5561308A (en) 1996-10-01
JP3197134B2 (ja) 2001-08-13

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