KR890013746A - 쌍극성 트랜지스터 및 그 제조방법 - Google Patents

쌍극성 트랜지스터 및 그 제조방법 Download PDF

Info

Publication number
KR890013746A
KR890013746A KR1019890001670A KR890001670A KR890013746A KR 890013746 A KR890013746 A KR 890013746A KR 1019890001670 A KR1019890001670 A KR 1019890001670A KR 890001670 A KR890001670 A KR 890001670A KR 890013746 A KR890013746 A KR 890013746A
Authority
KR
South Korea
Prior art keywords
region
impurity diffusion
semiconductor
bipolar transistor
impurity
Prior art date
Application number
KR1019890001670A
Other languages
English (en)
Other versions
KR0134887B1 (ko
Inventor
다까유끼 고미
Original Assignee
오오가 노리오
소니 가부시끼 가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 오오가 노리오, 소니 가부시끼 가이샤 filed Critical 오오가 노리오
Publication of KR890013746A publication Critical patent/KR890013746A/ko
Application granted granted Critical
Publication of KR0134887B1 publication Critical patent/KR0134887B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66272Silicon vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0821Collector regions of bipolar transistors
    • H01L29/0826Pedestal collectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)

Abstract

내용 없음.

Description

쌍극성 트랜지스터 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 쌍극성 트랜지스터의 일예의 단면도.
제2도는 그 요부 단면도.
제3도는 제2도의 III-III선 단면의 불순물 농도 분포를 도시하는 도면.

Claims (2)

  1. 제1도전형의 반도체 기체에 제2도전형의 반도체 영역이 형성되고, 그 반도체 영역내에 제1도전형의 반도체 영역이 형성되는 쌍극성 트랜지스터에 있어서, 상기 제2의 반도체 영역은, 베이스 인출 전극으로 부터의 불순물 확산에 의해 형성되는 제1의 불순물 확산 영역과, 활성 영역을 형성하는 제2의 불순물 확산 영역과, 그들 제1 및 제2의 불순물 확산 영역사이를 접속하기 위한 제3의 불순물 확산 영역으로 이루어지며, 상기 제3의 불순물 확산 영역과 상기 제1도전형의 반도체 기체의 접근 근처에는, 제1도전형의 불순물을 도입한 확산 억제영역이 설치되는 것을 특징으로 하는 쌍극성 트랜지스터.
  2. 제1도전형의 반도체 기체위에 선택적으로 베이스 인출 전극이 형성되고, 그 베이스 인출 전극으로 부터의 불순물 확산으로 부터 제2도전형의 반도체 영역의 제1의 불순물 확산 영역을 형성하는 쌍극성 트랜지스터의 제조 방법에 있어서, 제2도전형의 불순물의 도입을 행하여 상기 제1의 불순물 확산 영역에 접하는 제3의 불순물 확산 영역을 형성함과 동시에 그것의 제3의 불순물 확산 영역의 근처에 제1도전형의 불순물의 도입을 행하여 확산 억제 영역을 형성하는 공정과, 상기한 제3의 불순물 확산 영역에 접하는 제2의 불순물 확산 영역을 형성하는 공정과, 상기 제2의 불순물 확산 영역내에 제1도전형의 반도체 영역을 형성하는 공정을 갖는 것을 특징으로 하는 쌍극성 트랜지스터의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890001670A 1988-02-16 1989-02-14 쌍극성 트랜지스터 및 그 제조방법 KR0134887B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP63033686A JP2623635B2 (ja) 1988-02-16 1988-02-16 バイポーラトランジスタ及びその製造方法
JP63-33686 1988-02-16

Publications (2)

Publication Number Publication Date
KR890013746A true KR890013746A (ko) 1989-09-25
KR0134887B1 KR0134887B1 (ko) 1998-04-18

Family

ID=12393312

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890001670A KR0134887B1 (ko) 1988-02-16 1989-02-14 쌍극성 트랜지스터 및 그 제조방법

Country Status (5)

Country Link
US (1) US4994881A (ko)
EP (1) EP0329401B1 (ko)
JP (1) JP2623635B2 (ko)
KR (1) KR0134887B1 (ko)
DE (1) DE68922231T2 (ko)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2748420B2 (ja) * 1988-08-12 1998-05-06 ソニー株式会社 バイポーラトランジスタ及びその製造方法
IT1230895B (it) * 1989-06-22 1991-11-08 Sgs Thomson Microelectronics Transistore di potenza integrabile con ottimizzazione dei fenomeni di rottura secondaria diretta.
JPH03138946A (ja) * 1989-10-24 1991-06-13 Sony Corp 半導体装置
DE69032597T2 (de) * 1990-02-20 1999-03-25 Kabushiki Kaisha Toshiba, Kawasaki, Kanagawa Bipolartransistor mit Heteroübergang
KR920007211A (ko) * 1990-09-06 1992-04-28 김광호 고속 바이폴라 트랜지스터 및 그의 제조방법
US5204277A (en) * 1992-02-03 1993-04-20 Motorola, Inc. Method of forming bipolar transistor having substrate to polysilicon extrinsic base contact
US5294558A (en) * 1993-06-01 1994-03-15 International Business Machines Corporation Method of making double-self-aligned bipolar transistor structure
JPH0831841A (ja) * 1994-07-12 1996-02-02 Sony Corp 半導体装置及びその製造方法
US6808999B2 (en) * 1994-09-26 2004-10-26 Sony Corporation Method of making a bipolar transistor having a reduced base transit time
US7199447B2 (en) * 1995-08-25 2007-04-03 Micron Technology, Inc. Angled implant to improve high current operation of bipolar transistors
US5719082A (en) * 1995-08-25 1998-02-17 Micron Technology, Inc. Angled implant to improve high current operation of bipolar transistors
JP2000252294A (ja) 1999-03-01 2000-09-14 Nec Corp 半導体装置及びその製造方法
US6838350B2 (en) * 2003-04-25 2005-01-04 Micrel, Inc. Triply implanted complementary bipolar transistors
CN112151532B (zh) * 2020-09-07 2022-10-25 杰华特微电子股份有限公司 用于静电防护的半导体器件

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4495512A (en) * 1982-06-07 1985-01-22 International Business Machines Corporation Self-aligned bipolar transistor with inverted polycide base contact
JPS60251664A (ja) * 1984-05-28 1985-12-12 Sony Corp 半導体装置の製造方法
US4706378A (en) * 1985-01-30 1987-11-17 Texas Instruments Incorporated Method of making vertical bipolar transistor having base above buried nitride dielectric formed by deep implantation
JPS6218763A (ja) * 1985-07-18 1987-01-27 Sanyo Electric Co Ltd バイポ−ラトランジスタ
US4755476A (en) * 1985-12-17 1988-07-05 Siemens Aktiengesellschaft Process for the production of self-adjusted bipolar transistor structures having a reduced extrinsic base resistance
IT1188309B (it) * 1986-01-24 1988-01-07 Sgs Microelettrica Spa Procedimento per la fabbricazione di dispositivi elettronici integrati,in particolare transistori mos a canale p ad alta tensione
CA1298921C (en) * 1986-07-02 1992-04-14 Madhukar B. Vora Bipolar transistor with polysilicon stringer base contact

Also Published As

Publication number Publication date
JPH01208864A (ja) 1989-08-22
DE68922231D1 (de) 1995-05-24
JP2623635B2 (ja) 1997-06-25
KR0134887B1 (ko) 1998-04-18
EP0329401A3 (en) 1990-02-21
EP0329401B1 (en) 1995-04-19
DE68922231T2 (de) 1995-08-31
EP0329401A2 (en) 1989-08-23
US4994881A (en) 1991-02-19

Similar Documents

Publication Publication Date Title
KR900004031A (ko) 바이폴러 트랜지스터 및 그 제조방법
KR900015353A (ko) 반도체장치
KR890013746A (ko) 쌍극성 트랜지스터 및 그 제조방법
KR840005926A (ko) 반도체 집적 회로 장치의 제조 방법
KR930006972A (ko) 전계 효과 트랜지스터의 제조 방법
KR890016651A (ko) 반도체 집적회로 장치의 제조방법
KR900007051A (ko) 반도체장치의 제조방법
KR850000815A (ko) 정확히 설정된 동작전압을 갖는 반도체 과전압 억제기 및 그의 제조방법
KR970077740A (ko) 반도체 장치 및 그 제조 방법
KR930005259A (ko) 반도체 장치 및 그 제조 방법
KR920017279A (ko) Mos형 반도체장치 및 그 제조방법
KR860009489A (ko) 반도체 집적회로장치 및 그 제조방법
KR910008861A (ko) 집적회로소자
KR890016626A (ko) 반도체장치
KR970054357A (ko) 반도체장치 및 그 제조방법
KR900015311A (ko) 반도체장치 및 그 제조방법
KR910003834A (ko) 반도체장치의 제조방법
KR910008850A (ko) 반도체 디바이스
KR910005391A (ko) 반도체장치 및 그 제조방법
KR970003934A (ko) BiCMOS 반도체장치 및 그 제조방법
KR920022563A (ko) 반도체 장치 및 그 제조방법
KR900015316A (ko) 반도체장치
KR910008853A (ko) 반도체장치와 그 제조방법
KR890007402A (ko) 반도체장치
KR890013792A (ko) 반도체장치 및 그 제조방법

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20120104

Year of fee payment: 15

EXPY Expiration of term