KR100875661B1 - Method for fabricating semiconductor device - Google Patents

Method for fabricating semiconductor device Download PDF

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KR100875661B1
KR100875661B1 KR1020070111159A KR20070111159A KR100875661B1 KR 100875661 B1 KR100875661 B1 KR 100875661B1 KR 1020070111159 A KR1020070111159 A KR 1020070111159A KR 20070111159 A KR20070111159 A KR 20070111159A KR 100875661 B1 KR100875661 B1 KR 100875661B1
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South Korea
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amorphous carbon
etching
layer
carbon film
film
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KR1020070111159A
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Korean (ko)
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이해정
조용태
최익수
오상록
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주식회사 하이닉스반도체
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks

Abstract

The semiconductor device fabricating method is provided to improve the reliability and stability of the semiconductor device by improving the stability of the etching process. The semiconductor device fabricating method comprises as follows. A step is for forming the amorphous carbon layer(23A) on the substrate(21) in which the etched layer(22) is formed. A step is for doping the carbon ion in the amorphous carbon layer. A step is for patterning the amorphous carbon layer. A step is for etching the etched layer using the etching barrier wall as the patterned amorphous carbon layer. The etched layer has an additional lamination film in its own lower part and It can become the etch barrier layer for etching this lamination film.

Description

반도체 소자 제조 방법{METHOD FOR FABRICATING SEMICONDUCTOR DEVICE}Semiconductor device manufacturing method {METHOD FOR FABRICATING SEMICONDUCTOR DEVICE}

본 발명은 반도체 소자의 제조 기술에 관한 것으로, 특히 패턴 균일도를 증가시키기 위한 반도체 소자 제조 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing technology, and more particularly, to a semiconductor device manufacturing method for increasing pattern uniformity.

반도체 소자가 고집적화됨에 따라 마스크(mask) 작업시 포토레지스트의 두께를 감소시켜야 하고, 이로 인해 포토레지스트만으로는 피식각층의 식각이 어려워지고 있다.As the semiconductor devices are highly integrated, the thickness of the photoresist must be reduced during the masking operation, which makes it difficult to etch the etching target layer using only the photoresist.

이를 위해 포토레지스트의 하부에 하드마스크막(hardmask)을 개재시키는 방식이 제안되었다. 그리고, 하드마스크막으로는 비정질카본막(amorphous carbon layer)이 대표되고 있으며, 비정질카본막을 보다 효율적으로 식각하기 위해 비정질카본막 상에 실리콘산화질화막(SiON)과 반사방지막(bottom reflective coating layer)을 추가로 형성한다.For this purpose, a method of interposing a hard mask under the photoresist has been proposed. In addition, an amorphous carbon layer is represented as a hard mask layer, and a silicon oxynitride layer (SiON) and a bottom reflective coating layer are formed on the amorphous carbon layer in order to more efficiently etch the amorphous carbon layer. To form additionally.

도 1a 내지 도 1c는 종래기술에 따른 반도체 소자의 제조 방법을 나타낸 공정단면도이다.1A to 1C are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the prior art.

도 1a에 도시된 바와 같이, 기판(11) 상에 피식각층(12), 비정질카본막(13), 실리콘산화질화막(14), 반사방지막(15) 및 포토레지스트패턴(16)을 순차적으로 형성한다.As shown in FIG. 1A, an etched layer 12, an amorphous carbon film 13, a silicon oxynitride film 14, an antireflection film 15, and a photoresist pattern 16 are sequentially formed on the substrate 11. do.

피식각층(12)은 질화막(nitride)으로 형성하고, 비정질카본막(13)은 카본-카본(C-C) 결합 및 카본-수소(C-H) 결합이 혼합되어 있는 구조를 갖는다.The etched layer 12 is formed of a nitride film, and the amorphous carbon film 13 has a structure in which a carbon-carbon (C-C) bond and a carbon-hydrogen (C-H) bond are mixed.

도 1b에 도시된 바와 같이, 포토레지스트패턴(16)을 식각장벽으로 반사방지막(15)과 실리콘산화질화막(14)을 순차적으로 식각한 후, 식각된 실리콘산화질화막패턴(14A)을 식각장벽으로 비정질카본막(13)을 식각한다.As shown in FIG. 1B, the anti-reflection film 15 and the silicon oxynitride film 14 are sequentially etched using the photoresist pattern 16 as an etch barrier, and then the etched silicon oxynitride film pattern 14A is etched into the etch barrier. The amorphous carbon film 13 is etched.

비정질카본막(13)의 식각은 산소를 포함한 플라즈마(plasma)를 이용하는 건식식각으로 진행한다. 그리고, 포토레지스트패턴(16)과 반사방지막(15)은 비정질카본막(13) 식각시 제거된다.Etching of the amorphous carbon film 13 proceeds to dry etching using a plasma containing oxygen. The photoresist pattern 16 and the anti-reflection film 15 are removed during etching of the amorphous carbon film 13.

도 1c에 도시된 바와 같이, 식각된 비정질카본막패턴(13A)을 식각장벽으로 피식각층(12)을 식각한다.As illustrated in FIG. 1C, the etched layer 12 is etched using the etched amorphous carbon film pattern 13A as an etch barrier.

피식각층(12)의 식각은 CF계의 식각가스에 O2 및 Ar 가스를 첨가한 플라즈마로 진행한다. 이로써, 피식각층패턴(12A)이 형성된다.The etching of the etched layer 12 proceeds with a plasma in which O 2 and Ar gas are added to the CF-based etching gas. As a result, the etching target layer pattern 12A is formed.

그러나, 피식각층(12) 식각시, 실리콘산화질화막패턴(14A)이 제거되어 비정질카본막패턴(13A)이 노출될 경우에는 식각플라즈마 내의 불소(F) 또는 산소(O)에 의하여 비정질카본막(13A)의 결합구조가 파괴 또는 변형되는 문제가 발생한다. 또한, 높은 에너지를 갖는 플라즈마 이온, 특히 아르곤(Ar) 가스가 기판(11)과 충돌하므로써 기판 온도가 상승하고, 이에 따라 비정질카본막패턴(13A)이 열팽창하여 변형이 발생한다.However, when the etching layer 12 is etched, when the silicon oxynitride layer pattern 14A is removed and the amorphous carbon layer pattern 13A is exposed, the amorphous carbon layer may be formed by fluorine (F) or oxygen (O) in the etching plasma. The problem arises that the bonding structure of 13A) is broken or deformed. In addition, when the plasma ions having high energy, in particular, argon (Ar) gas collide with the substrate 11, the substrate temperature rises, whereby the amorphous carbon film pattern 13A thermally expands and deformation occurs.

도 2는 변형된 비정질카본막패턴에 의해 식각된 피식각층을 촬영한 전자현미경사진이다.2 is an electron micrograph of an etching target layer etched by the modified amorphous carbon film pattern.

도 2를 참조하면, 피식각층의 식각과정에 발생한 비정질카본막패턴의 변형으로 인하여 피식각층(12)의 선폭 균일도가 불량한 것을 확인할 수 있다.Referring to FIG. 2, it can be seen that the line width uniformity of the etched layer 12 is poor due to the deformation of the amorphous carbon film pattern generated during the etching process of the etched layer.

따라서, 피식각층(12)의 식각과정에 비정질카본막패턴의 변형을 방지할 수 있는 기술의 필요성이 제기되고 있다.Therefore, there is a need for a technology capable of preventing deformation of the amorphous carbon film pattern in the etching process of the etched layer 12.

본 발명은 상기한 종래기술의 문제점을 해결하기 위해 제안된 것으로서, 비정질카본막을 하드마스크막으로 사용하는 식각공정에서, 비정질카본막의 변형을 방지하여 피식각층의 패턴 균일도를 증가시키는 반도체 소자 제조 방법을 제공하는데 그 목적으로 한다.The present invention is proposed to solve the above problems of the prior art, in the etching process using an amorphous carbon film as a hard mask film, a semiconductor device manufacturing method for increasing the pattern uniformity of the etching layer by preventing deformation of the amorphous carbon film For the purpose of providing it.

상기의 목적을 달성하기 위한 본 발명의 반도체 소자 제조 방법은 피식각층이 형성된 기판상에 비정질카본막을 형성하는 단계, 상기 비정질카본막에 카본이온을 도핑하는 단계, 상기 비정질카본막을 패터닝하는 단계 및 상기 패터닝된 비정질카본막을 식각장벽으로 피식각층을 식각하는 단계를 포함하여 이루어짐을 특징으로 한다.The semiconductor device manufacturing method of the present invention for achieving the above object comprises the steps of forming an amorphous carbon film on a substrate on which an etched layer is formed, doping carbon ions into the amorphous carbon film, patterning the amorphous carbon film and the And etching the layer to be etched using the patterned amorphous carbon film as an etch barrier.

상술한 바와 같은 과제 해결 수단을 바탕으로 하는 본 발명은 하드마스크막, 즉 비정질카본막의 변형을 방지하고 이를 통해 피식각층의 패턴 균일도를 향상시킨다.The present invention based on the above-mentioned means for solving the problem prevents the deformation of the hard mask film, that is, the amorphous carbon film, thereby improving the pattern uniformity of the etched layer.

따라서, 식각공정의 안정성을 향상시킬 수 있으며, 나아가 반도체 소자의 신뢰성 및 안정성을 향상시킬 수 있다.Therefore, the stability of the etching process can be improved, and further, the reliability and stability of the semiconductor device can be improved.

이하, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자가 본 발명의 기술적 사상을 용이하게 실시할 수 있을 정도로 상세히 설명하기 위해 본 발명의 가장 바람직한 실시예를 첨부한 도면을 참조하여 설명한다.DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention.

도 3a 내지 도 3e는 본 발명의 실시예에 따른 반도체 소자의 제조 방법을 나타낸 공정단면도이다.3A to 3E are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment of the present invention.

도 3a에 도시된 바와 같이, 기판(21) 상에 피식각층(22) 및 비정질카본막(23)을 식각한다.As shown in FIG. 3A, the etched layer 22 and the amorphous carbon film 23 are etched on the substrate 21.

피식각층(22)은 자신의 하부에 추가적인 적층막을 두고, 이 적층막을 식각하기 위한 식각장벽층이 될 수 있다. 예를 들면, 게이트전극층을 적층시키고, 이 게이트전극층을 식각하기 위한 게이트하드마스크막일 수 있다. 이를 위해 피식각층(22)은 질화막으로 형성할 수 있다.The etched layer 22 may be an etch barrier layer for etching the laminated film with an additional laminated film under its own layer. For example, it may be a gate hard mask film for laminating a gate electrode layer and etching the gate electrode layer. To this end, the etching layer 22 may be formed of a nitride film.

그리고, 비정질카본막(23)은 카본-카본(C-C) 결합 및 카본-수소(C-H) 결합이 혼합된 구조를 갖는다.In addition, the amorphous carbon film 23 has a structure in which a carbon-carbon (C-C) bond and a carbon-hydrogen (C-H) bond are mixed.

도 3b에 도시된 바와 같이, 비정질카본막(23)에 카본이온(carbon ion)을 도핑(doping)시킨다. As shown in FIG. 3B, carbon ions are doped into the amorphous carbon film 23.

카본이온의 도핑은 이온주입 공정으로 20~100KeV의 이온주입 에너지(energy)와 1E1017~1E1018 atoms/cm2의 주입량으로 진행한다. 또한, 카본이온은 금속기상 진공아크(MEtal Vapor Vacuum Arc: MEVVA)방식을 통해 이온화된다.Doping of the carbon ions proceeds with an ion implantation energy of 20 to 100 KeV and an implantation amount of 1E1017 to 1E1018 atoms / cm 2 . In addition, carbon ions are ionized through a metal vapor vacuum arc (MEVVA) method.

이렇게 비정질카본막(23)에 카본이온을 도핑할 경우, 비정질카본막(23A) 내의 카본 밀도가 증가되며, 이에 따라 비정질카본막(23A)의 경도가 증가된다.When the carbon ions are doped into the amorphous carbon film 23 in this manner, the carbon density in the amorphous carbon film 23A is increased, thereby increasing the hardness of the amorphous carbon film 23A.

도 3c에 도시된 바와 같이, 카본이온이 도핑된 비정질카본막(23A) 상에 실리콘산화질화막(24), 반사방지막(25) 및 포토레지스트패턴(26)을 순차적으로 형성한다.As shown in FIG. 3C, the silicon oxynitride film 24, the antireflection film 25, and the photoresist pattern 26 are sequentially formed on the carbon ion doped amorphous carbon film 23A.

실리콘산화질화막(24)은 비정질카본막(23A)을 식각하기 위한 하드마스크막에 해당하고, 포토레지스트패턴(26)은 피식각층의 라인/스페이스(line/space)를 정의하기 위해 노광 및 현상된 상태이다.The silicon oxynitride film 24 corresponds to a hard mask film for etching the amorphous carbon film 23A, and the photoresist pattern 26 is exposed and developed to define a line / space of the etched layer. It is a state.

도 3d에 도시된 바와 같이, 포토레지스트패턴(26)을 식각장벽으로 반사방지막(25)과 실리콘산화질화막(24)을 순차적으로 식각(27)한 후, 식각된 실리콘산화질화막패턴(24A)을 식각장벽으로 비정질카본막(23A)을 식각(28)하여 비정질카본막패턴(23B)을 형성한다.As shown in FIG. 3D, the anti-reflection film 25 and the silicon oxynitride film 24 are sequentially etched 27 using the photoresist pattern 26 as an etch barrier, and then the etched silicon oxynitride film pattern 24A is etched. The amorphous carbon film 23A is etched 28 as an etch barrier to form the amorphous carbon film pattern 23B.

비정질카본막(23A)의 식각은 CCP(Capacitively Coupled Plasma) 또는 ICP(Inductively Coupled Plasma) 방식의 고밀도 플라즈마 장치에서 진행하며, 산소를 포함하는 식각가스로 발생된 플라즈마를 이용한다.The etching of the amorphous carbon film 23A is performed in a high density plasma apparatus of a capacitively coupled plasma (CCP) or inductively coupled plasma (ICP) method, and uses a plasma generated by an etching gas containing oxygen.

더욱 자세하게 설명하면, 비정질카본막(23A)의 식각은 산소(O2)가스로 발생된 플라즈마(plasma)를 이용하는 건식식각으로 진행하거나, 산소에 질소(N2) 또는 아르곤(Ar)를 혼합한 가스로 발생된 플라즈마를 이용한다.More specifically, the etching of the amorphous carbon film 23A may be performed by dry etching using a plasma generated by oxygen (O 2 ) gas, or by mixing nitrogen (N 2 ) or argon (Ar) with oxygen. Use plasma generated as a gas.

또는, 비정질카본막(23A)의 식각은 SO2가스로 발생된 플라즈마(plasma)를 이 용하는 건식식각으로 진행하거나, SO2가스에 질소(N2) 또는 아르곤(Ar)를 혼합한 가스로 발생된 플라즈마를 이용한다.Alternatively, the etching of the amorphous carbon film (23A) is a gas mixture of the plasma (plasma) and nitrogen (N 2) or argon (Ar) in progress or, SO 2 gas as a dry etching that uses the generated with SO 2 gas The generated plasma is used.

그리고, 포토레지스트패턴(26)과 반사방지막(25)은 비정질카본막(23A) 식각시 소모되어 제거된다. 또는 포토레지스트패턴(26)과 반사방지막(25)이 잔류할 수 있는데, 이는 별도의 스트립(strip)공정을 진행하여 제거할 수 있다.The photoresist pattern 26 and the anti-reflection film 25 are consumed and removed when the amorphous carbon film 23A is etched. Alternatively, the photoresist pattern 26 and the anti-reflection film 25 may remain, which may be removed by performing a separate strip process.

도 3e에 도시된 바와 같이, 비정질카본막패턴(23B)을 식각장벽으로 피식각층(22)을 식각한다.As illustrated in FIG. 3E, the etched layer 22 is etched using the amorphous carbon film pattern 23B as an etch barrier.

피식각층(22)의 식각은 CCP(Capacitively Coupled Plasma) 또는 ICP(Inductively Coupled Plasma) 방식의 고밀도 플라즈마 장치에서 진행하며, CF계의 식각가스, 예컨데 CF4와 CHF3를 혼합한 가스에 산소(O2) 및 아르곤(Ar) 가스를 첨가한 혼합가스로 발생된 플라즈마를 이용한다. 이때, 실리콘산화질화막(24A)은 소모되어 제거된다.The etching of the etching target layer 22 is performed in a high density plasma apparatus of a capacitively coupled plasma (CCP) or inductively coupled plasma (ICP) method, and oxygen (O) is mixed with a gas containing a CF-based etching gas, for example, CF 4 and CHF 3 . 2 ) and a plasma generated with a mixed gas to which argon (Ar) gas is added. At this time, the silicon oxynitride film 24A is consumed and removed.

이로써, 피식각층패턴(22A)이 형성된다.As a result, the etching target layer pattern 22A is formed.

전술한 바와 같은 본 발명의 실시예는, 비정질카본막패턴(23B)의 변형을 방지하고자, 비정질카본막(23) 내에 카본이온을 도핑한다.In the embodiment of the present invention as described above, in order to prevent the deformation of the amorphous carbon film pattern 23B, the carbon ions are doped into the amorphous carbon film 23.

비정질카본막(23)에 카본이온을 도핑할 경우, 비정질카본막(23) 내의 카본 밀도가 증가하여 비정질카본막(23A)의 경도가 증가한다.When carbon ions are doped into the amorphous carbon film 23, the carbon density in the amorphous carbon film 23 increases, so that the hardness of the amorphous carbon film 23A increases.

이렇게 경도가 증가된 비정질카본막(23A)을 식각장벽으로 피식각층(22)을 식각할 경우, 상술한 식각플라즈마에 의한 비정질카본막(23A)의 변형이 최소화되며, 이에 따라 균일 선폭을 갖는 피식각층패턴(22A)을 형성할 수 있다.When the etching layer 22 is etched using the amorphous carbon film 23A having the increased hardness as the etch barrier, the deformation of the amorphous carbon film 23A due to the above-described etching plasma is minimized. Each layer pattern 22A can be formed.

이상에서 설명한 본 발명은 전술한 실시예 및 첨부된 도면에 의해 한정되는 것이 아니고, 본 발명의 기술적 사상을 벗어나지 않는 범위 내에서 여러 가지 치환, 변형 및 변경이 가능하다는 것이 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자에게 있어 명백할 것이다.The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made in the art without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

도 1a 내지 도 1c는 종래기술에 따른 반도체 소자의 제조 방법을 나타낸 공정단면도.1A to 1C are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the prior art.

도 2는 변형된 비정질카본막패턴에 의해 식각된 피식각층을 촬영한 전자현미경사진.2 is an electron micrograph of the etched layer etched by the modified amorphous carbon film pattern.

도 3a 내지 도 3e는 본 발명의 실시예에 따른 반도체 소자의 제조 방법을 나타낸 공정단면도.3A to 3E are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment of the present invention.

* 도면의 주요부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings

21 : 기판21: substrate

22 : 피식각층22: etched layer

23A : 비정질카본막23A: Amorphous Carbon Film

Claims (8)

피식각층이 형성된 기판상에 비정질카본막을 형성하는 단계;Forming an amorphous carbon film on the substrate on which the etched layer is formed; 상기 비정질카본막에 카본이온을 도핑하는 단계;Doping carbon ions into the amorphous carbon film; 상기 비정질카본막을 패터닝하는 단계; 및Patterning the amorphous carbon film; And 상기 패터닝된 비정질카본막을 식각장벽으로 피식각층을 식각하는 단계Etching the etched layer using the patterned amorphous carbon film as an etch barrier 를 포함하는 반도체 소자 제조 방법.Semiconductor device manufacturing method comprising a. 제1항에 있어서,The method of claim 1, 상기 카본이온은 20~100KeV의 이온주입 에너지(energy)와 1E1017~1E1018 atoms/cm2의 주입량으로 비정질카본막에 도핑되는 반도체 소자 제조 방법.The carbon ion is a semiconductor device manufacturing method doped to the amorphous carbon film in the ion implantation energy (energy) of 20 ~ 100 KeV and the injection amount of 1E1017 ~ 1E1018 atoms / cm 2 . 제1항에 있어서,The method of claim 1, 상기 카본이온은 금속기상 진공아크(MEtal Vapor Vacuum Arc: MEVVA)방식을 통해 이온화되는 반도체 소자 제조 방법.The carbon ions are ionized by a metal vapor vacuum arc (MEVVA) method. 제1항에 있어서,The method of claim 1, 상기 피식각층은 질화막을 포함하는 반도체 소자 제조 방법.The etching layer is a semiconductor device manufacturing method comprising a nitride film. 제4항에 있어서,The method of claim 4, wherein 상기 피식각층을 식각하는 단계는 CF계열의 식각가스에 산소(O2) 및 아르곤(Ar) 가스를 첨가한 혼합가스로 발생된 플라즈마로 진행하는 반도체 소자 제조 방법.The etching of the etched layer may be performed by a plasma generated by a mixed gas in which oxygen (O 2 ) and argon (Ar) gas are added to the CF-based etching gas. 제5항에 있어서,The method of claim 5, 상기 CF계열의 식각가스는 CF4와 CHF3의 혼합가스인 반도체 소자 제조 방법.The CF-based etching gas is a mixture of CF 4 and CHF 3 gas manufacturing method. 제1항에 있어서,The method of claim 1, 상기 비정질카본막을 패터닝하는 단계는,The patterning of the amorphous carbon film may include: 상기 카본이온이 도핑된 비정질카본막 상에 실리콘산화질화막과 포토레지스트패턴을 순차적으로 형성하는 단계; 및Sequentially forming a silicon oxynitride film and a photoresist pattern on the carbon ion doped amorphous carbon film; And 상기 포토레지스트패턴을 식각장벽으로 상기 실리콘산화질화막 및 비정질카 본막을 식각하는 단계Etching the silicon oxynitride layer and the amorphous carbon layer using the photoresist pattern as an etch barrier 를 포함하는 반도체 소자 제조 방법.Semiconductor device manufacturing method comprising a. 제7항에 있어서,The method of claim 7, wherein 상기 비정질카본막을 식각하는 단계는 산소를 포함하는 플라즈마로 진행하는 반도체 소자 제조 방법.The etching of the amorphous carbon film is a semiconductor device manufacturing method of proceeding to a plasma containing oxygen.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113078043A (en) * 2021-03-24 2021-07-06 长鑫存储技术有限公司 Method for forming amorphous carbon film and semiconductor structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113078043A (en) * 2021-03-24 2021-07-06 长鑫存储技术有限公司 Method for forming amorphous carbon film and semiconductor structure

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