JPH01293626A - フレキシブル配線板におけるワイヤボンディング法 - Google Patents

フレキシブル配線板におけるワイヤボンディング法

Info

Publication number
JPH01293626A
JPH01293626A JP63124011A JP12401188A JPH01293626A JP H01293626 A JPH01293626 A JP H01293626A JP 63124011 A JP63124011 A JP 63124011A JP 12401188 A JP12401188 A JP 12401188A JP H01293626 A JPH01293626 A JP H01293626A
Authority
JP
Japan
Prior art keywords
wire
electrode
ball
bonding
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63124011A
Other languages
English (en)
Inventor
Takeshi Kozuka
小塚　武
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP63124011A priority Critical patent/JPH01293626A/ja
Publication of JPH01293626A publication Critical patent/JPH01293626A/ja
Pending legal-status Critical Current

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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 （技術分野） 本発明は、ＩＣカード等のフレキシブル配線板に適する
ワイヤボンディング法に関するものであり、特に薄型化
を要求されるフレキシブル配線板に好適なワイヤボンデ
ィング法に関するものである。
（従来の技術） 半導体チップ上のＡ１．電極とリードフレームのインナ
リードの端子との間を接続するために、ワイヤボンディ
ングが用いられており、これにはＡＵ線を用いた熱圧着
法、ＡＩｌ線を用いた超音波ボンディング法、両者を組
み合わせたサーモン二ック法などがある。
また、前記ワイヤボンディングにおいて、フレキシブル
配線板１上の半導体チップ３を実装した場合、第３図に
示されるように、Ａｕワイヤ４の先端に形成したＡｕボ
ール７Ｂを半導体チップ３の電極上に接合した（第一次
接合）後、Ａｕワイヤ４の端部をフレキシブル配線板１
の電極２にウェッジ側ボンディングとして接合している
（第二次接合）。このため、半導体チップ３に取り付け
られたＡｕワイヤ４のルーピングが半導体チップ３の上
面よりも０．３〜０．４　ｔｍ高くなり、このルーピン
グの突出したＡｕワイヤの部分は、ＩＣカードのように
薄型化が要求される実装手段として問題を生じている。
また、フレキシブル配線板１において、Ａｕワイヤ４の
一端が接合される電極２部分を拡大すると、第４図に示
されるように、電極２とフレキシブル配線板１との間に
接着剤９が介在しており、このため、加熱しながら超音
波を加えるサーモソニックボンディングでは、前記接着
剤９が熱により軟化し、超音波を吸収し、ワイヤボンデ
ィング性が非常に良くない欠点を有している。第４図に
おいて、１０はＣｕ箔、１１はＮｉメツキ層、１２はＡ
ｕメツキ層であり、このＡｕメツキ層１２の厚みは０．
５μｍ以上を必要とし、これはコスト高の要因上なって
いる。
薄型実装手段として、ＴＡＢ　（Ｔａｐｅ　Ａｕｔｏｍ
ａｔｅｄＢｏｎｄｉｎｇ）が用いられるが、このやり方
はワイヤボンディング方式に比してコストが高く、汎用
性のあるものではない。
（発明の目的） ところで、本発明ではワイヤボンディングにおいて、第
一次接合側であるポール側ボンディングの接合状態が非
常に良好であることから、このポール側ボンディングを
フレキシブル基板の電極として使用し、そして、従来の
ワイヤボンディングにおける第一次接合側と第二次接合
側とを交換し、ワイヤルーピングを低くおさえることに
着目したものである。
しかしながら、従来のワイヤボンディングにおける第二
次接合であるウェッジ側のボンディングを半導体チップ
に適用すると、超音波出力が大きいことから、半導体チ
ップにクラックが入ること、また、半導体チップ３にお
いてエツジショートを起こし易いことの問題を生じる。
本発明は、これらの問題を解決し、薄型化を実現しうる
ワイヤボンディングを提供することを目的とするもので
ある。
（発明の構成） 本発明は、前記目的を達成するために、半導体チップ側
電極とフレキシブル配線板側電極とをＡｕワイヤにより
接続するフレキシブル配線板におけるワイヤボンディン
グ法において、先ず半導体チップ側電極にＡｕボールに
よるＡｕバンプを形成し、次にフレキシブル配線板側電
極に対してＡｕワイヤの先端に形成したＡｕボールを介
して第一次接合を行い、次いで半導体チップ側電極に形
成した前記ＡｕバンプにＡｕワイヤをウェッジ状の第二
次接合を行うことを特徴とするものである。
以下、本発明の実施例を図面により説明する。
第１図（ａ）から（ｆ）は、本発明のボンディングの工
程を順次示した説明図である。第１図の各図において、
ポリイミド等からなるフレキシブル配線１上には、半導
体チップ３が配置され、この半導体チップ３上のＡＩ！
、電極と接続されるフレキシブル配線板側電極２の端子
が半導体チップ３の近傍に設けられている。
先ず、接続されるため用いられるワイヤであるＡｕワイ
ヤ４を支持したキャピラリ５を半導体チップ３側の上方
に位置せしめ、Ａｕワイヤ４の先端はトーチ電極６によ
ってＡｕボール７を形成する（第１図（ａ）の状態）。
このＡｕワイヤ４の先端に形成されたＡｕボール７を第
１図ら）に示すように、半導体チップ３に設けられた電
極に接着させる。
次に、前記Ａｕボール７を半導体チップ３上に残すため
、キャピラリ５は上方への移動時にＡｕワイヤ４を締め
付けることにより、Ａｕボール７をＡｕワイヤ４の先端
から切り取り、この結果、半導体チップ３上にはＡｕバ
ンプ７Ａが形成される。この後、Ａｕワイヤ４の先端に
は、トーチ電極６により新たにＡｕボール８が形成され
る（第１図（Ｃ）　）。
Ａｕボール８を有するＡｕワイヤ４はキャピラリ５と共
にフレキシブル配線板１の電極２の端子部に移動され、
Ａｕワイヤ４はその先端に形成したＡｕボール８を前記
電極２の端子に接続する（第１図（ロ））。そして、Ａ
ｕワイヤ４の他端を半導体チップ３上のＡｕバンプ７Ａ
に接続するため、キャピラリ５よりＡｕワイヤ４を所定
の長さだけ引き出して、第１図（ｅ）に示すように、Ａ
ｕワイヤ４の接合部をＡｕバンプ７Ａ上に高温状態に加
圧して接着する。
しかる後、キャピラリ５の上方への移動の際に、Ａｕワ
イヤ４は接合端で切断され、次の接合作業のために、Ａ
ｕワイヤ４の端部に次の工程のためのＡｕボール７を形
成する（第１図（ｆ））。
よって、本発明では、先ず半導体チップ３上にＡｕバン
プ７Ａを形成し、次に第一次接合としてフレキシブル配
線板１の電極２にＡｕワイヤ４の一端をボール側ボンデ
ィングにより固定し、第二次接合として半導体チップ３
のＡｕバンプ７Ａにワイヤ４の他端をウェッジ側ボンデ
ィングにより固定し、第１図（ｆ）で示される状態とな
る。
第２図には、本発明のワイヤボンディング法を適用して
得られたＡｕワイヤの取付部の構成が示されている。Ａ
ｕワイヤ４の一端とフレキシブル配線板１の電極２端子
とをボール側接合による第一次接合を行い、次いでＡｕ
ワイヤ４の他端を半導体チップ３の電極端子に形成した
Ａｕバンプ７Ａとウェッジ側接合による第二次接合を行
った結果、半導体チップ３の表面からのＡｕワイヤのル
ーピングの高さを充分低く押さえることができ、このた
めフレキシブル配線板に対してのＡｕワイヤの取り付け
を薄型状となすことを可能とした。
また、−次接合であるボール側接合をフレキシブル配線
板の電極端子側と接合することにより、フレキシブル配
線板１の電極におけるＡｕメツキ層８の厚みを０．１μ
ｍと薄くすることができる。
更に、半導体チップ３の表面にＡｕバンプを形成したこ
とにより、第二次接合側のウェッジ接合される際に超音
波出力は吸収され、半導体チップ３にクランクを生じる
ことなく、またエツジショートを阻止する作用をもたら
す。
（発明の効果） 本発明により、フレキシブル配線板に対するワイヤボン
ディングにおいて薄型化を実現しうる効果を有し、Ａｕ
ワイヤのルーピングの高さを半導体チップ上面から約０
．１閣の高さに押さえることができ、ＩＣカード等にお
ける薄型化実装手段として好適である。更に、本発明で
は、半導体チップに対して第二次接合としてのウェッジ
側ボンディングを行う場合に生じるチップクラックやエ
ツジショートを旨く解決した利点を有し、フレキシブル
配線板上の電極のＡｕメツキ層の厚みを薄くすることが
でき、コストの低減がはかれる利点を有する。
【図面の簡単な説明】
第１図（ａ）　、　（ｂ）　、　（Ｃ）　、　（ｄ）　
、　（ｅ）　、　（ｆ）は本発明のワイヤボンディング
の工程を順次示した概略断面図、 第２図は本発明のワイヤボンディングによるＡｕワイヤ
の取付状態を示す概略断面図、第３図は従来のワイヤボ
ンディングによるＡｕワイヤの取付状態を示す概略断面
図、 第４図は第３図のＩＶ−ＩＶ線による拡大断面図。 １・・・フレキシブル配線板、２・・・フレキシブル配
線板側の電極、３・・・半導体チップ、４・・・Ａｕワ
イヤ。 第１図

Claims (1)

    【特許請求の範囲】
  1. 　半導体チップ側電極とフレキシブル配線板側電極とを
    Ａｕワイヤにより接続するフレキシブル配線板における
    ワイヤボンディング法において、先ず半導体チップ側電
    極にＡｕボールによるＡｕバンプを形成し、次にフレキ
    シブル配線板側電極に対してＡｕワイヤの先端に形成し
    たＡｕボールを介して第一次接合を行い、次いで半導体
    チップ側電極に形成した前記ＡｕバンプにＡｕワイヤを
    ウエッジ状の第二次接合を行うことを特徴とするフレキ
    シブル配線板におけるワイヤボンディング法。
JP63124011A 1988-05-23 1988-05-23 フレキシブル配線板におけるワイヤボンディング法 Pending JPH01293626A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63124011A JPH01293626A (ja) 1988-05-23 1988-05-23 フレキシブル配線板におけるワイヤボンディング法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63124011A JPH01293626A (ja) 1988-05-23 1988-05-23 フレキシブル配線板におけるワイヤボンディング法

Publications (1)

Publication Number Publication Date
JPH01293626A true JPH01293626A (ja) 1989-11-27

Family

ID=14874814

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63124011A Pending JPH01293626A (ja) 1988-05-23 1988-05-23 フレキシブル配線板におけるワイヤボンディング法

Country Status (1)

Country Link
JP (1) JPH01293626A (ja)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04241432A (ja) * 1991-01-14 1992-08-28 Rohm Co Ltd 半導体チップと、これが搭載される基板との間のワイヤボンディング構造
JPH04294552A (ja) * 1991-03-25 1992-10-19 Matsushita Electron Corp ワイヤーボンディング方法
WO1994022166A1 (en) * 1993-03-19 1994-09-29 National Semiconductor Corporation A method of and arrangement for bond wire connecting together certain integrated circuit components
EP0753891A2 (en) * 1995-06-28 1997-01-15 Texas Instruments Incorporated Low loop wire bonding
WO1998021780A3 (de) * 1996-11-11 1998-06-25 Siemens Ag Verbindung zwischen zwei kontaktflächen und verfahren zum herstellen einer solchen verbindung
US6079610A (en) * 1996-10-07 2000-06-27 Denso Corporation Wire bonding method
US6420256B1 (en) * 1997-04-22 2002-07-16 Micron Technology, Inc. Method of improving interconnect of semiconductor devices by using a flattened ball bond
WO2002078080A1 (en) * 2001-03-23 2002-10-03 Koninklijke Philips Electronics N.V. Chip module with bond-wire connections with small loop height
WO2002082527A1 (en) * 2001-04-05 2002-10-17 Stmicroelectronics Pte Ltd Method of forming electrical connections
US6601752B2 (en) 2000-03-13 2003-08-05 Denso Corporation Electronic part mounting method
US6946380B2 (en) 2002-02-19 2005-09-20 Seiko Epson Corporation Method for forming bump, semiconductor element having bumps and method of manufacturing the same, semiconductor device and method of manufacturing the same, circuit board, and electronic equipment
US7404513B2 (en) 2004-12-30 2008-07-29 Texas Instruments Incorporated Wire bonds having pressure-absorbing balls

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04241432A (ja) * 1991-01-14 1992-08-28 Rohm Co Ltd 半導体チップと、これが搭載される基板との間のワイヤボンディング構造
JPH04294552A (ja) * 1991-03-25 1992-10-19 Matsushita Electron Corp ワイヤーボンディング方法
WO1994022166A1 (en) * 1993-03-19 1994-09-29 National Semiconductor Corporation A method of and arrangement for bond wire connecting together certain integrated circuit components
EP0753891A3 (en) * 1995-06-28 1999-03-31 Texas Instruments Incorporated Low loop wire bonding
EP0753891A2 (en) * 1995-06-28 1997-01-15 Texas Instruments Incorporated Low loop wire bonding
US6079610A (en) * 1996-10-07 2000-06-27 Denso Corporation Wire bonding method
WO1998021780A3 (de) * 1996-11-11 1998-06-25 Siemens Ag Verbindung zwischen zwei kontaktflächen und verfahren zum herstellen einer solchen verbindung
US6420256B1 (en) * 1997-04-22 2002-07-16 Micron Technology, Inc. Method of improving interconnect of semiconductor devices by using a flattened ball bond
US6624059B2 (en) 1997-04-22 2003-09-23 Micron Technology, Inc. Method of improving interconnect of semiconductor devices by utilizing a flattened ball bond
US6601752B2 (en) 2000-03-13 2003-08-05 Denso Corporation Electronic part mounting method
WO2002078080A1 (en) * 2001-03-23 2002-10-03 Koninklijke Philips Electronics N.V. Chip module with bond-wire connections with small loop height
WO2002082527A1 (en) * 2001-04-05 2002-10-17 Stmicroelectronics Pte Ltd Method of forming electrical connections
US6946380B2 (en) 2002-02-19 2005-09-20 Seiko Epson Corporation Method for forming bump, semiconductor element having bumps and method of manufacturing the same, semiconductor device and method of manufacturing the same, circuit board, and electronic equipment
US7176570B2 (en) 2002-02-19 2007-02-13 Seiko Epson Corporation Method for forming bump, semiconductor element having bumps and method of manufacturing the same, semiconductor device and method of manufacturing the same, circuit board, and electronic equipment
US7404513B2 (en) 2004-12-30 2008-07-29 Texas Instruments Incorporated Wire bonds having pressure-absorbing balls

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