JP6479265B2 - リードフレーム材およびその製造方法ならびに半導体パッケージ - Google Patents

リードフレーム材およびその製造方法ならびに半導体パッケージ Download PDF

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Publication number
JP6479265B2
JP6479265B2 JP2018518662A JP2018518662A JP6479265B2 JP 6479265 B2 JP6479265 B2 JP 6479265B2 JP 2018518662 A JP2018518662 A JP 2018518662A JP 2018518662 A JP2018518662 A JP 2018518662A JP 6479265 B2 JP6479265 B2 JP 6479265B2
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Japan
Prior art keywords
alloy
roughened
layer
lead frame
conductive substrate
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JP2018518662A
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English (en)
Japanese (ja)
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JPWO2018123708A1 (ja
Inventor
達也 中津川
達也 中津川
良聡 小林
良聡 小林
真 橋本
真 橋本
邦夫 柴田
邦夫 柴田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
THE FURUKAW ELECTRIC CO., LTD.
Furukawa Precision Engineering Co Ltd
Original Assignee
THE FURUKAW ELECTRIC CO., LTD.
Furukawa Precision Engineering Co Ltd
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Application filed by THE FURUKAW ELECTRIC CO., LTD., Furukawa Precision Engineering Co Ltd filed Critical THE FURUKAW ELECTRIC CO., LTD.
Publication of JPWO2018123708A1 publication Critical patent/JPWO2018123708A1/ja
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582Metallic layers on lead frames
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60Electroplating characterised by the structure or texture of the layers
    • C25D5/605Surface topography of the layers, e.g. rough, dendritic or nodular layers
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10Electroplating with more than one layer of the same or of different metals
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/12Semiconductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49548Cross section geometry
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP2018518662A 2016-12-27 2017-12-19 リードフレーム材およびその製造方法ならびに半導体パッケージ Active JP6479265B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2016253968 2016-12-27
JP2016253968 2016-12-27
PCT/JP2017/045451 WO2018123708A1 (fr) 2016-12-27 2017-12-19 Élément de grille de connexion et son procédé de fabrication et boîtier à semi-conducteur

Publications (2)

Publication Number Publication Date
JPWO2018123708A1 JPWO2018123708A1 (ja) 2018-12-27
JP6479265B2 true JP6479265B2 (ja) 2019-03-06

Family

ID=62707235

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JP2018518662A Active JP6479265B2 (ja) 2016-12-27 2017-12-19 リードフレーム材およびその製造方法ならびに半導体パッケージ

Country Status (5)

Country Link
JP (1) JP6479265B2 (fr)
KR (1) KR102482396B1 (fr)
CN (1) CN109937479B (fr)
TW (1) TWI762546B (fr)
WO (1) WO2018123708A1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6805217B2 (ja) * 2018-10-18 2020-12-23 Jx金属株式会社 導電性材料、成型品及び電子部品
JP7014695B2 (ja) * 2018-10-18 2022-02-01 Jx金属株式会社 導電性材料、成型品及び電子部品
CN117043940A (zh) * 2021-07-16 2023-11-10 古河电气工业株式会社 引线框架材料及其制造方法、以及半导体封装
WO2023286697A1 (fr) * 2021-07-16 2023-01-19 古河電気工業株式会社 Matériau de grille de connexion et son procédé de production, et boîtier de semi-conducteur

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2543619B2 (ja) 1990-09-05 1996-10-16 新光電気工業株式会社 半導体装置用リ―ドフレ―ム
JP3228789B2 (ja) 1992-07-11 2001-11-12 新光電気工業株式会社 樹脂用インサート部材の製造方法
JP2732490B2 (ja) * 1994-03-25 1998-03-30 日鉱金属株式会社 電子機器用高力高導電性銅合金の製造方法
US5554569A (en) * 1994-06-06 1996-09-10 Motorola, Inc. Method and apparatus for improving interfacial adhesion between a polymer and a metal
JP4168077B2 (ja) * 2006-07-21 2008-10-22 株式会社神戸製鋼所 酸化膜密着性に優れた電気電子部品用銅合金板
KR101241735B1 (ko) * 2008-09-05 2013-03-08 엘지이노텍 주식회사 리드 프레임 및 그 제조방법
JP4892033B2 (ja) * 2009-05-13 2012-03-07 日立ケーブルプレシジョン株式会社 リードフレームの製造方法
KR101113891B1 (ko) * 2009-10-01 2012-02-29 삼성테크윈 주식회사 리드 프레임 및 리드 프레임 제조 방법
JP5863174B2 (ja) * 2012-03-01 2016-02-16 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP5204908B1 (ja) * 2012-03-26 2013-06-05 Jx日鉱日石金属株式会社 キャリア付銅箔、キャリア付銅箔の製造方法、プリント配線板用キャリア付銅箔及びプリント配線板
TWI557750B (zh) * 2014-02-05 2016-11-11 Furukawa Electric Co Ltd Electrical contact material and manufacturing method thereof
JP5766318B2 (ja) * 2014-02-17 2015-08-19 株式会社三井ハイテック リードフレーム

Also Published As

Publication number Publication date
TW201830627A (zh) 2018-08-16
CN109937479B (zh) 2023-01-13
CN109937479A (zh) 2019-06-25
KR20190096964A (ko) 2019-08-20
WO2018123708A1 (fr) 2018-07-05
KR102482396B1 (ko) 2022-12-28
TWI762546B (zh) 2022-05-01
JPWO2018123708A1 (ja) 2018-12-27

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