JP5779309B2 - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
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- JP5779309B2 JP5779309B2 JP2008204368A JP2008204368A JP5779309B2 JP 5779309 B2 JP5779309 B2 JP 5779309B2 JP 2008204368 A JP2008204368 A JP 2008204368A JP 2008204368 A JP2008204368 A JP 2008204368A JP 5779309 B2 JP5779309 B2 JP 5779309B2
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
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- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
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- Thin Film Transistor (AREA)
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- Electroluminescent Light Sources (AREA)
Description
本実施形態では、本発明のボトムゲート型TFTの構成、およびその作製方法について説明する。本実施形態では、チャネルエッチ構造のTFTの構成およびその作製方法について説明する。
本実施形態では、実施形態1と異なる構造の薄膜トランジスタおよびその作製方法を説明する。実施形態1では、チャネルエッチ型の薄膜トランジスタを示したが、本実施形態では、チャネル形成領域上に絶縁膜でなる保護層を有する薄膜トランジスタについて説明する。このような保護層を有するTFTの構造を「チャネル保護型」と呼ぶ。図5は、チャネル保護型TFTの構成の一例を示す断面図であり、図6はその上面図である。図6のY1−Y2切断線に沿った断面図が図5である。
本実施形態では、トランジスタを有する半導体装置の一例として、アクティブマトリクス型表示装置について説明する。アクティブマトリクス型表示装置は、画素部の各画素にトランジスタを有する。
本実施の形態では、本発明の半導体装置の一例として、アクティブマトリクス型表示装置モジュールを表示部に組み込んだ電子機器について説明する。このモジュールは、実施形態3で説明した半導体装置を適用することができる。その様な電子機器としては、ビデオカメラ、デジタルカメラ、ヘッドマウントディスプレイ(ゴーグル型ディスプレイ)、カーナビゲーション、プロジェクタ、カーステレオ、パーソナルコンピュータ、携帯情報端末(モバイルコンピュータ、携帯電話または電子書籍など)などが挙げられる。それらの一例を図16に示す。
実施形態1、実施形態2では、基板100上に、絶縁層102、微結晶半導体層123、非晶質半導体層124、半導体層125を積層して形成する工程を説明した(図3(A)および図7(A)参照)。また、基板100を大気に曝すことなく、これらの層を積層して形成することが好ましい。このような工程を実施するためのPECVD装置の構成および使用方法について、本実施形態で説明する。
11 ソース線駆動回路
12 走査線駆動回路
13 ソース線
14 走査線
15 画素
21 スイッチングトランジスタ
22 液晶素子
23 補助容量
31 スイッチングトランジスタ
32 発光素子
33 駆動用トランジスタ
61 基板
62 基板
63 画素部
64 走査線駆動回路
65 ICチップ
66 FPC
100 基板
101 第1の導電層
102 絶縁層
103 第1の半導体層
104 第2の半導体層
104a 凹部
105、105−1、105−2 第3の半導体層
106−1、106−2 第2の導電層
108 絶縁層
109 保護層
123 微結晶半導体層
124 非晶質半導体層
125 半導体層
126 導電層
131 マスク
132 マスク
133 マスク
200 基板
201 基板
202 TFT
203 補助容量
210 走査線
211 ソース線
212 補助容量線
213 電極
214 絶縁層
215 電極
216 絶縁層
217 画素電極
220 液晶層
221 配向膜
222 配向膜
223 遮光膜
224 着色膜
225 対向電極
226 平坦化膜
300 基板
301 基板
302 TFT
303 発光素子
311 平坦化膜
312 画素電極
313 隔壁
314 発光層
315 共通電極
316 保護膜
320 樹脂層
500 反応室
501 第1の電極
502 第2の電極
503 高周波電力供給手段
504 第1の高周波電源
505 第2の高周波電源
506 第1の整合器
507 第2の整合器
508 ガス供給手段
509 排気手段
510 シリンダ
511 圧力調整弁
512 ストップバルブ
513 マスフローコントローラ
514 基板加熱ヒータ
515 ヒータコントローラ
516 絶縁材
517 バタフライバルブ
518 コンダクタンスバルブ
519 ターボ分子ポンプ
520 ドライポンプ
900 モジュール
921 画素部
922 ソース線駆動回路
923 走査線駆動回路
924 チューナ
925 映像信号増幅回路
926 映像信号処理回路
927 コントロール回路
928 信号分割回路
929 音声信号増幅回路
930 音声信号処理回路
931 制御回路
932 入力部
933 スピーカー
1110 ロード室
1111 反応室
1112 反応室
1113 反応室
1114 反応室
1115 アンロード室
1120 共通室
1121 搬送手段
1122 ゲートバルブ
1123 ゲートバルブ
1124 ゲートバルブ
1125 ゲートバルブ
1126 ゲートバルブ
1127 ゲートバルブ
1128 カセット
1130 基板
2001 筐体
2002 モジュール
2003 主画面
2004 モデム
2005 受信機
2006 リモコン操作機
2007 表示部
2008 サブ画面
2009 スピーカー部
2301 携帯電話機
2302 表示部
2303 操作部
2401 本体
2402 表示部
Claims (1)
- 第1の導電層を形成し、
前記第1の導電層上方に絶縁層を形成し、
前記絶縁層上方に、微結晶半導体及びアクセプタとなる不純物元素を有し、実質的に真性である第1の半導体層と、非晶質半導体からなる第2の半導体層と、第3の半導体層と、を形成し、
前記第3の半導体層上方に第2の導電層を形成し、
前記第2の導電層をエッチングして、第3の導電層と、第4の導電層と、を形成し、
前記第3の半導体層をエッチングして、第4の半導体層と、第5の半導体層と、を形成し、
前記第3の導電層及び前記第4の導電層をエッチングする半導体装置の作製方法であって、
前記第1の半導体層の形成は、プラズマ励起化学気相成長法を用いて行い、
前記第1の半導体層の形成は、前記不純物元素を有するプロセスガスに3MHz〜30MHzと30MHz〜300MHzの2種類の高周波電力を供給することによりプラズマを生成して行い、プラズマ表面定在波効果を抑制してプラズマの均一化を図るとともにプラズマを高密度化し、結晶性の高く、膜質の良い薄膜を均一な厚さで形成し、
前記第1の導電層は、前記第1の半導体層全体と重なり、
前記第3の導電層の前記第4の導電層と対向する側の端部は、前記第4の半導体層の上面に接し、且つ、前記第4の半導体層の端部と重ならず、
前記第4の導電層の前記第3の導電層と対向する側の端部は、前記第5の半導体層の上面に接し、且つ、前記第5の半導体層の端部と重ならず、
前記第3の半導体層のエッチングの際に、前記第2の半導体層に凹部を形成することを特徴とする半導体装置の作製方法。
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JP2009071289A (ja) | 2007-08-17 | 2009-04-02 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
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2008
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- 2008-08-07 JP JP2008204368A patent/JP5779309B2/ja not_active Expired - Fee Related
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CN101409236A (zh) | 2009-04-15 |
US8309406B2 (en) | 2012-11-13 |
TW200913080A (en) | 2009-03-16 |
JP2009071288A (ja) | 2009-04-02 |
US20120094446A1 (en) | 2012-04-19 |
US8101444B2 (en) | 2012-01-24 |
US20090047760A1 (en) | 2009-02-19 |
CN101409236B (zh) | 2012-07-11 |
TWI437642B (zh) | 2014-05-11 |
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