JP5036767B2 - 電界効果型トランジスタ - Google Patents
電界効果型トランジスタ Download PDFInfo
- Publication number
- JP5036767B2 JP5036767B2 JP2009168884A JP2009168884A JP5036767B2 JP 5036767 B2 JP5036767 B2 JP 5036767B2 JP 2009168884 A JP2009168884 A JP 2009168884A JP 2009168884 A JP2009168884 A JP 2009168884A JP 5036767 B2 JP5036767 B2 JP 5036767B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor layer
- nitride semiconductor
- drain electrode
- lattice constant
- effect film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000005669 field effect Effects 0.000 title claims description 22
- 239000004065 semiconductor Substances 0.000 claims description 58
- 150000004767 nitrides Chemical class 0.000 claims description 53
- 230000000694 effects Effects 0.000 claims description 39
- 238000004544 sputter deposition Methods 0.000 claims description 15
- 239000000758 substrate Substances 0.000 claims description 15
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 229910052746 lanthanum Inorganic materials 0.000 claims description 2
- 229910052745 lead Inorganic materials 0.000 claims description 2
- 229910052726 zirconium Inorganic materials 0.000 claims description 2
- 229910052797 bismuth Inorganic materials 0.000 claims 2
- 229910052758 niobium Inorganic materials 0.000 claims 2
- 229910052712 strontium Inorganic materials 0.000 claims 2
- 229910052715 tantalum Inorganic materials 0.000 claims 1
- 229910002704 AlGaN Inorganic materials 0.000 description 18
- 230000004888 barrier function Effects 0.000 description 13
- 230000005533 two-dimensional electron gas Effects 0.000 description 9
- 239000008186 active pharmaceutical agent Substances 0.000 description 7
- 230000015572 biosynthetic process Effects 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 2
- WUKWITHWXAAZEY-UHFFFAOYSA-L calcium difluoride Chemical group [F-].[F-].[Ca+2] WUKWITHWXAAZEY-UHFFFAOYSA-L 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 230000010287 polarization Effects 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 229910013641 LiNbO 3 Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 125000005842 heteroatom Chemical group 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000005546 reactive sputtering Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 229910052984 zinc sulfide Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
- H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/762—Charge transfer devices
- H01L29/765—Charge-coupled devices
- H01L29/768—Charge-coupled devices with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7781—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with inverted single heterostructure, i.e. with active layer formed on top of wide bandgap layer, e.g. IHEMT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02378—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02502—Layer structure consisting of two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
- H01L21/02507—Alternating layers, e.g. superlattice
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Junction Field-Effect Transistors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
図1は、本発明の実施例1によるヘテロ接合FETを模式的断面図で示している。このFETの作製においては、まずSiC基板1のSi原子面上にAlNバッファ層(厚さ20nm)2が基板温度1200℃のもとでMOCVD(有機金属気相堆積)法によって成長させられる。次に、基板温度1100℃のもとで、GaNチャネル層(格子定数a=3.189Å、Eg=3.42eV)3を厚さ3μmに成長させる。その上に、基板温度1100℃のもとで、Al0.3Ga0.7Nバリア層(a=3.166Å、Eg=4.02eV)を厚さ20nmに成長させる。
図3は、本発明の実施例2によるヘテロ構造を含むFETの構造を模式的断面図で示している。このFETにおいて、基板11としてSiを用いられ、バッファ層12としてAlN/GaN多層膜を堆積し、チャネル層13として厚さ1μmのGaN(a=3.189Å、Eg=3.42eV)層を基板温度1000℃で成長させ、そしてバリア層14として厚さ30nmのAl0.2Ga0.8N(a=3.174Å、Eg=3.80eV)層が基板温度1100℃で成長させられている。Si基板上に、AlN層やGaN層を積層した場合には、Al原子面またはGa原子面が上表面(電極形成側)となる。
図7は、本発明の実施例3によるヘテロ構造を含むFETの構造を模式的断面図で示している。上述の実施例1と2においては、GaN層とAlGaNバリア層はそれらのGa原子面が上表面(電極形成側)となるように積層されている状態であるが、本実施例3におけるようにN原子面が上表面(電極形成側)となるように積層することもできる。
上述の実施例1から3におけるAlGaN層またはGaN層に代えて、AlxGa1-x-yInyN(0≦x≦1、0≦y≦1)の組成比を適宜に選択した層を用いることによっても、ノーマリオフタイプのFETを得ることも可能である。すなわち、Al、Ga、およびInの組成比を適宜に選択することによって、チャネル層またはバリア層に適した格子定数とバンドギャップ有するAlxGa1-x-yInyN層を選択的に設定することができる。すなわち、一般に、AlxGa1-x-yInyNにおいてAlの組成比が大きくなればバンドギャップが大きくなって格子定数が小さくなる傾向にあり、Inの組成比が大きくなればバンドギャップが小さくなって格子定数が大きくなる傾向にある。
Claims (7)
- 格子定数a1およびバンドギャップEg1を有する第1の窒化物半導体層と、
その第1窒化物半導体層上に積層されていて格子定数a2およびバンドギャップEg2を有する第2の窒化物半導体層と、
その第2窒化物半導体層上に形成されたソース電極およびドレイン電極と、
それらのソース電極およびドレイン電極との間の少なくとも一部の領域において前記第2窒化物半導体層上に形成されたペロブスカイト構造の酸化物からなる厚さ500nm以上1μm以下のピエゾ効果膜と、
そのピエゾ効果膜の少なくとも一部領域上に形成されたゲート電極とを含み、
前記格子定数a1とa2との関係がa1>a2であり、
前記バンドギャップEg1とEg2との関係がEg1<Eg2であり、
前記ピエゾ効果膜は、ゲート電圧が印加されていないときに前記ソース電極と前記ドレイン電極との間に電流が流れないように前記第2窒化物半導体層に圧縮応力を及ぼし、ゲート電圧が印加されたときに前記ソース電極と前記ドレイン電極との間に電流が流れるように前記圧縮応力を解除することを特徴とする電界効果型トランジスタ。 - 格子定数a1およびバンドギャップEg1を有する第1の窒化物半導体層と、
その第1窒化物半導体層上に積層されていて格子定数a2およびバンドギャップEg2を有する第2の窒化物半導体層と、
その第2窒化物半導体層上に形成されたソース電極およびドレイン電極と、
それらのソース電極とドレイン電極との間の少なくとも一部の領域において前記第2窒化物半導体層上に形成されたペロブスカイト構造の酸化物からなる厚さ500nm以上1μm以下のピエゾ効果膜と、
そのピエゾ効果膜の少なくとも一部領域上に形成されたゲート電極とを含み、
前記格子定数a1とa2との関係がa1<a2であり、
前記バンドギャップEg1とEg2との関係がEg1>Eg2であり、
前記ピエゾ効果膜は、ゲート電圧が印加されていないときに前記ソース電極と前記ドレイン電極との間に電流が流れないように前記第2窒化物半導体層に引張応力を及ぼし、ゲート電圧が印加されたときに前記ソース電極と前記ドレイン電極との間に電流が流れるように引張応力を解除することを特徴とする電界効果型トランジスタ。 - 基板上に順次積層されたバッファ層、第1の窒化物半導体層、および第2の窒化物半導体層を含み、
前記第1窒化物半導体層の格子定数a1と前記第2窒化物半導体層の格子定数a2とがa1>a2の関係にあり、
前記第2窒化物半導体層上にソース電極とドレイン電極とが形成されるとともに、前記ソース電極と前記ドレイン電極との間の少なくとも一部にペロブスカイト構造の酸化物からなる厚さ500nm以上1μm以下のピエゾ効果膜が形成されており、
そのピエゾ効果膜は前記第1と前記第2の窒化物半導体層の格子定数差(a1−a2)に起因して前記第2窒化物半導体層に加わる引っ張り応力に比べて同等以上の大きさの圧縮応力を及ぼすものであることを特徴とする電界効果型トランジスタ。 - 前記ペロブスカイト構造の酸化物は、少なくともBaとTiを含む酸化物、少なくともPbとLaとZrとTiを含む酸化物、少なくともSrとBiとTaを含む酸化物、少なくともBiとTiを含む酸化物、少なくともLiとNbを含む酸化物、および少なくともSrとNbを含む酸化物のいずれかであることを特徴とする請求項1から3のいずれかに記載の電界効果型トランジスタ。
- 前記ピエゾ効果膜がスパッタ法で形成されたものであることを特徴とする請求項1から4のいずれかに記載の電界効果型トランジスタ。
- 前記ピエゾ効果膜が、スパッタ法によって1Pa未満の雰囲気圧力下で形成されたものであることを特徴とする請求項1または3に記載の電界効果型トランジスタ。
- 前記ピエゾ効果膜が、スパッタ法によって1Paより大きな雰囲気圧力下で形成されたものであることを特徴とする請求項2に記載の電界効果型トランジスタ。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009168884A JP5036767B2 (ja) | 2005-04-26 | 2009-07-17 | 電界効果型トランジスタ |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005128241 | 2005-04-26 | ||
JP2005128241 | 2005-04-26 | ||
JP2006041138A JP4369438B2 (ja) | 2005-04-26 | 2006-02-17 | 電界効果型トランジスタ |
JP2009168884A JP5036767B2 (ja) | 2005-04-26 | 2009-07-17 | 電界効果型トランジスタ |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006041138A Division JP4369438B2 (ja) | 2005-04-26 | 2006-02-17 | 電界効果型トランジスタ |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009283960A JP2009283960A (ja) | 2009-12-03 |
JP5036767B2 true JP5036767B2 (ja) | 2012-09-26 |
Family
ID=37185929
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006041138A Expired - Fee Related JP4369438B2 (ja) | 2005-04-26 | 2006-02-17 | 電界効果型トランジスタ |
JP2009168884A Expired - Fee Related JP5036767B2 (ja) | 2005-04-26 | 2009-07-17 | 電界効果型トランジスタ |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006041138A Expired - Fee Related JP4369438B2 (ja) | 2005-04-26 | 2006-02-17 | 電界効果型トランジスタ |
Country Status (3)
Country | Link |
---|---|
US (1) | US7468524B2 (ja) |
JP (2) | JP4369438B2 (ja) |
KR (1) | KR100808344B1 (ja) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7354815B2 (en) * | 2003-11-18 | 2008-04-08 | Silicon Genesis Corporation | Method for fabricating semiconductor devices using strained silicon bearing material |
JP2007305666A (ja) * | 2006-05-09 | 2007-11-22 | Toshiba Corp | 半導体装置およびその製造方法 |
JP4226020B2 (ja) | 2006-05-23 | 2009-02-18 | シャープ株式会社 | 電界効果型トランジスタ |
DE102006036822A1 (de) * | 2006-08-07 | 2008-02-14 | Qimonda Ag | Verfahren zum Betrieb eines Speichermoduls und Speichermodul |
JP5397825B2 (ja) * | 2007-05-18 | 2014-01-22 | サンケン電気株式会社 | 電界効果半導体装置 |
JP5412093B2 (ja) * | 2008-11-20 | 2014-02-12 | サンケン電気株式会社 | 半導体ウェハ製造方法及び半導体装置製造方法 |
JP5477685B2 (ja) * | 2009-03-19 | 2014-04-23 | サンケン電気株式会社 | 半導体ウェーハ及び半導体素子及びその製造方法 |
US20120090657A1 (en) * | 2009-06-15 | 2012-04-19 | Soonil Lee | Reduced low symmetry ferroelectric thermoelectric systems, methods and materials |
US20110147796A1 (en) * | 2009-12-17 | 2011-06-23 | Infineon Technologies Austria Ag | Semiconductor device with metal carrier and manufacturing method |
US8802516B2 (en) * | 2010-01-27 | 2014-08-12 | National Semiconductor Corporation | Normally-off gallium nitride-based semiconductor devices |
WO2011118433A1 (ja) * | 2010-03-24 | 2011-09-29 | 日本碍子株式会社 | 半導体素子用エピタキシャル基板および半導体素子 |
JP2012049170A (ja) * | 2010-08-24 | 2012-03-08 | New Japan Radio Co Ltd | 窒化物半導体装置 |
US8723185B2 (en) * | 2010-11-30 | 2014-05-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Reducing wafer distortion through a high CTE layer |
US8710511B2 (en) * | 2011-07-29 | 2014-04-29 | Northrop Grumman Systems Corporation | AIN buffer N-polar GaN HEMT profile |
KR20130053193A (ko) * | 2011-11-15 | 2013-05-23 | 엘지전자 주식회사 | 질화물계 반도체 이종접합 반도체 소자 및 그 제조방법 |
JP5883331B2 (ja) * | 2012-01-25 | 2016-03-15 | 住友化学株式会社 | 窒化物半導体エピタキシャルウェハの製造方法及び電界効果型窒化物トランジスタの製造方法 |
JP5950643B2 (ja) * | 2012-03-19 | 2016-07-13 | トランスフォーム・ジャパン株式会社 | 化合物半導体装置及びその製造方法 |
US8946773B2 (en) | 2012-08-09 | 2015-02-03 | Samsung Electronics Co., Ltd. | Multi-layer semiconductor buffer structure, semiconductor device and method of manufacturing the semiconductor device using the multi-layer semiconductor buffer structure |
US9136430B2 (en) | 2012-08-09 | 2015-09-15 | Samsung Electronics Co., Ltd. | Semiconductor buffer structure, semiconductor device including the same, and method of manufacturing semiconductor device using semiconductor buffer structure |
KR101348937B1 (ko) | 2012-08-17 | 2014-01-09 | 한국과학기술연구원 | 산화물 전자소자 및 그 제조방법 |
KR102002898B1 (ko) | 2012-09-04 | 2019-07-23 | 삼성전자 주식회사 | 반도체 버퍼 구조체 및 이를 포함하는 반도체 소자 |
CN103489911A (zh) * | 2013-09-06 | 2014-01-01 | 华为技术有限公司 | 一种GaN基HEMT器件及其制作方法 |
CN104851971A (zh) * | 2015-05-28 | 2015-08-19 | 福州大学 | 一种基于压电材料有源层的tft结构及其制备方法 |
KR102166238B1 (ko) * | 2016-04-01 | 2020-10-15 | 인텔 코포레이션 | 강화된 온 상태 및 오프 상태 성능을 위한 임계 전압 스위칭이 있는 강유전체 기반 전계 효과 트랜지스터 |
WO2018103646A1 (zh) * | 2016-12-08 | 2018-06-14 | 西安电子科技大学 | 基于CH3NH3PbI3材料的HEMT/HHMT器件的制备方法 |
US10600900B2 (en) * | 2017-10-16 | 2020-03-24 | Kabushiki Kaisha Toshiba | Semiconductor device and electric apparatus |
US11469323B2 (en) | 2018-09-25 | 2022-10-11 | Intel Corporation | Ferroelectric gate stack for band-to-band tunneling reduction |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5192987A (en) * | 1991-05-17 | 1993-03-09 | Apa Optics, Inc. | High electron mobility transistor with GaN/Alx Ga1-x N heterojunctions |
EP1183761A2 (en) * | 1999-03-26 | 2002-03-06 | Matsushita Electronics Corporation | Semiconductor structures having a strain compensated layer and method of fabrication |
JP2002026312A (ja) * | 2000-07-06 | 2002-01-25 | National Institute Of Advanced Industrial & Technology | 半導体装置 |
JP2002064201A (ja) | 2000-08-18 | 2002-02-28 | Toshiba Corp | 半導体電界効果トランジスタ及び電力増幅器 |
US6548333B2 (en) * | 2000-12-01 | 2003-04-15 | Cree, Inc. | Aluminum gallium nitride/gallium nitride high electron mobility transistors having a gate contact on a gallium nitride based cap segment |
US6849882B2 (en) * | 2001-05-11 | 2005-02-01 | Cree Inc. | Group-III nitride based high electron mobility transistor (HEMT) with barrier/spacer layer |
JP2004193203A (ja) * | 2002-12-09 | 2004-07-08 | Matsushita Electric Ind Co Ltd | 電界効果トランジスタおよびその製造方法 |
JP4557508B2 (ja) * | 2003-06-16 | 2010-10-06 | パナソニック株式会社 | 半導体装置 |
US7439555B2 (en) * | 2003-12-05 | 2008-10-21 | International Rectifier Corporation | III-nitride semiconductor device with trench structure |
JP4226020B2 (ja) * | 2006-05-23 | 2009-02-18 | シャープ株式会社 | 電界効果型トランジスタ |
-
2006
- 2006-02-17 JP JP2006041138A patent/JP4369438B2/ja not_active Expired - Fee Related
- 2006-04-25 KR KR1020060037201A patent/KR100808344B1/ko not_active IP Right Cessation
- 2006-04-25 US US11/411,279 patent/US7468524B2/en not_active Expired - Fee Related
-
2009
- 2009-07-17 JP JP2009168884A patent/JP5036767B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR20060112228A (ko) | 2006-10-31 |
JP2009283960A (ja) | 2009-12-03 |
US20060237711A1 (en) | 2006-10-26 |
JP4369438B2 (ja) | 2009-11-18 |
KR100808344B1 (ko) | 2008-02-27 |
US7468524B2 (en) | 2008-12-23 |
JP2006332593A (ja) | 2006-12-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5036767B2 (ja) | 電界効果型トランジスタ | |
JP4226020B2 (ja) | 電界効果型トランジスタ | |
JP5805830B2 (ja) | 半導体装置 | |
JP5116977B2 (ja) | 半導体素子 | |
JP4592938B2 (ja) | 半導体装置 | |
JP5348364B2 (ja) | ヘテロ接合型電界効果半導体装置 | |
JP4381380B2 (ja) | 半導体装置及びその製造方法 | |
JP5487550B2 (ja) | 電界効果半導体装置及びその製造方法 | |
WO2004061978A1 (ja) | 電界効果トランジスタ | |
JP2007067240A (ja) | 窒化物系半導体装置 | |
JP5878317B2 (ja) | 半導体装置及び半導体装置の製造方法 | |
JP2008306130A (ja) | 電界効果型半導体装置及びその製造方法 | |
JP2010153493A (ja) | 電界効果半導体装置及びその製造方法 | |
JP2017073506A (ja) | 窒化物半導体装置およびその製造方法 | |
JP2008103617A (ja) | 窒化物系半導体装置 | |
JP2001196575A (ja) | 半導体装置 | |
JP2008004720A (ja) | 窒化物半導体を用いたヘテロ構造電界効果トランジスタ | |
JP5582378B2 (ja) | 電界効果半導体装置及びその製造方法 | |
TW200524086A (en) | Field effect transistor with enhanced insulator structure | |
JP2011171440A (ja) | Iii族窒化物系へテロ電界効果トランジスタ | |
JP2010040828A (ja) | 窒化物半導体装置 | |
JP2007088371A (ja) | 半導体素子および半導体素子の製造方法 | |
JP4745652B2 (ja) | 半導体装置 | |
TWI612662B (zh) | 半導體裝置及其製造方法 | |
JP2007103778A (ja) | 電界効果型トランジスタ |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20120622 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120626 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120703 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150713 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5036767 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
LAPS | Cancellation because of no payment of annual fees |