JP4044014B2 - アクティブマトリクス型有機電界発光素子用薄膜トランジスタ - Google Patents
アクティブマトリクス型有機電界発光素子用薄膜トランジスタ Download PDFInfo
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- 239000010409 thin film Substances 0.000 title claims description 45
- 239000011159 matrix material Substances 0.000 title claims description 25
- 238000005401 electroluminescence Methods 0.000 title claims description 14
- 239000010410 layer Substances 0.000 claims description 68
- 239000004065 semiconductor Substances 0.000 claims description 33
- 238000003860 storage Methods 0.000 claims description 23
- 239000000758 substrate Substances 0.000 claims description 23
- 239000010408 film Substances 0.000 claims description 15
- 238000000034 method Methods 0.000 claims description 11
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 239000011241 protective layer Substances 0.000 claims description 9
- 238000000926 separation method Methods 0.000 claims description 9
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 8
- 239000012535 impurity Substances 0.000 claims description 4
- 230000003071 parasitic effect Effects 0.000 description 9
- 239000004973 liquid crystal related substance Substances 0.000 description 7
- 239000003990 capacitor Substances 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000013441 quality evaluation Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
- H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
- H01L29/78624—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile the source and the drain regions being asymmetrical
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- Condensed Matter Physics & Semiconductors (AREA)
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- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electroluminescent Light Sources (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Thin Film Transistor (AREA)
Description
図示したように、第1方向に走査線1が形成されていて、走査線1と交差する第2方向に相互に一定間隔離隔されるように信号線2及び電力供給線(power supply line)3が形成されており、信号線2及び電力供給線3と走査線1が交差する領域は画素領域(pixel region)を定義する。
図3A、図3Bは、本発明による逆スタッガード型AMOLED用駆動薄膜トランジスタ構造についての図面であって、図3Aは平面図であって、図3Bは前記図3Aの切断線IV−IVに沿って切断された断面を示した断面図であり、説明の便宜上ゲート電極、半導体層、ソース電極及びドレイン電極を中心に図示した。
114:半導体層
116:ソース電極
118:ドレイン電極
120:電力供給線
IIIa:第1重畳領域
IIIb:第2重畳領域
T:薄膜トランジスタ
Claims (14)
- 相互に対向するように配置された第1電極及び第2電極と、前記第1電極及び第2電極間に介在された有機電界発光層とを含む有機電界発光素子における前記第1電極及び第2電極のうちのいずれか一つの電極に電流を供給する駆動薄膜トランジスタにおいて、
基板上に形成されたゲート電極と、
前記ゲート電極を含む前記基板上に形成されたゲート絶縁膜と、
前記ゲート絶縁膜上部に形成された半導体層と、
前記半導体層上部において、相互に一定間隔離隔されて前記ゲート電極と重なるように形成されたソース電極及びドレイン電極とを含み、
前記ゲート電極とソース電極間の重畳領域が、前記ゲート電極とドレイン電極間重畳領域より大きい値を有し、
前記ゲート電極とソース電極間の重畳領域は、画素駆動用ストレージキャパシタンスを構成することを特徴とするアクティブマトリクス型有機電界発光素子用駆動薄膜トランジスタ。 - 前記半導体層は、アクティブ層とオーミックコンタクト層で構成され、
前記オーミックコンタクト層は、前記ソース電極及びドレイン電極間の離隔区間だけ除去されて、前記アクティブ層を一部露出させることを特徴とする請求項1に記載のアクティブマトリクス型有機電界発光素子用駆動薄膜トランジスタ。 - 前記アクティブ層は、非晶質シリコンで構成され、前記オーミックコンタクト層は不純物非晶質シリコンで構成されることを特徴とする請求項2に記載のアクティブマトリクス型有機電界発光素子用駆動薄膜トランジスタ。
- 相互に対向するように配置された第1電極及び第2電極と、前記第1電極及び第2電極間に介在された有機電界発光層とを含む有機電界発光素子における、前記第1電極及び第2電極のうちのいずれか一つの電極に電流を供給する駆動薄膜トランジスタの製造方法において、
基板上にゲート電極を形成する段階と、
前記ゲート電極を含む前記基板上にゲート絶縁膜を形成する段階と、
前記ゲート絶縁膜上部に半導体層を形成する段階と、
前記半導体層上部において、相互に一定間隔離隔されて前記ゲート電極と重なるように形成されたソース電極及びドレイン電極を形成する段階とを含み、
前記ゲート電極とソース電極間の重畳領域が前記ゲート電極とドレイン電極間重畳領域より大きい値を有し、
前記ゲート電極とソース電極間の重畳領域は、画素駆動用ストレージキャパシタンスを構成することを特徴とするアクティブマトリクス型有機電界発光素子用駆動薄膜トランジスタの製造方法。 - 前記半導体層は、アクティブ層とオーミックコンタクト層で構成され、
前記オーミックコンタクト層は、前記ソース電極及びドレイン電極間の離隔区間だけ除去されて、前記アクティブ層を一部露出することを特徴とする請求項4に記載のアクティブマトリクス型有機電界発光素子用駆動薄膜トランジスタの製造方法。 - 前記アクティブ層は、非晶質シリコンで構成され、前記オーミックコンタクト層は不純物非晶質シリコンで構成されることを特徴とする請求項5に記載のアクティブマトリクス型有機電界発光素子用駆動薄膜トランジスタの製造方法。
- 基板上に形成されたゲート電極と、
前記ゲート電極を含む前記基板上に形成されたゲート絶縁膜と、
前記ゲート絶縁膜上部に形成された半導体層と、
前記半導体層上部において、相互に一定間隔離隔されて前記ゲート電極と重なるように形成されたソース電極及びドレイン電極と、
前記ソース電極及びドレイン電極を覆う基板全面に形成され、前記ドレイン電極を一部露出させるドレインコンタクトホールを有する保護層と、
前記保護層上部に形成されて前記ドレインコンタクトホールを通じて前記ドレイン電極と連結する第1電極と、
前記第1電極上部に形成された有機電界発光層と、
前記有機電界発光層上部に形成された第2電極とを含み、
前記ゲート電極とソース電極間の重畳領域が前記ゲート電極とドレイン電極間の重畳領域より大きい値を有し、
前記ゲート電極とソース電極間の重畳領域は、画素駆動用ストレージキャパシタンスを構成することを特徴とするアクティブマトリクス型有機電界発光素子。 - 前記ゲート電極と電気的に連結するスイッチング薄膜トランジスタをさらに含むことを特徴とする請求項7に記載のアクティブマトリクス型有機電界発光素子。
- 前記アクティブマトリクス型有機電界発光素子は、上部発光方式であることを特徴とする請求項7に記載のアクティブマトリクス型有機電界発光素子。
- 前記アクティブマトリクス型有機電界発光素子は、下部発光方式であることを特徴とする請求項7に記載のアクティブマトリクス型有機電界発光素子。
- 基板上にゲート電極を形成する段階と、
前記ゲート電極を含む前記基板上にゲート絶縁膜を形成する段階と、
前記ゲート絶縁膜上部に半導体層を形成する段階と、
前記半導体層上部に、相互に一定間隔離隔されて前記ゲート電極と重なるソース電極及びドレイン電極を形成する段階と、
前記ソース電極及びドレイン電極を覆う基板全面に、前記ドレイン電極を一部露出させるドレインコンタクトホールを有する保護層を形成する段階と、
前記保護層上部に、前記ドレインコンタクトホールを通じて前記ドレイン電極と連結する第1電極を形成する段階と、
前記第1電極上部に有機電界発光層を形成する段階と、
前記有機電界発光層上部に第2電極を形成する段階とを含み、
前記ゲート電極とソース電極間の重畳領域が前記ゲート電極とドレイン電極間の重畳領域より大きい値を有し、
前記ゲート電極とソース電極間の重畳領域は、画素駆動用ストレージキャパシタンスを構成することを特徴とするアクティブマトリクス型有機電界発光素子の製造方法。 - 前記ゲート電極と電気的に連結するスイッチング薄膜トランジスタを形成する段階をさらに含むことを特徴とする請求項11に記載のアクティブマトリクス型有機電界発光素子の製造方法。
- 前記アクティブマトリクス型有機電界発光素子は、上部発光方式であることを特徴とする請求項11に記載のアクティブマトリクス型有機電界発光素子の製造方法。
- 前記アクティブマトリクス型有機電界発光素子は、下部発光方式であることを特徴とする請求項11に記載のアクティブマトリクス型有機電界発光素子の製造方法。
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
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KR10-2002-0040409A KR100473226B1 (ko) | 2002-07-11 | 2002-07-11 | 액티브 매트릭스형 유기전계발광 소자 |
DE10359248A DE10359248B4 (de) | 2002-07-11 | 2003-12-17 | Verfahren, bei dem eine Aktivmatrixvorrichtung mit organischen Lichtemissionsdioden hergestellt wird |
GB0329643A GB2409571B (en) | 2002-07-11 | 2003-12-22 | Active matrix type organic light emitting diode device and thin film transistor thereof |
FR0315564A FR2864703B1 (fr) | 2002-07-11 | 2003-12-30 | Dispositif a diode photoemettrice organique, transistor a film mince pour celui-ci et leurs procedes de fabrication |
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JP2004096100A JP2004096100A (ja) | 2004-03-25 |
JP4044014B2 true JP4044014B2 (ja) | 2008-02-06 |
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US (1) | US6933529B2 (ja) |
JP (1) | JP4044014B2 (ja) |
CN (1) | CN1477910B (ja) |
DE (1) | DE10359248B4 (ja) |
FR (1) | FR2864703B1 (ja) |
GB (1) | GB2409571B (ja) |
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US6753654B2 (en) * | 2001-02-21 | 2004-06-22 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and electronic appliance |
KR100542997B1 (ko) * | 2003-08-07 | 2006-01-20 | 삼성에스디아이 주식회사 | 평판표시장치 및 그의 제조방법 |
NL1025134C2 (nl) * | 2003-12-24 | 2005-08-26 | Lg Philips Lcd Co | Organische licht emitterende diode-inrichting van de soort met actieve matrix en daarvoor bestemde dunne-filmtransistor. |
JP4561096B2 (ja) * | 2003-12-26 | 2010-10-13 | ソニー株式会社 | ディスプレイ装置 |
KR100560796B1 (ko) * | 2004-06-24 | 2006-03-13 | 삼성에스디아이 주식회사 | 유기 박막트랜지스터 및 그의 제조방법 |
JP5152448B2 (ja) * | 2004-09-21 | 2013-02-27 | カシオ計算機株式会社 | 画素駆動回路及び画像表示装置 |
JP4543315B2 (ja) * | 2004-09-27 | 2010-09-15 | カシオ計算機株式会社 | 画素駆動回路及び画像表示装置 |
US20060138403A1 (en) * | 2004-12-29 | 2006-06-29 | Gang Yu | Organic electronic devices including pixels |
KR101142996B1 (ko) * | 2004-12-31 | 2012-05-08 | 재단법인서울대학교산학협력재단 | 표시 장치 및 그 구동 방법 |
TWI249970B (en) * | 2005-01-12 | 2006-02-21 | Delta Optoelectronics Inc | Method for driving pixel of active display and system thereof |
CN100362396C (zh) * | 2005-02-25 | 2008-01-16 | 友达光电股份有限公司 | 双面显示面板 |
JP4962682B2 (ja) * | 2005-03-16 | 2012-06-27 | カシオ計算機株式会社 | 発光駆動回路及び表示装置 |
KR100624314B1 (ko) * | 2005-06-22 | 2006-09-19 | 삼성에스디아이 주식회사 | 발광표시장치 및 박막트랜지스터 |
JP2007035964A (ja) * | 2005-07-27 | 2007-02-08 | Sony Corp | 薄膜トランジスタとその製造方法、及び表示装置 |
KR100659112B1 (ko) * | 2005-11-22 | 2006-12-19 | 삼성에스디아이 주식회사 | 유기 박막 트랜지스터 및 이의 제조 방법, 이를 구비한평판 디스플레이 장치 |
KR101227142B1 (ko) * | 2006-05-17 | 2013-01-28 | 엘지디스플레이 주식회사 | 전계발광소자 및 그 제조방법 |
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-
2003
- 2003-06-30 US US10/609,024 patent/US6933529B2/en not_active Expired - Lifetime
- 2003-07-10 JP JP2003272877A patent/JP4044014B2/ja not_active Expired - Lifetime
- 2003-07-10 CN CN03146362.2A patent/CN1477910B/zh not_active Expired - Lifetime
- 2003-12-17 DE DE10359248A patent/DE10359248B4/de not_active Expired - Lifetime
- 2003-12-22 GB GB0329643A patent/GB2409571B/en not_active Expired - Lifetime
- 2003-12-30 FR FR0315564A patent/FR2864703B1/fr not_active Expired - Lifetime
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CN1477910B (zh) | 2011-09-28 |
CN1477910A (zh) | 2004-02-25 |
GB0329643D0 (en) | 2004-01-28 |
FR2864703B1 (fr) | 2006-05-05 |
GB2409571B (en) | 2007-01-10 |
FR2864703A1 (fr) | 2005-07-01 |
DE10359248B4 (de) | 2011-04-28 |
US20040142502A1 (en) | 2004-07-22 |
US6933529B2 (en) | 2005-08-23 |
JP2004096100A (ja) | 2004-03-25 |
DE10359248A1 (de) | 2005-07-28 |
GB2409571A (en) | 2005-06-29 |
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