JP2008084958A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 318
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 112
- 239000002184 metal Substances 0.000 claims abstract description 335
- 229910052751 metal Inorganic materials 0.000 claims abstract description 335
- 229920005989 resin Polymers 0.000 claims abstract description 211
- 239000011347 resin Substances 0.000 claims abstract description 211
- 238000000034 method Methods 0.000 claims abstract description 74
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- 239000011241 protective layer Substances 0.000 claims description 34
- 238000003825 pressing Methods 0.000 claims description 31
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- 230000001681 protective effect Effects 0.000 description 11
- 230000015572 biosynthetic process Effects 0.000 description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 8
- 239000000463 material Substances 0.000 description 8
- 239000000853 adhesive Substances 0.000 description 7
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- 239000004020 conductor Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
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Abstract
【解決手段】複数の内部接続端子12が設けられた側の複数の半導体チップ11と複数の内部接続端子12とを覆うように絶縁樹脂13を形成し、次いで、絶縁樹脂13上に配線パターンとなる金属層33を形成し、この金属層33を押圧して、金属層33と複数の内部接続端子12とを圧着させる。
【選択図】図17
Description
図11は、本発明の第1の実施の形態に係る半導体装置の断面図である。
Auバンプは、例えば、ボンディング法により形成することができる。なお、図14に示す工程で形成された複数の内部接続端子12には、高さばらつきが存在する。
図24は、本発明の第2の実施の形態に係る半導体装置の断面図である。
図28は、本発明の第3の実施の形態に係る半導体装置の断面図である。
図38は、本発明の第4の実施の形態に係る半導体装置の断面図である。
11 半導体チップ
12 内部接続端子
12A,13A,33A,41A,71A,72A 上面
13 絶縁樹脂
14,15 配線パターン
14A,15A 外部接続端子配設領域
16 ソルダーレジスト
16A,16B 開口部
17 外部接続端子
21,31 半導体基板
22 半導体集積回路
23 電極パッド
24 保護膜
33 金属層
33B,54A 下面
41 異方性導電樹脂
51 接続パッド
54 第1の金属層
55 第2の金属層
57,76,78 レジスト膜
61 保護層
71 メタルポスト
72 封止樹脂
74 第3の金属層
A 半導体装置形成領域
B スクライブ領域
C 切断位置
T1〜T12 厚さ
H1,H2 高さ
Claims (16)
- 複数の半導体チップが形成される半導体基板と、電極パッドを有した前記複数の半導体チップと、前記電極パッドに設けられた内部接続端子と、前記内部接続端子と接続された配線パターンと、を備えた半導体装置の製造方法であって、
前記内部接続端子が設けられた側の前記複数の半導体チップと前記内部接続端子とを覆うように絶縁樹脂を形成する絶縁樹脂形成工程と、
前記絶縁樹脂上に金属層を形成する金属層形成工程と、
前記金属層を押圧して、前記金属層と前記内部接続端子とを圧着させる圧着工程と、
前記圧着工程後に、前記金属層をエッチングして前記配線パターンを形成する配線パターン形成工程と、を含むことを特徴とする半導体装置の製造方法。 - 複数の半導体チップが形成される半導体基板と、電極パッドを有した前記複数の半導体チップと、前記電極パッドに設けられた内部接続端子と、前記内部接続端子と接続された配線パターンと、を備えた半導体装置の製造方法であって、
前記内部接続端子が設けられた側の前記複数の半導体チップと前記内部接続端子とを覆うように絶縁樹脂を形成する絶縁樹脂形成工程と、
前記絶縁樹脂上に第1の金属層と第2の金属層とを順次積層させる金属層積層工程と、
前記第2の金属層を押圧して、前記第1の金属層と前記内部接続端子とを圧着させる圧着工程と、
前記圧着工程後に、前記第2の金属層をエッチングして接続パッドを形成する接続パッド形成工程と、
前記第1の金属層をエッチングして前記配線パターンを形成する配線パターン形成工程と、を含むことを特徴とする半導体装置の製造方法。 - 前記第1の金属層は、前記第2の金属層をエッチングするときのエッチングストッパーであることを特徴とする請求項2記載の半導体装置の製造方法。
- 複数の半導体チップが形成される半導体基板と、電極パッドを有した前記複数の半導体チップと、前記電極パッドに設けられた内部接続端子と、前記内部接続端子と接続された配線パターンと、を備えた半導体装置の製造方法であって、
前記内部接続端子が設けられた側の前記複数の半導体チップと前記内部接続端子とを覆うように絶縁樹脂を形成する絶縁樹脂形成工程と、
前記絶縁樹脂上に第1の金属層、第2の金属層、及び前記第2の金属層を保護する保護層を順次積層させる積層工程と、
前記積層工程後に、前記保護層を押圧して、前記第1の金属層と前記内部接続端子とを圧着させる圧着工程と、
前記圧着工程後に、前記保護層を除去する保護層除去工程と、
前記第2の金属層をエッチングして接続パッドを形成する接続パッド形成工程と、
前記第1の金属層をエッチングして前記配線パターンを形成する配線パターン形成工程と、を含むことを特徴とする半導体装置の製造方法。 - 前記第1の金属層は、前記第2の金属層をエッチングするときのエッチングストッパーであることを特徴とする請求項4記載の半導体装置の製造方法。
- 複数の半導体チップが形成される半導体基板と、電極パッドを有した前記複数の半導体チップと、前記電極パッドに設けられた内部接続端子と、前記内部接続端子と接続された配線パターンと、を備えた半導体装置の製造方法であって、
前記内部接続端子が設けられた側の前記複数の半導体チップと前記内部接続端子とを覆うように絶縁樹脂を形成する絶縁樹脂形成工程と、
前記絶縁樹脂上に第1の金属層、第2の金属層、及び第3の金属層を順次積層させる金属層積層工程と、
前記第3の金属層を押圧して、前記第1の金属層と前記内部接続端子とを圧着させる圧着工程と、
前記圧着工程後に、第3の金属層をエッチングしてメタルポストを形成するメタルポスト形成工程と、
前記第2の金属層をエッチングして接続パッドを形成する接続パッド形成工程と、
前記第1の金属層をエッチングして前記配線パターンを形成する配線パターン形成工程と、を含むことを特徴とする半導体装置の製造方法。 - 前記第2の金属層は、前記第3の金属層をエッチングするときのエッチングストッパーであることを特徴とする請求項6記載の半導体装置の製造方法。
- 前記第1の金属層は、前記第2の金属層をエッチングするときのエッチングストッパーであることを特徴とする請求項6または7記載の半導体装置の製造方法。
- 複数の半導体チップが形成される半導体基板と、電極パッドを有した前記複数の半導体チップと、前記電極パッドに設けられた内部接続端子と、前記内部接続端子と接続された配線パターンと、を備えた半導体装置の製造方法であって、
前記内部接続端子が設けられた側の前記複数の半導体チップと前記内部接続端子とを覆うように異方性導電樹脂を形成する異方性導電樹脂形成工程と、
前記異方性導電樹脂上に金属層を形成する金属層形成工程と、
前記金属層を押圧して、前記金属層と前記内部接続端子とを圧着させる圧着工程と、
前記圧着工程後に、前記金属層をエッチングして前記配線パターンを形成する配線パターン形成工程と、を含むことを特徴とする半導体装置の製造方法。 - 複数の半導体チップが形成される半導体基板と、電極パッドを有した前記複数の半導体チップと、前記電極パッドに設けられた内部接続端子と、前記内部接続端子と接続された配線パターンと、を備えた半導体装置の製造方法であって、
前記内部接続端子が設けられた側の前記複数の半導体チップと前記内部接続端子とを覆うように異方性導電樹脂を形成する異方性導電樹脂形成工程と、
前記異方性導電樹脂に第1の金属層と第2の金属層とを順次積層させる金属層積層工程と、
前記第2の金属層を押圧して、前記第1の金属層と前記内部接続端子とを圧着させる圧着工程と、
前記圧着工程後に、前記第2の金属層をエッチングして接続パッドを形成する接続パッド形成工程と、
前記第1の金属層をエッチングして前記配線パターンを形成する配線パターン形成工程と、を含むことを特徴とする半導体装置の製造方法。 - 前記第1の金属層は、前記第2の金属層をエッチングするときのエッチングストッパーであることを特徴とする請求項10記載の半導体装置の製造方法。
- 複数の半導体チップが形成される半導体基板と、電極パッドを有した前記複数の半導体チップと、前記電極パッドに設けられた内部接続端子と、前記内部接続端子と接続された配線パターンと、を備えた半導体装置の製造方法であって、
前記内部接続端子が設けられた側の前記複数の半導体チップと前記内部接続端子とを覆うように異方性導電樹脂を形成する異方性導電樹脂形成工程と、
前記異方性導電樹脂に第1の金属層、第2の金属層、及び前記第2の金属層を保護する保護層を順次積層させる積層工程と、
前記積層工程後に、前記保護層を押圧して、前記第1の金属層と前記内部接続端子とを圧着させる圧着工程と、
前記圧着工程後に、前記保護層を除去する保護層除去工程と、
前記第2の金属層をエッチングして接続パッドを形成する接続パッド形成工程と、
前記第1の金属層をエッチングして前記配線パターンを形成する配線パターン形成工程と、を含むことを特徴とする半導体装置の製造方法。 - 前記第1の金属層は、前記第2の金属層をエッチングするときのエッチングストッパーであることを特徴とする請求項12記載の半導体装置の製造方法。
- 複数の半導体チップが形成される半導体基板と、電極パッドを有した前記複数の半導体チップと、前記電極パッドに設けられた内部接続端子と、前記内部接続端子と接続された配線パターンと、を備えた半導体装置の製造方法であって、
前記内部接続端子が設けられた側の前記複数の半導体チップと前記内部接続端子とを覆うように異方性導電樹脂を形成する異方性導電樹脂形成工程と、
前記異方性導電樹脂に第1の金属層、第2の金属層、及び第3の金属層を順次積層させる金属層積層工程と、
前記第3の金属層を押圧して、前記第1の金属層と前記内部接続端子とを圧着させる圧着工程と、
前記圧着工程後に、前記第3の金属層をエッチングしてメタルポストを形成するメタルポスト形成工程と、
前記第2の金属層をエッチングして接続パッドを形成する接続パッド形成工程と、
前記第1の金属層をエッチングして前記配線パターンを形成する配線パターン形成工程と、を含むことを特徴とする半導体装置の製造方法。 - 前記第2の金属層は、前記第3の金属層をエッチングするときのエッチングストッパーであることを特徴とする請求項14記載の半導体装置の製造方法。
- 前記第1の金属層は、前記第2の金属層をエッチングするときのエッチングストッパーであることを特徴とする請求項14または15記載の半導体装置の製造方法。
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KR1020070093990A KR20080028283A (ko) | 2006-09-26 | 2007-09-17 | 반도체 장치의 제조 방법 |
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US7919843B2 (en) | 2008-06-25 | 2011-04-05 | Shinko Electric Industries Co., Ltd. | Semiconductor device and its manufacturing method |
EP2421341A2 (en) | 2008-12-22 | 2012-02-22 | Fujitsu Limited | Electronic component and method of manufacturing the same |
JP2015076446A (ja) * | 2013-10-07 | 2015-04-20 | 日立化成株式会社 | 太陽電池セル |
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CN101303443A (zh) * | 2007-05-11 | 2008-11-12 | 鸿富锦精密工业(深圳)有限公司 | 相机模组及其组装方法 |
JP4121542B1 (ja) * | 2007-06-18 | 2008-07-23 | 新光電気工業株式会社 | 電子装置の製造方法 |
JP5064157B2 (ja) * | 2007-09-18 | 2012-10-31 | 新光電気工業株式会社 | 半導体装置の製造方法 |
JP2012134270A (ja) * | 2010-12-21 | 2012-07-12 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US10163828B2 (en) * | 2013-11-18 | 2018-12-25 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor device and fabricating method thereof |
KR102256299B1 (ko) | 2016-08-02 | 2021-05-26 | 삼성에스디아이 주식회사 | 리튬이차전지용 리튬 코발트 복합 산화물 및 이를 포함한 양극을 함유한 리튬이차전지 |
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KR100218996B1 (ko) | 1995-03-24 | 1999-09-01 | 모기 쥰이찌 | 반도체장치 |
JP3378171B2 (ja) | 1997-06-02 | 2003-02-17 | 山一電機株式会社 | 半導体パッケージの製造方法 |
JP3780688B2 (ja) | 1998-02-27 | 2006-05-31 | 日立化成工業株式会社 | Csp用基板の製造法 |
KR100711539B1 (ko) | 1999-06-10 | 2007-04-27 | 도요 고한 가부시키가이샤 | 반도체장치용 인터포저 형성용 클래드판, 반도체장치용인터포저 및 그 제조방법 |
JP2001308095A (ja) | 2000-04-19 | 2001-11-02 | Toyo Kohan Co Ltd | 半導体装置およびその製造方法 |
JP2002110854A (ja) | 2000-09-28 | 2002-04-12 | Nec Corp | 半導体装置およびその製造方法 |
JP2002151551A (ja) * | 2000-11-10 | 2002-05-24 | Hitachi Ltd | フリップチップ実装構造、その実装構造を有する半導体装置及び実装方法 |
JP3717899B2 (ja) * | 2002-04-01 | 2005-11-16 | Necエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
JP3614828B2 (ja) | 2002-04-05 | 2005-01-26 | 沖電気工業株式会社 | チップサイズパッケージの製造方法 |
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JP2004193497A (ja) * | 2002-12-13 | 2004-07-08 | Nec Electronics Corp | チップサイズパッケージおよびその製造方法 |
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US7919843B2 (en) | 2008-06-25 | 2011-04-05 | Shinko Electric Industries Co., Ltd. | Semiconductor device and its manufacturing method |
EP2421341A2 (en) | 2008-12-22 | 2012-02-22 | Fujitsu Limited | Electronic component and method of manufacturing the same |
EP2421342A2 (en) | 2008-12-22 | 2012-02-22 | Fujitsu Limited | Electronic component and method of manufacturing the same |
US8704106B2 (en) | 2008-12-22 | 2014-04-22 | Fujitsu Limited | Ferroelectric component and manufacturing the same |
JP2015076446A (ja) * | 2013-10-07 | 2015-04-20 | 日立化成株式会社 | 太陽電池セル |
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US7749889B2 (en) | 2010-07-06 |
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