JP2006324488A - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP2006324488A JP2006324488A JP2005146529A JP2005146529A JP2006324488A JP 2006324488 A JP2006324488 A JP 2006324488A JP 2005146529 A JP2005146529 A JP 2005146529A JP 2005146529 A JP2005146529 A JP 2005146529A JP 2006324488 A JP2006324488 A JP 2006324488A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 title claims description 15
- 238000000034 method Methods 0.000 claims abstract description 22
- 150000004767 nitrides Chemical class 0.000 claims description 18
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 12
- 229910052710 silicon Inorganic materials 0.000 claims description 12
- 239000010703 silicon Substances 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 9
- 230000015556 catabolic process Effects 0.000 abstract description 34
- 239000012535 impurity Substances 0.000 abstract description 10
- 238000009792 diffusion process Methods 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 69
- 230000003071 parasitic effect Effects 0.000 description 14
- 239000011229 interlayer Substances 0.000 description 10
- 230000006866 deterioration Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 230000006378 damage Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66734—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
【解決手段】 トレンチに埋め込まれたゲート電極6を有するトレンチ型半導体装置において、前記トレンチはその開口部11bの幅と等しい幅を有する第1の領域11cと、前記第1の領域11cの下部に配置されて前記開口部11bの幅より大きい幅を有する第2の領域11dとを具備し、前記トレンチに隣接して設けられるベース層2の底面が前記第2の領域11dに隣接して配置され、また、前記第2の領域11dの角部は、曲率半径が0.1μm以上となるように丸く形成されている。
【選択図】 図1
Description
また、さらにはFETオン時の電流は、丸めた底部付近を通るため、表面に至るまでの距離が長くなり、FETのオン抵抗が増大するという問題も発生する。
2 Pベース層
3 N−ドレイン層
4 N+ドレイン層
5 ゲート酸化膜
6 ゲート電極
7 ソース電極
8 ドレイン電極
9 高濃度P+層
10 酸化膜
11 トレンチ
11a トレンチ底部
11b トレンチ開口部
11c トレンチの第1の領域
11d トレンチの第2の領域
12 窒化膜
13 層間絶縁膜
14 N+エミッタ領域
15 Pベース領域
16 N−ベース領域
16a キャリア蓄積領域
17 ゲート酸化膜
18 ゲート電極
19 エミッタ電極
20 反転層
21 N+バッファ領域
22 P+コレクタ領域
23 コレクタ電極
a セルピッチ
b Pベース層底面深さ
c N+ソース層深さ
d トレンチの第2の領域厚さ
e1 トレンチ開口部幅
e2 トレンチの第2の領域幅
f トレンチ深さ
Claims (3)
- トレンチに埋め込まれたゲート電極を有する半導体装置において、前記トレンチはその開口部の幅と等しい幅を有する第1の領域と、前記第1の領域の下部に配置されて前記開口部の幅より大きい幅を有する第2の領域とを具備し、前記トレンチに隣接して設けられるベース層の底面が前記第2の領域に隣接して配置されることを特徴とする半導体装置。
- 請求項1記載の半導体装置において、前記第2の領域の角部は、曲率半径が0.1μm以上となるように丸く形成されていることを特徴とする半導体装置。
- トレンチに埋め込まれたゲート電極を有する半導体装置の製造方法において、シリコン基板に対して酸化膜をマスクとして異方性エッチングを行ってトレンチを形成した後、前記シリコン基板全面に窒化膜を形成して異方性エッチバックによって前記シリコン基板上面の窒化膜を除去すると共に前記トレンチ側壁部分のみに窒化膜を残し、前記酸化膜と窒化膜をマスクとしてトレンチ底部のシリコンを等方性エッチングして、トレンチ底部の幅を大きくするトレンチ形成工程を備えることを特徴とする半導体装置の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005146529A JP2006324488A (ja) | 2005-05-19 | 2005-05-19 | 半導体装置及びその製造方法 |
US11/435,754 US7800187B2 (en) | 2005-05-19 | 2006-05-18 | Trech-type vertical semiconductor device having gate electrode buried in rounded hump opening |
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JP2005146529A JP2006324488A (ja) | 2005-05-19 | 2005-05-19 | 半導体装置及びその製造方法 |
Publications (1)
Publication Number | Publication Date |
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JP2006324488A true JP2006324488A (ja) | 2006-11-30 |
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JP2005146529A Pending JP2006324488A (ja) | 2005-05-19 | 2005-05-19 | 半導体装置及びその製造方法 |
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US (1) | US7800187B2 (ja) |
JP (1) | JP2006324488A (ja) |
Cited By (13)
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KR100798798B1 (ko) | 2006-12-27 | 2008-01-29 | 주식회사 하이닉스반도체 | 벌브형 리세스 게이트를 갖는 반도체 소자의 제조 방법 |
JP2008060138A (ja) * | 2006-08-29 | 2008-03-13 | Mitsubishi Electric Corp | 電力用半導体装置およびその製造方法 |
JP2010258252A (ja) * | 2009-04-27 | 2010-11-11 | Renesas Electronics Corp | 半導体装置の製造方法 |
JP2012080074A (ja) * | 2010-09-08 | 2012-04-19 | Denso Corp | 半導体装置 |
JP2012134376A (ja) * | 2010-12-22 | 2012-07-12 | Denso Corp | 炭化珪素半導体装置およびその製造方法 |
WO2013046578A1 (ja) * | 2011-09-27 | 2013-04-04 | 株式会社デンソー | 半導体装置 |
WO2013132825A1 (ja) * | 2012-03-05 | 2013-09-12 | 株式会社デンソー | 半導体装置およびその製造方法 |
WO2013179650A1 (ja) * | 2012-05-31 | 2013-12-05 | 株式会社デンソー | 半導体装置およびその製造方法 |
WO2014061075A1 (ja) * | 2012-10-15 | 2014-04-24 | トヨタ自動車株式会社 | 半導体装置およびその製造装置 |
JP2015138884A (ja) * | 2014-01-22 | 2015-07-30 | 株式会社デンソー | 半導体装置の製造方法 |
WO2016042955A1 (ja) * | 2014-09-17 | 2016-03-24 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP6052394B2 (ja) * | 2013-03-15 | 2016-12-27 | トヨタ自動車株式会社 | 半導体装置およびその製造方法 |
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KR100791342B1 (ko) * | 2006-08-09 | 2008-01-03 | 삼성전자주식회사 | 반도체 소자 및 그 제조 방법 |
US7612406B2 (en) * | 2006-09-08 | 2009-11-03 | Infineon Technologies Ag | Transistor, memory cell array and method of manufacturing a transistor |
US7858476B2 (en) * | 2006-10-30 | 2010-12-28 | Hynix Semiconductor Inc. | Method for fabricating semiconductor device with recess gate |
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2005
- 2005-05-19 JP JP2005146529A patent/JP2006324488A/ja active Pending
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2006
- 2006-05-18 US US11/435,754 patent/US7800187B2/en not_active Expired - Fee Related
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JPH04309269A (ja) * | 1991-04-08 | 1992-10-30 | Nissan Motor Co Ltd | 半導体装置 |
JPH05110105A (ja) * | 1991-10-14 | 1993-04-30 | Nissan Motor Co Ltd | 半導体装置 |
JPH0992828A (ja) * | 1995-09-27 | 1997-04-04 | Hitachi Ltd | 絶縁ゲート型バイポーラトランジスタ及びその製造方法 |
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Cited By (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008060138A (ja) * | 2006-08-29 | 2008-03-13 | Mitsubishi Electric Corp | 電力用半導体装置およびその製造方法 |
KR100798798B1 (ko) | 2006-12-27 | 2008-01-29 | 주식회사 하이닉스반도체 | 벌브형 리세스 게이트를 갖는 반도체 소자의 제조 방법 |
US8609493B2 (en) | 2009-04-27 | 2013-12-17 | Renesas Electronics Corporation | Method of fabricating semiconductor device |
JP2010258252A (ja) * | 2009-04-27 | 2010-11-11 | Renesas Electronics Corp | 半導体装置の製造方法 |
JP2012080074A (ja) * | 2010-09-08 | 2012-04-19 | Denso Corp | 半導体装置 |
JP2012134376A (ja) * | 2010-12-22 | 2012-07-12 | Denso Corp | 炭化珪素半導体装置およびその製造方法 |
WO2013046578A1 (ja) * | 2011-09-27 | 2013-04-04 | 株式会社デンソー | 半導体装置 |
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CN104160512A (zh) * | 2012-03-05 | 2014-11-19 | 株式会社电装 | 半导体装置及其制造方法 |
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