DE69429462D1 - Halbleitervorrichtung und Versorgungsstrom- Detektionsverfahren - Google Patents
Halbleitervorrichtung und Versorgungsstrom- DetektionsverfahrenInfo
- Publication number
- DE69429462D1 DE69429462D1 DE69429462T DE69429462T DE69429462D1 DE 69429462 D1 DE69429462 D1 DE 69429462D1 DE 69429462 T DE69429462 T DE 69429462T DE 69429462 T DE69429462 T DE 69429462T DE 69429462 D1 DE69429462 D1 DE 69429462D1
- Authority
- DE
- Germany
- Prior art keywords
- memory
- semiconductor device
- write
- sense amplifier
- cell matrix
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/021—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in voltage or current generators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/1201—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details comprising I/O circuitry
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/24—Accessing extra cells, e.g. dummy cells or redundant cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C29/50004—Marginal testing, e.g. race, voltage or current testing of threshold voltage
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C29/50016—Marginal testing, e.g. race, voltage or current testing of retention
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
- G11C29/56004—Pattern generation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
- G11C29/56016—Apparatus features
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/143—Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
- G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C2029/5006—Current
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Read Only Memory (AREA)
- Tests Of Electronic Circuits (AREA)
- Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP05713593A JP3236105B2 (ja) | 1993-03-17 | 1993-03-17 | 不揮発性半導体記憶装置及びその動作試験方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69429462D1 true DE69429462D1 (de) | 2002-01-24 |
DE69429462T2 DE69429462T2 (de) | 2002-05-23 |
Family
ID=13047124
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69423668T Expired - Lifetime DE69423668T2 (de) | 1993-03-17 | 1994-02-08 | Nichtflüchtige Halbleiterspeichervorrichtung mit Statusregister und Prüfverfahren dafür |
DE69429462T Expired - Lifetime DE69429462T2 (de) | 1993-03-17 | 1994-02-08 | Halbleitervorrichtung und Versorgungsstrom- Detektionsverfahren |
DE69430598T Expired - Lifetime DE69430598T2 (de) | 1993-03-17 | 1994-02-08 | Prüfverfahren für programmierbare nicht flüchtige Halbleiterspeichervorrichtung |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69423668T Expired - Lifetime DE69423668T2 (de) | 1993-03-17 | 1994-02-08 | Nichtflüchtige Halbleiterspeichervorrichtung mit Statusregister und Prüfverfahren dafür |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69430598T Expired - Lifetime DE69430598T2 (de) | 1993-03-17 | 1994-02-08 | Prüfverfahren für programmierbare nicht flüchtige Halbleiterspeichervorrichtung |
Country Status (5)
Country | Link |
---|---|
US (4) | US5402380A (de) |
EP (4) | EP0923082A3 (de) |
JP (1) | JP3236105B2 (de) |
KR (1) | KR970003811B1 (de) |
DE (3) | DE69423668T2 (de) |
Families Citing this family (47)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3236105B2 (ja) * | 1993-03-17 | 2001-12-10 | 富士通株式会社 | 不揮発性半導体記憶装置及びその動作試験方法 |
US5724289A (en) * | 1993-09-08 | 1998-03-03 | Fujitsu Limited | Nonvolatile semiconductor memory capable of selectively performing a pre-conditioning of threshold voltage before an erase self-test of memory cells and a method related therewith |
US5553238A (en) * | 1995-01-19 | 1996-09-03 | Hewlett-Packard Company | Powerfail durable NVRAM testing |
JP3409527B2 (ja) * | 1995-08-17 | 2003-05-26 | 富士通株式会社 | 半導体記憶装置 |
US5675540A (en) * | 1996-01-22 | 1997-10-07 | Micron Quantum Devices, Inc. | Non-volatile memory system having internal data verification test mode |
JP2818571B2 (ja) * | 1996-02-21 | 1998-10-30 | 山形日本電気株式会社 | 半導体記憶装置 |
US5734275A (en) * | 1996-07-18 | 1998-03-31 | Advanced Micro Devices, Inc. | Programmable logic device having a sense amplifier with virtual ground |
JP3680462B2 (ja) * | 1996-12-13 | 2005-08-10 | 富士通株式会社 | 半導体装置 |
JPH10199293A (ja) * | 1996-12-27 | 1998-07-31 | Canon Inc | メモリのデータ保持特性の試験方法 |
KR100259322B1 (ko) * | 1998-01-15 | 2000-06-15 | 윤종용 | 반도체소자 검사장비의 안정도 분석방법 |
US6046943A (en) * | 1998-03-10 | 2000-04-04 | Texas Instuments Incorporated | Synchronous semiconductor device output circuit with reduced data switching |
JP3012589B2 (ja) * | 1998-03-24 | 2000-02-21 | 日本電気アイシーマイコンシステム株式会社 | 不揮発性半導体記憶装置 |
DE19913570C2 (de) * | 1999-03-25 | 2001-03-08 | Siemens Ag | Betriebsverfahren für einen integrierten Speicher und integrierter Speicher |
WO2000070359A1 (de) * | 1999-05-14 | 2000-11-23 | Infineon Technologies Ag | Integrierte schaltung und verfahren zum bestimmen der stromergiebigkeit eines schaltungsteils der integrierten schaltung |
US6226200B1 (en) * | 1999-11-17 | 2001-05-01 | Motorola Inc. | In-circuit memory array bit cell threshold voltage distribution measurement |
US6459634B1 (en) * | 2000-01-31 | 2002-10-01 | Micron Technology, Inc. | Circuits and methods for testing memory cells along a periphery of a memory array |
IT1316870B1 (it) * | 2000-03-31 | 2003-05-12 | St Microelectronics Srl | Metodo e relativo dispositivo per effettuare operazioni di test sudispositivi elettronici di memoria |
JP3606799B2 (ja) * | 2000-10-05 | 2005-01-05 | 沖電気工業株式会社 | 半導体記憶装置 |
JP4082482B2 (ja) * | 2000-12-11 | 2008-04-30 | 株式会社ルネサステクノロジ | 記憶システムおよびデータ処理システム |
JP2002288988A (ja) * | 2001-03-28 | 2002-10-04 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置 |
JP4152668B2 (ja) * | 2002-04-30 | 2008-09-17 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
KR100467017B1 (ko) * | 2002-06-24 | 2005-01-24 | 삼성전자주식회사 | 증폭 회로로 안정적인 전류와 전압을 공급하기 위해가변적인 크기를 갖는 로드 트랜지스터 회로 |
US6788602B2 (en) * | 2002-08-09 | 2004-09-07 | Macronix International Co., Ltd. | Memory device and operation thereof |
KR100471182B1 (ko) * | 2002-09-03 | 2005-03-10 | 삼성전자주식회사 | 레디/비지 핀을 이용하여 내부 전압 레벨을 알리는 반도체메모리 장치 |
JP2004199763A (ja) * | 2002-12-18 | 2004-07-15 | Renesas Technology Corp | 半導体集積回路装置 |
JP4050690B2 (ja) * | 2003-11-21 | 2008-02-20 | 株式会社東芝 | 半導体集積回路装置 |
KR100533385B1 (ko) * | 2004-04-16 | 2005-12-06 | 주식회사 하이닉스반도체 | 반도체 메모리 테스트 방법 |
US7053647B2 (en) * | 2004-05-07 | 2006-05-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of detecting potential bridging effects between conducting lines in an integrated circuit |
JP2006210718A (ja) * | 2005-01-28 | 2006-08-10 | Renesas Technology Corp | 半導体装置の製造方法および半導体装置 |
US6950353B1 (en) | 2005-02-01 | 2005-09-27 | International Business Machines Corporation | Cell data margin test with dummy cell |
DE102005011891B3 (de) * | 2005-03-15 | 2006-09-21 | Infineon Technologies Ag | Halbleiterspeicherbauelement und Verfahren zum Prüfen von Halbleiterspeicherbauelementen mit eingeschränktem Speicherbereich (Partial-Good-Memories) |
US7555677B1 (en) * | 2005-04-22 | 2009-06-30 | Sun Microsystems, Inc. | System and method for diagnostic test innovation |
JP4652409B2 (ja) * | 2005-08-25 | 2011-03-16 | スパンション エルエルシー | 記憶装置、および記憶装置の制御方法 |
KR100655078B1 (ko) * | 2005-09-16 | 2006-12-08 | 삼성전자주식회사 | 비트 레지스터링 레이어를 갖는 반도체 메모리 장치 및그의 구동 방법 |
US8022780B2 (en) * | 2008-04-22 | 2011-09-20 | Qualcomm Incorporated | Auxiliary varactor for temperature compensation |
US20090300439A1 (en) * | 2008-06-03 | 2009-12-03 | Christopher Haywood | Method and Apparatus for Testing Write-Only Registers |
JP5328525B2 (ja) * | 2009-07-02 | 2013-10-30 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP5300771B2 (ja) * | 2010-03-25 | 2013-09-25 | ルネサスエレクトロニクス株式会社 | 不揮発性半導体記憶装置 |
US9104580B1 (en) | 2010-07-27 | 2015-08-11 | Apple Inc. | Cache memory for hybrid disk drives |
US8922236B2 (en) * | 2010-09-10 | 2014-12-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor memory device and method for inspecting the same |
US10481992B1 (en) * | 2011-03-31 | 2019-11-19 | EMC IP Holding Company LLC | Optimization of flash storage |
US8576648B2 (en) * | 2011-11-09 | 2013-11-05 | Silicon Storage Technology, Inc. | Method of testing data retention of a non-volatile memory cell having a floating gate |
CN102436841B (zh) * | 2011-11-24 | 2016-04-06 | 上海华虹宏力半导体制造有限公司 | 存储器及其冗余替代方法 |
CN102522108B (zh) * | 2011-12-22 | 2016-04-06 | 上海华虹宏力半导体制造有限公司 | 存储器的冗余替代方法 |
KR20130129638A (ko) | 2012-05-21 | 2013-11-29 | 에스케이하이닉스 주식회사 | 불휘발성 반도체 메모리 장치 및 그의 리드 방법 |
CN111948507A (zh) * | 2020-07-08 | 2020-11-17 | 中国科学院上海微***与信息技术研究所 | 一种不同写操作下相变存储芯片热稳定性预测方法 |
US11094393B1 (en) * | 2020-09-02 | 2021-08-17 | Qualcomm Incorporated | Apparatus and method for clearing memory content |
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US4379259A (en) * | 1980-03-12 | 1983-04-05 | National Semiconductor Corporation | Process of performing burn-in and parallel functional testing of integrated circuit memories in an environmental chamber |
JPS58139399A (ja) * | 1982-02-15 | 1983-08-18 | Hitachi Ltd | 半導体記憶装置 |
JPS5948933A (ja) * | 1982-09-13 | 1984-03-21 | Nec Corp | 半導体不揮発性記憶装置の検査方法 |
JPS62222498A (ja) * | 1986-03-10 | 1987-09-30 | Fujitsu Ltd | 消去及び書き込み可能な読み出し専用メモリ |
DE3723727A1 (de) * | 1987-07-17 | 1989-01-26 | Siemens Ag | Stromversorgungseinrichtung |
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US4967394A (en) * | 1987-09-09 | 1990-10-30 | Kabushiki Kaisha Toshiba | Semiconductor memory device having a test cell array |
JPH01166391A (ja) * | 1987-12-23 | 1989-06-30 | Toshiba Corp | スタティック型ランダムアクセスメモリ |
KR0134773B1 (ko) * | 1988-07-05 | 1998-04-20 | Hitachi Ltd | 반도체 기억장치 |
JPH02177100A (ja) * | 1988-12-27 | 1990-07-10 | Nec Corp | 半導体記憶装置のテスト回路 |
US5142495A (en) * | 1989-03-10 | 1992-08-25 | Intel Corporation | Variable load for margin mode |
JP2614514B2 (ja) * | 1989-05-19 | 1997-05-28 | 三菱電機株式会社 | ダイナミック・ランダム・アクセス・メモリ |
JPH0693484B2 (ja) * | 1989-11-10 | 1994-11-16 | 株式会社東芝 | 半導体集積回路 |
US4975883A (en) * | 1990-03-29 | 1990-12-04 | Intel Corporation | Method and apparatus for preventing the erasure and programming of a nonvolatile memory |
US5063304A (en) * | 1990-04-27 | 1991-11-05 | Texas Instruments Incorporated | Integrated circuit with improved on-chip power supply control |
JP3037377B2 (ja) * | 1990-08-27 | 2000-04-24 | 沖電気工業株式会社 | 半導体記憶装置 |
JPH04106795A (ja) * | 1990-08-28 | 1992-04-08 | Nec Corp | 半導体記憶装置 |
US5219765A (en) * | 1990-09-12 | 1993-06-15 | Hitachi, Ltd. | Method for manufacturing a semiconductor device including wafer aging, probe inspection, and feeding back the results of the inspection to the device fabrication process |
US5097206A (en) * | 1990-10-05 | 1992-03-17 | Hewlett-Packard Company | Built-in test circuit for static CMOS circuits |
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KR960007478B1 (ko) * | 1990-12-27 | 1996-06-03 | 가부시키가이샤 도시바 | 반도체장치 및 반도체장치의 제조방법 |
JPH04341997A (ja) * | 1991-05-20 | 1992-11-27 | Mitsubishi Electric Corp | 半導体メモリ装置 |
JP2865456B2 (ja) * | 1991-08-07 | 1999-03-08 | ローム株式会社 | 半導体記憶装置の試験方法 |
US5224070A (en) * | 1991-12-11 | 1993-06-29 | Intel Corporation | Apparatus for determining the conditions of programming circuitry used with flash EEPROM memory |
JPH05165738A (ja) * | 1991-12-16 | 1993-07-02 | Fujitsu Ltd | 半導体メモリ装置 |
US5337279A (en) * | 1992-03-31 | 1994-08-09 | National Semiconductor Corporation | Screening processes for ferroelectric memory devices |
JP3236105B2 (ja) * | 1993-03-17 | 2001-12-10 | 富士通株式会社 | 不揮発性半導体記憶装置及びその動作試験方法 |
US5357458A (en) * | 1993-06-25 | 1994-10-18 | Advanced Micro Devices, Inc. | System for allowing a content addressable memory to operate with multiple power voltage levels |
US5430402A (en) * | 1993-09-10 | 1995-07-04 | Intel Corporation | Method and apparatus for providing selectable sources of voltage |
US5363335A (en) * | 1993-09-28 | 1994-11-08 | Intel Corporation | Nonvolatile memory with automatic power supply configuration |
-
1993
- 1993-03-17 JP JP05713593A patent/JP3236105B2/ja not_active Expired - Lifetime
-
1994
- 1994-02-07 US US08/192,821 patent/US5402380A/en not_active Expired - Lifetime
- 1994-02-08 EP EP99105425A patent/EP0923082A3/de not_active Ceased
- 1994-02-08 EP EP99105456A patent/EP0933785B1/de not_active Expired - Lifetime
- 1994-02-08 DE DE69423668T patent/DE69423668T2/de not_active Expired - Lifetime
- 1994-02-08 DE DE69429462T patent/DE69429462T2/de not_active Expired - Lifetime
- 1994-02-08 KR KR94002384A patent/KR970003811B1/ko not_active IP Right Cessation
- 1994-02-08 DE DE69430598T patent/DE69430598T2/de not_active Expired - Lifetime
- 1994-02-08 EP EP99105448A patent/EP0935256B1/de not_active Expired - Lifetime
- 1994-02-08 EP EP94101897A patent/EP0616335B1/de not_active Expired - Lifetime
- 1994-12-29 US US08/365,847 patent/US5469394A/en not_active Expired - Lifetime
-
1995
- 1995-06-06 US US08/471,526 patent/US5566386A/en not_active Expired - Lifetime
- 1995-06-06 US US08/463,636 patent/US5592427A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0935256B1 (de) | 2002-05-08 |
KR970003811B1 (en) | 1997-03-22 |
EP0935256A1 (de) | 1999-08-11 |
EP0923082A2 (de) | 1999-06-16 |
US5592427A (en) | 1997-01-07 |
KR940022574A (ko) | 1994-10-21 |
EP0933785A1 (de) | 1999-08-04 |
DE69430598D1 (de) | 2002-06-13 |
US5402380A (en) | 1995-03-28 |
DE69429462T2 (de) | 2002-05-23 |
US5566386A (en) | 1996-10-15 |
DE69423668T2 (de) | 2000-12-28 |
US5469394A (en) | 1995-11-21 |
EP0616335A3 (de) | 1998-04-15 |
JP3236105B2 (ja) | 2001-12-10 |
EP0616335A2 (de) | 1994-09-21 |
EP0616335B1 (de) | 2000-03-29 |
EP0933785B1 (de) | 2001-12-12 |
EP0923082A3 (de) | 1999-10-06 |
DE69430598T2 (de) | 2002-08-29 |
DE69423668D1 (de) | 2000-05-04 |
JPH06267300A (ja) | 1994-09-22 |
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