DE69427107D1 - Halbleiterspeicheranordnung - Google Patents
HalbleiterspeicheranordnungInfo
- Publication number
- DE69427107D1 DE69427107D1 DE69427107T DE69427107T DE69427107D1 DE 69427107 D1 DE69427107 D1 DE 69427107D1 DE 69427107 T DE69427107 T DE 69427107T DE 69427107 T DE69427107 T DE 69427107T DE 69427107 D1 DE69427107 D1 DE 69427107D1
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5268199A JP3068389B2 (ja) | 1993-09-29 | 1993-09-29 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69427107D1 true DE69427107D1 (de) | 2001-05-23 |
DE69427107T2 DE69427107T2 (de) | 2001-11-15 |
Family
ID=17455304
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69427107T Expired - Fee Related DE69427107T2 (de) | 1993-09-29 | 1994-09-29 | Halbleiterspeicheranordnung |
Country Status (5)
Country | Link |
---|---|
US (1) | US5452254A (de) |
EP (1) | EP0645772B1 (de) |
JP (1) | JP3068389B2 (de) |
KR (1) | KR0167590B1 (de) |
DE (1) | DE69427107T2 (de) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5467300A (en) * | 1990-06-14 | 1995-11-14 | Creative Integrated Systems, Inc. | Grounded memory core for Roms, Eproms, and EEpproms having an address decoder, and sense amplifier |
JPH0798985A (ja) * | 1993-09-29 | 1995-04-11 | Nec Corp | 半導体記憶回路 |
KR100494097B1 (ko) * | 1997-12-31 | 2005-08-24 | 주식회사 하이닉스반도체 | 글리취(Glitch)방지용데이터감지회로 |
KR100430825B1 (ko) * | 1999-06-29 | 2004-05-10 | 주식회사 엘지 | 종이 코팅용 라텍스 |
KR100405308B1 (ko) * | 2000-12-18 | 2003-11-12 | 주식회사 엘지화학 | 인조안료 및 그의 제조방법 |
US7415291B1 (en) | 2001-09-28 | 2008-08-19 | At&T Delaware Intellectual Property, Inc. | Device and method for augmenting cellular telephone audio signals |
JPWO2004042821A1 (ja) | 2002-11-08 | 2006-03-09 | 株式会社日立製作所 | 半導体記憶装置 |
GB2428149B (en) * | 2005-07-07 | 2009-10-28 | Agilent Technologies Inc | Multimode optical fibre communication system |
US20110286271A1 (en) * | 2010-05-21 | 2011-11-24 | Mediatek Inc. | Memory systems and methods for reading data stored in a memory cell of a memory device |
JP6001777B2 (ja) | 2013-06-19 | 2016-10-05 | エルジー・ケム・リミテッド | 多層コア−シェル構造のゴム重合体ラテックス、その製造方法及びこれを含むアクリロニトリル−ブタジエン−スチレングラフト共重合体 |
KR20220010256A (ko) | 2020-07-17 | 2022-01-25 | 주식회사 엘지화학 | 그라프트 공중합체의 제조방법 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4272834A (en) * | 1978-10-06 | 1981-06-09 | Hitachi, Ltd. | Data line potential setting circuit and MIS memory circuit using the same |
JPS58169958A (ja) * | 1982-03-31 | 1983-10-06 | Fujitsu Ltd | Misスタテイツク・ランダムアクセスメモリ |
JPS59120597U (ja) * | 1983-01-31 | 1984-08-14 | カ−ル事務器株式会社 | パンチ |
JPS639095A (ja) * | 1986-06-30 | 1988-01-14 | Toshiba Corp | スタテイツク型半導体メモリ |
JPS63311690A (ja) * | 1987-06-15 | 1988-12-20 | Toshiba Corp | 半導体記憶装置 |
US4939693A (en) * | 1989-02-14 | 1990-07-03 | Texas Instruments Incorporated | BiCMOS static memory with improved performance stability |
JPH03142781A (ja) * | 1989-10-27 | 1991-06-18 | Nec Corp | 読み出し回路 |
JP2550743B2 (ja) * | 1990-03-27 | 1996-11-06 | 日本電気株式会社 | 半導体メモリ回路 |
-
1993
- 1993-09-29 JP JP5268199A patent/JP3068389B2/ja not_active Expired - Fee Related
-
1994
- 1994-09-29 EP EP94115384A patent/EP0645772B1/de not_active Expired - Lifetime
- 1994-09-29 KR KR1019940024675A patent/KR0167590B1/ko not_active IP Right Cessation
- 1994-09-29 DE DE69427107T patent/DE69427107T2/de not_active Expired - Fee Related
- 1994-09-29 US US08/317,600 patent/US5452254A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0645772A3 (de) | 1995-07-19 |
JP3068389B2 (ja) | 2000-07-24 |
JPH0798986A (ja) | 1995-04-11 |
EP0645772B1 (de) | 2001-04-18 |
EP0645772A2 (de) | 1995-03-29 |
US5452254A (en) | 1995-09-19 |
KR0167590B1 (ko) | 1999-02-01 |
DE69427107T2 (de) | 2001-11-15 |
KR950009727A (ko) | 1995-04-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
8339 | Ceased/non-payment of the annual fee |