DE69325132D1 - Halbleiterspeicherbauelement - Google Patents
HalbleiterspeicherbauelementInfo
- Publication number
- DE69325132D1 DE69325132D1 DE69325132T DE69325132T DE69325132D1 DE 69325132 D1 DE69325132 D1 DE 69325132D1 DE 69325132 T DE69325132 T DE 69325132T DE 69325132 T DE69325132 T DE 69325132T DE 69325132 D1 DE69325132 D1 DE 69325132D1
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/18—Bit line organisation; Bit line lay-out
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920014243A KR960003771B1 (ko) | 1992-08-08 | 1992-08-08 | 반도체 메모리장치 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69325132D1 true DE69325132D1 (de) | 1999-07-08 |
DE69325132T2 DE69325132T2 (de) | 1999-12-09 |
Family
ID=19337673
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69325132T Expired - Lifetime DE69325132T2 (de) | 1992-08-08 | 1993-08-09 | Halbleiterspeicherbauelement |
Country Status (5)
Country | Link |
---|---|
US (2) | US5392232A (de) |
EP (1) | EP0583163B1 (de) |
JP (1) | JP3505205B2 (de) |
KR (1) | KR960003771B1 (de) |
DE (1) | DE69325132T2 (de) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3616179B2 (ja) * | 1995-11-09 | 2005-02-02 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
US5671175A (en) * | 1996-06-26 | 1997-09-23 | Texas Instruments Incorporated | Capacitor over bitline DRAM cell |
KR100213249B1 (ko) * | 1996-10-10 | 1999-08-02 | 윤종용 | 반도체 메모리셀의 레이아웃 |
KR100301038B1 (ko) * | 1998-03-02 | 2001-09-06 | 윤종용 | 씨오비(cob)를구비한반도체메모리장치및그제조방법 |
JP2000311992A (ja) * | 1999-04-26 | 2000-11-07 | Toshiba Corp | 不揮発性半導体記憶装置およびその製造方法 |
JP2003110033A (ja) * | 2001-07-24 | 2003-04-11 | Mitsubishi Electric Corp | 半導体記憶装置 |
KR100475075B1 (ko) * | 2002-05-17 | 2005-03-10 | 삼성전자주식회사 | 반도체 메모리 소자 및 그 제조방법 |
JP2004311706A (ja) * | 2003-04-07 | 2004-11-04 | Toshiba Corp | 半導体装置及びその製造方法 |
KR100673018B1 (ko) * | 2005-12-09 | 2007-01-24 | 삼성전자주식회사 | 이이피롬 및 그 제조 방법 |
CN108389860B (zh) * | 2017-02-03 | 2021-06-22 | 联华电子股份有限公司 | 半导体装置 |
US10163494B1 (en) * | 2017-05-31 | 2018-12-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Memory device and fabrication method thereof |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5136533A (en) * | 1988-07-08 | 1992-08-04 | Eliyahou Harari | Sidewall capacitor DRAM cell |
JPH0382077A (ja) * | 1989-08-24 | 1991-04-08 | Nec Corp | 半導体メモリ装置 |
JPH0834304B2 (ja) * | 1990-09-20 | 1996-03-29 | 富士通株式会社 | 半導体装置およびその製造方法 |
JP2666549B2 (ja) * | 1990-09-27 | 1997-10-22 | 日本電気株式会社 | 半導体記憶装置及びその製造方法 |
KR960016837B1 (en) * | 1990-10-29 | 1996-12-21 | Nec Kk | Semiconductor memory device and manufacturing method thereof |
JP3257801B2 (ja) * | 1990-12-07 | 2002-02-18 | ソニー株式会社 | 半導体装置の製造方法 |
-
1992
- 1992-08-08 KR KR1019920014243A patent/KR960003771B1/ko not_active IP Right Cessation
-
1993
- 1993-08-09 JP JP19739293A patent/JP3505205B2/ja not_active Expired - Fee Related
- 1993-08-09 EP EP93306348A patent/EP0583163B1/de not_active Expired - Lifetime
- 1993-08-09 DE DE69325132T patent/DE69325132T2/de not_active Expired - Lifetime
- 1993-08-09 US US08/103,267 patent/US5392232A/en not_active Expired - Lifetime
-
1994
- 1994-10-04 US US08/317,905 patent/US5574680A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5574680A (en) | 1996-11-12 |
JPH06196652A (ja) | 1994-07-15 |
KR960003771B1 (ko) | 1996-03-22 |
KR940004822A (ko) | 1994-03-16 |
DE69325132T2 (de) | 1999-12-09 |
EP0583163B1 (de) | 1999-06-02 |
US5392232A (en) | 1995-02-21 |
JP3505205B2 (ja) | 2004-03-08 |
EP0583163A2 (de) | 1994-02-16 |
EP0583163A3 (en) | 1994-07-27 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |