DE69407434T2 - Datenspeicher/prozessorbus - Google Patents

Datenspeicher/prozessorbus

Info

Publication number
DE69407434T2
DE69407434T2 DE69407434T DE69407434T DE69407434T2 DE 69407434 T2 DE69407434 T2 DE 69407434T2 DE 69407434 T DE69407434 T DE 69407434T DE 69407434 T DE69407434 T DE 69407434T DE 69407434 T2 DE69407434 T2 DE 69407434T2
Authority
DE
Germany
Prior art keywords
data storage
processor bus
bus
processor
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69407434T
Other languages
English (en)
Other versions
DE69407434D1 (de
Inventor
Stephen B Furber
William H Oldfield
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARM Ltd
Original Assignee
Advanced Risc Machines Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Risc Machines Ltd filed Critical Advanced Risc Machines Ltd
Application granted granted Critical
Publication of DE69407434D1 publication Critical patent/DE69407434D1/de
Publication of DE69407434T2 publication Critical patent/DE69407434T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4239—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with asynchronous protocol
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE69407434T 1994-01-11 1994-10-14 Datenspeicher/prozessorbus Expired - Lifetime DE69407434T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9400381A GB2285524B (en) 1994-01-11 1994-01-11 Data memory and processor bus
PCT/GB1994/002254 WO1995019004A1 (en) 1994-01-11 1994-10-14 Data memory and processor bus

Publications (2)

Publication Number Publication Date
DE69407434D1 DE69407434D1 (de) 1998-01-29
DE69407434T2 true DE69407434T2 (de) 1998-04-09

Family

ID=10748605

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69407434T Expired - Lifetime DE69407434T2 (de) 1994-01-11 1994-10-14 Datenspeicher/prozessorbus

Country Status (12)

Country Link
US (1) US5732278A (de)
EP (1) EP0739515B1 (de)
JP (1) JP3623232B2 (de)
KR (1) KR100342597B1 (de)
CN (1) CN1105975C (de)
DE (1) DE69407434T2 (de)
GB (1) GB2285524B (de)
IL (1) IL111952A (de)
MY (1) MY115432A (de)
RU (1) RU2137186C1 (de)
TW (1) TW242185B (de)
WO (1) WO1995019004A1 (de)

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US6150724A (en) * 1998-03-02 2000-11-21 Motorola, Inc. Multi-chip semiconductor device and method for making the device by using multiple flip chip interfaces
GB2341767B (en) * 1998-09-18 2003-10-22 Pixelfusion Ltd Bus arbitration
GB2341766A (en) * 1998-09-18 2000-03-22 Pixelfusion Ltd Bus architecture
JP2000223657A (ja) 1999-02-03 2000-08-11 Rohm Co Ltd 半導体装置およびそれに用いる半導体チップ
KR100438736B1 (ko) * 2002-10-04 2004-07-05 삼성전자주식회사 어드레스 라인을 이용해 데이터 쓰기를 수행하는 메모리제어 장치
JP4233373B2 (ja) * 2003-04-14 2009-03-04 株式会社ルネサステクノロジ データ転送制御装置
US20040221021A1 (en) * 2003-04-30 2004-11-04 Domer Jason A. High performance managed runtime environment application manager equipped to manage natively targeted applications
US20050182884A1 (en) * 2004-01-22 2005-08-18 Hofmann Richard G. Multiple address two channel bus structure
KR100546403B1 (ko) * 2004-02-19 2006-01-26 삼성전자주식회사 감소된 메모리 버스 점유 시간을 가지는 시리얼 플레쉬메모리 컨트롤러
CN1329031C (zh) * 2005-01-24 2007-08-01 杭州鑫富药业有限公司 一种调血脂药物组合物及其用途
US7328313B2 (en) * 2005-03-30 2008-02-05 Intel Corporation Methods to perform cache coherency in multiprocessor system using reserve signals and control bits
FR2884629B1 (fr) * 2005-04-15 2007-06-22 Atmel Corp Dispositif d'amelioration de la bande passante pour des circuits munis de controleurs memoires multiples
CN1855783B (zh) * 2005-04-21 2011-05-04 华为技术有限公司 大容量时分多路复用交换芯片的数据处理方法
US20070005868A1 (en) * 2005-06-30 2007-01-04 Osborne Randy B Method, apparatus and system for posted write buffer for memory with unidirectional full duplex interface
US8108563B2 (en) 2006-02-24 2012-01-31 Qualcomm Incorporated Auxiliary writes over address channel
US8107492B2 (en) 2006-02-24 2012-01-31 Qualcomm Incorporated Cooperative writes over the address channel of a bus
EP2003567B1 (de) * 2006-03-31 2012-02-15 Fujitsu Ltd. Speichervorrichtung, steuerverfahren dafür, steuerprogramm dafür, speicherkarte, leiterplatte und elektronische einrichtung
JPWO2007116487A1 (ja) * 2006-03-31 2009-08-20 富士通株式会社 メモリ装置、そのエラー訂正の支援方法、その支援プログラム、メモリ・カード、回路基板及び電子機器
WO2007116486A1 (ja) 2006-03-31 2007-10-18 Fujitsu Limited メモリ装置、その制御方法、その制御プログラム、メモリ・カード、回路基板及び電子機器
US8766995B2 (en) 2006-04-26 2014-07-01 Qualcomm Incorporated Graphics system with configurable caches
US8884972B2 (en) 2006-05-25 2014-11-11 Qualcomm Incorporated Graphics processor with arithmetic and elementary function units
US8869147B2 (en) 2006-05-31 2014-10-21 Qualcomm Incorporated Multi-threaded processor with deferred thread output control
US8644643B2 (en) 2006-06-14 2014-02-04 Qualcomm Incorporated Convolution filtering in a graphics processor
US8766996B2 (en) 2006-06-21 2014-07-01 Qualcomm Incorporated Unified virtual addressed register file
ES2577291T3 (es) * 2006-06-27 2016-07-14 Waterfall Security Solutions Ltd. Enlaces unidireccionales seguros desde y hacia un motor de seguridad
JP5002201B2 (ja) 2006-06-30 2012-08-15 株式会社東芝 メモリシステム
IL177756A (en) * 2006-08-29 2014-11-30 Lior Frenkel Encryption-based protection against attacks
IL180020A (en) * 2006-12-12 2013-03-24 Waterfall Security Solutions Ltd Encryption -and decryption-enabled interfaces
IL180748A (en) * 2007-01-16 2013-03-24 Waterfall Security Solutions Ltd Secure archive
CN100524267C (zh) * 2007-02-15 2009-08-05 威盛电子股份有限公司 数据处理***及数据处理方法
US8223205B2 (en) * 2007-10-24 2012-07-17 Waterfall Solutions Ltd. Secure implementation of network-based sensors
US9635037B2 (en) 2012-09-06 2017-04-25 Waterfall Security Solutions Ltd. Remote control of secure installations
US9419975B2 (en) 2013-04-22 2016-08-16 Waterfall Security Solutions Ltd. Bi-directional communication over a one-way link
IL235175A (en) 2014-10-19 2017-08-31 Frenkel Lior Secure desktop remote control
US9772899B2 (en) * 2015-05-04 2017-09-26 Texas Instruments Incorporated Error correction code management of write-once memory codes
IL250010B (en) 2016-02-14 2020-04-30 Waterfall Security Solutions Ltd Secure connection with protected facilities
CN112559397A (zh) * 2019-09-26 2021-03-26 阿里巴巴集团控股有限公司 一种装置和方法
CN112269747B (zh) * 2020-10-19 2022-04-15 天津光电通信技术有限公司 一种时分复用缓存实现时隙数据包重组的方法
CN114840886B (zh) * 2022-04-21 2024-03-19 深圳鲲云信息科技有限公司 一种基于数据流架构的可安全读写存储装置、方法及设备

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US4623990A (en) * 1984-10-31 1986-11-18 Advanced Micro Devices, Inc. Dual-port read/write RAM with single array
JPS63502535A (ja) * 1986-02-10 1988-09-22 イーストマン・コダック・カンパニー マルチプロセッサ装置
US5086407A (en) * 1989-06-05 1992-02-04 Mcgarity Ralph C Data processor integrated circuit with selectable multiplexed/non-multiplexed address and data modes of operation
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US5325499A (en) * 1990-09-28 1994-06-28 Tandon Corporation Computer system including a write protection circuit for preventing illegal write operations and a write poster with improved memory

Also Published As

Publication number Publication date
CN1105975C (zh) 2003-04-16
EP0739515A1 (de) 1996-10-30
GB2285524A (en) 1995-07-12
JP3623232B2 (ja) 2005-02-23
CN1141092A (zh) 1997-01-22
KR970700337A (ko) 1997-01-08
GB2285524B (en) 1998-02-04
IL111952A (en) 1998-08-16
KR100342597B1 (ko) 2002-11-23
IL111952A0 (en) 1995-03-15
EP0739515B1 (de) 1997-12-17
US5732278A (en) 1998-03-24
GB9400381D0 (en) 1994-03-09
RU2137186C1 (ru) 1999-09-10
MY115432A (en) 2003-06-30
WO1995019004A1 (en) 1995-07-13
DE69407434D1 (de) 1998-01-29
TW242185B (en) 1995-03-01
JPH09507325A (ja) 1997-07-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: ARM LTD., CHERRY HINTON, CAMBRIDGE, GB