DE60130422D1 - Halbleiter mit SOI-Struktur und seine Herstellungsmethode - Google Patents

Halbleiter mit SOI-Struktur und seine Herstellungsmethode

Info

Publication number
DE60130422D1
DE60130422D1 DE60130422T DE60130422T DE60130422D1 DE 60130422 D1 DE60130422 D1 DE 60130422D1 DE 60130422 T DE60130422 T DE 60130422T DE 60130422 T DE60130422 T DE 60130422T DE 60130422 D1 DE60130422 D1 DE 60130422D1
Authority
DE
Germany
Prior art keywords
semiconductor
manufacturing
soi structure
soi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60130422T
Other languages
English (en)
Other versions
DE60130422T2 (de
Inventor
Kenya Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
NEC Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Electronics Corp filed Critical NEC Electronics Corp
Publication of DE60130422D1 publication Critical patent/DE60130422D1/de
Application granted granted Critical
Publication of DE60130422T2 publication Critical patent/DE60130422T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Element Separation (AREA)
  • Thin Film Transistor (AREA)
DE60130422T 2000-09-28 2001-09-28 Halbleiter mit SOI-Struktur und seine Herstellungsmethode Expired - Lifetime DE60130422T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000297308A JP3510576B2 (ja) 2000-09-28 2000-09-28 半導体装置及びその製造方法
JP2000297308 2000-09-28

Publications (2)

Publication Number Publication Date
DE60130422D1 true DE60130422D1 (de) 2007-10-25
DE60130422T2 DE60130422T2 (de) 2008-06-05

Family

ID=18779443

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60130422T Expired - Lifetime DE60130422T2 (de) 2000-09-28 2001-09-28 Halbleiter mit SOI-Struktur und seine Herstellungsmethode

Country Status (7)

Country Link
US (2) US6492683B2 (de)
EP (1) EP1193760B1 (de)
JP (1) JP3510576B2 (de)
KR (1) KR100438206B1 (de)
CN (1) CN1207768C (de)
DE (1) DE60130422T2 (de)
TW (1) TW530369B (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100448344B1 (ko) * 2002-10-22 2004-09-13 삼성전자주식회사 웨이퍼 레벨 칩 스케일 패키지 제조 방법
US7190051B2 (en) * 2003-01-17 2007-03-13 Second Sight Medical Products, Inc. Chip level hermetic and biocompatible electronics package using SOI wafers
DE10319497B4 (de) * 2003-04-30 2010-06-02 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung eines SOI-Feldeffekttransistorelements mit einem ohmschen Substratkontakt
JP4746262B2 (ja) * 2003-09-17 2011-08-10 Ｏｋｉセミコンダクタ株式会社 半導体装置の製造方法
JP2005116623A (ja) 2003-10-03 2005-04-28 Nec Electronics Corp 半導体装置およびその製造方法
US7276398B2 (en) * 2003-10-23 2007-10-02 Hewlett-Packard Development Company, L.P. System and method for hermetically sealing a package
TW200629466A (en) * 2004-10-14 2006-08-16 Koninkl Philips Electronics Nv Semiconductor device having a frontside contact and vertical trench isolation and method of fabricating same
US7592645B2 (en) 2004-12-08 2009-09-22 Canon Kabushiki Kaisha Photoelectric conversion device and method for producing photoelectric conversion device
JP5220988B2 (ja) * 2005-05-23 2013-06-26 ルネサスエレクトロニクス株式会社 半導体装置
CN1992173B (zh) * 2005-11-30 2010-04-21 硅起源股份有限公司 用于注入键合衬底以便导电的方法和结构
EP1977445A1 (de) * 2006-01-12 2008-10-08 Nxp B.V. Verfahren zur herstellung eines halbleiters auf einer isolationsvorrichtung mit vorderseitigem substrat-kontakt
DE102006013203B3 (de) 2006-03-22 2008-01-10 Infineon Technologies Ag Integrierte Halbleiteranordnung mit Rückstromkomplex zur Verringerung eines Substratstroms und Verfahren zu deren Herstellung
JP2007317954A (ja) * 2006-05-26 2007-12-06 Nec Electronics Corp 半導体装置及びその製造方法
JP2008227120A (ja) * 2007-03-13 2008-09-25 Oki Electric Ind Co Ltd 半導体装置の製造方法
KR20100018156A (ko) * 2008-08-06 2010-02-17 삼성전자주식회사 적층형 반도체 소자 및 그 제조 방법
JP2010287866A (ja) 2009-06-15 2010-12-24 Renesas Electronics Corp 半導体装置
CN102456689A (zh) * 2010-10-21 2012-05-16 中国科学院微电子研究所 一种衬底结构、半导体器件及其制造方法
KR101721117B1 (ko) 2011-03-15 2017-03-29 삼성전자 주식회사 반도체 소자의 제조 방법
CN102956630B (zh) * 2011-08-09 2016-06-29 索泰克公司 三维集成半导体***和形成该三维集成半导体***的方法
JP2016115698A (ja) * 2014-12-11 2016-06-23 トヨタ自動車株式会社 半導体装置とその製造方法
CN106714651B (zh) 2015-08-13 2019-06-28 Hoya株式会社 评价值计算装置以及电子内窥镜***
US20170273543A1 (en) 2015-08-13 2017-09-28 Hoya Corporation Evaluation value calculation device and electronic endoscope system
CN110476200B (zh) * 2017-03-29 2021-11-16 夏普株式会社 Tft基板、tft基板的制造方法、显示装置
US20210408250A1 (en) * 2020-06-24 2021-12-30 Monolithic Power Systems, Inc. Method of distributing metal layers in a power device

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0254554A (ja) 1988-08-19 1990-02-23 Fujitsu Ltd 半導体装置およびその製造方法
JP2654268B2 (ja) 1991-05-13 1997-09-17 株式会社東芝 半導体装置の使用方法
JP3269536B2 (ja) 1993-02-19 2002-03-25 株式会社デンソー 半導体装置
US5479048A (en) * 1994-02-04 1995-12-26 Analog Devices, Inc. Integrated circuit chip supported by a handle wafer and provided with means to maintain the handle wafer potential at a desired level
JPH08153781A (ja) 1994-09-27 1996-06-11 Fuji Electric Co Ltd 高耐圧横型半導体装置およびその使用方法
JPH08236754A (ja) 1995-02-22 1996-09-13 Fuji Electric Co Ltd ｐチャネル型高耐圧ＭＯＳＦＥＴ
JPH0982814A (ja) * 1995-07-10 1997-03-28 Denso Corp 半導体集積回路装置及びその製造方法
JP3111947B2 (ja) 1997-10-28 2000-11-27 日本電気株式会社 半導体装置、その製造方法
JP2000031266A (ja) 1998-05-01 2000-01-28 Nec Corp 半導体装置及びその製造方法
JP3699823B2 (ja) * 1998-05-19 2005-09-28 株式会社東芝 半導体装置
US6358782B1 (en) * 1998-10-20 2002-03-19 Citizen Watch Co., Ltd. Method of fabricating a semiconductor device having a silicon-on-insulator substrate and an independent metal electrode connected to the support substrate
JP2000196102A (ja) * 1998-10-20 2000-07-14 Citizen Watch Co Ltd 半導体装置およびその製造方法
KR20000045305A (ko) * 1998-12-30 2000-07-15 김영환 완전 공핍형 에스·오·아이 소자 및 그 제조방법
JP2000243967A (ja) * 1999-02-22 2000-09-08 Sony Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
TW530369B (en) 2003-05-01
EP1193760B1 (de) 2007-09-12
KR20020025778A (ko) 2002-04-04
US6541314B2 (en) 2003-04-01
US6492683B2 (en) 2002-12-10
KR100438206B1 (ko) 2004-07-01
CN1347146A (zh) 2002-05-01
US20020036330A1 (en) 2002-03-28
US20020171109A1 (en) 2002-11-21
DE60130422T2 (de) 2008-06-05
JP2002110950A (ja) 2002-04-12
EP1193760A2 (de) 2002-04-03
EP1193760A3 (de) 2005-03-16
CN1207768C (zh) 2005-06-22
JP3510576B2 (ja) 2004-03-29

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