DE60019913D1 - Halbleiterbauelement und Herstellungsverfahren - Google Patents
Halbleiterbauelement und HerstellungsverfahrenInfo
- Publication number
- DE60019913D1 DE60019913D1 DE60019913T DE60019913T DE60019913D1 DE 60019913 D1 DE60019913 D1 DE 60019913D1 DE 60019913 T DE60019913 T DE 60019913T DE 60019913 T DE60019913 T DE 60019913T DE 60019913 D1 DE60019913 D1 DE 60019913D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/318—Inorganic layers composed of nitrides
- H01L21/3185—Inorganic layers composed of nitrides of siliconnitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76283—Lateral isolation by refilling of trenches with dielectric material
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Thin Film Transistor (AREA)
- Element Separation (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000171818 | 2000-06-08 | ||
JP2000171818A JP4776755B2 (ja) | 2000-06-08 | 2000-06-08 | 半導体装置およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60019913D1 true DE60019913D1 (de) | 2005-06-09 |
DE60019913T2 DE60019913T2 (de) | 2005-09-29 |
Family
ID=18674322
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60019913T Expired - Lifetime DE60019913T2 (de) | 2000-06-08 | 2000-12-22 | Halbleiterbauelement und Herstellungsverfahren |
Country Status (7)
Country | Link |
---|---|
US (3) | US6933565B2 (de) |
EP (1) | EP1168430B1 (de) |
JP (1) | JP4776755B2 (de) |
KR (1) | KR100385666B1 (de) |
CN (2) | CN1832178A (de) |
DE (1) | DE60019913T2 (de) |
TW (1) | TW510055B (de) |
Families Citing this family (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3575408B2 (ja) | 2000-08-15 | 2004-10-13 | セイコーエプソン株式会社 | トレンチ素子分離領域を有する半導体装置の製造方法 |
US6787422B2 (en) * | 2001-01-08 | 2004-09-07 | Chartered Semiconductor Manufacturing Ltd. | Method of body contact for SOI mosfet |
JP2003045874A (ja) * | 2001-07-27 | 2003-02-14 | Semiconductor Energy Lab Co Ltd | 金属配線およびその作製方法、並びに金属配線基板およびその作製方法 |
US7022561B2 (en) * | 2002-12-02 | 2006-04-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | CMOS device |
JP2004260073A (ja) * | 2003-02-27 | 2004-09-16 | Seiko Epson Corp | 半導体装置およびその製造方法 |
JP2004281631A (ja) * | 2003-03-14 | 2004-10-07 | Renesas Technology Corp | 半導体装置の設計方法 |
JP2004348044A (ja) * | 2003-05-26 | 2004-12-09 | Seiko Epson Corp | 表示装置、表示方法及び表示装置の製造方法 |
US6905941B2 (en) * | 2003-06-02 | 2005-06-14 | International Business Machines Corporation | Structure and method to fabricate ultra-thin Si channel devices |
KR100706737B1 (ko) * | 2003-08-28 | 2007-04-12 | 가부시끼가이샤 르네사스 테크놀로지 | 반도체 기억 장치 및 그 제조 방법 |
US7135373B2 (en) * | 2003-09-23 | 2006-11-14 | Texas Instruments Incorporated | Reduction of channel hot carrier effects in transistor devices |
JP4610982B2 (ja) * | 2003-11-11 | 2011-01-12 | シャープ株式会社 | 半導体装置の製造方法 |
JP2005183686A (ja) | 2003-12-19 | 2005-07-07 | Renesas Technology Corp | 半導体装置およびその製造方法 |
JP4065855B2 (ja) | 2004-01-21 | 2008-03-26 | 株式会社日立製作所 | 生体および化学試料検査装置 |
US7442598B2 (en) * | 2005-06-09 | 2008-10-28 | Freescale Semiconductor, Inc. | Method of forming an interlayer dielectric |
US7651935B2 (en) * | 2005-09-27 | 2010-01-26 | Freescale Semiconductor, Inc. | Process of forming an electronic device including active regions and gate electrodes of different compositions overlying the active regions |
US7504289B2 (en) * | 2005-10-26 | 2009-03-17 | Freescale Semiconductor, Inc. | Process for forming an electronic device including transistor structures with sidewall spacers |
US7420202B2 (en) * | 2005-11-08 | 2008-09-02 | Freescale Semiconductor, Inc. | Electronic device including a transistor structure having an active region adjacent to a stressor layer and a process for forming the electronic device |
US7884030B1 (en) * | 2006-04-21 | 2011-02-08 | Advanced Micro Devices, Inc. and Spansion LLC | Gap-filling with uniform properties |
US20080054361A1 (en) * | 2006-08-30 | 2008-03-06 | Infineon Technologies Ag | Method and apparatus for reducing flicker noise in a semiconductor device |
DE102006040762B4 (de) * | 2006-08-31 | 2009-05-07 | Advanced Micro Devices, Inc., Sunnyvale | N-Kanalfeldeffekttransistor mit einer Kontaktätzstoppschicht in Verbindung mit einer Zwischenschichtdielektrikumsteilschicht mit der gleichen Art an innerer Verspannung |
US8569858B2 (en) | 2006-12-20 | 2013-10-29 | Freescale Semiconductor, Inc. | Semiconductor device including an active region and two layers having different stress characteristics |
US7843011B2 (en) * | 2007-01-31 | 2010-11-30 | Freescale Semiconductor, Inc. | Electronic device including insulating layers having different strains |
JP5117740B2 (ja) * | 2007-03-01 | 2013-01-16 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
DE102007057682A1 (de) * | 2007-11-30 | 2009-06-04 | Advanced Micro Devices, Inc., Sunnyvale | Hybridkontaktstruktur mit Kontakt mit kleinem Aspektverhältnis in einem Halbleiterbauelement |
US7932152B2 (en) * | 2008-02-05 | 2011-04-26 | Chartered Semiconductor Manufacturing, Ltd. | Method of forming a gate stack structure |
US7668010B2 (en) * | 2008-02-27 | 2010-02-23 | Macronix International Co., Ltd. | Flash memory having insulating liners between source/drain lines and channels |
JP5465907B2 (ja) * | 2009-03-27 | 2014-04-09 | ラピスセミコンダクタ株式会社 | 半導体装置 |
US8680617B2 (en) * | 2009-10-06 | 2014-03-25 | International Business Machines Corporation | Split level shallow trench isolation for area efficient body contacts in SOI MOSFETS |
CN102110644A (zh) * | 2009-12-23 | 2011-06-29 | 中芯国际集成电路制造(上海)有限公司 | Pmos器件自对准硅化物阻挡膜制程方法 |
KR101734936B1 (ko) * | 2010-08-27 | 2017-05-15 | 삼성전자주식회사 | 소자분리 막 아래에 저 저항 영역을 갖는 반도체 소자 |
US8652929B2 (en) * | 2011-12-23 | 2014-02-18 | Peking University | CMOS device for reducing charge sharing effect and fabrication method thereof |
CN104285301B (zh) * | 2012-05-15 | 2017-03-08 | 三菱电机株式会社 | 半导体装置及其制造方法 |
EP2743965B1 (de) * | 2012-12-13 | 2015-07-08 | Imec | Herstellungsverfahren für Halbleitervorrichtungen |
US9472507B2 (en) | 2013-06-17 | 2016-10-18 | Samsung Display Co., Ltd. | Array substrate and organic light-emitting display including the same |
KR20160034492A (ko) * | 2014-09-19 | 2016-03-30 | 삼성전자주식회사 | 반도체 소자의 패턴 형성 방법 및 이를 이용하여 형성된 반도체 소자 |
FR3048126B1 (fr) * | 2016-02-18 | 2018-03-09 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Structure du type photodiode, composant et procede de fabrication d'une structure |
US10707330B2 (en) * | 2018-02-15 | 2020-07-07 | Globalfoundries Inc. | Semiconductor device with interconnect to source/drain |
CN109545802B (zh) * | 2018-12-14 | 2021-01-12 | 上海微阱电子科技有限公司 | 一种绝缘体上半导体器件结构和形成方法 |
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JPS58124243A (ja) | 1982-01-21 | 1983-07-23 | Toshiba Corp | 半導体装置の製造方法 |
JP3061907B2 (ja) | 1991-10-01 | 2000-07-10 | 日本電気株式会社 | 半導体装置及びその製造方法 |
JPH0621373A (ja) | 1992-07-03 | 1994-01-28 | Nec Corp | 半導体装置の製造方法 |
JPH06347830A (ja) * | 1993-06-07 | 1994-12-22 | Canon Inc | 光透過型半導体装置及びその製造方法 |
JPH06244180A (ja) | 1993-02-19 | 1994-09-02 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
JPH0997833A (ja) * | 1995-07-22 | 1997-04-08 | Ricoh Co Ltd | 半導体装置とその製造方法 |
TW323388B (de) | 1995-08-21 | 1997-12-21 | Hyundai Electronics Ind | |
JPH0969610A (ja) | 1995-08-31 | 1997-03-11 | Hitachi Ltd | 集積半導体装置およびその製造方法 |
US6127261A (en) | 1995-11-16 | 2000-10-03 | Advanced Micro Devices, Inc. | Method of fabricating an integrated circuit including a tri-layer pre-metal interlayer dielectric compatible with advanced CMOS technologies |
JPH09172072A (ja) * | 1995-12-18 | 1997-06-30 | Nec Corp | 半導体装置及びその製造方法 |
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-
2000
- 2000-06-08 JP JP2000171818A patent/JP4776755B2/ja not_active Expired - Fee Related
- 2000-12-06 US US09/729,816 patent/US6933565B2/en not_active Expired - Fee Related
- 2000-12-22 DE DE60019913T patent/DE60019913T2/de not_active Expired - Lifetime
- 2000-12-22 EP EP00128270A patent/EP1168430B1/de not_active Expired - Lifetime
-
2001
- 2001-02-07 TW TW090102669A patent/TW510055B/zh not_active IP Right Cessation
- 2001-02-12 KR KR10-2001-0006688A patent/KR100385666B1/ko not_active IP Right Cessation
- 2001-02-13 CN CNA2006100095736A patent/CN1832178A/zh active Pending
- 2001-02-13 CN CNB011034599A patent/CN1252830C/zh not_active Expired - Fee Related
-
2005
- 2005-06-21 US US11/156,554 patent/US7393731B2/en not_active Expired - Fee Related
-
2008
- 2008-06-02 US US12/131,826 patent/US7838349B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20080274596A1 (en) | 2008-11-06 |
EP1168430A1 (de) | 2002-01-02 |
US7393731B2 (en) | 2008-07-01 |
US7838349B2 (en) | 2010-11-23 |
JP2001352042A (ja) | 2001-12-21 |
KR20010111449A (ko) | 2001-12-19 |
CN1329367A (zh) | 2002-01-02 |
JP4776755B2 (ja) | 2011-09-21 |
US20050253219A1 (en) | 2005-11-17 |
EP1168430B1 (de) | 2005-05-04 |
CN1252830C (zh) | 2006-04-19 |
TW510055B (en) | 2002-11-11 |
DE60019913T2 (de) | 2005-09-29 |
KR100385666B1 (ko) | 2003-05-27 |
US20010050397A1 (en) | 2001-12-13 |
US6933565B2 (en) | 2005-08-23 |
CN1832178A (zh) | 2006-09-13 |
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