DE3576602D1 - Halbleiterspeicheranordnung. - Google Patents
Halbleiterspeicheranordnung.Info
- Publication number
- DE3576602D1 DE3576602D1 DE8585307431T DE3576602T DE3576602D1 DE 3576602 D1 DE3576602 D1 DE 3576602D1 DE 8585307431 T DE8585307431 T DE 8585307431T DE 3576602 T DE3576602 T DE 3576602T DE 3576602 D1 DE3576602 D1 DE 3576602D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor memory
- memory arrangement
- arrangement
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59217836A JPS6196588A (ja) | 1984-10-16 | 1984-10-16 | 半導体記憶装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3576602D1 true DE3576602D1 (de) | 1990-04-19 |
Family
ID=16710510
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8585307431T Expired - Fee Related DE3576602D1 (de) | 1984-10-16 | 1985-10-15 | Halbleiterspeicheranordnung. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4709354A (de) |
EP (1) | EP0178914B1 (de) |
JP (1) | JPS6196588A (de) |
DE (1) | DE3576602D1 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61104394A (ja) * | 1984-10-22 | 1986-05-22 | Mitsubishi Electric Corp | 半導体記憶装置 |
JPS6337269A (ja) * | 1986-08-01 | 1988-02-17 | Fujitsu Ltd | モ−ド選定回路 |
JP2569538B2 (ja) * | 1987-03-17 | 1997-01-08 | ソニー株式会社 | メモリ装置 |
US5046052A (en) * | 1988-06-01 | 1991-09-03 | Sony Corporation | Internal low voltage transformation circuit of static random access memory |
JP3006014B2 (ja) * | 1990-02-13 | 2000-02-07 | 日本電気株式会社 | 半導体メモリ |
US5295100A (en) * | 1992-08-14 | 1994-03-15 | Micron Semiconductor, Inc. | Method for providing a faster ones voltage level restore operation in a DRAM |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55101185A (en) * | 1979-01-29 | 1980-08-01 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Semiconductor memory device |
JPS57120294A (en) * | 1981-01-19 | 1982-07-27 | Nec Corp | Memory control circuit |
US4539661A (en) * | 1982-06-30 | 1985-09-03 | Fujitsu Limited | Static-type semiconductor memory device |
-
1984
- 1984-10-16 JP JP59217836A patent/JPS6196588A/ja active Pending
-
1985
- 1985-10-15 EP EP85307431A patent/EP0178914B1/de not_active Expired - Lifetime
- 1985-10-15 DE DE8585307431T patent/DE3576602D1/de not_active Expired - Fee Related
- 1985-10-16 US US06/788,228 patent/US4709354A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US4709354A (en) | 1987-11-24 |
EP0178914A2 (de) | 1986-04-23 |
JPS6196588A (ja) | 1986-05-15 |
EP0178914B1 (de) | 1990-03-14 |
EP0178914A3 (en) | 1987-09-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) | ||
8339 | Ceased/non-payment of the annual fee |