DE2730202C2 - - Google Patents
Info
- Publication number
- DE2730202C2 DE2730202C2 DE2730202A DE2730202A DE2730202C2 DE 2730202 C2 DE2730202 C2 DE 2730202C2 DE 2730202 A DE2730202 A DE 2730202A DE 2730202 A DE2730202 A DE 2730202A DE 2730202 C2 DE2730202 C2 DE 2730202C2
- Authority
- DE
- Germany
- Prior art keywords
- conductor
- zone
- gate
- insulating film
- field effect
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004020 conductor Substances 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 13
- 239000004065 semiconductor Substances 0.000 claims description 12
- 239000003990 capacitor Substances 0.000 claims description 7
- 239000011159 matrix material Substances 0.000 claims description 7
- 230000005669 field effect Effects 0.000 claims description 6
- 239000012535 impurity Substances 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 241000881711 Acipenser sturio Species 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0688—Integrated circuits having a three-dimensional layout
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
- H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
- H01L27/0727—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors
- H01L27/0733—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors in combination with capacitors only
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Memories (AREA)
Description
Claims (3)
einem Feldeffekttransistor (1), enthaltend an der Oberfläche eines Halbleitersubstrats vorgesehene Source (5)-, Gate (22)- und Drain (10)-Zonen, eine auf der Gate-Zone (22) liegende Gate-Isolierschicht (7), einen auf der Gate- Isolierschicht (7) angeordneten, die Gate-Elektrode bildenden ersten Leiter (12) und einen auf dem ersten Leiter (12) angeordneten ersten Isolierfilm (26) sowie
einem Speicherkondensator (2), enthaltend einen zweiten Leiter (25), der unter Zwischenschaltung des ersten Isolierfilms (26) über dem ersten Leiter (12) angeordnet ist und die Drain-Zone (10) des Feldeffekttran sistors durch eine Öffnung in dem ersten Isolier film (26) kontaktiert, einen auf dem zweiten Leiter (25) angeordneten zweiten Isolierfilm (24) und einen auf dem zweiten Isolierfilm (24) angeordneten dritten Leiter (23),
wobei die ersten Leiter (12) aller Speicherzellen derselben Matrix-Zeile mit einer Wortleitung (31) ver bunden sind, dadurch gekennzeichnet,
daß das Halbleitersubstrat die gemeinsame Source-Zone (5) der Feldeffekttransistoren (1) bildet und der dritte Leiter (23) als Datenleitung dient.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP51078967A JPS5810864B2 (ja) | 1976-07-05 | 1976-07-05 | 半導体記憶装置 |
JP2268577A JPS53108392A (en) | 1977-03-04 | 1977-03-04 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
DE2730202A1 DE2730202A1 (de) | 1978-01-12 |
DE2730202C2 true DE2730202C2 (de) | 1988-11-17 |
Family
ID=26359942
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19772730202 Granted DE2730202A1 (de) | 1976-07-05 | 1977-07-04 | Halbleiterspeicher |
Country Status (4)
Country | Link |
---|---|
US (1) | US4151607A (de) |
DE (1) | DE2730202A1 (de) |
GB (1) | GB1572674A (de) |
NL (1) | NL176415C (de) |
Families Citing this family (43)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4219834A (en) * | 1977-11-11 | 1980-08-26 | International Business Machines Corporation | One-device monolithic random access memory and method of fabricating same |
DE2842588A1 (de) * | 1978-09-29 | 1980-04-17 | Siemens Ag | Hochintegrierbares, dynamisches speicherelement |
US4475118A (en) * | 1978-12-21 | 1984-10-02 | National Semiconductor Corporation | Dynamic MOS RAM with storage cells having a mainly insulated first plate |
JPS55153368A (en) * | 1979-05-18 | 1980-11-29 | Fujitsu Ltd | Semiconductor memory device |
US4261772A (en) * | 1979-07-06 | 1981-04-14 | American Microsystems, Inc. | Method for forming voltage-invariant capacitors for MOS type integrated circuit device utilizing oxidation and reflow techniques |
JPS5623771A (en) * | 1979-08-01 | 1981-03-06 | Hitachi Ltd | Semiconductor memory |
JPS5832789B2 (ja) * | 1980-07-18 | 1983-07-15 | 富士通株式会社 | 半導体メモリ |
JPS57113264A (en) * | 1980-12-29 | 1982-07-14 | Fujitsu Ltd | Manufacture of mis type capacitor |
JPS57120295A (en) * | 1981-01-17 | 1982-07-27 | Mitsubishi Electric Corp | Semiconductor memory device |
JPS57134962A (en) * | 1981-02-13 | 1982-08-20 | Toshiba Corp | Semiconductor memory and manufacture of the same |
FR2519461A1 (fr) * | 1982-01-06 | 1983-07-08 | Hitachi Ltd | Dispositif de memoire a semi-conducteurs et procede de fabrication d'un tel dispositif |
JPS58137245A (ja) * | 1982-02-10 | 1983-08-15 | Hitachi Ltd | 大規模半導体メモリ |
JPS58216439A (ja) * | 1982-06-09 | 1983-12-16 | Mitsubishi Electric Corp | 半導体装置 |
US4649406A (en) * | 1982-12-20 | 1987-03-10 | Fujitsu Limited | Semiconductor memory device having stacked capacitor-type memory cells |
JPS602784B2 (ja) * | 1982-12-20 | 1985-01-23 | 富士通株式会社 | 半導体記憶装置 |
US5359216A (en) * | 1983-02-23 | 1994-10-25 | Texas Instruments Incorporated | DRAM process with improved polysilicon-to-polysilicon capacitor and the capacitor |
US5244825A (en) * | 1983-02-23 | 1993-09-14 | Texas Instruments Incorporated | DRAM process with improved poly-to-poly capacitor |
JPH0618257B2 (ja) * | 1984-04-28 | 1994-03-09 | 富士通株式会社 | 半導体記憶装置の製造方法 |
JPS6187358A (ja) * | 1984-10-05 | 1986-05-02 | Nec Corp | 半導体記憶装置およびその製造方法 |
JPS61183952A (ja) * | 1985-02-09 | 1986-08-16 | Fujitsu Ltd | 半導体記憶装置及びその製造方法 |
FR2577338B1 (fr) * | 1985-02-12 | 1987-03-06 | Eurotechnique Sa | Procede de fabrication d'une memoire dynamique en circuit integre et memoire obtenue par ce procede |
FR2577339B1 (fr) * | 1985-02-12 | 1991-05-10 | Eurotechnique Sa | Memoire dynamique en circuit integre |
US5098192A (en) * | 1986-04-30 | 1992-03-24 | Texas Instruments Incorporated | DRAM with improved poly-to-poly capacitor |
US4959698A (en) * | 1986-10-08 | 1990-09-25 | Mitsubishi Denki Kabushiki Kaisha | Memory cell of a semiconductor memory device |
KR920005632B1 (ko) * | 1987-03-20 | 1992-07-10 | 가부시기가이샤 히다찌세이사꾸쇼 | 다층 산화 실리콘 질화 실리콘 유전체의 반도체장치 및 그의 제조방법 |
KR100212098B1 (ko) | 1987-09-19 | 1999-08-02 | 가나이 쓰도무 | 반도체 집적회로 장치 및 그 제조 방법과 반도체 집적 회로 장치의 배선기판 및 그 제조 방법 |
US20010008288A1 (en) * | 1988-01-08 | 2001-07-19 | Hitachi, Ltd. | Semiconductor integrated circuit device having memory cells |
US5374576A (en) * | 1988-12-21 | 1994-12-20 | Hitachi, Ltd. | Method of fabricating stacked capacitor cell memory devices |
JP2590171B2 (ja) * | 1988-01-08 | 1997-03-12 | 株式会社日立製作所 | 半導体記憶装置 |
JP2755592B2 (ja) * | 1988-02-23 | 1998-05-20 | 株式会社東芝 | 半導体記憶装置およびその製造方法 |
DE3943617C2 (de) * | 1988-06-10 | 1996-03-14 | Mitsubishi Electric Corp | DRAM und Herstellungsverfahren dafür |
JP2838412B2 (ja) * | 1988-06-10 | 1998-12-16 | 三菱電機株式会社 | 半導体記憶装置のキャパシタおよびその製造方法 |
US5225704A (en) * | 1988-07-08 | 1993-07-06 | Mitsubishi Denki Kabushiki Kaisha | Field shield isolation structure for semiconductor memory device and method for manufacturing the same |
DE3922467A1 (de) * | 1988-07-08 | 1990-01-11 | Mitsubishi Electric Corp | Halbleiterspeichereinrichtung und verfahren zu ihrer herstellung |
JPH0221652A (ja) * | 1988-07-08 | 1990-01-24 | Mitsubishi Electric Corp | 半導体記憶装置 |
JPH0770724B2 (ja) * | 1988-12-08 | 1995-07-31 | 三菱電機株式会社 | 半導体装置 |
JP2721909B2 (ja) * | 1989-01-18 | 1998-03-04 | 三菱電機株式会社 | 半導体記憶装置 |
US5049958A (en) * | 1989-01-27 | 1991-09-17 | Texas Instruments Incorporated | Stacked capacitors for VLSI semiconductor devices |
JPH0794600A (ja) * | 1993-06-29 | 1995-04-07 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
US6124197A (en) | 1999-10-01 | 2000-09-26 | Advanced Micro Devices, Inc. | Adjusting the size of conductive lines based upon contact size |
JP3985735B2 (ja) * | 2003-06-11 | 2007-10-03 | セイコーエプソン株式会社 | 半導体記憶装置 |
US7764081B1 (en) * | 2005-08-05 | 2010-07-27 | Xilinx, Inc. | Programmable logic device (PLD) with memory refresh based on single event upset (SEU) occurrence to maintain soft error immunity |
US7824983B2 (en) * | 2008-06-02 | 2010-11-02 | Micron Technology, Inc. | Methods of providing electrical isolation in semiconductor structures |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5145438B1 (de) * | 1971-06-25 | 1976-12-03 | ||
JPS5249952B2 (de) * | 1972-10-23 | 1977-12-21 | ||
CH573661A5 (de) * | 1973-01-02 | 1976-03-15 | Ibm | |
DE2532594B2 (de) * | 1975-07-21 | 1980-05-22 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Halbleiterspeicher |
-
1977
- 1977-06-30 NL NLAANVRAGE7707297,A patent/NL176415C/xx not_active IP Right Cessation
- 1977-07-01 GB GB27724/77A patent/GB1572674A/en not_active Expired
- 1977-07-04 DE DE19772730202 patent/DE2730202A1/de active Granted
- 1977-07-05 US US05/812,907 patent/US4151607A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
GB1572674A (en) | 1980-07-30 |
NL176415C (nl) | 1985-04-01 |
DE2730202A1 (de) | 1978-01-12 |
NL7707297A (nl) | 1978-01-09 |
NL176415B (nl) | 1984-11-01 |
US4151607A (en) | 1979-04-24 |
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Legal Events
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OAP | Request for examination filed | ||
OD | Request for examination | ||
8128 | New person/name/address of the agent |
Representative=s name: STREHL, P., DIPL.-ING. DIPL.-WIRTSCH.-ING. SCHUEBE |
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D2 | Grant after examination | ||
8364 | No opposition during term of opposition |