CN114068463A - 芯片的导流结构 - Google Patents

芯片的导流结构 Download PDF

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Publication number
CN114068463A
CN114068463A CN202110873141.4A CN202110873141A CN114068463A CN 114068463 A CN114068463 A CN 114068463A CN 202110873141 A CN202110873141 A CN 202110873141A CN 114068463 A CN114068463 A CN 114068463A
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China
Prior art keywords
chip
bumps
conductive
flow
adjacent
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CN202110873141.4A
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Inventor
曾国玮
陈柏琦
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Sitronix Technology Corp
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Sitronix Technology Corp
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Publication of CN114068463A publication Critical patent/CN114068463A/zh
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Abstract

本发明提供一种芯片的导流结构，其包含至少一导流件，该至少一导流件设置于一芯片的一表面，并相邻设置于芯片的表面的多个连接凸块，当芯片设置于一板件时，该至少一导流件可导引位于芯片的表面的导电介质向该多个连接凸块流动，驱使导电介质的多个导电粒子往该多个连接凸块移动，进而可增加位于该多个连接凸块的表面的导电粒子的数量，又或者可减缓导电介质流动，而可避免导电粒子离开该多个连接凸块的表面，可避免降低位于该多个连接凸块的表面的导电粒子的数量。

Description

芯片的导流结构
技术领域
本发明是关于一种芯片的导流结构，尤其指一种设置于芯片，并能引导导电介质的流向或者减缓导电介质的流动的结构。
背景技术
随着时代的演进，电子产品逐渐朝轻、薄小型化快速发展，各种电子产品几乎都以显示器作为展示信息的组件，例如在摄录放影机、笔记本电脑、智能型手机或其他行动装置等产品，显示器已是电子产品中重要的组件。
显示器的面板需搭配驱动芯片才能显示影像，驱动芯片用于驱动面板运作，以显示影像。一般而言，有多种技术可将驱动芯片设置于面板，而该些技术通常需要使用导电介质，例如异向性导电膜(Anisotropic Conductive Film,ACF)，导电介质包含导电粒子，导电粒子可接触驱动芯片的连接凸块(Bump)与面板的电连接件，所以驱动芯片可电性连接面板，如此驱动芯片可传递驱动讯号至面板，而驱动面板显示影像。
但习知技术中，设置驱动芯片于面板时，导电介质会任意流动于驱动芯片的表面，导致导电介质的导电粒子无法有效地分布于驱动芯片的连接凸块的表面，如此即会影响驱动芯片传输讯号至面板的能力，而面板可能无法正常运作。此外，此问题并非仅存在于面板的驱动芯片，也存在于其他类型芯片，例如芯片设置于电路板，因此，产业界需要一种导流结构，其可以导引导电介质往芯片的连接凸块流动，以增加导电粒子分布于连接凸块的表面的数量，又或者可以减缓导电介质流动，以避免降低位于连接凸块的表面的导电粒子的数量。
发明内容
本发明的一目的在于提供一种芯片的导流结构，其包含至少一导流件，导流件设置于芯片的表面，并相邻于设置在芯片的表面的多个连接凸块，当芯片设置于板件时，导流件可导引导电介质向连接凸块流动，驱使导电粒子往连接凸块移动，如此可增加位于连接凸块的表面的导电粒子的数量，又或者可减缓导电介质流动，而可避免导电粒子离开连接凸块的表面，以可避免降低位于连接凸块的表面的导电粒子的数量。
本发明的一目的在于提供一种芯片的导流结构，其包含多个连接凸块群组，其设置于芯片的表面，该多个连接凸块群组各别包含多个凸块，当芯片设置于板件时，该多个凸块可减缓导电介质流动，而可避免导电粒子离开凸块的表面，如此可避免降低位于凸块的表面的导电粒子的数量。
本发明提供一种芯片的导流结构，其包含多个连接凸块以及至少一导流件，该多个连接凸块设置于一芯片的一表面，该至少一导流件亦设置于芯片的表面，并相邻于该多个连接凸块，利用导流件阻挡导电介质，迫使导电介质流向该多个连接凸块，或者减缓导电介质流动，进而避免位于该多个连接凸块的表面的导电粒子的数量过低。
本发明提供另一种芯片的导流结构，其包含多个连接凸块群组，该多个连接凸块群组设置于一芯片的一表面，该多个连接凸块群组各别包含多个凸块，同一连接凸块群组的该多个凸块互相相邻，并对应同一电连接件，利用此结构阻挡导电介质，而减缓导电介质流动，进而避免位于该多个凸块的表面的导电粒子的数量过低。
附图说明
图1：其为本发明的导流结构的第一实施例的立体示意图；
图2：其为本发明的导流结构的第一实施例的俯视示意图；
图3：其为本发明的导流结构的第一实施例的剖视示意图；
图4：其为本发明的导流结构的第二实施例的俯视示意图；
图5：其为本发明的导流结构的第三实施例的立体示意图；
图6：其为本发明的导流结构的第三实施例的俯视示意图；
图7：其为本发明的导流结构的第三实施例的剖视示意图；
图8：其为本发明的导流结构的第四实施例的立体示意图；
图9：其为本发明的导流结构的第四实施例的俯视示意图；
图10：其为本发明的导流结构的第四实施例的剖视示意图；
图11：其为本发明的导流结构的第五实施例的俯视示意图；
图12：其为本发明的导流结构的第六实施例的立体示意图；以及
图13：其为本发明的导流结构的第六实施例的剖视示意图。
【图号对照说明】
1 导流结构
2 芯片
3 表面
4 线路区域
10 连接凸块
101 第二侧面
12 间隔
20 导流件
202 斜面
203 底面
204 斜面
22 导流凸块
221 第一侧面
24 填充件
242 间隔
30 板件
32 电连接件
40 导电介质
42 导电粒子
50 连接凸块群组
52 凸块
H1 高度
H2 高度
具体实施方式
为了使本发明的结构特征及所达成的功效有更进一步的了解与认识，特用较佳的实施例及配合详细的说明，说明如下：
请参阅图1，其为本发明的导流结构的第一实施例的立体示意图。如图所示，本发明的导流结构1包含多个连接凸块10以及至少一导流件20。
再次参阅图1以及参阅图3，图3为本发明的导流结构的第一实施例的剖视示意图。于本实施例中，该多个连接凸块10设置于一芯片2的一表面3，该多个连接凸块10的材料为导电材料，该至少一导流件20设置于芯片2的表面3，并相邻于该多个连接凸块10。该至少一导流件20具有一高度H1，该多个连接凸块10具有一高度H2，高度H1小于或等于高度H2，该至少一导流件20不高于该多个连接凸块10。
再次参阅第1、3图以及参阅图2，图2为本发明的导流结构的第一实施例的俯视示意图。如图所示，本实施例的导流件20的数量为多个，并以该多个导流件20为例进行说明，该多个导流件20可包含多个导流凸块22，该多个导流凸块22相邻于该多个连接凸块10。该多个导流凸块22的一第一侧面221对应于该多个连接凸块10的一第二侧面101，且第一侧面221的一面积可大于第二侧面101的一面积。当芯片2设置于一板件30，板件30可为显示面板或者电路板等，该多个导流凸块22可有效阻挡一导电介质40，而减缓导电介质40的流动，且驱使其回流至该多个连接凸块10，其相当于该多个导流凸块22导引导电介质40流到该多个连接凸块10。
如图2、图3所示，加入导电介质40于芯片2的表面3而欲将芯片2设置于板件30时，芯片2受力而导致导电介质40流动于芯片2的表面3。如图2所示，导电介质40会受该多个导流凸块22阻挡而减缓流动，且导电介质40受到该多个导流凸块22的阻挡后也会回流至该多个连接凸块10。如图3所示，导电介质40包含的多个导电粒子42也随的向该多个连接凸块10移动，而可位于该多个连接凸块10的表面。多个电连接件32设置于板件30，而该多个连接凸块10各别对应该多个电连接件32。
当芯片2设置于板件30时，位于该多个连接凸块10的表面的该多个导电粒子42会接触该多个连接凸块10与对应的该多个电连接件32，如此该多个连接凸块10可各别电性连接对应的该多个电连接件32，即芯片2可电性连接板件30。该多个导流凸块22阻挡导电介质40，而减缓导体介质40的流动，可避免该多个导电粒子42离开该多个连接凸块10的表面。此外，导电介质40受到该多个导流凸块22的阻挡而回流至该多个连接凸块10时，该多个导电粒子42向该多个连接凸块10移动，可增加该多个连接凸块10与该多个电连接件32之间的该些导电粒子42的数量，而提升芯片2与板件30间的传输能力。于本发明的一实施例中，该多个导流凸块22可不对应于该多个电连接件32，即该多个导流凸块22可不电性连接于该多个电连接件32。
再次参阅图3，该多个导流件20的至少一侧面相邻该多个连接凸块10，该多个导流件20的该至少一侧面可为非斜面或者斜面。于本实施例中，该至少一导流件20以该多个导流凸块22举例，该多个导流凸块22的该至少一侧面可为一斜面202，也可为一非斜面。导电介质40流动时，斜面202可导引导电介质40及其包含的导电粒子42向该多个连接凸块10移动，如此可增加位于该多个连接凸块10与该多个电连接件32之间的该些导电粒子42的数量。斜面202与导流凸块22的底面203间的夹角可为锐角，该多个导流凸块22可为导体或者非导体，导电介质40可为异向性导电膜(Anisotropic Conductive Film,ACF)，但本发明不在此限制。
请参阅图4，其为本发明的导流结构的第二实施例的俯视示意图。如图所示，本实施例中，在该多个连接凸块10的其中的至少一的周围可设置超过一个导流凸块22，即相对于连接凸块10的前侧面、后侧面、左侧面或者右侧面各设置一个导流凸块22，也就是多个导流凸块22相邻于至少一连接凸块10的多个侧面，利用该多个导流凸块22限制导电介质40的流动，进一步驱使该多个导电粒子42可集中于该多个连接凸块10与该多个电连接件32之间。
请参阅图5，其为本发明的导流结构的第三实施例的立体示意图。如图所示，本实施例的导流结构1包含多个连接凸块群组50，该多个连接凸块群组50设置于芯片2的表面3，该多个连接凸块群组50各别包含多个凸块52，同一連接凸块群组50的该多个凸块52互相相邻，并对应板件30的同一个电连接件32。本实施例相对于第一实施例，该多个连接凸块10各别分割成该多个凸块52，该多个凸块52仍对应同一个电连接件32。
再次参阅图5以及参阅图6、图7，图6为本发明的导流结构的第三实施例的俯视示意图；图7为本发明的导流结构的第三实施例的剖视示意图。如图所示，于本实施例中，加入导电介质40于芯片2的表面3而欲将芯片2设置于板件30时，芯片2受力而导致导电介质40于芯片2的表面3流动，导电介质40受该多个凸块52阻挡，而减缓导电介质40的流动，使导电介质40可尽量保持于该多个凸块52的周围，以避免该多个导电粒子42离开该多个凸块52的表面，且将该多个导电粒子42集中于该多个凸块52与该多个电连接件32之间。
请参阅图8，其为本发明的导流结构的第四实施例的立体示意图。如图所示，本实施例的导流结构1包含多个连接凸块10以及至少一导流件20。于本实施例中，该至少一导流件20为至少一填充件24，该至少一填充件24填充于芯片2的一线路区域4，且相邻该多个连接凸块10。线路区域4为芯片2的线路的所在区域。于本实施例中，该至少一填充件24围绕于该多个连接凸块10。如图10所示，该至少一填充件24具有高度H1，该多个连接凸块10具有高度H2，高度H1小于或等于高度H2。
再次参阅图8以及请参阅图9、图10，图9为本发明的导流结构的第四实施例的俯视示意图，图10为本发明的导流结构的第四实施例的剖视示意图。如图所示，加入导电介质40于芯片2的表面3与该至少一填充件24的表面而欲将芯片2设置于板件30时，芯片2受力而导致导电介质40于芯片2的表面3与该至少一填充件24的表面流动。由于该至少一填充件24围绕该多个连接凸块10，所以位于芯片2的表面3的导电介质40会被该至少一填充件24阻挡，而被限制流动于该多个连接凸块10的所在位置，相当于导引导电介质40流动至该多个连接凸块10的表面，而集中导电粒子42于该多个连接凸块10与该多个电连接件32之间。此外，当芯片2受力设置于板件30时，位于该至少一填充件24的表面的导电介质40受该至少一填充件24阻挡，驱使导电介质40流动至未被该至少一填充件24填充的芯片2的表面，也就是该多个连接凸块10的所在位置。如图10所示，位于该至少一填充件24的表面的导电介质40包含的该多个导电粒子42也随的向该多个连接凸块10移动，而增加位于该多个连接凸块10与该多个电连接件32之间的该多个导电粒子42的数量。
再次参阅图10，本实施例中，该至少一填充件24的至少一侧面相邻该多个连接凸块10，该至少一填充件24的该至少一侧面可为斜面204，但也可以为非斜面。该至少一填充件24的材料为绝缘材，例如聚酰亚胺(Polyimide，PI)、苯并环丁烯(Benzocyclobutene，BCB)，但本实施例不在此限制。
请参阅图11，其为本发明的导流结构的第五实施例的俯视示意图。如图所示，本实施例的导流结构1可包含多个填充件24，该多个填充件24之间具有一间隔242。加入导电介质40于芯片2的表面3与该多个填充件24的表面而欲将芯片2设置于板件30时，位于芯片2的表面3的导电介质40会被该多个填充件24阻挡，而减缓导电介质40的流动，且导电介质40向该多个连接凸块10回流，相当于导引导电介质40流动至该多个连接凸块10的表面。此外，如上述说明，位于该多个填充件24的表面的导电介质40流动至该多个连接凸块10。本实施例中，该多个填充件24的至少一侧面可为斜面。
请参阅图12，其为本发明的导流结构的第六实施例的立体示意图。如图所示，本实施例中填充件24更填充于该多个连接凸块10间的多个间隔12，使填充件24包覆该多个连接凸块10的侧面。于本实施例中，填充件24几乎覆盖芯片2的所有表面。于一实施例中，填充件24的高度可小于或者等于该多个连接凸块10的高度。
再次参阅图12以及请参阅图13，图13为本发明的第六实施例的剖视示意图。如图所示，加入导电介质40于填充件24的表面而欲将芯片2设置于板件30时，如先前所述，位于填充件24的表面的导电介质40流动至该多个连接凸块10。如图13所示，导电介质40包含的该多个导电粒子42也随的向该多个连接凸块10移动，增加位于该多个连接凸块10与该多个电连接件32之间的该多个导电粒子42的数量。上述各实施例可相互结合应用，以提高效能。
综上所述，本发明提供一种芯片的导流结构，其包含至少一导流件，导流件设置于芯片的表面，并相邻设置在芯片的表面的多个连接凸块，导流件可阻挡导电介质，使导电介质向该多个连接凸块流动，进而增加位于该多个连接凸块的表面的导电粒子的数量，导流件亦可减缓导电介质的流动，而可避免导电粒子离开该多个连接凸块的表面。此外，更可将该多个连接凸块分为多个凸块，该多个凸块可减缓导电介质的流动，让导电介质保持于该多个凸块的周围，进而避免位于该多个凸块的表面的导电粒子离开该多个凸块的表面。
上文仅为本发明的较佳实施例而已，并非用来限定本发明实施的范围，凡依本发明权利要求范围所述的形状、构造、特征及精神所为的均等变化与修饰，均应包括于本发明的权利要求范围内。

Claims (16)

1.一种芯片的导流结构，其特征在于，其包含：
多个连接凸块，其设置于一芯片的一表面；以及
至少一导流件，其设置于该芯片的该表面，并相邻于该多个连接凸块。
2.如权利要求1所述的芯片的导流结构，其特征在于，其中该至少一导流件的一高度小于或等于该多个连接凸块的一高度。
3.如权利要求1所述的芯片的导流结构，其特征在于，其中该至少一导流件的至少一侧面相邻该多个连接凸块，该至少一导流件的该至少一侧面为一斜面。
4.如权利要求1所述的芯片的导流结构，其特征在于，其中该至少一导流件包含多个导流件，该多个导流件包含多个导流凸块，该多个导流凸块相邻于该多个连接凸块。
5.如权利要求4所述的芯片的导流结构，其特征在于，其中该多个导流凸块的一第一侧面对应于该多个连接凸块的一第二侧面，该第一侧面的一面积大于该第二侧面的一面积。
6.如权利要求4所述的芯片的导流结构，其特征在于，其中该多个导流凸块其中的多个导流凸块相邻于该多个连接凸块其中的至少一连接凸块的多个侧面。
7.如权利要求4所述的芯片的导流结构，其特征在于，其中该多个导流凸块的至少一侧面相邻该多个连接凸块，该多个导流凸块的该至少一侧面为一斜面。
8.如权利要求4所述的芯片的导流结构，其特征在于，其中该多个导流凸块为导体或者非导体。
9.如权利要求1所述的芯片的导流结构，其特征在于，其中该至少一导流件为至少一填充件，该至少一填充件填充于该芯片的一线路区域，且相邻该多个连接凸块。
10.如权利要求9所述的芯片的导流结构，其特征在于，其中该至少一填充件包含多个填充件，该多个填充件之间具有一间隔。
11.如权利要求9所述的芯片的导流结构，其特征在于，其中该至少一填充件更填充于该多个连接凸块间的多个间隔。
12.如权利要求9所述的芯片的导流结构，其特征在于，其中该至少一填充件的至少一侧面相邻该多个连接凸块，该至少一填充件的该至少一侧面为一斜面。
13.如权利要求9所述的芯片的导流结构，其特征在于，其中该至少一填充件的材料为绝缘材。
14.如权利要求1所述的芯片的导流结构，其特征在于，其中该多个连接凸块各别对应多个电连接件，该多个电连接件设置于一板件。
15.一种芯片的导流结构，其特征在于，其包含：
多个连接凸块群组，其设置于一芯片的一表面，该多个连接凸块群组各别包含多个凸块，同一连接凸块群组的该多个凸块互相相邻，并对应同一电连接件。
16.如权利要求15所述的芯片的导流结构，其特征在于，其中该电连接件设置于一板件。
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