CN104422870B - A kind of test structure and test method of microchannels - Google Patents
A kind of test structure and test method of microchannels Download PDFInfo
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- CN104422870B CN104422870B CN201310410805.9A CN201310410805A CN104422870B CN 104422870 B CN104422870 B CN 104422870B CN 201310410805 A CN201310410805 A CN 201310410805A CN 104422870 B CN104422870 B CN 104422870B
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Abstract
The present invention relates to a kind of test structure of microchannels and test methods, first test block and the second test block, first test block and the second test block setting stacked on top of one another, contain the strip conductor array being connected as one in first test block and second test block, the strip conductor in strip conductor and second test block in first test block is mutually perpendicular to；First test block and second test block are respectively connected to the first testing weld pad and the second testing weld pad by the first connecting pin and second connection end, first connecting pin and the second connection end.The method of the invention changes the drawbacks of being needed in the prior art to being detected to a large amount of sample, all microchannels on entire chip map can be scanned by the test structure, it is analyzed according to electric current, keep the result more accurate, and whole process is simpler, saves the time.
Description
Technical field
The present invention relates to semiconductor applications, in particular it relates to a kind of test structure of microchannels and test side
Method.
Background technology
With the sustainable development of integrated circuit technique, more devices will be integrated on chip, when chip will also use faster
Clock rate degree.Under the propulsion of these requirements, the geometric dimension of device will constantly reduce, and constantly be used in the manufacturing process of chip
New material, new technology and new manufacturing process.These improvement are very big for the aging effects of individual devices, may cause part
The fragility increase in region, the raising of power density, device complexity increase and introduce new inefficacy mechanism, while it is smaller
Fault tolerant workspace mean life problems must must take into consideration at the very start in design, and in the exploitation of device and manufactured
It is monitored and tests always in journey, until the completion of final products.
The monitoring of semiconductor devices and test are generally comprised at present various to the device progress with special package form
Electrical performance testing and reliability of technology test, mostly use static random accesP memory at present（Referred to as static random is deposited
Reservoir or Static RAM, SRAM）As the test platform of assessment electric property, as sram cell size becomes increasingly
It is small, in the preparation process of device, microchannels may be formed between different metal layer 101 and 102（Micro trench）
103（As shown in the part in circle）, as shown in Figure 1, the microchannels 103（Micro trench）It can lead to semiconductor device
The breakdown voltage of part（Breakdown Voltage, VBD）Degradation, and in advanced technology nodes, the semiconductor devices
Breakdown voltage（Breakdown Voltage, VBD）Performance becomes one of the most important parameter of evaluation device performance.Therefore
The VBD performances for how evaluating device have great importance.
Mostly it is by SEM notch in the prior art（SEM cut）The performance of the microchannels 103 is detected,
But the detection method can only qualitatively detect the microchannels 103, and the detection need it is more when
Between, and in order to obtain more accurately as a result, it is desirable to be detected to a large amount of sample, but the effect is unsatisfactory.
Therefore, with the diminution of semiconductor dimensions, exist for the detection method of microchannels waste time, sample mostly with
And can only many drawbacks such as qualitative detection, so that production efficiency is restricted, at present there is an urgent need for being improved to the detection method, with
Eliminate the above problem.
Invention content
A series of concept of reduced forms is introduced in Summary, this will in the detailed description section into
One step is described in detail.The Summary of the present invention is not meant to attempt to limit technical solution claimed
Key feature and essential features do not mean that the protection domain for attempting to determine technical solution claimed more.
The present invention in order to overcome the problems, such as presently, there are, provide a kind of test structure of microchannels, including：
First test block and the second test block, first test block and the second test block setting stacked on top of one another, institute
State the strip conductor array for containing respectively in the first test block and second test block and being connected as one, first test block
In strip conductor and second test block in strip conductor be mutually perpendicular to；
First connecting pin and second connection end, first connecting pin and the second connection end are by first test block
It is respectively connected to the first testing weld pad and the second testing weld pad with second test block.
Preferably, first test block and second test block are in pectinate texture, contain connecting line peace
Row is set to several strip conductors on the connecting line, the strip conductor in first test block and second test block
In strip conductor be mutually perpendicular to.
Preferably, first test block is set to second test block in upper and lower two parallel planes.
Preferably, first test block and second test block respectively with first testing weld pad and described
Two testing weld pads are generally aligned in the same plane.
Preferably, first test block and second test block are metallic test part.
Preferably, the strip conductor is of same size.
Preferably, the width of the strip conductor is n times of wherein n of the basic width set as natural number.
The present invention also provides a kind of test methods based on above-mentioned test structure, including：
Step（a）Apply scanning voltage on first testing weld pad and second testing weld pad；
Step（b）Record applies the Leakage Current when scanning voltage；
Step（c）The VBD performances of the microchannels are analyzed according to the variation of the leakage current.
Preferably, step（a）Described in scanning voltage be less than or equal to 100V.
Preferably, the method is for being detected entire chip map.
Preferably, in the step（c）In when the Leakage Current rapidly become larger voltage when reaching peak value be hit
Wear voltage.
Preferably, the method is further comprising the steps of：
The width for changing strip conductor in the strip conductor array of first test block and second test block, to institute
It states microchannels to be tested, according to strip conductor width described in test result analysis to the shadow of the microchannels VBD performances
It rings.
The method of the invention can obtain the data of evaluation device VBD by the test block positioned at lower planes, with full
The demand of the currently advanced technology node of foot, the method for the invention is by the electric property of the test structure, to described miniature
The performance of groove is evaluated, and the detection of the groove VBD performances is realized by the detection of electric current so that this method is simpler
Easy, the method for the invention can also establish the pass between the Leakage Current and VBD other than qualitative analysis its performance
Connection carries out quantitative analysis by the association, is commented more accurately to carry out analysis to the VBD performances of the microchannels
Valence.
The method of the invention changes the drawbacks of being needed in the prior art to being detected to a large amount of sample, passes through institute
All microchannels on entire chip map can be scanned by stating test structure, analyzed according to electric current, make institute
Stating result can be more accurate, and whole process is simpler, saves the time.
Description of the drawings
The following drawings of the present invention is used to understand the present invention in this as the part of the present invention.Shown in the drawings of this hair
Bright embodiment and its description, device used to explain the present invention and principle.In the accompanying drawings,
Fig. 1 is the structural schematic diagram for forming the microchannels in the prior art；
Fig. 2 is the structural schematic diagram of test structure described in the embodiment of the invention；
Fig. 3 is that test block line thickness influences test result in test structure described in the embodiment of the invention
Schematic diagram；
Fig. 4 is the process flow chart of test method described in the specific implementation mode of the present invention.
Specific implementation mode
In the following description, a large amount of concrete details are given in order to provide more thorough understanding of the invention.So
And it is obvious to the skilled person that the present invention may not need one or more of these details and be able to
Implement.In other examples, in order to avoid with the present invention obscure, for some technical characteristics well known in the art not into
Row description.
In order to thoroughly understand the present invention, detailed description will be proposed in following description, to illustrate survey of the present invention
Try structure and test method.Obviously, execution of the invention be not limited to the technical staff of semiconductor applications be familiar with it is special thin
Section.Presently preferred embodiments of the present invention is described in detail as follows, however other than these detailed descriptions, the present invention can also have other
Embodiment.
It should give it is noted that term used herein above is merely to describe specific embodiment, and be not intended to restricted root
According to exemplary embodiment of the present invention.As used herein, unless the context clearly indicates otherwise, otherwise singulative
Intention includes plural form.Additionally, it should be understood that when using term "comprising" and/or " comprising " in the present specification
When, indicate that there are the feature, entirety, step, operation, element and/or component, but do not preclude the presence or addition of one or more
Other a features, entirety, step, operation, element, component and/or combination thereof.
Now, exemplary embodiment according to the present invention is more fully described with reference to the accompanying drawings.However, these exemplary realities
Applying example can be implemented with many different forms, and should not be construed to be limited solely to the embodiments set forth herein.It should
These embodiments that are to provide understood are in order to enable disclosure of the invention is thoroughly and complete, and by these exemplary implementations
The design of example is fully conveyed to those of ordinary skill in the art.In the accompanying drawings, for the sake of clarity, the thickness of layer and region is exaggerated
Degree, and make that identical element is presented with like reference characters, thus description of them will be omitted.
The present invention is long to the microchannels testing time in the prior art in order to solve, and as a result inaccurate asks
Topic, provides a kind of test structure of new microchannels, including：
First test block and the second test block, first test block and second test block are stacked, and described
Contain the strip conductor array being connected as one, the item in first test block in one test block and second test block
Strip conductor in shape conducting wire and second test block is mutually perpendicular to；
First connecting pin and second connection end, first connecting pin and the second connection end are by first test block
It is respectively connected to the first pad and the second pad with second test block.
Specifically, the strip conductor array is integrated setting, including multiple strip conductors disposed in parallel, as excellent
Choosing, in one embodiment of the invention, as shown in Fig. 2, first test block, 203 and second test block 204 is in comb
Shape structure, wherein in first test block, 203 underlying plane, plane that second test block 204 is located above
In, two planes up and down are arranged in parallel.
Further, first test block 203 includes connecting line and the bar shaped that is arranged in parallel on the connecting line
Conducting wire, the multiple strip conductor form the strip conductor array, wherein the width of the strip conductor can it is identical or
Difference, preferably, the strip conductor can select one or more of 1-n times of basic width of combination, into one
Step can be preferably one or more of 1-10 times of basic width combination.
The structure of second test block 204 is similar with first test block 203, first test block 203 and institute
The width stated in the second test block 204 between the number of strip conductor, width and strip conductor can be identical or different, root
It is configured according to actual needs, it is not limited to a certain situation.
Further, first test block 203 and second test block 204 are metallic test part, and the metal is surveyed
Test specimen can select copper, tungsten, titanium, cobalt, nickel, aluminium, yttrium, one or more of ytterbium and erbium, it is not limited to a certain.At this
It is preferably copper in embodiment.
First test block 203 is connected by the first connecting pin 205 with first pad 202, preferably, institute
The first test block 203 is stated to be arranged in parallel with first pad 202, further, first test block 203, the first connecting pin
205 is in the same plane with first pad 202, and further, first connecting pin 205 is parallel with the strip conductor
Setting.
Second test block 204 is connected by second connection end 206 with second pad 201, preferably, institute
The second test block 204 is stated to be arranged in parallel with second pad 201, further, first test block 204, second connection end
206 is in the same plane with second pad 201, and further, the second connection end 206 and the strip conductor hang down
Directly, the second connection end 206 is the extended line of connecting line in second test block 204, does not have to additional setting connecting pin.
As shown in Fig. 2, the strip conductor in first test block 203 is laterally to be arranged, second test block 204
Strip conductor is longitudinally disposed, although being located in planes different up and down, in the plane being even mutually parallel, described first surveys
The strip conductor of strip conductor and second test block 204 in test specimen 203 is horizontal to be arranged in a mutually vertical manner.
The present invention also provides a kind of method being detected to microchannels using the detection structure, the method packets
It includes：
Step（a）Apply scanning voltage on first pad and second pad；
Step（b）Record applies the Leakage Current when scanning voltage；
Step（c）The performance of the microchannels is analyzed according to the variation of the leakage current.
The method of the invention comments the performance of the microchannels by the electric property of the test structure
Valence, wherein the step（a）Described in scanning voltage be less than or equal to 100V, in first pad and second pad
When the upper application scanning voltage, with being stepped up for voltage, electric current is continuously increased, and as shown in the lines 1-3 in Fig. 3, is led to
The performance of the microchannels is evaluated in the variation for crossing the electric current.
Specifically, with the increase of voltage, electric current is continuously increased, and when the Leakage Current rapidly increases, reaches peak value, such as
Corresponding voltage is the breakdown voltage VBD of the device at current peak described in Fig. 3, and the detection of the electric current can be selected
Detection with detection method commonly used in the art, the electric current is simple and practicable, therefore can be with simpler fast by the method
Detection of the prompt realization to the VBD performances of the microchannels.
Preferably, since the size of the electric current can carry out precision measurement, the method for the invention in addition to
Other than its performance of qualitative analysis, the association between the Leakage Current and VBD can also be established, is quantified by the association
Analysis, so that more accurately the VBD performances of the microchannels are analyzed and evaluated.
Preferably, the method can also be investigated between the strip conductor width and the microchannels VBD performances
Relationship specifically change the width of strip conductor in the strip conductor array of first test block and second test block
Degree, tests the microchannels, according to strip conductor width described in test result analysis to the microchannels performance
Influence.
In of the invention one specifically embodiment, as shown in figure 3, the wherein voltage-current curve, wherein institute
The curve of width that curve 1 is strip conductor when being 10 times of setting value is stated, the curve 2 is the width of the strip conductor
Curve when degree is 2 times of setting value, the curve that the curve 1 is the width of the strip conductor when being 1 times of setting value,
Described in the setting value of strip conductor width can be set according to actual conditions, it is not limited to a certain numerical value.
Becoming larger with the strip conductor width, the VBD performance degradations of device are can be seen that by the data in Fig. 3
It is more serious, it is meant that larger metal width can cause to keep the performance of the microchannels worse, be measured by the method
Obtained result and SEM notch（SEM cut）The testing result that method obtains is consistent, further demonstrates the method for the invention
Accuracy.
Further, the method for the invention changes the disadvantage needed in the prior art to being detected to a large amount of sample
End, can be scanned all microchannels on entire chip map by the test structure, is carried out according to electric current
Analysis keeps the result more accurate, and whole process is simpler, saves the time.
The method of the invention can obtain the data of evaluation device VBD by the test block positioned at lower planes, with full
The demand of the currently advanced technology node of foot, the method for the invention is by the electric property of the test structure, to described miniature
The performance of groove is evaluated, and the detection of the groove VBD performances is realized by the detection of electric current so that this method is simpler
Easy, the method for the invention can also establish the pass between the Leakage Current and VBD other than qualitative analysis its performance
Connection carries out quantitative analysis by the association, is commented more accurately to carry out analysis to the VBD performances of the microchannels
Valence.
Fig. 4 is the process flow chart of test method described in the specific implementation mode of the present invention, specifically, including it is following
Step：
Step（a）Apply scanning voltage on first testing weld pad and second testing weld pad；
Step（b）Record applies the Leakage Current when scanning voltage；
Step（c）The VBD performances of the microchannels are analyzed according to the variation of the leakage current.
The present invention is illustrated by above-described embodiment, but it is to be understood that, above-described embodiment is only intended to
The purpose of citing and explanation, and be not intended to limit the invention within the scope of described embodiment.In addition people in the art
It is understood that the invention is not limited in above-described embodiment, introduction according to the present invention can also be made more kinds of member
Variants and modifications, these variants and modifications are all fallen within scope of the present invention.Protection scope of the present invention by
The appended claims and its equivalent scope are defined.
Claims (12)
1. a kind of test structure of microchannels, including：
First test block and the second test block, first test block and the second test block setting stacked on top of one another, described
Contain the strip conductor array that is connected as one in one test block and second test block respectively, in first test block
Strip conductor in strip conductor and second test block is mutually perpendicular to；
First connecting pin and second connection end, first connecting pin and the second connection end are by first test block and institute
It states the second test block and is respectively connected to the first testing weld pad and the second testing weld pad, commented with the performance to the microchannels
Valence.
2. test structure according to claim 1, which is characterized in that first test block and second test block are equal
In pectinate texture, containing connecting line and several strip conductors being arranged in parallel on the connecting line.
3. test structure according to claim 1 or 2, which is characterized in that first test block and second test
Part is set in upper and lower two parallel planes.
4. test structure according to claim 1 or 2, which is characterized in that first test block and second test
Part is generally aligned in the same plane with first testing weld pad and second testing weld pad respectively.
5. test structure according to claim 1 or 2, which is characterized in that first test block and second test
Part is metallic test part.
6. test structure according to claim 2, which is characterized in that the strip conductor it is of same size.
7. test structure according to claim 6, which is characterized in that the width of the strip conductor is the substantially wide of setting
N times of degree, wherein n are natural number.
8. a kind of test method based on the test structure described in one of claim 1-7, including：
Step (a) applies scanning voltage on first testing weld pad and second testing weld pad；
Step (b) record applies the leakage current when scanning voltage；
Step (c) analyzes the VBD performances of the microchannels according to the variation of the leakage current.
9. test method according to claim 8, which is characterized in that scanning voltage described in step (a) is less than or equal to
100V。
10. test method according to claim 8, which is characterized in that the method is used to carry out entire chip map
Detection.
11. test method according to claim 8, which is characterized in that when Leakage Current urgency in the step (c)
Speed voltage when reaching peak value that becomes larger is breakdown voltage.
12. test method according to claim 8, which is characterized in that the method is further comprising the steps of：
The width for changing strip conductor in the strip conductor array of first test block and second test block, to described micro-
Type groove is tested, the influence according to strip conductor width described in test result analysis to the microchannels VBD performances.
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| CN201310410805.9A CN104422870B (en) | 2013-09-10 | 2013-09-10 | A kind of test structure and test method of microchannels |
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| CN106328630A (en) * | 2016-11-09 | 2017-01-11 | 上海华力微电子有限公司 | Testing structure and testing method for monitoring isolation performance among different layers of metal layer |
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| US6577149B2 (en) * | 2001-01-05 | 2003-06-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method and device for addressable failure site test structure |
| JP3853260B2 (en) * | 2002-06-12 | 2006-12-06 | Ｎｅｃエレクトロニクス株式会社 | Semiconductor device including evaluation element and failure analysis method using the evaluation element |
| CN100359692C (en) * | 2003-03-04 | 2008-01-02 | 台湾积体电路制造股份有限公司 | Multilayer composite metal capacitor structure |
| KR100508090B1 (en) * | 2003-03-25 | 2005-08-17 | 삼성전자주식회사 | Test pattern of semiconductor device and method for forming thereof |
| CN100353515C (en) * | 2003-12-31 | 2007-12-05 | 中芯国际集成电路制造(上海)有限公司 | Method for online test of wafer metal interconnection line reliability |
| KR101030295B1 (en) * | 2004-12-30 | 2011-04-20 | 동부일렉트로닉스 주식회사 | Field Transistor for Testing Isolation in Semiconductor Device |
| WO2006123281A1 (en) * | 2005-05-19 | 2006-11-23 | Koninklijke Philips Electronics N.V. | Test structure for combined electrical testing and voltage-contrast inspection |
| CN101494216B (en) * | 2008-01-25 | 2011-02-02 | 中芯国际集成电路制造(上海)有限公司 | Structure for testing reliability analysis of integrated circuit inner layer dielectric |
| CN101577265B (en) * | 2008-05-05 | 2011-08-24 | 中芯国际集成电路制造(北京)有限公司 | Test structure of breakdown voltage, analytic procedure applying same and wafer |
| CN102967813A (en) * | 2011-08-31 | 2013-03-13 | 中芯国际集成电路制造(上海)有限公司 | Testing structure and testing method |
| CN103197222B (en) * | 2013-03-22 | 2016-04-06 | 上海华虹宏力半导体制造有限公司 | The method of testing of transistor drain current |
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