CN118011175B - Method and system for analyzing defects of transistor device - Google Patents

Method and system for analyzing defects of transistor device Download PDF

Info

Publication number
CN118011175B
CN118011175B CN202410420863.8A CN202410420863A CN118011175B CN 118011175 B CN118011175 B CN 118011175B CN 202410420863 A CN202410420863 A CN 202410420863A CN 118011175 B CN118011175 B CN 118011175B
Authority
CN
China
Prior art keywords
defect
initial
defect detection
capacitance
determining
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202410420863.8A
Other languages
Chinese (zh)
Other versions
CN118011175A (en
Inventor
陈燕宁
刘芳
宋斌斌
王凯
赵扬
朱亚星
左阿惠
许玉洁
孟庆萌
常泽洲
齐宇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
State Grid Electric Power Research Institute Of Sepc
Beijing Smartchip Microelectronics Technology Co Ltd
Original Assignee
State Grid Electric Power Research Institute Of Sepc
Beijing Smartchip Microelectronics Technology Co Ltd
Filing date
Publication date
Application filed by State Grid Electric Power Research Institute Of Sepc, Beijing Smartchip Microelectronics Technology Co Ltd filed Critical State Grid Electric Power Research Institute Of Sepc
Priority to CN202410420863.8A priority Critical patent/CN118011175B/en
Publication of CN118011175A publication Critical patent/CN118011175A/en
Application granted granted Critical
Publication of CN118011175B publication Critical patent/CN118011175B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

The invention provides a method and a system for analyzing defects of a transistor device, and relates to the field of semiconductor device detection. The analysis method comprises the following steps: constructing a defect detection platform and detecting an initial transient capacitance of a defect detection sample; wherein the defect detection sample includes a plurality of transistor devices formed on a substrate, the transistor devices having a metal/oxide/semiconductor stacked structure, a gate of each transistor device being connected to a first pin through a comb-shaped conductive structure, the substrate of the defect detection sample being connected to a second pin; setting up an electromagnetic interference platform and carrying out electromagnetic interference on a defect detection sample; detecting a damaged transient capacitance; determining an initial defect energy level and an initial defect concentration based on the initial transient capacitance, and determining a damage defect energy level and a damage defect concentration based on the damage transient capacitance; determining the electromagnetic damage degree of the defect detection sample. By the analysis method provided by the invention, microscopic defects of the transistor device can be detected, and the defect energy level of the transistor device can be accurately measured.

Description

Method and system for analyzing defects of transistor device
Technical Field
The invention relates to the technical field of semiconductor device detection, in particular to a transistor device defect analysis method and a transistor device defect analysis system.
Background
A Metal-Oxide-semiconductor field effect transistor (MOSFET) or a Lateral Double-diffused field effect transistor (LDMOS) is a transistor device composed of a Metal-Oxide-semiconductor, and is generally composed of an insulated Oxide gate (abbreviated as G), a semiconductor source (abbreviated as S), and a semiconductor drain (abbreviated as D). The main working principle is that a carrier channel region is formed below an insulated gate by applying direct-current voltage to the insulated gate, and current is formed through directional movement of carriers between a source electrode and a drain electrode, so that the switching state of a device is driven, and a large number of MOS devices are arranged in a chip at present, so that the semiconductor device has become one of the most critical devices forming the chip.
There is a lot of electromagnetic interference in the industrial application environment, and the electromagnetic interference is coupled into the semiconductor device through the wire on the PCB board in the form of pulse current, influences the abnormal accumulation of carrier in the device, causes the degradation of device performance. The transistor device is used as an important device in a chip, current is mainly distributed in a channel layer below a grid electrode, so that one of important influences caused by electromagnetic interference is concentrated at an interface of grid oxide and a channel, a hot carrier with relatively high energy is formed by the carrier under the acceleration of a pulse electromagnetic field, si-O, si-H bonds are broken at the interface of the channel and the grid oxide by the high-energy carrier, deep level defects such as O, H are formed, and drift of electrical characteristic parameters such as device threshold voltage is caused by the generation and recombination of the defects, so that the performance of the device is seriously influenced.
In the prior art, since the deep level defects are microscopic defects, the size of the device is usually in micro-nano level, the existing conventional means such as SEM and XRD are difficult to detect the deep level defects in the device, while the means such as TEM and SIMS are complicated in sample preparation and small in detection area, and only partial defect types in the semiconductor material can be detected, so that the accurate positioning of all defects in the device, particularly the defects at the interface, is difficult.
Disclosure of Invention
Aiming at the technical problems that in the prior art, the sample preparation difficulty is high, the detection area is small, only partial defects can be detected, and defects at the interface of a device are difficult to detect, the invention provides a transistor device defect analysis method and a transistor device defect analysis system.
To achieve the above object, a first aspect of the present invention provides a method for analyzing a defect of a transistor device, including: constructing a defect detection platform, and detecting an initial transient capacitor of a defect detection sample before electromagnetic interference by using the defect detection platform; wherein the defect detection sample comprises a plurality of transistor devices formed on a substrate, the transistor devices having a metal/oxide/semiconductor stacked structure, the gate of each transistor device being connected to a first pin through a comb-shaped conductive structure, the substrate of the defect detection sample being connected to a second pin; setting up an electromagnetic interference platform, and carrying out electromagnetic interference on a defect detection sample by utilizing the electromagnetic interference platform; detecting a damaged transient capacitor of the defect detection sample subjected to electromagnetic interference by using the defect detection platform; determining an initial defect energy level and an initial defect concentration of a defect detection sample based on the initial transient capacitance, and determining a damaged defect energy level and a damaged defect concentration of the defect detection sample based on the damaged transient capacitance; determining the electromagnetic damage degree of the defect detection sample based on the initial defect energy level, the initial defect concentration, the damage defect energy level and the damage defect concentration.
Further, a sum of gate areas of the plurality of transistor devices is greater than the set area.
Further, the defect detection sample is prepared by the following method: providing a substrate and forming a plurality of independent transistor devices on the substrate; forming a comb-shaped conductive structure; the comb-shaped conductive structure is provided with a comb back structure and a plurality of strip-shaped comb tooth structures corresponding to the transistor devices, wherein the strip-shaped comb tooth structures are formed on the gates of the corresponding transistor devices and extend out of the gates of the corresponding transistor devices to be connected with the comb back structure; and forming a first pin and a second pin, communicating the comb back structure with the first pin, and communicating the substrate with the second pin.
Further, the constructing a defect detection platform includes: connecting metal wires on two probes of the transient capacitance measuring device respectively; one of the metal wires is welded to the first pin through a welding point, and the other metal wire is connected to the second pin.
Further, the building of the electromagnetic interference platform includes: respectively connecting metal wires on two probes of the electromagnetic pulse generating device; and welding one metal wire to the first pin and the other metal wire to the second pin through welding points respectively.
Further, the detecting the initial transient capacitance of the defect detection sample before the defect detection sample is subjected to electromagnetic interference by using the defect detection platform includes: measuring initial transient capacitances of the defect detection samples at different detection temperatures in a set time period by using the defect detection platform; the determining the initial defect energy level and initial defect concentration of the defect detection sample based on the initial transient capacitance comprises: drawing a first curve based on initial transient capacitances of the defect detection sample at different detection temperatures within a set period of time; selecting different time rate windows; the time rate window comprises two initial transient capacitance detection time points which are arbitrarily selected in the set time period; based on the first curve, respectively determining capacitance difference values under different detection temperatures in different time rate windows, and determining a second curve of capacitance difference values along with the change of the detection temperatures under the different time rate windows; determining corresponding detection temperature and time constant based on a plurality of extreme points of the second curve; drawing a third curve based on a time constant formula and the corresponding detection temperature and time constant; the initial defect energy level is obtained based on the slope of the third curve, and the initial defect concentration is obtained based on the intercept of the third curve.
Further, the determining the corresponding detection temperature and time constant based on the plurality of extreme points of the second curve includes: determining a detection temperature corresponding to the time rate window based on the plurality of extreme points in the second curve; determining the derivative of the initial transient capacitance to the time constant by utilizing a capacitance formula in different time rate windows, enabling the derivative of the initial transient capacitance to be zero, and determining the time constant corresponding to the time rate window; based on the detected temperature corresponding to the time rate window and the time constant corresponding to the time rate window, a corresponding detected temperature and time constant are determined.
Further, the capacitance formula is specifically: ; wherein, C is the initial transient capacitance, For the intrinsic capacitance value of the defect detection sample,For the defect concentration of the defect detection sample,For defect detection of the doping concentration of the sample,And t is the initial transient capacitance detection time point, which is a time constant.
Further, the time constant formula is specifically: ; wherein, As a function of the time constant,A constant proportional to the quotient of the electron state density effective mass and the electron effective mass in the defect detection sample; is the interception area of the defect, T is the detection temperature, k is the Boltzmann constant, Is the initial defect energy level.
A second aspect of the present invention provides a transistor device defect analysis system, the transistor device defect analysis system comprising: the electromagnetic interference platform is used for carrying out electromagnetic interference on the defect detection sample; wherein the defect detection sample comprises a plurality of transistor devices formed on a substrate, the transistor devices having a metal/oxide/semiconductor stacked structure, the gate of each transistor device being connected to a first pin through a comb-shaped conductive structure, the substrate of the defect detection sample being connected to a second pin; the defect detection platform is used for detecting an initial transient capacitance of the defect detection sample before electromagnetic interference and a damaged transient capacitance after electromagnetic interference; the analysis module is used for determining the initial defect energy level and the initial defect concentration of the defect detection sample based on the initial transient capacitance, and determining the damage defect energy level and the damage defect concentration of the defect detection sample based on the damage transient capacitance; determining the electromagnetic damage degree of the defect detection sample based on the initial defect energy level, the initial defect concentration, the damage defect energy level and the damage defect concentration.
Further, a sum of gate areas of the plurality of transistor devices is greater than the set area.
Further, the defect detection sample is prepared by the following method: providing a substrate and forming a plurality of independent transistor devices on the substrate; forming a comb-shaped conductive structure; the comb-shaped conductive structure is provided with a comb back structure and a plurality of strip-shaped comb tooth structures corresponding to the transistor devices, wherein the strip-shaped comb tooth structures are formed on the gates of the corresponding transistor devices and extend out of the gates of the corresponding transistor devices to be connected with the comb back structure; and forming a first pin and a second pin, communicating the comb back structure with the first pin, and communicating the substrate with the second pin.
Further, the defect detection platform is built by the following method: connecting metal wires on two probes of the transient capacitance measuring device respectively; one of the metal wires is welded to the first pin through a welding point, and the other metal wire is connected to the second pin.
Further, the electromagnetic interference platform is built by the following method: respectively connecting metal wires on two probes of the electromagnetic pulse generating device; and welding one metal wire to the first pin and the other metal wire to the second pin through welding points respectively.
Further, the defect detection platform detects an initial transient capacitance of the defect detection sample before electromagnetic interference is received by the following modes: measuring initial transient capacitances of the defect detection sample at different detection temperatures within a set period of time; the determining the initial defect energy level and initial defect concentration of the defect detection sample based on the initial transient capacitance comprises: drawing a first curve based on initial transient capacitances of the defect detection sample at different detection temperatures within a set period of time; selecting different time rate windows; the time rate window comprises two initial transient capacitance detection time points which are arbitrarily selected in the set time period; based on the first curve, respectively determining capacitance difference values under different detection temperatures in different time rate windows, and determining a second curve of capacitance difference values along with the change of the detection temperatures under the different time rate windows; determining corresponding detection temperature and time constant based on a plurality of extreme points of the second curve; drawing a third curve based on a time constant formula and the corresponding detection temperature and time constant; the initial defect energy level is obtained based on the slope of the third curve, and the initial defect concentration is obtained based on the intercept of the third curve.
Further, the determining the corresponding detection temperature and time constant based on the plurality of extreme points of the second curve includes: determining a detection temperature corresponding to the time rate window based on the plurality of extreme points in the second curve; determining the derivative of the initial transient capacitance to the time constant by utilizing a capacitance formula in different time rate windows, enabling the derivative of the initial transient capacitance to be zero, and determining the time constant corresponding to the time rate window; based on the detected temperature corresponding to the time rate window and the time constant corresponding to the time rate window, a corresponding detected temperature and time constant are determined.
Further, the capacitance formula is specifically: ; wherein, C is the initial transient capacitance, For the intrinsic capacitance value of the defect detection sample,For the defect concentration of the defect detection sample,For defect detection of the doping concentration of the sample,And t is the initial transient capacitance detection time point, which is a time constant.
Further, the time constant formula is specifically: ; wherein, As a function of the time constant,A constant proportional to the quotient of the electron state density effective mass and the electron effective mass in the defect detection sample; is the interception area of the defect, T is the detection temperature, k is the Boltzmann constant, Is the initial defect energy level.
Through the technical scheme provided by the invention, the invention has at least the following technical effects:
The method for analyzing the defects of the transistor device comprises the steps of firstly constructing a defect detection platform, and detecting the initial transient capacitance of a defect detection sample before electromagnetic interference is received by the defect detection platform. The defect detection sample includes a plurality of transistor devices formed on a substrate, the transistor devices having a metal/oxide/semiconductor stacked structure, a gate of each transistor device being connected to a first pin through a comb-shaped conductive structure, the substrate of the defect detection sample being connected to a second pin. And constructing an electromagnetic interference platform, and carrying out electromagnetic interference on the defect detection sample by using the electromagnetic interference platform. And then detecting the damaged transient capacitor of the defect detection sample subjected to electromagnetic interference by the defect detection platform. Determining an initial defect energy level and an initial defect concentration of the defect detection sample based on the initial transient capacitance, determining a damage defect energy level and a damage defect concentration of the defect detection sample based on the damage transient capacitance, and determining an electromagnetic damage degree of the defect detection sample based on the initial defect energy level, the initial defect concentration, the damage defect concentration and the damage defect energy level. The method for analyzing the defects of the transistor device can detect microscopic defects of the transistor device and accurately measure the defect energy level of the transistor device, so that the defect type is judged, the reliability design of the transistor device in an electromagnetic environment is guided, and the method has beneficial effects of modifying the interface state of the device, reinforcing the structure of the device and improving the reliability of the device in the electromagnetic environment.
Additional features and advantages of the invention will be set forth in the detailed description which follows.
Drawings
The accompanying drawings are included to provide a further understanding of embodiments of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain, without limitation, the embodiments of the invention. In the drawings:
FIG. 1 is a flow chart of a method for analyzing defects of a transistor device according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a built defect detection platform in the method for analyzing defects of a transistor device according to an embodiment of the present invention;
Fig. 3 is a schematic diagram of an electromagnetic interference platform in the method for analyzing defects of a transistor device according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a first curve in a method for analyzing defects of a transistor device according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a second curve in the method for analyzing defects of a transistor device according to an embodiment of the present invention;
fig. 6 is a schematic diagram of a third curve in the method for analyzing a defect of a transistor device according to an embodiment of the present invention.
Description of the reference numerals
1-A substrate; a 2-gate; 3-comb-shaped conductive structures; 4-a first pin; 5-a second pin; 301-a bar-shaped comb structure; 302-comb back structure.
Detailed Description
The following describes the detailed implementation of the embodiments of the present invention with reference to the drawings. It should be understood that the detailed description and specific examples, while indicating and illustrating the invention, are not intended to limit the invention.
It should be noted that, without conflict, the embodiments of the present invention and features of the embodiments may be combined with each other.
In the present invention, unless otherwise indicated, terms of orientation such as "upper, lower, top, bottom" are used generally with respect to the orientation shown in the drawings or with respect to the positional relationship of the various components with respect to one another in the vertical, vertical or gravitational directions.
The invention will be described in detail below with reference to the drawings in connection with embodiments.
Referring to fig. 1, a first aspect of an embodiment of the present invention provides a method for analyzing a defect of a transistor device, the method comprising: s101: constructing a defect detection platform, and detecting an initial transient capacitor of a defect detection sample before electromagnetic interference by using the defect detection platform; wherein the defect detection sample comprises a plurality of transistor devices formed on a substrate, the transistor devices having a metal/oxide/semiconductor stacked structure, the gate of each transistor device being connected to a first pin through a comb-shaped conductive structure, the substrate of the defect detection sample being connected to a second pin; s102: setting up an electromagnetic interference platform, and carrying out electromagnetic interference on a defect detection sample by utilizing the electromagnetic interference platform; s103: detecting a damaged transient capacitor of the defect detection sample subjected to electromagnetic interference by using the defect detection platform; s104: determining an initial defect energy level and an initial defect concentration of a defect detection sample based on the initial transient capacitance, and determining a damaged defect energy level and a damaged defect concentration of the defect detection sample based on the damaged transient capacitance; s105: determining the electromagnetic damage degree of the defect detection sample based on the initial defect energy level, the initial defect concentration, the damage defect energy level and the damage defect concentration.
Step S101 is first performed: constructing a defect detection platform, and detecting an initial transient capacitor of a defect detection sample before electromagnetic interference by using the defect detection platform; wherein the defect detection sample comprises a plurality of transistor devices formed on a substrate 1, the transistor devices having a metal/oxide/semiconductor stacked structure, the gate 2 of each transistor device being connected to a first pin 4 through a comb-shaped conductive structure 3, the substrate 1 of the defect detection sample being connected to a second pin 5.
Further, the sum of the areas of the gates 2 of the plurality of transistor devices is larger than the set area.
Further, the defect detection sample is prepared by the following method: providing a substrate 1 and forming a plurality of individual transistor devices on the substrate 1; forming a comb-shaped conductive structure 3; the comb-shaped conductive structure 3 is provided with a comb back structure 302 and a plurality of strip-shaped comb tooth structures 301 corresponding to the transistor devices, wherein the strip-shaped comb tooth structures 301 are formed on the grid electrode 2 of the corresponding transistor device and extend out of the grid electrode 2 of the corresponding transistor device to be connected with the comb back structure 302; a first pin 4 and a second pin 5 are formed, and the back comb structure 302 is communicated with the first pin 4, and the substrate 1 is communicated with the second pin 5.
Further, the constructing a defect detection platform includes: connecting metal wires on two probes of the transient capacitance measuring device respectively; one of the metal wires is soldered to the first pin 4 and the other metal wire is connected to the second pin 5 by soldering points, respectively.
Referring to fig. 2, in particular, in the embodiment of the present invention, a defect detection sample is first prepared, a substrate 1 is provided, a plurality of transistor devices are formed in the substrate 1, and isolation structures (not shown) are formed between the transistor devices to separate the plurality of transistors into mutually independent devices. The transistor device has a metal-oxide-semiconductor stacked structure such as MOS, LDMOS, VDMOS, IGBT devices. Each transistor device comprises a source, a drain and a gate 2. A comb-like conductive structure 3 is then formed on the sample surface, the comb-like conductive structure 3 comprising a comb back structure 302 and a stripe-shaped comb-tooth structure 301, the stripe-shaped comb-tooth structure 301 being formed on the gate 2 of each transistor device and extending beyond the gate 2. The back comb structure 302 connects together a plurality of elongated comb structures 301. Next, the first pin 4 and the second pin 5 are formed, the comb back structure 302 is connected to the first pin 4, and the substrate 1 is connected to the second pin 5, since all transistor devices are fabricated on the substrate 1, i.e. the substrate ends corresponding to the transistor devices are connected in parallel to the second pin 5. The plurality of transistor devices can be connected in parallel by manufacturing the comb-shaped conductive structure 3, so that the transient capacitance of the whole defect detection sample is improved, and the defect detection platform can detect the transient capacitance of the defect detection sample.
The grid electrode is generally made of dielectric materials such as silicon oxide, the lower part of the grid electrode is made of semiconductor silicon, when the metal electrode is connected with the grid electrode and the body region, a metal-insulating layer-semiconductor structure is formed, and then the capacitance of the structure can be equivalent to the series combined effect of the capacitance of a grid oxide layer, the capacitance of an interface state and the capacitance of the body region, and the total capacitance from the grid electrode to the body region is as follows:
Further, in order to be able to detect transient capacitances, it is necessary to ensure that the sum of the areas of the gates 2 of the plurality of transistor devices is larger than a set area, such as 100 μm 2. When the channel length and width of the device are about 1 μm, 100 transistor devices are generally prepared, and if the size of the devices is reduced, the number of the devices is correspondingly increased, so that accurate transient capacitance signals can be measured in the capacitance measurement process.
Then, a defect detection platform is built, metal wires are respectively connected to two probes of the transient capacitance measuring device, one of the metal wires is welded to the first pin 4 through a welding spot, and the other metal wire is connected to the second pin 5. Through the structure, when the temperature changes, the probe of the transient capacitance measuring device expands with heat and contracts with cold, so that the probe is disconnected with a pin in direct contact, the continuity of a detection circuit is ensured, and the transient capacitance can be accurately detected.
Step S102 is then performed: and constructing an electromagnetic interference platform, and carrying out electromagnetic interference on the defect detection sample by using the electromagnetic interference platform.
Further, the building of the electromagnetic interference platform includes: respectively connecting metal wires on two probes of the electromagnetic pulse generating device; one of the metal wires is soldered to the first pin 4 and the other metal wire is connected to the second pin 5 by soldering points, respectively.
As shown in fig. 3, in particular, in the embodiment of the present invention, two probes of the electromagnetic pulse generating device are respectively connected with one metal wire, one of the two metal wires is soldered to the first pin 4 through a solder joint, and the other metal wire is connected to the second pin 5. The TLP pulse signal is output through the electromagnetic pulse generating device, the amplitude, the frequency, the rising edge width and the like of the electromagnetic pulse signal can be tuned according to actual conditions, the source electrode of the defect detection sample is grounded, the analog electromagnetic signal is applied to the grid electrode 2 through external interference, the carrier transport change in a channel is caused, si-H, si-O bonds at the interface caused by abnormal acceleration of the carrier are reduced, and deep energy level defects are formed.
Through the structure, when the temperature changes, the probe of the electromagnetic pulse generating device expands with heat and contracts with cold, so that the probe is disconnected with the pin in direct contact, and the continuity of a detection circuit is ensured.
Step S103 is then performed: and detecting the damaged transient capacitance of the defect detection sample subjected to electromagnetic interference by using the defect detection platform.
Specifically, in the embodiment of the invention, after electromagnetic interference is performed on the defect detection sample by using the electromagnetic pulse generating device, the constructed defect detection platform is used for detecting the damaged transient capacitor of the defect detection sample after the electromagnetic interference is performed. And then determining the electromagnetic damage degree of the defect detection sample according to the initial transient capacitance and the damage transient capacitance.
Step S104 is then performed: and determining an initial defect energy level and an initial defect concentration of the defect detection sample based on the initial transient capacitance, and determining a damaged defect energy level and a damaged defect concentration of the defect detection sample based on the damaged transient capacitance.
Further, the detecting the initial transient capacitance of the defect detection sample before the defect detection sample is subjected to electromagnetic interference by using the defect detection platform includes: measuring initial transient capacitances of the defect detection samples at different detection temperatures in a set time period by using the defect detection platform; the determining the initial defect energy level and initial defect concentration of the defect detection sample based on the initial transient capacitance comprises: drawing a first curve based on initial transient capacitances of the defect detection sample at different detection temperatures within a set period of time; selecting different time rate windows; the time rate window comprises two initial transient capacitance detection time points which are arbitrarily selected in the set time period; based on the first curve, respectively determining capacitance difference values under different detection temperatures in different time rate windows, and determining a second curve of capacitance difference values along with the change of the detection temperatures under the different time rate windows; determining corresponding detection temperature and time constant based on a plurality of extreme points of the second curve; drawing a third curve based on a time constant formula and the corresponding detection temperature and time constant; the initial defect energy level is obtained based on the slope of the third curve, and the initial defect concentration is obtained based on the intercept of the third curve.
Further, the determining the corresponding detection temperature and time constant based on the plurality of extreme points of the second curve includes: determining a detection temperature corresponding to the time rate window based on the plurality of extreme points in the second curve; determining the derivative of the initial transient capacitance to the time constant by utilizing a capacitance formula in different time rate windows, enabling the derivative of the initial transient capacitance to be zero, and determining the time constant corresponding to the time rate window; based on the detected temperature corresponding to the time rate window and the time constant corresponding to the time rate window, a corresponding detected temperature and time constant are determined.
Further, the capacitance formula is specifically: ; wherein, C is the initial transient capacitance, For the intrinsic capacitance value of the defect detection sample,For the defect concentration of the defect detection sample,For defect detection of the doping concentration of the sample,And t is the initial transient capacitance detection time point, which is a time constant.
Further, the time constant formula is specifically: ; wherein, As a function of the time constant,A constant proportional to the quotient of the electron state density effective mass and the electron effective mass in the defect detection sample; is the interception area of the defect, T is the detection temperature, k is the Boltzmann constant, Is the initial defect energy level.
Specifically, in the embodiment of the invention, the time constant corresponding to the defect in the defect detection sample can be obtained according to the Shokroot-Ruider-Hall modelCan be expressed as:
; wherein, As a function of the time constant,A constant proportional to the quotient of the electron state density effective mass and the electron effective mass in the defect detection sample; is the interception area of the defect, T is the detection temperature, k is the Boltzmann constant, Is the initial defect energy level. In the formulaInitial defect energy levelThe interception area of the defect is a numerical value to be solved.
And measuring initial transient capacitances of the defect detection samples at different detection temperatures by using the defect detection platform within a set time period to obtain a first curve. Then, selecting different time rate windows in the first curve, wherein the time rate windows comprise two initial transient capacitance detection time points selected randomly within a set time period, the set time period is the abscissa time length in the graph as shown in fig. 4, the time rate windows are t 1 and t 2 selected randomly within the abscissa, initial transient capacitances corresponding to t 1 and t 2 are extracted at different detection temperatures, and then difference values are obtained to obtain capacitance difference values. Obtaining the capacitance difference under the single time rate windowCurve as a function of the detected temperature T.
Then selecting a second time rate window t 1 'and t 2', extracting initial transient capacitors C corresponding to t 1 'and t 2' at different detection temperatures, and performing difference to obtain a capacitance difference' A plot of capacitance difference over the detected temperature for a single time rate window similar to that of fig. 5 was obtained. According to the method, a plurality of different time rate windows are selected, and capacitance difference values of the time rate windows at different detection temperatures are determined respectively in the different time rate windows. And drawing the curves under the same coordinates to obtain a second curve of capacitance difference along with the change of the detection temperature under different time rate windows.
As can be seen from the graph of fig. 5, the capacitance difference has an extremum at the temperature, and the extremum point is extracted from the second graph to obtain the value of the detected temperature T corresponding to the time rate window.
From the time constant formula, the time constantIs a function of the detected temperature T and is based on a capacitance formulaObtaining=; Wherein, C is the initial transient capacitance,For the intrinsic capacitance value of the defect detection sample,For the defect concentration of the defect detection sample,For defect detection of the doping concentration of the sample,As a function of the time constant,For the capacitance difference, t 1 and t 2 are two initial transient capacitance detection time points arbitrarily selected in the set time period, namely a time rate window.
The slope of the extreme point is zero, the derivative dThe value of/dT is also zero,As a function of T, let d/d=0, Solving to obtain a time constantObtaining a time constant corresponding to the time rate window. Based on the detected temperature T corresponding to the time rate window and the time constant corresponding to the time rate windowObtaining corresponding detection temperature T and time constant
Deforming the time constant formula to obtainThus, it is possible to obtainIs related to the fact that,Is the slope of the slope,Is the intercept. DrawingA corresponding relation curve with kT, and carrying in the corresponding time constant and the detected temperature obtained by the method to calculate the corresponding time constant and the detected temperatureAnd drawing a straight line according to a plurality of points and taking the straight line as a third curve. The slope of the third curve is the initial defect energy levelAs known, the interception area of the defect can be calculated based on the intercept of the third curveFormula using transient capacitanceThe defect concentration N T is calculated as the initial defect concentration. The defect level and defect concentration were also obtained as described above.
Finally, step S105 is executed: determining the electromagnetic damage degree of the defect detection sample based on the initial defect energy level, the initial defect concentration, the damage defect energy level and the damage defect concentration. Comparing the initial defect energy level with the damage defect energy level, and comparing the initial defect concentration with the damage defect concentration, wherein when a new defect energy level or defect concentration increase occurs, the electromagnetic damage degree is enhanced.
Examples
In this embodiment, the electromagnetic damage degree of the NMOS device in the MCU chip is measured. Firstly preparing a defect detection sample, wherein the channel length and the width of an NMOS device are 1 mu m, forming 100 transistor devices in a substrate, forming a strip-shaped comb tooth structure on a grid electrode of each transistor device, and forming a comb back structure by extending the comb tooth structure out of the grid electrode so as to connect a plurality of strip-shaped comb tooth structures. First and second pins having dimensions of 70 μm×70 μm are formed. The first pin is connected with the comb back structure by adopting a conductive connection structure, and the second pin is connected with the substrate end (Bulk) to form a defect detection sample.
The positive electrode and the negative electrode of the transient pulse testing equipment are respectively connected with metal wires with the diameters of about 5 mu m, the metal wires are respectively welded on the first pin and the second pin, the transient capacitance is tested at intervals of 30K within the temperature range of 22K-412K, and 14 groups of temperature-changing transient capacitances are tested.
The ground electrode and the positive electrode of the TLP pulse generator are respectively connected with metal wires with the diameter of about 5 mu m, the metal wires of the ground electrode are welded on the second pins of the defect detection sample, and the metal wires of the positive electrode are welded on the first pins of the defect detection sample. A TLP pulse with the amplitude of 7V and the pulse width of 100ns is applied to the defect detection sample through the positive electrode, so that the gate oxide of the device generates defects and is degraded.
The damaged transient capacitance of the defect detection sample damaged by TLP pulse is detected according to the method, and the transient capacitance is measured at intervals of 30K within the temperature range of 22K-412K, and 14 groups of temperature-changing transient capacitances are tested.
And obtaining 14 groups of temperature-changing transient CV curves according to the tested initial transient capacitance. And selecting 12 groups of different t 1、t2, respectively determining capacitance difference values at different detection temperatures based on the t 1、t2 groups, and determining second curves of the capacitance difference values along with the change of the detection temperatures under different time rate windows. Determining 12 sets of time constants corresponding to different t 1、t2 based on multiple extreme points of the second curveAnd 12 groups of different detection temperatures T corresponding to T 1、t2, thus obtaining 12 groups of the totalT), using 12 sets of data to map outThe curve, since the device is not applied with electromagnetic pulse stress, has fewer defects, and a regular curve cannot be obtained by the method.
14 Sets of temperature change transient CV curves as shown in FIG. 4 were obtained from the tested damaged transient capacitances. Selecting 12 groups of different t 1、t2, respectively based on t 1、t2 of the different groups, determining capacitance difference values at different detection temperatures, and determining second curves of capacitance difference values along with the change of the detection temperature under different time rate windows, wherein fig. 5 only shows one curve of capacitance difference values along with the change of the detection temperature as a schematic diagram. Determining 12 sets of time constants corresponding to different t 1、t2 based on multiple extreme points of the second curveAnd 12 groups of different detection temperatures T corresponding to T 1、t2, thus obtaining 12 groups of the totalT), using 12 sets of data to map the graph shown in fig. 6And calculating the slope and intercept of the curve to obtain the defect energy level of the defect detection sample of 0.059eV and the defect concentration of 4.06 multiplied by 10 10cm-3. The appearance of new defect levels or increases in defect concentration indicate an enhanced degree of electromagnetic damage.
A second aspect of the present invention provides a transistor device defect analysis system, the transistor device defect analysis system comprising: the electromagnetic interference platform is used for carrying out electromagnetic interference on the defect detection sample; wherein the defect detection sample comprises a plurality of transistor devices formed on a substrate, the transistor devices having a metal/oxide/semiconductor stacked structure, the gate of each transistor device being connected to a first pin through a comb-shaped conductive structure, the substrate of the defect detection sample being connected to a second pin; the defect detection platform is used for detecting an initial transient capacitance of the defect detection sample before electromagnetic interference and a damaged transient capacitance after electromagnetic interference; the analysis module is used for determining the initial defect energy level and the initial defect concentration of the defect detection sample based on the initial transient capacitance, and determining the damage defect energy level and the damage defect concentration of the defect detection sample based on the damage transient capacitance; determining the electromagnetic damage degree of the defect detection sample based on the initial defect energy level, the initial defect concentration, the damage defect energy level and the damage defect concentration.
Further, a sum of gate areas of the plurality of transistor devices is greater than the set area.
Further, the defect detection sample is prepared by the following method: providing a substrate and forming a plurality of independent transistor devices on the substrate; forming a comb-shaped conductive structure; the comb-shaped conductive structure is provided with a comb back structure and a plurality of strip-shaped comb tooth structures corresponding to the transistor devices, wherein the strip-shaped comb tooth structures are formed on the gates of the corresponding transistor devices and extend out of the gates of the corresponding transistor devices to be connected with the comb back structure; and forming a first pin and a second pin, communicating the comb back structure with the first pin, and communicating the substrate with the second pin.
Further, the defect detection platform is built by the following method: connecting metal wires on two probes of the transient capacitance measuring device respectively; one of the metal wires is welded to the first pin through a welding point, and the other metal wire is connected to the second pin.
Further, the electromagnetic interference platform is built by the following method: respectively connecting metal wires on two probes of the electromagnetic pulse generating device; and welding one metal wire to the first pin and the other metal wire to the second pin through welding points respectively.
Further, the defect detection platform detects an initial transient capacitance of the defect detection sample before electromagnetic interference is received by the following modes: measuring initial transient capacitances of the defect detection sample at different detection temperatures within a set period of time; the determining the initial defect energy level and initial defect concentration of the defect detection sample based on the initial transient capacitance comprises: drawing a first curve based on initial transient capacitances of the defect detection sample at different detection temperatures within a set period of time; selecting different time rate windows; the time rate window comprises two initial transient capacitance detection time points which are arbitrarily selected in the set time period; based on the first curve, respectively determining capacitance difference values under different detection temperatures in different time rate windows, and determining a second curve of capacitance difference values along with the change of the detection temperatures under the different time rate windows; determining corresponding detection temperature and time constant based on a plurality of extreme points of the second curve; drawing a third curve based on a time constant formula and the corresponding detection temperature and time constant; the initial defect energy level is obtained based on the slope of the third curve, and the initial defect concentration is obtained based on the intercept of the third curve.
Further, the determining the corresponding detection temperature and time constant based on the plurality of extreme points of the second curve includes: determining a detection temperature corresponding to the time rate window based on the plurality of extreme points in the second curve; determining the derivative of the initial transient capacitance to the time constant by utilizing a capacitance formula in different time rate windows, enabling the derivative of the initial transient capacitance to be zero, and determining the time constant corresponding to the time rate window; based on the detected temperature corresponding to the time rate window and the time constant corresponding to the time rate window, a corresponding detected temperature and time constant are determined.
Further, the capacitance formula is specifically: ; wherein, C is the initial transient capacitance, For the intrinsic capacitance value of the defect detection sample,For the defect concentration of the defect detection sample,For defect detection of the doping concentration of the sample,And t is the initial transient capacitance detection time point, which is a time constant.
Further, the time constant formula is specifically: ; wherein, As a function of the time constant,A constant proportional to the quotient of the electron state density effective mass and the electron effective mass in the defect detection sample; is the interception area of the defect, T is the detection temperature, k is the Boltzmann constant, Is the initial defect energy level.
The preferred embodiments of the present invention have been described in detail above with reference to the accompanying drawings, but the present invention is not limited to the specific details of the above embodiments, and various simple modifications can be made to the technical solution of the present invention within the scope of the technical concept of the present invention, and all the simple modifications belong to the protection scope of the present invention.
In addition, the specific features described in the above embodiments may be combined in any suitable manner, and in order to avoid unnecessary repetition, various possible combinations are not described further.
Moreover, any combination of the various embodiments of the invention can be made without departing from the spirit of the invention, which should also be considered as disclosed herein.

Claims (16)

1. A method for analyzing a defect of a transistor device, the method comprising:
Constructing a defect detection platform, and detecting an initial transient capacitor of a defect detection sample before electromagnetic interference by using the defect detection platform; wherein the defect detection sample comprises a plurality of transistor devices formed on a substrate, the transistor devices having a metal/oxide/semiconductor stacked structure, the gate of each transistor device being connected to a first pin through a comb-shaped conductive structure, the substrate of the defect detection sample being connected to a second pin; the detecting the initial transient capacitance of the defect detection sample before electromagnetic interference is applied by the defect detection platform comprises the following steps: measuring initial transient capacitances of the defect detection samples at different detection temperatures in a set time period by using the defect detection platform;
setting up an electromagnetic interference platform, and carrying out electromagnetic interference on a defect detection sample by utilizing the electromagnetic interference platform;
detecting a damaged transient capacitor of the defect detection sample subjected to electromagnetic interference by using the defect detection platform;
Determining an initial defect energy level and an initial defect concentration of a defect detection sample based on the initial transient capacitance, and determining a damaged defect energy level and a damaged defect concentration of the defect detection sample based on the damaged transient capacitance; wherein the determining the initial defect energy level and initial defect concentration of the defect detection sample based on the initial transient capacitance comprises: drawing a first curve based on initial transient capacitances of the defect detection sample at different detection temperatures within a set period of time; selecting different time rate windows; the time rate window comprises two initial transient capacitance detection time points which are arbitrarily selected in the set time period; based on the first curve, respectively determining capacitance difference values under different detection temperatures in different time rate windows, and determining a second curve of capacitance difference values along with the change of the detection temperatures under the different time rate windows; determining corresponding detection temperature and time constant based on a plurality of extreme points of the second curve; drawing a third curve based on a time constant formula and the corresponding detection temperature and time constant; obtaining an initial defect energy level based on the slope of the third curve, and obtaining an initial defect concentration based on the intercept of the third curve; the method for obtaining the damaged defect energy level is the same as the method for obtaining the initial defect energy level, and the method for obtaining the damaged defect concentration is the same as the method for obtaining the initial defect concentration;
determining the electromagnetic damage degree of the defect detection sample based on the initial defect energy level, the initial defect concentration, the damage defect energy level and the damage defect concentration.
2. The method of claim 1, wherein a sum of gate areas of the plurality of transistor devices is greater than a set area.
3. The method for analyzing defects of a transistor device according to claim 1, wherein the defect detection sample is prepared by:
Providing a substrate and forming a plurality of independent transistor devices on the substrate;
Forming a comb-shaped conductive structure; the comb-shaped conductive structure is provided with a comb back structure and a plurality of strip-shaped comb tooth structures corresponding to the transistor devices, wherein the strip-shaped comb tooth structures are formed on the gates of the corresponding transistor devices and extend out of the gates of the corresponding transistor devices to be connected with the comb back structure;
And forming a first pin and a second pin, communicating the comb back structure with the first pin, and communicating the substrate with the second pin.
4. The method for analyzing defects of a transistor device according to claim 1, wherein the constructing a defect detection platform comprises:
connecting metal wires on two probes of the transient capacitance measuring device respectively;
one of the metal wires is welded to the first pin through a welding point, and the other metal wire is connected to the second pin.
5. The method for analyzing defects of a transistor device according to claim 1, wherein the constructing an electromagnetic interference platform comprises:
Respectively connecting metal wires on two probes of the electromagnetic pulse generating device;
And welding one metal wire to the first pin and the other metal wire to the second pin through welding points respectively.
6. The method of claim 1, wherein determining the corresponding detection temperature and time constant based on the plurality of extreme points of the second curve comprises:
determining a detection temperature corresponding to the time rate window based on the plurality of extreme points in the second curve;
determining the derivative of the initial transient capacitance to the time constant by utilizing a capacitance formula in different time rate windows, enabling the derivative of the initial transient capacitance to be zero, and determining the time constant corresponding to the time rate window;
Based on the detected temperature corresponding to the time rate window and the time constant corresponding to the time rate window, a corresponding detected temperature and time constant are determined.
7. The method of claim 6, wherein the capacitance formula is specifically:
wherein, C is the initial transient capacitance, For the intrinsic capacitance value of the defect detection sample,For the defect concentration of the defect detection sample,For defect detection of the doping concentration of the sample,And t is the initial transient capacitance detection time point, which is a time constant.
8. The method for analyzing defects of a transistor device according to claim 1, wherein the time constant formula is specifically:
Wherein, As a function of the time constant,A constant proportional to the quotient of the electron state density effective mass and the electron effective mass in the defect detection sample; is the interception area of the defect, T is the detection temperature, k is the Boltzmann constant, Is the initial defect energy level.
9. A transistor device defect analysis system, the transistor device defect analysis system comprising:
The electromagnetic interference platform is used for carrying out electromagnetic interference on the defect detection sample; wherein the defect detection sample comprises a plurality of transistor devices formed on a substrate, the transistor devices having a metal/oxide/semiconductor stacked structure, the gate of each transistor device being connected to a first pin through a comb-shaped conductive structure, the substrate of the defect detection sample being connected to a second pin;
the defect detection platform is used for detecting an initial transient capacitance of the defect detection sample before electromagnetic interference and a damaged transient capacitance after electromagnetic interference;
The analysis module is used for determining the initial defect energy level and the initial defect concentration of the defect detection sample based on the initial transient capacitance, and determining the damage defect energy level and the damage defect concentration of the defect detection sample based on the damage transient capacitance; wherein the determining the initial defect energy level and initial defect concentration of the defect detection sample based on the initial transient capacitance comprises: drawing a first curve based on initial transient capacitances of the defect detection sample at different detection temperatures within a set period of time; selecting different time rate windows; the time rate window comprises two initial transient capacitance detection time points which are arbitrarily selected in the set time period; based on the first curve, respectively determining capacitance difference values under different detection temperatures in different time rate windows, and determining a second curve of capacitance difference values along with the change of the detection temperatures under the different time rate windows; determining corresponding detection temperature and time constant based on a plurality of extreme points of the second curve; drawing a third curve based on a time constant formula and the corresponding detection temperature and time constant; obtaining an initial defect energy level based on the slope of the third curve, and obtaining an initial defect concentration based on the intercept of the third curve; the method for obtaining the damaged defect energy level is the same as the method for obtaining the initial defect energy level, and the method for obtaining the damaged defect concentration is the same as the method for obtaining the initial defect concentration; determining the electromagnetic damage degree of the defect detection sample based on the initial defect energy level, the initial defect concentration, the damage defect energy level and the damage defect concentration.
10. The transistor device defect analysis system of claim 9, wherein a sum of gate areas of the plurality of transistor devices is greater than a set area.
11. The transistor device defect analysis system of claim 9, wherein the defect detection sample is prepared by:
Providing a substrate and forming a plurality of independent transistor devices on the substrate;
Forming a comb-shaped conductive structure; the comb-shaped conductive structure is provided with a comb back structure and a plurality of strip-shaped comb tooth structures corresponding to the transistor devices, wherein the strip-shaped comb tooth structures are formed on the gates of the corresponding transistor devices and extend out of the gates of the corresponding transistor devices to be connected with the comb back structure;
And forming a first pin and a second pin, communicating the comb back structure with the first pin, and communicating the substrate with the second pin.
12. The transistor device defect analysis system of claim 9, wherein the defect detection platform is built by:
connecting metal wires on two probes of the transient capacitance measuring device respectively;
one of the metal wires is welded to the first pin through a welding point, and the other metal wire is connected to the second pin.
13. The transistor device defect analysis system of claim 9, wherein the electromagnetic interference platform is built by:
Respectively connecting metal wires on two probes of the electromagnetic pulse generating device;
And welding one metal wire to the first pin and the other metal wire to the second pin through welding points respectively.
14. The transistor device defect analysis system of claim 9, wherein the determining the corresponding detection temperature and time constant based on the plurality of extreme points of the second curve comprises:
determining a detection temperature corresponding to the time rate window based on the plurality of extreme points in the second curve;
determining the derivative of the initial transient capacitance to the time constant by utilizing a capacitance formula in different time rate windows, enabling the derivative of the initial transient capacitance to be zero, and determining the time constant corresponding to the time rate window;
Based on the detected temperature corresponding to the time rate window and the time constant corresponding to the time rate window, a corresponding detected temperature and time constant are determined.
15. The transistor device defect analysis system of claim 14, wherein the capacitance formula is specifically:
wherein, C is the initial transient capacitance, For the intrinsic capacitance value of the defect detection sample,For the defect concentration of the defect detection sample,For defect detection of the doping concentration of the sample,And t is the initial transient capacitance detection time point, which is a time constant.
16. The transistor device defect analysis system of claim 9, wherein the time constant formula is specifically:
Wherein, As a function of the time constant,A constant proportional to the quotient of the electron state density effective mass and the electron effective mass in the defect detection sample; is the interception area of the defect, T is the detection temperature, k is the Boltzmann constant, Is the initial defect energy level.
CN202410420863.8A 2024-04-09 Method and system for analyzing defects of transistor device Active CN118011175B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202410420863.8A CN118011175B (en) 2024-04-09 Method and system for analyzing defects of transistor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202410420863.8A CN118011175B (en) 2024-04-09 Method and system for analyzing defects of transistor device

Publications (2)

Publication Number Publication Date
CN118011175A CN118011175A (en) 2024-05-10
CN118011175B true CN118011175B (en) 2024-06-28

Family

ID=

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Design and manufacture of hardware and software platform of universal measurement complex for research of deep level defects in semiconductors;Serhii Tyshchenko 等;《2016 II International Young Scientists Forum on Applied Physics and Engineering》;20161231;第81-84页 *
中关村天合宽禁带半导体技术创新联盟.《碳化硅外延层深能级缺陷的测试 瞬态电容法》.2024,第1-7页. *

Similar Documents

Publication Publication Date Title
CN102522386B (en) Gate-oxidizing-layer interface-trap density-testing structure and testing method
US9255960B2 (en) Testing structure and method for interface trap density of gate oxide
CN103941172B (en) Semiconductor test apparatus and method of testing
US20080076196A1 (en) TEG system for acquiring FET capacity and method of capacity acquisition
CN103941171B (en) Semiconductor test structure and test method
CN103033728B (en) Time dependent dielectric breakdown test circuit and method of testing
CN103367193B (en) The method of testing of gate oxide trap density and position and device
CN103576066B (en) Method for measuring service life of hot carrier of semiconductor device
CN102680875B (en) Method for isolating two reliability effects from SOI (silicon-on-insulator) PMOSFET (P-type metal-oxide-semiconductor field effect transistor) causing threshold value voltage shift
CN118011175B (en) Method and system for analyzing defects of transistor device
US6885214B1 (en) Method for measuring capacitance-voltage curves for transistors
CN105895548A (en) Grid modulation generation current based method for extracting substrate doping concentration of metal-oxide-semiconductor field-effect transistor (MOSFET)
CN109309079A (en) Semi-conductor test structure, manufacturing method and Square resistance measurement method
CN118011175A (en) Method and system for analyzing defects of transistor device
CN104716065B (en) Capacitance-voltage characteristic correction method for metal oxide semiconductor field-effect transistor
US7521946B1 (en) Electrical measurements on semiconductors using corona and microwave techniques
CN102645586B (en) Glass base plate, through hole resistance measuring method and metal wire resistance measuring method
CN108257941A (en) The test structure and test method of semiconductor devices
JP4815861B2 (en) Evaluation method for evaluating positional relationship between PN junction surface of semiconductor device and bottom of trench
US20150102831A1 (en) Method of inspecting a semiconductor device and probing assembly for use therein
US4942357A (en) Method of testing a charge-coupled device
CN103367330A (en) Testing structure of power semiconductor device and manufacture method of testing structure
EP2851696A1 (en) Method for the extraction of recombination characteristics at metallized semiconductor surfaces
CN104425303A (en) Method for measuring thickness of conductive layer
CN103176116B (en) A kind of semiconductor device testing apparatus and method of testing thereof

Legal Events

Date Code Title Description
PB01 Publication
SE01 Entry into force of request for substantive examination
GR01 Patent grant