CN104347594B - Silicon through hole test structure, silicon through hole test method and silicon through hole formation method - Google Patents
Silicon through hole test structure, silicon through hole test method and silicon through hole formation method Download PDFInfo
- Publication number
- CN104347594B CN104347594B CN201310315324.XA CN201310315324A CN104347594B CN 104347594 B CN104347594 B CN 104347594B CN 201310315324 A CN201310315324 A CN 201310315324A CN 104347594 B CN104347594 B CN 104347594B
- Authority
- CN
- China
- Prior art keywords
- test
- conductive pole
- test plug
- metal layer
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The invention relates to a silicon through hole test structure, a silicon through hole test method and a silicon through hole formation method. The silicon through hole test structure comprises a first metal layer, a second medium layer, a second metal layer and a third metal layer, wherein the first metal layer comprises a first portion arranged on at least a part of an upper surface of a conductive column and a second portion arranged on a part of an upper surface of a first medium layer, the upper surface of the first portion and the upper surface of the conductive column at the corresponding position are consistent in appearance, the second medium layer is arranged on the first medium layer and the first metal layer, a test plug is arranged on the first portion and penetrates through the second medium layer, a contrast plug is arranged on the second portion and penetrates through the second medium layer, the second metal layer is arranged on the upper surface of the test plug and on a part of the upper surface of the second medium layer, the third metal layer is arranged on the upper surface of the contrast plug and on a part of the upper surface of the second medium layer, and the third metal layer and the second metal layer realize insulation. The silicon through hole test structure can test whether the conductive column has surface defects.
Description
Technical field
The present invention relates to semiconductor applications, particularly to a kind of silicon hole test structure and its method of testing and formation side
Method.
Background technology
Constantly develop with semiconductor technology, the characteristic size of current semiconductor devices become very little it is desirable to
Two dimension encapsulating structure in increase semiconductor devices quantity become more and more difficult, therefore three-dimension packaging become one kind can be effective
The method improving chip integration.Current three-dimension packaging include chip-stacked (Die Stacking) based on wire bonding,
Encapsulation stacking (Package Stacking) and three-dimensional stacked based on silicon hole (Through Silicon Via, TSV).Base
Three-dimensional stacked technology in silicon hole has three below advantage：(1) High Density Integration；(2) significantly shorten the length of electrical interconnection
Degree, such that it is able to solve the problems such as occur in the signal delay in two-dimentional system level chip (SOC) technology well；(3) utilize
Silicon hole technology, can be the chip with difference in functionality（As radio frequency, internal memory, logic, MEMS etc.）Integrate to realize
Encapsulate the multi-functional of chip.Therefore, the described three-dimensional stacked technology using silicon through hole interconnection structure is increasingly becoming one kind and more flows
The chip encapsulation technology of row.
The process forming silicon hole generally includes formation through hole in a silicon substrate；Form insulating barrier in described through-hole surfaces；
With the full remaining described through hole of conductive material filling to form conductive pole.Typically require to formed after silicon hole carry out chip permit
Acceptance Tests（Wafer Acceptance Test, WAT）.
Existing WAT is generally used for testing：Whether the depth of silicon hole is qualified, and whether thickness is uniform for insulating barrier, conductive pole
Resistance sizes whether meet between requirement, and conductive material and silicon substrate with the presence or absence of drain conditions etc..But, existing
WAT does not test to the surface condition of conductive pole.Yet with technological problemses and the reason such as expand with heat and contract with cold, conductive pole occurs
Surface defect, and once described conductive pole has surface defect it is possible to lead to conductive pole to contact not with corresponding conductive structure
Good, thus causing chip reliability problem.Therefore, how to carry out test to the surface condition of conductive pole in silicon hole is current silicon
One of problems faced in through hole test.
Content of the invention
The problem that the present invention solves is to provide a kind of silicon hole test structure and its method of testing and forming method, and it is right to realize
The surface condition of conductive pole is tested, so as to when surface defect in conductive pole, being adjusted to technique in time, keeps away
Exempting from the generation again of conductive pole surface defect, thus avoiding described conductive pole and corresponding conductive structure loose contact, finally carrying
High chip reliability.
For solving the above problems, the present invention provides a kind of silicon hole test structure, for testing conductive pole in silicon hole
Surface condition, described conductive pole is located in silicon substrate, and described silicon substrate upper surface has first medium layer, described first medium layer
Expose described conductive pole upper surface, described silicon hole test structure includes：
The first metal layer, including being located at least partly Part I of described conductive pole upper surface and be located at partly described the
The described conductive pole upper surface topography one of the Part II of one dielectric layer upper surface, described Part I upper surface and correspondence position
Cause；
Second dielectric layer, on described first medium layer and described the first metal layer；
Test plug is located on Part I and runs through described second dielectric layer；
Contrast connector is located on Part II and runs through described second dielectric layer；
Second metal layer, positioned at described test plug upper surface and partly described second dielectric layer upper surface；
3rd metal level, positioned at described contrast connector upper surface and partly described second dielectric layer upper surface, and with described
Second metal layer insulate.
Optionally, described test plug be located at described Part I center on, described contrast connector material with
The material of described test plug is identical, and the diameter of described contrast connector is identical with the diameter of described test plug.
Optionally, described test plug is multiple, and multiple described test plugs are evenly distributed on described Part I periphery
On；The number of described contrast connector is identical with the number of described test plug, and the distribution shape of multiple described contrast connector
Identical with the distribution shape of multiple described test plugs.
Optionally, the number of described test plug is more than or equal to 5.
Optionally, described test plug is multiple, and the number of the number of described Part I and described second metal layer is equal
Equal to the number of described test plug, described Part I mutually insulated, described second metal layer mutually insulated.
Optionally, the diameter range of described conductive pole is 5 μm～50 μm；The diameter range of described test plug is 0.15 μm
～2 μm；The diameter range of described contrast connector is 0.15 μm～2 μm.
Optionally, the material of described the first metal layer includes one or more of copper, tungsten, silver, gold, titanium, tantalum and aluminium
Any combination；The material of described second metal layer includes any group of one or more of copper, tungsten, silver, gold, titanium, tantalum and aluminium
Close；The material of described first medium layer includes silica；The material of described second dielectric layer includes silica.
Optionally, the thickness range of described the first metal layer is 1000 angstroms～5000 angstroms；The thickness of described second metal layer
Scope is 1000 angstroms～5000 angstroms；The thickness range of described first medium layer is 3000 angstroms～50000 angstroms；Described second dielectric layer
Thickness range be 3000 angstroms～50000 angstroms.
For solving the above problems, present invention also offers a kind of method of testing of silicon hole test structure, described silicon hole
Test structure is silicon hole test structure as above, and described method of testing includes：
By to applied voltage or electric current between described Part I and described second metal layer, and measure corresponding electric current
Or voltage, obtain the resistance of described test plug, and the cross-sectional area according to described test plug and resistivity, obtain described survey
The length of examination connector；
By to applied voltage or electric current between described Part II and described 3rd metal level, and measure corresponding electric current
Or voltage, obtain the resistance of described contrast connector, and the cross-sectional area according to described contrast connector and resistivity, it is described right to obtain
Length than connector；
When the equal length of length and the described contrast connector of described test plug, the upper surface of described silicon hole and institute
State the upper surface flush of first medium layer；Otherwise, there is surface defect in described conductive pole.
Optionally, when the length of described test plug is more than the length of described contrast connector, there is table in described conductive pole
Face depression or surface gap；When the length of described test plug is less than the length of described contrast connector, described conductive pole exists
Rat.
For solving the above problems, present invention also offers a kind of forming method of silicon hole test structure, described silicon hole
Test structure is located in silicon hole, and the conductive pole of described silicon hole is located in silicon substrate, and described silicon substrate upper surface has first
Dielectric layer, described first medium layer exposes described conductive pole upper surface, and described forming method includes：
Form the first metal layer, institute at least partly described conductive pole upper surface and partly described first medium layer upper surface
State the first metal layer and include Part I positioned at described conductive pole upper surface and be located at described first medium layer upper surface the
Two parts, described Part I upper surface is consistent with the described conductive pole upper surface topography of correspondence position；
Form second dielectric layer in described first medium layer and described the first metal layer, and shape on described Part I
Become run through described second dielectric layer test plug and on described Part II formed run through the right of described second dielectric layer
Compare connector；
Form second metal layer in described test plug upper surface and partly described second dielectric layer upper surface, and described
Contrast connector upper surface and partly described second dielectric layer upper surface form the 3rd metal level, described 3rd metal level and described the
Two metal level insulation.
Optionally, described test plug and described contrast connector are formed using same technique, institute is formed using same technique
State second metal layer and described 3rd metal level.
Compared with prior art, technical scheme has advantages below：
Silicon hole test structure provided by the present invention includes the first metal layer, second dielectric layer, test plug, contrasts and insert
Plug, second metal layer and the 3rd metal level；Described the first metal layer includes being located at the of at least partly described conductive pole upper surface
A part and the Part II being located at partly described first medium layer upper surface, described Part I upper surface and correspondence position
Described conductive pole upper surface topography is consistent；Described second dielectric layer is located on described first medium layer and described the first metal layer；
Described test plug is located on Part I and runs through described second dielectric layer；Described contrast connector is located on described Part II
And run through described second dielectric layer, and described contrast connector upper surface and described test plug upper surface flush；Described second
Metal level is located at described test plug upper surface and partly described second dielectric layer upper surface；Described 3rd metal level is located at described
Contrast connector upper surface and partly described second dielectric layer upper surface, and described 3rd metal level is exhausted with described second metal layer
Edge.In silicon hole test structure provided by the present invention, described contrast connector upper surface and described test plug upper surface flush,
Described test plug is located on described Part I, and described contrast connector is located on described Part II, therefore only needs to measure
The length of the length of described test plug and described contrast connector whether equal it is possible to learn described Part I upper surface and
Whether described Part II upper surface flushes；And described Part I is located at least partly described conductive pole upper surface and described
Part I upper surface is consistent with the described conductive pole upper surface topography of correspondence position, described Part II upper surface also with described
First medium layer upper surface topography is consistent, therefore, learns whether are described Part I upper surface and described Part II upper surface
Flush so that it may know whether described conductive pole upper surface is flushed with described first medium layer upper surface, that is, understand described conductive pole
With the presence or absence of surface defect, silicon hole test structure therefore provided by the present invention can test out described conductive pole and whether there is
Surface defect.Whether there is surface defect due to described conductive pole can be tested, thus just can in time technique be adjusted,
Thus avoiding the generation of conductive pole surface defect, and then avoid described conductive pole and corresponding conductive structure loose contact, finally
Improve chip reliability.
Further, multiple described test plugs and described contrast connector are set, and so that multiple described tests is uniformly distributed
In Part I neighboring area, more fully surface gap can be whether there is in testing conductive post upper surface.
In the method for testing of silicon hole test structure provided by the present invention, it is located at described first using described test plug
Partly go up, described second metal layer connects described test plug upper surface, by between the first metal layer and second metal layer
Galvanization or making alive, the voltage at test plug two ends or electric current described in re-test, and described test is obtained according to Ohm's law
The resistance of connector, further according to the diameter of resistivity law and described test plug, obtains the length of described test plug, equally
Principle can obtain the length of described contrast connector, and obtain the length of described test plug and the length of described contrast connector
Degree is it is possible to learn whether described conductive pole upper surface is flushed with described first medium layer upper surface, that is, learns described conduction
Post whether there is surface defect.
The forming method of silicon hole test structure provided by the present invention is at least partly described conductive pole upper surface and portion
Point described first medium layer upper surface forms the first metal layer, and the described the first metal layer positioned at described conductive pole upper surface is the
A part, the described the first metal layer positioned at described first medium layer upper surface is Part II, described Part I upper surface
Consistent with the described conductive pole upper surface topography of correspondence position；Test plug is formed on described Part I；Described second
It is contrasted connector on partly；Formation second dielectric layer on described first medium layer and described the first metal layer, described second
Dielectric layer exposes described test plug upper surface and described contrast connector upper surface；In described test plug upper surface and part institute
State second dielectric layer upper surface and form described second metal layer；In described contrast connector upper surface and partly described second dielectric layer
Upper surface forms the 3rd metal level with described second metal layer insulation, ultimately forms silicon hole test knot provided by the present invention
Structure, the silicon hole test structure that described forming method is formed can operate with testing conductive post upper surface and whether there is surface defect,
There is process is simple, the advantage of low manufacture cost.
Brief description
Fig. 1 to Fig. 3 is conductive pole different types of surface defect schematic diagram；
Fig. 4 to Fig. 5 is the embodiment of the present invention one silicon hole test structure schematic diagram；
Fig. 6 to Fig. 7 is the embodiment of the present invention two silicon hole test structure schematic diagram；
Fig. 8 to Fig. 9 is the forming method schematic diagram of the embodiment of the present invention five silicon hole test structure.
Specific embodiment
As described in background, silicon hole because technological problemses and and the reason such as expand with heat and contract with cold surface defect occurs.Fig. 1
It is conductive pole different types of surface defect schematic diagram to Fig. 3.As shown in Figure 1 to Figure 3, silicon hole 110 includes conductive pole 111 He
Insulating barrier 112, silicon hole 110 is located in silicon substrate 100, and silicon substrate 100 is covered by first medium layer 120, first medium layer 120
Upper surface typically flushes.Described surface defect particularly may be divided into three types, surface defect such as Fig. 1 of the first type
Rat that is shown, expanding and lead to because of conductive pole 111（protrusion）111a, now conductive pole 111 upper surface exceed
First medium layer 120 upper surface certain altitude；The surface defect of second type is as shown in Fig. 2 described conductive pole 111 is because shrinking
And the surface indentation leading to（dishing）111b, now conductive pole 111 upper surface is certain less than first medium layer 120 upper surface
Highly；The surface defect of the third type is as shown in figure 3, because the reasons such as technological problemses cause conductive pole 111 upper surface periphery to break
The surface gap damaged and produce（pit）111c, usual surface gap 111c is easily formed at conductive pole 111 peripheral position.Further
, the defect of the third type can also be combined with the defect of the defect of the first type or second type.As Tab phenolphthaleinum
There is surface indentation 111b or surface gap 111c in electric post 111, then conductive pole 111 is likely to the conductive knot with accordingly other
Structure loose contact, thus cause chip reliability problem.
It should be noted that the surface defect of silicon hole 110 generally only refers to the surface defect of conductive pole 111, this is because：
Insulating barrier 112 upper surface area between silicon substrate 100 and conductive pole 111 is minimum, there is usually no surface defect, and
The material of insulating barrier 112 is generally identical with the material of first medium layer 120, even if therefore insulating barrier 112 has fine surface
Defect, nor affects on the property of silicon hole 110.
The present invention provides a kind of silicon hole test structure, and the first metal layer in described silicon hole test structure includes being located at
The Part I of conductive pole upper surface and the Part II being located at first medium layer upper surface, described Part I has test
Connector, described Part II is had contrast connector, is connected with test plug with second metal layer simultaneously, with the 3rd metal level even
Connect contrast connector, described silicon hole test structure pass through to test the length of test plug and contrast connector length understand described
Conductive pole whether there is surface defect, therefore can in time technique be adjusted, it is to avoid the generation of conductive pole surface defect, from
And avoid described conductive pole and accordingly other conductive structure loose contacts, finally improve chip reliability.
Understandable for enabling the above objects, features and advantages of the present invention to become apparent from, below in conjunction with the accompanying drawings to the present invention
Specific embodiment be described in detail.
The present embodiment one provides a kind of silicon hole test structure, and described silicon hole test structure can be used in testing silicon hole
Middle conductive pole whether there is surface defect.
Refer to Fig. 4, the present embodiment provides three silicon holes in silicon substrate 200 first, and by described silicon hole
Test structure is produced on above silicon substrate 200 and described three silicon holes.
Described three silicon holes are to should have three conductive poles, respectively conductive pole 210A, conductive pole 210B and conductive pole
210C.In the present embodiment, the diameter range of conductive pole 210A, conductive pole 210B and conductive pole 210C is 5 μm～50 μm.For just
In the comparison of test result, the present embodiment arranges the equal diameters of each conductive pole.
Silicon substrate 200 upper surface has first medium layer 220.First medium layer 220 exposes conductive pole 210A upper table simultaneously
Face, conductive pole 210B upper surface and conductive pole 210C upper surface.First medium layer 220 is produced on silicon substrate 200 for protection
Each semiconductor devices.The material of first medium layer 220 can be silica, its thickness range can for 3000 angstroms～
50000 angstroms.It should be noted that for more clearly showing each conductive pole, Fig. 4 does not show between each conductive pole and silicon substrate 200
Insulating barrier.
In order to the different surfaces situation of conductive pole is described in the lump, three silicon holes of setting are located at silicon substrate to the present embodiment simultaneously
In 200, as shown in Figure 4.But during practice, the number of silicon hole, position and diameter can be needed as actual
Ask and be configured, such as one described silicon hole test structure is provided separately within above a silicon hole.
Please continue to refer to Fig. 4, the silicon hole test structure that the present embodiment is provided includes the first metal layer 230, second and is situated between
Matter layer 240, test plug 250A, test plug 250B, test plug 250C, contrast connector 260, second metal layer 270A, the
Two metal level 270B, second metal layer 270C and the 3rd metal level 280.
The first metal layer 230 includes the Part I 231A on conductive pole 210A, on conductive pole 210B
A part of 231B, the Part I 231C on conductive pole 210C, and Part I 231A upper surface and conductive pole 210A
Upper surface topography is consistent, and Part I 231B upper surface is consistent with conductive pole 210B upper surface topography, Part I 231C upper table
Face is consistent with conductive pole 210C upper surface topography.The first metal layer 230 also includes second positioned at first medium layer 220 upper surface
Part 232, first medium layer 220 upper surface and Part II 232 upper surface also consistent appearance, and on first medium layer 220
Surface flushes, and Part II 232 upper surface also flushes.
The material of the first metal layer 230 can include any of one or more of copper, tungsten, silver, gold, titanium, tantalum and aluminium
Combination, its thickness range is 1000 angstroms～5000 angstroms, can pass through physical vapour deposition (PVD)（Physical Vapor Deposition,
PVD）Method, chemical vapor deposition（Chemical Vapor Deposition, CVD）Method or ald（Atomic
Layer Deposition, ALD）Method forms the first metal layer 230.
It should be noted that in the present embodiment, Part II 232 is located at whole first medium layer 220 upper surface, but,
In other embodiments of the invention, Part II 232 can also be only located at part first medium layer 220 upper surface, for example may be used
The Part II 232 being located between Part I 231A, Part I 231B and Part I 231C shown in Fig. 4 is removed, and
Only retain the Part II 232 being located at test plug 260 lower section.
Second dielectric layer 240 covers the first metal layer 230, and the upper surface flush of second dielectric layer 240.Second medium
Layer 240 1 aspect can protect the first metal layer 230 and each test plug being subsequently formed and contrast connector 260, the opposing party
Face can make to keep mutually insulated between the first metal layer 230 and each test plug being subsequently formed and contrast connector.
The material of second dielectric layer 240 can be silica, and its thickness range can be 3000 angstroms～50000 angstroms.
It is upper and run through second dielectric layer 240 that test plug 250A is located at Part I 231A, and test plug 250B is positioned at the
On a part of 231B and run through second dielectric layer 240, test plug 250C is located on Part I 231C and runs through second medium
Layer 240.Contrast connector 260 be located at Part II 232 on and run through second dielectric layer 240, that is, second dielectric layer 240 expose right
Ratio connector 260 upper surface, and contrast connector 260 upper surface and each test plug upper surface flush.
The diameter range of test plug 250A, test plug 250B and test plug 250C is 0.15 μm～2 μm, and contrast is inserted
The diameter range of plug 260 is 0.15 μm～2 μm.In the present embodiment, the material of each test plug all can for copper, tungsten, silver, gold,
Any combination of one or more of titanium, tantalum and aluminium.In the present embodiment, the material arranging each test plug is identical with diameter,
And it is identical with the material of each test plug and diameter with diameter to arrange the material of contrast connector 260.Through above-mentioned material and diameter
Setting, contrast connector 260 has many something in common with each test plug, facilitates described silicon hole test structure to be tested
Afterwards, using single visual data, test result is contrasted, and in manufacturing process, same technique shape simultaneously can be used
In contrast with connector 260 and each test plug, thus saving corresponding processing step, reduce process costs.
Second metal layer 270A is located at test plug 250A and part second dielectric layer 240 upper surface, second metal layer
270B is located at test plug 250B and part second dielectric layer 240 upper surface, and second metal layer 270B is located at test plug 250B
With part second dielectric layer 240 upper surface, each second metal layer mutually insulated.3rd metal level 280 is located on contrast connector 260
Surface and part second dielectric layer 240 upper surface, and the 3rd metal level 280 and each second metal layer insulation.
Second metal layer 270A, second metal layer 270B, the material of second metal layer 270C can include copper, tungsten, silver,
Any combination of one or more of gold, titanium, tantalum and aluminium.The material of the 3rd metal level can include copper, tungsten, silver, gold, titanium,
Any combination of one or more of tantalum and aluminium.
Refer to Fig. 5, the top view of the silicon hole test structure that Fig. 5 is provided by the present embodiment, structure shown in Fig. 4 is figure
Structure shown in 5 cuts, along A-A chain-dotted line, the cut-away view obtaining open.For can show that below described silicon hole test structure
Each conductive pole, Fig. 5 dotted line represents each conductive pole, each test plug and contrast connector 260.Understand in conjunction with Fig. 4 and Fig. 5, this reality
Apply a test plug 250A to be located on Part I 231A center, test plug 250B is located at Part I 231B centre bit
Put, test plug 250C is located on Part I 231C center.Each test plug is arranged on each corresponding
On a part of center, not only contribute to more accurately testing conductive post and whether there is rat or surface indentation, and
And be also prevented from being offset to Part II 232 upper surface by some or all of for test plug in manufacturing process.
It should be noted that combine Fig. 4 and Fig. 5 understanding, Part I 231A is located at whole conductive pole 210A upper surface, the
A part of 231B is located at whole conductive pole 210B upper surface, and Part I 231C is located at whole conductive pole 210C upper surface.But,
In other embodiments of the invention, each Part I can also be only located at partly each conductive pole upper surface.
In the silicon hole test structure that the present embodiment is provided, due on contrast connector 260 upper surface and each test plug
Surface flushes, and each test plug is located on corresponding each Part I, and contrasts connector 260 and be located on Part II 240, therefore
Only need to measure the length of each test plug and contrast connector 260 length whether equal it is possible to learn on each Part I
Whether surface and Part II 232 upper surface flush；And each Part I is located at each conductive pole upper surface of correspondence position, and respectively
Part I upper surface is consistent with each conductive pole upper surface topography of correspondence position, and Part II 232 is located at part first medium
Layer 220 upper surface, therefore, just understand each conductive pole by whether each Part I upper surface and Part II 232 upper surface flush
Whether upper surface is flushed with first medium layer 220 upper surface, that is, understands that each conductive pole whether there is surface defect.To sum up may be used
Know, as long as the length of the length to each test plug and contrast connector 260 is tested so that it may be learnt that each conductive pole whether there is
Surface defect.
Because one end of each test plug is located on corresponding each Part I, and each second metal layer connects each survey respectively
The other end of examination connector, therefore, by galvanization between the first metal layer 230 and each second metal layer or making alive, and
Test voltage or the electric current at each test plug two ends, further according to Ohm's law it is possible to obtain the resistance of each test plug.?
After obtaining the resistance of each test plug, the resistivity according to resistivity law and each test plug and diameter further, just
The length of each test plug can be obtained.Method according to above-mentioned acquisition each test plug length equally can obtain contrasting connector
260 length.During above-mentioned analysis, in the electric current testing each test plug and contrast connector 260 or voltage, ignore
The resistance of the first metal layer, second metal layer and the 3rd metal level in measurement circuit, this is because, now the first metal layer,
What second metal layer and the 3rd metal level played is the effect of wire, and its resistance is with respect to each test test plug and contrast connector
Can not consider for 260 resistance.
After obtaining each test plug length and contrast connector 260 length, when length and the contrast connector of test plug
It is known that corresponding conductive pole does not have surface defect during 260 equal length, when length and the contrast connector 260 of test plug
It is known that corresponding conductive pole has surface defect when length is unequal.The silicon hole test structure that therefore embodiment is provided is permissible
Test out each conductive pole and whether there is surface defect.Due to can test each conductive pole whether there is surface defect it is thus possible to
In time technique being adjusted, thus avoiding the generation of each conductive pole surface defect, and then avoiding each conductive pole to lead with corresponding
Electric form touch is bad, finally improves chip reliability.
It should be noted that in other embodiments of the invention, the material of each test plug and contrast connector 260, straight
Footpath and other property can also be different, now still by said method, conductive pole can be surveyed with the presence or absence of surface defect
Examination.
The embodiment of the present invention two provides another silicon hole test structure.Described silicon hole test structure equally can be used
In test silicon hole, conductive pole whether there is surface defect.
Refer to Fig. 6, provide a silicon hole being located at silicon substrate 300 in the present embodiment, described silicon hole is to should have one
Individual conductive pole 310, conductive pole 310 is located in silicon substrate 300.Silicon substrate 300 upper surface has first medium layer 320, first Jie
Matter layer 320 exposes conductive pole 310 upper surface.Likewise, for more clearly showing conductive pole 310, Fig. 6 does not show silicon substrate 300
Insulating barrier and conductive pole 310 between.Described silicon hole, silicon substrate 300, conductive pole 310 and first medium layer 320 refer to reality
Apply example one corresponding contents.
Please continue to refer to Fig. 6, the silicon hole test structure that the present embodiment is provided is located at silicon substrate 300 and conductive pole 310
On, described silicon hole test structure specifically includes the first metal layer 330, second dielectric layer 340, test plug 350, contrast connector
360th, second metal layer 370 and the 3rd metal level 380, wherein the first metal layer 330 include positioned at conductive pole 310 upper surface
A part 331 and the Part II 332 being located at second dielectric layer 340 upper surface, test plug 350 is located on Part I 331
And running through second dielectric layer 340, contrast connector 360 is located on Part II 332 and runs through second dielectric layer 340, the second metal
Layer 370 is located at test plug 350 upper surface and second dielectric layer 340 upper surface, and the 3rd metal level 380 is located at contrast connector 360
Upper surface and second dielectric layer 340 upper surface, refer to embodiment one corresponding contents.
Refer to Fig. 7, the top view of the silicon hole test structure that Fig. 7 is provided by the present embodiment, structure shown in Fig. 6 is figure
Structure shown in 7 cuts, along B-B chain-dotted line, the cut-away view obtaining open.The silicon hole test structure that the present embodiment is provided and embodiment one
The silicon hole test structure difference being provided is, in the present embodiment, described silicon hole test structure includes 10 tests
Connector 350 and 10 contrast 360,10 test plugs 350 of connector are evenly distributed on Part I 331 periphery, 10 contrasts
The distribution shape of connector 360 is identical with the distribution shape of 10 test plugs, contrasts material and the test plug 350 of connector 360
Material identical, contrast connector 360 diameter also identical with the diameter of test plug 350, as shown in fig. 7, this mode helps
In convenient and intuitively test plug 350 and contrast connector 360 are contrasted.But it should be recognized that the present embodiment
In, the distribution shape of test plug 350 and contrast connector 360 can also be different.
The silicon hole test structure that the present embodiment is provided is due to having 10 surveys being arranged on Part I 331 periphery
Examination connector 350, therefore more comprehensively can be tested with the presence or absence of surface gap to conductive pole 310.But, in the present invention
Other embodiments in, the number of test plug 350 and contrast connector 360 can also be other numerical value of more than 5, setting survey
The number of examination connector 350 and contrast connector 360 can ensure that more than 5 conductive pole 310 circumferential distribution has enough tests to insert
Plug, for embodiment one, whether the silicon hole test structure that the present embodiment is provided is except depositing to conductive pole 310
Additionally it is possible to the survey that conductive pole 310 is carried out with the presence or absence of surface gap beyond rat or surface indentation are tested
Examination.
It should be noted that in other embodiments of the invention, corresponding to the scheme of multiple test plugs, contrast connector
May also be only one, the length of the length of multiple test plugs and contrast connector can be compared one by one.
It should be noted that in the present embodiment, the first metal layer 330 is one, and the first metal layer 330 is located at entirely
Conductive pole 310 upper surface.But in other embodiments of the invention, the first metal layer 330 can also be multiple, different first gold medals
Belong to mutually insulated between layer 330.
It should be noted that in other embodiments of the invention, described first of a described conductive pole upper surface
It is divided into multiple, the number of the number of described test plug and described second metal layer is equal to the number of described Part I, institute
State Part I mutually insulated, described second metal layer mutually insulated.Understand, in described silicon hole test structure, by test
Show that the length of each test plug just understands that each Part I upper surface corresponding whether there is surface defect, that is, understand
Corresponding conductive pole upper surface each several part whether there is defect, therefore, it is possible to be surveyed one by one to conductive pole upper surface each several part
Examination, both can test out described conductive pole and whether there is all types of surface defects（Including rat, surface indentation or surface
Breach）, the particular location that all types of surfaces fall into can be tested out again.
The embodiment of the present invention three provides a kind of method of testing of silicon hole test structure, and described method of testing applies to implement
In the silicon hole test structure that example one is provided, therefore incorporated by reference to reference to Fig. 4 and Fig. 5.
Described method of testing is included in the first metal layer 230 and second metal layer 270A galvanization IA, obtain test plug
The voltage V at 250A two endsA, in the first metal layer 230 and second metal layer 270B galvanization IB, obtain test plug 250B two ends
Voltage VB, in the first metal layer 230 and second metal layer 270C galvanization IC, obtain the voltage V at test plug 250C two endsC,
In the first metal layer 230 and the 3rd metal level 280 galvanization I, obtain contrasting the voltage V at connector 260 two ends.
It should be noted that on the first metal layer 230 and each second metal layer during energy electric current, can be in the first metal layer
First make contact is chosen on 230（Not shown）, the second contact point is chosen on each second metal layer（Not shown）, described first
Galvanization between contact point and described second contact point；During voltage on testing the first metal layer 230 and each second metal layer,
3rd contact point can be chosen on the first metal layer 230（Not shown）, the 4th contact point is chosen on each second metal layer（Do not scheme
Show）, and test the voltage between described 3rd contact point and described 4th contact point.In test circuit, described 3rd contact
Point and described 4th contact point are located between described first contact and described second contact point.For the first metal layer 230 with
3rd metal level 280 galvanization, during the voltage at test comparison connector 260 two ends, equally can take above-mentioned selection contact point
Method is carried out.
Diameter due to test plug 250A, test plug 250B, test plug 250C and contrast connector 260 is respectively
DA、DB、DCAnd D, the cross-sectional area of test plug 250A, test plug 250B, test plug 250C and contrast connector 260 is respectively
For SA、SB、SCAnd S, test plug 250A, test plug 250B, test plug 250C and contrast connector 260 resistance be respectively
RA、RB、RCAnd R, test plug 250A, test plug 250B, test plug 250C and contrast connector 260 resistivity be respectively
ρA、ρB、ρCAnd ρ, length L of test plug 250AA, length L of test plug 250BB, length L of test plug 250CCWith right
Ratio length L of connector 260, it should be noted that Fig. 1 is only to the L in above-mentioned each dataA、LB、LCIt is labeled with L.
For test plug 250A, R is had according to Ohm's lawA=VA/IA, R is had according to resistivity lawA=ρALA/SA, according to
Cross-sectional area formula has SA=(πDA 2)/4, comprehensive three above equation, L can be obtainedA=(πDA 2VA)/(4ρAIA), L in the same mannerB=(π
DB 2VB)/(4ρBIB), LC=(πDC 2VC)/(4ρCIC), L=(π D2V)/(4ρI).Due to test plug 250A, test in embodiment one
Connector 250B, test plug 250C are identical with diameter with the material of contrast connector 260, therefore have ρA=ρB=ρC=ρ and DA=DB=DC=
D, and I is set in the present embodimentA=IB=IC=I, therefore LA、LB、LCWith L respectively with VA、VB、VCIt is directly proportional with V, and proportionality coefficient
Equal.
In the present embodiment, record VA>V, VB<V, VC=V is it is known that LA>L, LB<L, LC=L, thus understand conductive pole 210A upper table
Face is less than first medium layer 220 upper surface, and that is, conductive pole 210A has surface indentation, and conductive pole 210B upper surface is higher than first Jie
Matter layer 220 upper surface, that is, conductive pole 210B there is rat, conductive pole 210C upper surface and first medium layer 220 upper surface
Flush, that is, conductive pole 210C does not have surface defect.
In said process, due to LA、LB、LCWith L respectively with VA、VB、VCIt is directly proportional with V, and proportionality coefficient is equal, therefore
Can there is LA/VA=LB/VB=L/V, therefore, has L furtherA=VAL/V, LB=VBL/V, therefore, in length L knowing test plug 260
In the case of, length L of examination connector 250A and test plug 250B can also be calculatedAAnd LB, therefore, it can to conductive pole
The surface indentation of 210A carries out accurate quantification test, and that is, the size of surface indentation is LA-L=VAL/V-L, wherein VAIt is test with V
During the data that directly records.In the same manner it is also possible to quantitation, the size of rat are carried out to the rat of conductive pole 210B
For L-LB=L-VBL/V, VBIt is the data directly recording in test process with V.
It should be noted that in other embodiments of the invention it is also possible to power up with second metal layer in Part I
Pressure, the electric current at test test plug two ends, the length of test plug is obtained further according to Ohm's law and resistivity law.Equally
, can be in Part II and the 3rd metal level making alive, the electric current at test comparison connector two ends, further according to Ohm's law and electricity
Resistance rate law obtains contrasting the length of connector.
It should be noted that in the method for testing that other embodiments of the invention are provided, when each test plug with right
When being different from than the material of connector and diameter, still the length of each test plug can be obtained according to above-mentioned formula and contrast is inserted
The length of plug；When the curtage by each test plug and contrast connector two ends is of different sizes, equally can be according to upper
State formula and obtain the length of each test plug and the length of contrast connector.Due to length and the contrast of each test plug can be obtained
The length of connector, method of testing therefore provided by the present invention can above-mentioned various in the case of to conductive pole whether there is surface lack
It is trapped into row test, from the above mentioned, this specification here does not repeat its principle one by one.
The embodiment of the present invention four provides the method for testing of another kind of silicon hole test structure, and described method of testing applies to reality
Apply in the silicon hole test structure that example two is provided, therefore incorporated by reference to reference to Fig. 6 and Fig. 7.
Described method of testing is included in the first metal layer 330 and second metal layer 370 galvanization ID, test 10 is tested slotting
Fill in the voltage V at two ends after 350 parallel connectionsD, in the first metal layer 330 and the 3rd metal level 380 galvanization I, test 10 contrasts and insert
Fill in the voltage V at two ends after 360 parallel connections.The resistance of 10 test plugs 350 is respectively RD1、RD2、…、RD10, 10 contrast connectors
360 resistance is respectively R1、R2…R10, the length of test plug 350 and contrast connector 360 is respectively LDAnd L, need explanation
It is Fig. 6 only to the L in above-mentioned each dataDIt is labeled with L.All-in resistance R for 10 test plugs 350D, fixed according to ohm
Rule has RD=VD/IDAnd 1/RD=1/RD1+1/RD2+…+1/RD10, for 10 contrast connectors 360, equally have R=V/I, 1/R=1/R1
+1/R2+…+1/R10, and due to contrast connector 360, on Part II 332 and upper surface is sudden and violent by second dielectric layer 340
Dew, therefore have R1=R2=…=R10.Because in embodiment two, test plug 350 is identical with diameter with the material of contrast connector 360, it
Cross-sectional area identical with resistivity, and in the present embodiment arrange ID=I, therefore, if there is not surface in conductive pole 310
During breach, RD1=RD2=…=RD10=R1=R2=…=R10, therefore then have RD=R and VD=V.But, in the present embodiment, recorded VD>
V, i.e. RD>R it is known that, RD1To RD10In, at least one value is more than R1It is known that the length of an at least test plug 350 is big
In the length of contrast connector 360, i.e. LD>L, now conductive pole 310 there is surface gap or surface indentation, as shown in Figure 3.At this
In embodiment, test plug 350 is evenly distributed in Part I 331 peripheral position, and therefore described method of testing can be to leading
Electric post 310 is more comprehensively tested with the presence or absence of surface gap.
It should be noted that in other embodiments of the invention it is also possible to add with second metal layer in the first metal layer
Voltage, the electric current at the multiple test plug two ends in parallel of test, obtain test plug further according to Ohm's law and resistivity law
Length, likewise, multiple contrast connector two ends in parallel can be tested in the first metal layer and the 3rd metal level making alive
Electric current, obtains the length contrasting connector further according to Ohm's law and resistivity law, and the length according to test plug and contrast
The length of connector records conductive pole and whether there is surface defect.
It should be noted that in order to further discriminate between surface gap and surface indentation, can refer to using in embodiment three
Silicon hole test structure, that is, the described Part I of a described conductive pole upper surface be multiple, described test plug
The numbers of number and described second metal layer are equal to the number of described Part I, described Part I mutually insulated, and described the
Two metal level mutually insulateds.In test, only test wherein part or a described test plug, thus realizing to surface gap
With the differentiation of surface indentation, and surface gap can be positioned.
It should be noted that in other embodiments of the invention it is also possible to whole test plugs need not once be tested
Shunt voltage（Or parallel-current）, but the shunt voltage by test wherein several test plugs（Or parallel-current）And
The shunt voltage of several contrast connectors corresponding（Or parallel-current）, now as described in embodiment two, the first metal layer has
Multiple, and each the first metal layer has the Part I being located at least partly conductive letter upper surface, several tests above-mentioned
Connector is corresponding to be located on Part I.
The embodiment of the present invention five provides a kind of forming method of silicon hole test structure, incorporated by reference to reference to Fig. 8 and Fig. 9.Institute
State silicon hole test structure to be located in described silicon hole, the conductive pole 410 of described silicon hole is located in silicon substrate 400, silicon substrate
400 upper surfaces have first medium layer 420, and first medium layer 420 exposes conductive pole 410 upper surface, and the present embodiment is not to conduction
Insulating barrier between post 410 and silicon substrate 400 is shown.
Described forming method is first at least part of conductive pole 410 upper surface and part first medium layer 420 upper surface shape
Become the first metal layer 430, the first metal layer 430 includes the Part I 431 positioned at conductive pole 410 upper surface and is located at first Jie
Conductive pole 410 upper surface topography one of the Part II 432 of matter layer 420 upper surface, Part I 431 upper surface and correspondence position
Cause.The method forming the first metal layer 430 can be physical vaporous deposition, chemical vapour deposition technique or ald
Method.
Please continue to refer to Fig. 8, Part I 431 forms test plug 450, Part II 432 is contrasted
Connector 460.In the present embodiment, form test plug 450 and contrast connector 460 using same technique, thus saving processing step,
Meanwhile, it is easily controlled test plug 450 also identical with diameter with the material of contrast connector 460.
Refer to Fig. 9, second dielectric layer 440, second medium are formed on first medium layer 420 and the first metal layer 430
Layer 440 exposes test plug 450 upper surface and contrast connector 460 upper surface.
Please continue to refer to Fig. 9, form the second gold medal in test plug 450 upper surface and part second dielectric layer 440 upper surface
Belong to layer 470, formed and second metal layer 470 insulation in contrast connector 460 upper surface and part second dielectric layer 440 upper surface
3rd metal level 480.In the present embodiment, second metal layer 470 and the 3rd metal level 480 are formed using same technique, to save
Processing step.
By above-mentioned forming method, the present embodiment defines silicon hole test structure, and described silicon hole test structure can be transported
With method of testing provided by the present invention, conductive pole 410 is tested with the presence or absence of surface defect, therefore obtaining test knot
In time technique can be adjusted after structure, thus avoiding the generation of subsequent conductive post surface defect, and then avoid conductive pole with
Corresponding conductive structure loose contact, finally improves chip reliability, and above-mentioned forming method can by different structure simultaneously
Made, be there is process is simple, the feature of low manufacture cost.
Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art, without departing from this
In the spirit and scope of invention, all can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
The scope limiting is defined.
Claims (12)
1. a kind of silicon hole test structure, for testing the surface condition of conductive pole in silicon hole, described conductive pole is located at silicon and serves as a contrast
In bottom, described silicon substrate upper surface has first medium layer, and described first medium layer exposes described conductive pole upper surface, its feature
It is, described silicon hole test structure includes：
The first metal layer, including positioned at least partly Part I of described conductive pole upper surface with positioned at partly described first Jie
The Part II of matter layer upper surface, described Part I upper surface is consistent with the described conductive pole upper surface topography of correspondence position；
Second dielectric layer, on described first medium layer and described the first metal layer；
Test plug is located on Part I and runs through described second dielectric layer；
Contrast connector is located on Part II and runs through described second dielectric layer；
Second metal layer, positioned at described test plug upper surface and partly described second dielectric layer upper surface；
3rd metal level, positioned at described contrast connector upper surface and partly described second dielectric layer upper surface, and with described second
Metal level insulate；
Described contrast connector upper surface and described test plug upper surface flush, described Part II upper surface and described first Jie
Matter layer upper surface topography is consistent, and the material of described contrast connector is identical with the material of described test plug, described contrast connector
Diameter is identical with the diameter of described test plug.
2. silicon hole test structure as claimed in claim 1 is it is characterised in that described test plug is located at described Part I
Center on.
3. silicon hole test structure as claimed in claim 1 is it is characterised in that described test plug is multiple, multiple described
Test plug is evenly distributed on described Part I periphery；The number of described contrast connector and the number phase of described test plug
With, and the distribution shape of multiple described contrast connector is identical with the distribution shape of multiple described test plugs.
4. silicon hole test structure as claimed in claim 3 is it is characterised in that the number of described test plug is more than or waits
In 5.
5. silicon hole test structure as claimed in claim 1 it is characterised in that each described conductive pole upper surface described
A part is multiple, and the number of the number of described test plug and described second metal layer is equal to the individual of described Part I
Number, described Part I mutually insulated, described second metal layer mutually insulated.
6. silicon hole test structure as claimed in claim 1 it is characterised in that described conductive pole diameter range be 5 μm～
50μm；The diameter range of described test plug is 0.15 μm～2 μm；The diameter range of described contrast connector is 0.15 μm～2 μm.
7. silicon hole test structure as claimed in claim 1 it is characterised in that the material of described the first metal layer include copper,
Any combination of one or more of tungsten, silver, gold, titanium, tantalum and aluminium；The material of described second metal layer include copper, tungsten, silver,
Any combination of one or more of gold, titanium, tantalum and aluminium；The material of described first medium layer includes silica；Described
The material of second medium layer includes silica.
8. silicon hole test structure as claimed in claim 7 is it is characterised in that the thickness range of described the first metal layer is
1000 angstroms～5000 angstroms；The thickness range of described second metal layer is 1000 angstroms～5000 angstroms；The thickness of described first medium layer
Scope is 3000 angstroms～50000 angstroms；The thickness range of described second dielectric layer is 3000 angstroms～50000 angstroms.
9. a kind of method of testing of silicon hole test structure, described silicon hole test structure is as any one of claim 1 to 8 institute
The silicon hole test structure stated is it is characterised in that described method of testing includes：
By to applied voltage or electric current between described Part I and described second metal layer, and measure corresponding electric current or electricity
Pressure, obtains the resistance of described test plug, and the cross-sectional area according to described test plug and resistivity, obtains described test and inserts
The length of plug；
By to applied voltage or electric current between described Part II and described 3rd metal level, and measure corresponding electric current or electricity
Pressure, obtains the resistance of described contrast connector, and the cross-sectional area according to described contrast connector and resistivity, obtains described contrast and insert
The length of plug；
When the equal length of length and the described contrast connector of described test plug, the upper surface of described silicon hole and described the
The upper surface flush of one dielectric layer；Otherwise, there is surface defect in described conductive pole.
10. the method for testing of silicon hole test structure as claimed in claim 9 is it is characterised in that work as described test plug
When length is more than the length of described contrast connector, there is surface indentation or surface gap in described conductive pole；When described test is inserted
The length of plug is less than the length of described contrast connector, and described conductive pole has rat.
A kind of 11. forming methods of silicon hole test structure, described silicon hole test structure is located in silicon hole, described silicon hole
Conductive pole be located in silicon substrate, described silicon substrate upper surface has a first medium layer, described first medium layer expose described in lead
Electric post upper surface is it is characterised in that described forming method includes：
Form the first metal layer at least partly described conductive pole upper surface and partly described first medium layer upper surface, described the
One metal level includes the Part I positioned at described conductive pole upper surface and second that is located at described first medium layer upper surface
Point, described Part I upper surface is consistent with the described conductive pole upper surface topography of correspondence position；
Form second dielectric layer in described first medium layer and described the first metal layer, and formed on described Part I and pass through
Wear described second dielectric layer test plug and on described Part II formed run through described second dielectric layer contrast insert
Plug；
Form second metal layer in described test plug upper surface and partly described second dielectric layer upper surface, and in described contrast
Connector upper surface and partly described second dielectric layer upper surface form the 3rd metal level, described 3rd metal level and described second gold medal
Belong to layer insulation；
Described contrast connector upper surface and described test plug upper surface flush, described Part II upper surface and described first Jie
Matter layer upper surface topography is consistent, and the material of described contrast connector is identical with the material of described test plug, described contrast connector
Diameter is identical with the diameter of described test plug.
The forming method of 12. silicon hole test structures as claimed in claim 11 is it is characterised in that formed using same technique
Described test plug and described contrast connector, form described second metal layer and described 3rd metal level using same technique.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310315324.XA CN104347594B (en) | 2013-07-24 | 2013-07-24 | Silicon through hole test structure, silicon through hole test method and silicon through hole formation method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310315324.XA CN104347594B (en) | 2013-07-24 | 2013-07-24 | Silicon through hole test structure, silicon through hole test method and silicon through hole formation method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104347594A CN104347594A (en) | 2015-02-11 |
| CN104347594B true CN104347594B (en) | 2017-02-22 |
Family
ID=52502876
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310315324.XA Active CN104347594B (en) | 2013-07-24 | 2013-07-24 | Silicon through hole test structure, silicon through hole test method and silicon through hole formation method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104347594B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106571311B (en) * | 2015-10-10 | 2019-04-26 | 中芯国际集成电路制造(上海)有限公司 | The test device and its test method of through silicon via |
| CN114743893B (en) * | 2022-06-13 | 2022-09-16 | 绍兴中芯集成电路制造股份有限公司 | Monitoring method and detection structure for depth of conductive plug |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4300348B2 (en) * | 2003-05-27 | 2009-07-22 | 日産自動車株式会社 | Press-fit pin mounting board structure and press-fit pin connection inspection method |
| CN102200554A (en) * | 2011-03-30 | 2011-09-28 | 上海北京大学微电子研究院 | Resistor test structure and method |
| CN103137511A (en) * | 2011-11-25 | 2013-06-05 | 中芯国际集成电路制造(上海)有限公司 | Silicon through-hole test structure and corresponding test method |
-
2013
- 2013-07-24 CN CN201310315324.XA patent/CN104347594B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4300348B2 (en) * | 2003-05-27 | 2009-07-22 | 日産自動車株式会社 | Press-fit pin mounting board structure and press-fit pin connection inspection method |
| CN102200554A (en) * | 2011-03-30 | 2011-09-28 | 上海北京大学微电子研究院 | Resistor test structure and method |
| CN103137511A (en) * | 2011-11-25 | 2013-06-05 | 中芯国际集成电路制造(上海)有限公司 | Silicon through-hole test structure and corresponding test method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104347594A (en) | 2015-02-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106920795B (en) | Memory construction and preparation method thereof, the test method of memory | |
| CN105580135B (en) | Semiconductor devices with through hole item | |
| US9869713B2 (en) | Through-silicon via (TSV) crack sensors for detecting TSV cracks in three-dimensional (3D) integrated circuits (ICs) (3DICs), and related methods and systems | |
| CN100407418C (en) | Semiconductor device | |
| CN100557797C (en) | The structure of failure analysis and method in the semiconductor device | |
| CN103165581B (en) | Test structure, its manufacture method, method of testing and MRAM array | |
| CN207925459U (en) | Electronic device | |
| CN103137511B (en) | The method of testing of silicon through hole test structure and correspondence | |
| CN203631539U (en) | Through silicon via testing structure | |
| CN102446900A (en) | Electromigration reliability test structure and making method for multilayer of metal interconnected metal wires | |
| CN106683708B (en) | A method of test 3DNAND word line resistance | |
| CN103187400B (en) | Silicon through hole detection architecture and detection method | |
| US9875964B2 (en) | Semiconductor device components and methods | |
| TWI827809B (en) | Method for measuring an electric property of a test sample, and multilayer test sample | |
| CN104347594B (en) | Silicon through hole test structure, silicon through hole test method and silicon through hole formation method | |
| CN103165577A (en) | Semiconductor detection structure and detection method | |
| CN103137607A (en) | Conductor failure detection structure, a forming method, and a method of detecting failure time | |
| CN103187399A (en) | Through-silicon via (TSV) testing structure and TSV testing method | |
| CN105655485B (en) | Resistive random access memory and manufacturing method thereof | |
| KR100362024B1 (en) | Characteristic-evaluating semiconductor device and evaluating method using the same | |
| CN205376516U (en) | Electro -migration test structure of silicon through -hole | |
| EP2385551A1 (en) | Silicon substrate wafer and test method | |
| CN106981476B (en) | Semiconductor devices and forming method thereof | |
| CN103035619A (en) | Electromigration reliability test structure | |
| CN104851875A (en) | Semiconductor structure with silicon through hole, manufacturing method and testing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |