CN102446883A - 一种通用封装基板、封装结构和封装方法 - Google Patents

一种通用封装基板、封装结构和封装方法 Download PDF

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Publication number
CN102446883A
CN102446883A CN2011104129624A CN201110412962A CN102446883A CN 102446883 A CN102446883 A CN 102446883A CN 2011104129624 A CN2011104129624 A CN 2011104129624A CN 201110412962 A CN201110412962 A CN 201110412962A CN 102446883 A CN102446883 A CN 102446883A
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substrate
routing
silicon
chip
layer
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CN2011104129624A
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蔡坚
浦园园
王谦
郭函
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Tsinghua University
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Tsinghua University
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Priority to CN2011104129624A priority Critical patent/CN102446883A/zh
Priority to PCT/CN2011/084495 priority patent/WO2013086754A1/zh
Priority to US14/365,100 priority patent/US20150115437A1/en
Publication of CN102446883A publication Critical patent/CN102446883A/zh
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Abstract

本发明针对现有小批量集成电路产品及其样品验证中封装成本高、时间周期长的缺陷，提供一种能够克服上述缺陷的封装基板和封装结构。本发明提供一种通用封装基板，该通用封装基板包括第一基板(102)和硅***层(103)，所述第一基板(102)的上表面与所述硅***层(103)的下表面之间形成有将所述第一基板(102)的上表面与所述硅***层(103)的下表面电连接在一起的多个凸点(106)，所述硅***层(103)的上表面上形成有多个打线焊盘，所述多个打线焊盘分别通过硅通孔(105)与所述多个凸点(106)电连接。

Description

一种通用封装基板、封装结构和封装方法
技术领域
本发明涉及半导体封装领域，尤其涉及一种通用封装基板、封装结构和封装方法。
背景技术
焊球阵列(Ball Grid Array，BGA)封装技术是20世纪90年代以后发展起来的一种先进的高性能面阵列封装技术，其因I/O端口数多、节距大、可靠性高、引脚很短和共面性好等优点而在轻、小、高性能器件中应用迅速增长，并发展成为一门成熟的高密度封装技术。其中，图1示出了现有的倒装BGA封装示意图。
但是，目前的BGA封装处于芯片设计和封装设计相脱离的阶段，这使得基板设计会因芯片的不同而不同，即独立开发的芯片需要配以单独设计的封装基板，因此，无论是样片还是产品都需要前期封装的研发，这不仅花费了大量的费用而且还会因基板的设计和制备而延长封装周期。对于大批量芯片封装而言，前期封装设计费用可以分摊到产品成本中，影响不大，但对于小批量芯片封装而言，由于其产品规模不大并且成本较高，如果还要进行新的封装设计的话会更进一步增加成本。因此，迫切需要一种新的封装设计来满足小批量芯片封装的要求。
发明内容
本发明针对现有小批量集成电路产品及其样品验证中封装成本高、时间周期长的缺陷，提供一种能够克服上述缺陷的通用封装基板、封装结构和封装方法。
本发明提供一种通用封装基板，该通用封装基板包括第一基板和硅***层，所述第一基板的上表面与所述硅***层的下表面之间形成有将所述第一基板的上表面与所述硅***层的下表面电连接在一起的多个凸点，所述硅***层的上表面上形成有多个打线焊盘，所述多个打线焊盘分别通过硅通孔与所述多个凸点电连接。
本发明还提供一种封装结构，该封装结构包括如上所述的通用封装基板和至少一个芯片，所述至少一个芯片位于所述通用封装基板的所述硅***层的上表面上，并且所述至少一个芯片的焊盘分别通过打线的方式电连接到形成于所述硅***层的上表面上的所述打线焊盘。
本发明还提供一种采用上述的通用封装基板对芯片进行的封装的方法，该方法包括：
将至少一个芯片粘贴到所述通用封装基板的所述硅***层的上表面上；
通过打线的方式将所述至少一个芯片的焊盘电连接到形成于所述硅***层的上表面上的所述打线焊盘；
将打线后的所述至少一个芯片进行塑封；
在所述第一基板的下表面上进行植球以实现所述至少一个芯片的电信号的引出。
由于在根据本发明的通用封装基板和封装结构中，位于硅***层上表面上的打线焊盘通过硅***层中的硅通孔与位于硅***层下表面上的凸点电连接，而芯片的焊盘则通过打线的方式与硅***层上表面上的打线焊盘电连接，这样就能够通过硅***层将不同的芯片设计整合为同规格的倒装芯片，使得同一款根据本发明的通用封装基板能够适用于不同种类和尺寸的芯片的封装，从而降低了封装成本和封装周期。另外，根据本发明的通用封装基板和封装结构还能够增加基板凸点之间的尺寸，并放大凸点，而且其还能够通过打线的方式连接到芯片上的任意焊盘，使得连接方式更为灵活，并可实现MCM模块封装。
附图说明
图1是现有技术中的BGA封装结构的截面图；
图2是根据本发明的通用封装基板的截面图；
图3是根据本发明的封装结构的一种截面示意图；
图4是根据本发明的封装结构的另一截面示意图；
图5是根据本发明的封装结构的再一截面示意图；
图6是根据本发明的封装结构的又一截面示意图；
图7是采用本发明的通用封装基板对芯片进行封装的流程图。
具体实施方式
下面结合附图来详细描述根据本发明的通用封装基板、封装结构和封装方法。
如图2所示，根据本发明的通用封装基板10包括第一基板102和硅***层103，所述第一基板102的上表面与所述硅***层103的下表面之间形成有将所述第一基板102的上表面与所述硅***层103的下表面电连接在一起的多个凸点106，所述硅***层103的上表面上形成有多个打线焊盘，所述多个打线焊盘分别通过硅通孔105与所述多个凸点106电连接。
其中，第一基板102可以为有机基板、硅基板或者陶瓷基板，并且第一基板102的结构、层数、内部互连结构等参数的设计可以类似于现有技术中BGA封装基板的设计，因此此处不再赘述。
另外，在硅***层103的上表面上形成的打线焊盘可以由铝、铜、金等各种材料形成，其实现工艺为本领域技术人员所熟知，此处不再赘述，而且形成打线焊盘所采用的材料可以根据打线所采用材料的不同而不同。
图3示出了根据本发明的封装结构1的截面图，其中，该封装结构1包括至少一个芯片20和根据本发明的通用封装基板10。其中通用封装基板10用于承载至少一个芯片20，并且至少一个芯片20位于根据本发明的通用封装基板10的硅***层103的上表面上，并且所述至少一个芯片20的焊盘分别通过打线的方式电连接到形成于所述硅***层103的上表面上的所述打线焊盘。
应当说明的是，图3至图6中的标号101表示焊球，其用于引出被封装的芯片20的电信号并实现最终的封装体与其他电子元器件之间的电气连接。
在根据本发明的一个优选实施方式中，芯片20的焊盘通过打金线、打铜线和打铝线中的一种或多种方式连接到根据本发明的通用封装基板10的相应打线焊盘上。
在根据本发明的再一优选实施方式中，所述芯片20的焊盘通过正向打线和/或反向打线的方式连接到根据本发明的通用封装基板的相应打线焊盘上。其中图3和图4示出的正向打线方式，图5示出的是反向打线方式。由于上述的正向打线、反向打线工艺是本领域技术人员公知的，所以此处不再赘述。
图3中所示的通用封装基板10的结构与图4中所示的通用封装基板10的结构相同，区别在于图3中的芯片20的设计与图2中的芯片20的设计不同，但是图3和图4中的设计不同的芯片20都能够通过打线的方式连接到根据本发明的通用封装基板10上，而不需对根据本发明的通用封装基板10的结构进行重新设计，从而节省了封装成本并降低了制作时间。
在根据本发明的又一优选实施方式中，还可以通过使用根据本发明的通用封装基板10来实现多芯片组件(MCM)封装，如图6所示。
图7示出了采用根据本发明的通用封装基板10进行封装的方法，该方法包括：
S71、将至少一个芯片20粘贴到所述通用封装基板20的所述硅***层103的上表面上。
其中，所述至少一个芯片20可以通过银浆或者其他粘结剂粘贴到硅***层103的上表面上。
S72、通过打线的方式将所述至少一个芯片20的焊盘电连接到形成于所述硅***层103的上表面上的所述打线焊盘。
其中，所述至少一个芯片20的焊盘可以通过打金线、打铜线和打铝线中的一种或多种方式连接到所述通用封装基板10的相应打线焊盘上，并且打线的方式可以是正向打线和/或反向打线。
S73、将打线后的所述至少一个芯片20进行塑封；
S74、在所述第一基板102的下表面上进行植球以实现所述至少一个芯片20的电信号的引出。
以上提到采用根据本发明的通用封装基板可以实现MCM封装，其中在实现MCM封装时，多个芯片可以层叠在一起，也可以都粘贴到硅***层的上表面上(即，没有层叠情况出现)。
以上仅结合本发明的优选实施方式对本发明进行了详细描述，但是应当理解，在不背离本发明精神和范围的情况下，可以对本发明进行各种变形和修改。

Claims (9)

1.一种通用封装基板，该通用封装基板包括第一基板(102)和硅***层(103)，所述第一基板(102)的上表面与所述硅***层(103)的下表面之间形成有将所述第一基板(102)的上表面与所述硅***层(103)的下表面电连接在一起的多个凸点(106)，所述硅***层(103)的上表面上形成有多个打线焊盘，所述多个打线焊盘分别通过硅通孔(105)与所述多个凸点(106)电连接。
2.根据权利要求1所述的通用封装基板，其中，所述第一基板(102)为有机基板、硅基板或者陶瓷基板。
3.一种封装结构，该封装结构包括根据权利要求1至2中任一项权利要求所述的通用封装基板和至少一个芯片，所述至少一个芯片位于所述通用封装基板的所述硅***层(103)的上表面上，并且所述至少一个芯片的焊盘分别通过打线的方式电连接到形成于所述硅***层(103)的上表面上的所述打线焊盘。
4.根据权利要求3所述的封装结构，其中，所述至少一个芯片的焊盘通过打金线和/或打铜线和/或打铝线的方式连接到相应的打线焊盘上。
5.根据权利要求3所述的封装结构，其中，所述至少一个芯片的焊盘通过正向打线和/或反向打线的方式连接到相应的打线焊盘上。
6.一种采用权利要求1或2所述的通用封装基板对芯片进行的封装的方法，该方法包括：
将至少一个芯片粘贴到所述通用封装基板的所述硅***层(103)的上表面上；
通过打线的方式将所述至少一个芯片的焊盘电连接到形成于所述硅***层(103)的上表面上的所述打线焊盘；
将打线后的所述至少一个芯片进行塑封；
在所述第一基板的下表面上进行植球以实现所述至少一个芯片的电信号的引出。
7.根据权利要求6所述的方法，其中，所述至少一个芯片通过银浆粘贴到所述硅***层(103)的上表面上。
8.根据权利要求6所述的方法，其中，所述至少一个芯片的焊盘通过打金线和/或打铜线和/或打铝线的方式连接到所述通用封装基板的相应打线焊盘上。
9.根据权利要求6所述的方法，其中，所述至少一个芯片的焊盘通过正向打线和/或反向打线的方式连接到所述通用封装基板的相应打线焊盘上。
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