CN101577258A - 电子元器件和电子元器件的树脂封装方法 - Google Patents

电子元器件和电子元器件的树脂封装方法 Download PDF

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CN101577258A
CN101577258A CNA2009101371722A CN200910137172A CN101577258A CN 101577258 A CN101577258 A CN 101577258A CN A2009101371722 A CNA2009101371722 A CN A2009101371722A CN 200910137172 A CN200910137172 A CN 200910137172A CN 101577258 A CN101577258 A CN 101577258A
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components
sealing resin
parts
resin
wire
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CN101577258B (zh
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今西诚
户村善广
熊泽谦太郎
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Panasonic Holdings Corp
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Abstract

本发明的电子元器件的特征为,元器件(2)的外周部被第一密封树脂(4)围住,在第一密封树脂(4)的内侧填充有第二密封树脂(3),元器件(2)和基板(1)由引线5电连接,元器件(2)外周的边缘部分中的、附近有引线(5)通过的边形成为经倒角后的倾斜面(31),引线(5)沿着倾斜面(31)向基板(1)延伸设置,能够将电子元器件整体高度抑制得较低。

Description

电子元器件和电子元器件的树脂封装方法
技术领域
本发明涉及经树脂封装后的电子元器件。
背景技术
近年来,对于电子元器件的封装正在朝薄型化方向开发。例如,用于存储卡的基板等由于受到产品厚度尺寸的限制而必须薄型化。因此,要求将作为产品组成要素的基板、电子元器件、引线、树脂、盖板等各自的厚度做薄。
在这样的背景下,当引线与元器件的端部接触时,存在如下问题,通过元器件上的导体膜,相邻的引线彼此短路或流过引线的信号向元器件泄漏而导致电子元器件变得动作不良。
为了解决该问题,可以考虑日本专利特开平4-356936号公报中图10所示的方法。
其中记载了如下的技术,在图10中,决定凸起14的位置,使得连接元器件2A外周的边缘部E与形成在元器件2A上的凸起14的端部H的直线E-H、和元器件2A的表面F所成的角度θ成为30°以上,,从而避免引线5与元器件2A的边缘部E之间发生短路。
然而日本专利特开平4-356936号公报中,在元器件2A的端部E与凸起的端部H远离的情况下,为了确保上述角度θ为30°以上,凸起14的高度增加,整个安装结构的高度增大。具体而言,端部E与端部H之间的距离为0.2mm时,凸起14的高度变为0.1mm以上。凸起14的高度增大时,引线5的布线回路本身的高度形状偏差较大,在树脂封装之前发生引线5下垂的情况下,引线5会与元器件2A的边缘部E接触。
图11表示的是图10所示的布线完成后利用密封树脂30进行树脂封装后的状态,在与元器件2A的外周对应的部位确认有***部12。密封高度因该密封树脂30的***部12而增大,存在无法降低电子元器件整体高度的问题。作为密封树脂30使用粘度为35.0Pa·s(在25℃)、弹性率为7.8Gpa左右的纳米克斯(日文:ナミツクス)(株式会社)产的绝缘材料的芯片涂层(CHIPCOAT)产品号8408等。
发明内容
本发明是鉴于上述问题而完成的,其目的在于提供一种能将电子元器件整体高度抑制得较低的电子元器件和电子元器件的树脂封装方法。
本发明的电子元器件,利用树脂对安装在基板上的元器件进行密封,其特征为,具有:围住所述元器件外周部的第一密封树脂;以及填充在所述第一密封树脂的内侧并覆盖所述元器件的第二密封树脂,第二密封树脂比第一密封树脂软。
本发明的电子元器件,其特征为,利用引线将所述元器件与所述基板电连接,在所述元器件外周的边缘部分中的、附近有所述引线通过的边的一部分或全部形成为经倒角后的倾斜面,所述引线沿所述倾斜面向基板延伸设置。
本发明的电子元器件,其特征为,在所述引线与所述元器件的经倒角后的所述倾斜面之间夹有电绝缘物质。
本发明的电子元器件,其特征为,所述元器件是半导体芯片。
本发明的电子元器件的树脂封装方法,其特征在于,对安装在基板上的元器件进行树脂密封时,包括:以围住所述元器件的外周部的形态向所述基板上供给第一粘度的第一密封树脂并使其固化的工序;以及以覆盖所述元器件的形态向所述第一密封树脂的内侧填充粘度比所述第一粘度低的第二密封树脂并使其固化的工序。
本发明的电子元器件的树脂封装方法,其特征为,所述第一密封树脂和所述第二密封树脂的材质不同。
本发明的电子元器件的树脂封装方法,其特征为,所述第一密封树脂和所述第二密封树脂的材质相同,向所述基板上供给第一树脂温度的所述第一密封树脂以围住所述元器件(2)的外周部,并向所述第一密封树脂的内侧供给比第一树脂温度高的第二树脂温度的所述第二密封树脂。
本发明的电子元器件的树脂封装方法,其特征为,具有:对所述元器件外周的边缘部分中的、附近有所述引线通过的边的一部分或全部进行倒角以做成倾斜面的工序;以及使所述引线沿着所述倒角后的所述倾斜面延伸并与基板连接的工序。
本发明的电子元器件的树脂封装方法,其特征为,具有:对所述元器件外周的边缘部分中的、附近有所述引线通过的边的一部分或全部进行倒角以做成倾斜面的工序;向所述元器件的经倒角后的所述倾斜面供给电绝缘物质的工序;以及使连接所述元器件和所述基板的所述引线的中途部分与电绝缘物质接触以绷紧的工序。
本发明的电子元器件的树脂封装方法,其特征为,对安装在基板上的元器件进行树脂密封时,包括:以围住所述元器件的外周部的形态向所述基板上供给第一粘度的第一密封树脂的工序;以覆盖所述元器件的形态向所述第一密封树脂的内侧供给粘度比所述第一粘度低的第二密封树脂的工序;以及使所述第一密封树脂和所述第二密封树脂一并固化的工序。
在本发明中,由于比第一密封树脂软的第二密封树脂位于围住元器件外周部的第一密封树脂的内侧,因而能降低与所述元器件外周的边缘部分对应的***。而且,通过对所述元器件外周的边缘部分中的、附近有所述引线通过的边的一部分或全部进行倒角,并且使所述引线沿着所述倒角后的倾斜面向基板延伸设置,从而可进一步减小上述***,能抑制电子元器件整体的高度。
另外,利用树脂对安装在基板上的元器件进行密封时,由于以围住所述元器件外周部的形态供给第一密封树脂并使其固化后,在其内侧填充粘度比第一粘度低的第二密封树脂并使其固化,因而能减小第二密封树脂固化后的与元器件外周的边缘部分对应的***,能抑制电子元器件整体的高度。
另外,对安装在基板上的元器件进行树脂密封时,由于包括以围住所述元器件的外周部的形态向所述基板上供给第一粘度的第一密封树脂的工序、以覆盖所述元器件的形态向所述第一密封树脂的内侧供给粘度比所述第一粘度低的第二密封树脂的工序、以及使所述第一密封树脂和所述第二密封树脂一并固化的工序,因而能减小第二密封树脂固化后的与元器件外周的边缘部分对应的***,能抑制电子元器件整体的高度。
而且,通过在引线与元器件的经倒角后的倾斜面之间夹有电绝缘物质,从而可防止误将引线与元器件电接通。
附图说明
图1A是本发明的实施方式1的电子元器件的剖视图。
图1B是表示实施方式1的半导体芯片外周的边缘部分的剖视图。
图2A是对实施方式1的半导体芯片外周的边缘部分进行加工的工序图。
图2B是对实施方式1的半导体芯片外周的边缘部分进行加工的工序图。
图3是使半导体芯片2的一侧带有圆弧的刀尖形状的切刀9c的说明图。
图4是将切刀刀尖做成双级结构时的说明图。
图5A是对本发明的实施方式2的半导体芯片的端部进行加工的工序的剖视图。
图5B是对实施方式2的半导体芯片的端部进行加工的工序的剖视图。
图5C是实施方式2的切刀刀尖的剖视图。
图6A是本发明的实施方式3的工艺流程图。
图6B是实施方式3的工艺流程图。
图6C是实施方式3的工艺流程图。
图6D是实施方式3的工艺流程图。
图6E是由实施方式3制作的半导体芯片的剖视图。
图7是本发明的实施方式4的电子元器件的剖视图。
图8是实施方式4的电绝缘物质的涂敷方法的简要图。
图9是本发明的实施方式5的电子元器件的剖视图。
图10是现有例的树脂密封之前的电子元器件的放大剖视图。
图11是上述现有例的树脂密封之后的电子元器件的放大剖视图。
图12是表示本发明的实施方式的主要部分的剖视图。
图13A是表示本发明的实施方式的主要部分的侧视图。
图13B是表示本发明的实施方式的主要部分的侧视图。
具体实施方式
(实施方式1)
图1A、图1B~图4表示本发明的实施方式1。
图1A表示本发明的电子元器件。
该电子元器件中,作为元器件的半导体芯片2通过芯片贴装膜7芯片焊接(日文:ダイボンデイング)在基板1的上表面上,半导体芯片2的电极和基板1的电极由引线5连接。
在基板1的上表面,以围住半导体芯片2的外周部的形态供给第一密封树脂4并使其固化,此后以覆盖半导体芯片2的形态向第一密封树脂4的内侧填充第二密封树脂3并使其固化,来进行树脂封装。
使用如下树脂,即第二密封树脂3填充时的粘度比第一密封树脂4填充时的粘度低,第二密封树脂3固化后的弹性率比第一密封树脂4固化后的弹性率小,固化后的第二密封树脂3成为比固化后的第一密封树脂4柔软的状态。
在半导体芯片2的表面上涂敷第二密封树脂3时,为了提高润湿展延性,使用粘度小的树脂,同时为了提高润湿性,在涂敷之前施加大气压等离子体。
具体而言,对于半导体芯片2使用8mm×11mm、厚度0.085mm的半导体芯片2,对于引线5使用直径为0.025mm的金线。对于第一密封树脂4使用纳米克斯(株式会社)产的绝缘材料的芯片涂层(CHIPCOAT)产品号8408(粘度为35.0[Pa·s](在25℃))。对于第二密封树脂3使用纳米克斯(株式会社)产的绝缘材料的芯片涂层(CHIPCOAT)产品号8420(粘度为6.0[Pa·s](在25℃))。
对半导体芯片2外周的边缘部分中的、附近有引线5通过的边实施倒角形成角度θ,加工成倾斜面31。
图2A和图2B表示的是在半导体芯片2上加工上述倾斜面31的工序。
在图2A中,使晶片状态的半导体芯片10处于粘贴在片材8上的状态,利用切刀9a从上部对半导体芯片10切入深度为L1的切口。接着,如图2B所示,利用刀厚比切刀9a薄的切刀9b一直切断至片材8。
为了看清切口,对切断对象使用了剖视图,而旋转体的切刀没有用截面表示。
如图2A所示,从晶片状态切割为半导体芯片2时,将切刀9a的刀尖制成具有与半导体芯片2的加工部分的角度相同的角度的形状,通过利用该切刀的刀尖进行切割就可实施该倾斜加工。此后,使用通常的不带角度的切刀的刀尖进行切割。
从晶片状态切割为半导体芯片2时,若使用防止卷刃用的斜角切割,能形成同样的倾斜部分,但本实施方式1中,积极地形成倾斜部分,这方面与斜角切割不同。
斜角切割利用刀尖的扩展角度为120°左右的切刀刀尖形成微小的加工(4μm左右),但图2A中,利用θ1=90°的切刀9a的刀尖在半导体芯片10上形成45°的加工,在宽度方向上加工0.04mm,能积极地形成较大的加工,实现本发明的目的。而且,在宽度方面,尤其是引线5较长时等,通过使用切刀9b,有时也会加工至半导体芯片2的划线内侧。
此外,角度θ能在30°~75°的范围内。如图1B所示,将与基板1的面平行的面方向作为0°来定义该角度θ。当处于30°以下时,半导体芯片2容易发生缺口,而若变成75°以上,则角部没有倾斜的效果。
最好是40°至55°。
从图1A可知,引线5沿着倾斜面31将半导体芯片2与基板1电连接。
另外,图1A仅表示了将半导体芯片2与基板1电连接的引线5与某一半导体芯片2的边交叉的方向的剖视图,但在半导体芯片2的不存在引线5的边上没有设置上述倾斜面31的话,半导体芯片2较稳定。
另外,在柔软的材质的半导体芯片2的情况下,担心角部会出现缺口,此时,如图3所示,可使用使半导体芯片2的一侧带有圆弧的刀尖形状的切刀9c,使其形成圆弧。形成圆弧就不易出现缺口。
另外,若将切刀的刀尖构成为图4所示的双级结构的切刀9d,则切割工序可一次完成,比较简便。
通过使用这样加工而成的半导体芯片2,引线5不会与半导体芯片2外周的边缘部分接触。另外,也不会因表面张力而使与半导体芯片2外周对应的部分的第二密封树脂3***,因而可将电子元器件整体的高度抑制得较低。
以往,从半导体芯片2的表面起测量引线5的高度的最高点时,考虑到布线高度的偏差,使平均值为0.07mm已是极限了,但本实施方式1的情况下,可下降至0.05mm。另外,对与半导体芯片2外周对应的部分的密封树脂的***来说,以往从半导体芯片2上的密封树脂表面起为0.02mm,但本实施方式1的情况下能抑制在0.005mm左右。
引线5将半导体芯片2上作为第一点,将基板1凸起上作为第二点(下接引线),但也可在半导体芯片2上形成凸起,将基板1上作为第一点,将半导体芯片2上作为第二点(上接引线)时也可获得相同的效果。
另外,对于该方法来说,当半导体芯片2存在不想加工的边时,可以有选择地进行加工,因而可仅对具有引线5的边进行加工,也可仅对具有引线5的多个边的一部分进行加工。
在本实施方式1中,作为元器件对半导体芯片2的情况进行了说明,但对其他电子元器件也同样可以适用。
此外,作为理想的形态,图1B的倾斜面31的下侧位置最好位于半导体芯片10的厚度的一半左右的部分。也就是说,当倾斜面31的下侧的位置位于半导体芯片10的厚度的一半的下方时,半导体芯片10加工时,安装时破损的概率较高。相反,若使倾斜面31的下侧位置位于半导体芯片10的厚度的一半的上方时,则会与引线5接触。
这对半导体芯片2的厚度为0.1mm以下时特别有效。这是因为半导体芯片2越薄越容易产生缺口、因变形而引起的缺陷的缘故。
(实施方式2)
图5A、图5B、图5C表示本发明的实施方式2。
与实施方式1的不同点在于,从晶片状态切割为半导体芯片2时,使用刀尖角度不同的两种切刀9c、9f,最初使用刀尖角度较大的切刀9c进行第一级加工(图5A),接着使用刀尖角度较小的切刀9f进行第二级加工(图5B),从而形成二级加工形状。
具体而言,切刀9c的刀尖角度为135°,切刀9f的刀尖角度为90°。
如图1所示,基板1侧的电极接近半导体芯片2的外周时,引线5有时成为二次折弯的形状,在这种情况下,通过进行使倾斜面31的斜率在中途发生变化的二级加工,可进一步降低引线5的高度。具体而言,与由图2A所示的90°的刀尖实施的一级加工相比,可将引线5的高度抑制在0.005mm左右的较低程度。
此外,若使切刀的刀尖构成为图5C所示的结构,则切割工序就可一次完成,较为简便。
此外,也可通过二级加工做成沿着实施方式1所示的引线5的形状,使得将二级的凸部连接的线的角度为30°~75°。也可使各级带有圆弧。也可不是二级,而是形成台阶状的多级。
(实施方式3)
图6A~图6E表示本发明的实施方式3。
在实施方式1、实施方式2中,从晶片状态制作半导体芯片2时使用了切刀,但本实施方式的不同之处在于使用蚀刻。
如图6A所示,将晶片状态的半导体芯片10粘贴在片材8上的状态下,在半导体芯片10的表面形成第一抗蚀剂20。利用蚀刻液对开口部22进行蚀刻。使用蚀刻速率高的液体开设SN大的孔即深度相对于孔径大的孔(图6B)。
此后,如图6C所示,除去第一抗蚀剂20,形成第二抗蚀剂21。形成比开口部22大的开口部23。然后,利用蚀刻液进行蚀刻(图6D)。使用蚀刻速率低的蚀刻液进行较浅的蚀刻。
其结果是,如图6E所示,可制成上述倾斜面31的形状为二级形状的半导体芯片2。由于进行蚀刻处理,因而相比实施方式1、实施方式2,带有圆弧。
蚀刻液可选择通常的蚀刻液。抗蚀剂膜也可选择通常的抗蚀剂膜。
抗蚀剂使用聚酰亚胺类树脂,还需要使用剥离、除去抗蚀剂膜的液体。作为蚀刻液可使用混合酸类蚀刻液。各类厂家销售这些材料。为了加快蚀刻,可通过提高液体的浓度来实现。另外也可提高处理温度。这些所需的材料可从关东化学株式会社、东京应化工业株式会社、林纯药工业株式会社、和光纯药工业株式会社等购入。工艺条件等只要按照这些材料的标准规格实施即可。
(实施方式4)
图7和图8表示本发明的实施方式4。
在上述各实施方式中,利用引线5连接半导体芯片2和基板1,在引线5的中间部浮着的状态下填充第二密封树脂3,但本实施方式4中,如图7所示,不同之处在于引线5与上述倾斜面31之间夹着电绝缘物质11。
之前存在如下问题,即,相邻的引线5之间通过半导体芯片2上的导体膜而短路,或流过引线5的信号向半导体芯片2泄漏导致半导体芯片2动作不良。
与此不同的是,本实施方式4中,通过在上述倾斜面31上涂敷电绝缘物质11来解决该问题。电绝缘物质11具体使用厚度为0.005mm的聚酰亚胺。该电绝缘物质11的涂敷可采用使用图8所示的一般的涂敷注射器13的底部填充涂敷方法。
此时的引线5其一端焊接在半导体芯片2上,并朝基板1延伸而焊接在基板1上时,引线5的中途部分与涂敷固化后的电绝缘物质11接触,半导体芯片2的倾斜面31与引线5之间夹着电绝缘物质11,因而引线5绷紧。
对于电绝缘物质11使用聚酰亚胺,但是若使用光固化类的电绝缘树脂11,也可在电绝缘树脂11从上述倾斜面31滴下之前进行光固化,因而可抑制电绝缘树脂的使用的浪费。
(实施方式5)
图9表示本发明的实施方式5。
上述各实施方式中,对半导体芯片2的外周的边缘部实施倒角形成倾斜面31,并且利用引线5进行连接,用粘度不同的第一密封树脂4和第二密封树脂3填充、密封,但本实施方式5的不同之处在于,半导体芯片2外周的边缘部没有实施倒角。
这样,只要利用第一密封树脂4围住半导体芯片2外周的边缘部没有被实施倒角的半导体芯片2的外周部,在第一密封树脂4的内侧填充粘度比填充时的第一密封树脂4的粘度低的第二密封树脂3并使其固化,在与半导体芯片2的外周对应的部分就不会产生以往那样的较大的***。
另外,上述各实施方式中,第一密封树脂4与半导体芯片2的外周相接,但无论是图12所示的那样第一密封树脂4离开半导体芯片2的外周的情况,还是第一密封树脂4与半导体芯片2的外周相接的情况,都能获得良好的结果。
上述各实施方式中,如图13A所示,在半导体芯片2的引出引线5的边上全部形成了倾斜面31,但也可如图13B所示采用如下结构,即,在半导体芯片2的引出有引线5的边的一部分上与引线5通过的部分对应地形成倾斜面31。
在上述各实施方式中,第一密封树脂4和第二密封树脂3的组成既可是相同的材料也可是不同的材料。具体而言,作为第一密封树脂4和第二密封树脂3的组成为不同材料的例子,第一密封树脂4使用纳米克斯(株式会社)产的芯片涂层产品号8408(粘度为35.0[Pa·s](在25℃)),第二密封树脂3使用纳米克斯(株式会社)产的芯片涂层产品号8420(粘度为6.0[Pa·s](在25℃))。
作为第一密封树脂4和第二密封树脂3的组成为相同材料的例子,第一密封树脂4和第二密封树脂3使用纳米克斯(株式会社)产的芯片涂层产品号8408,作为第一密封树脂4填充时使其温度为25℃,以粘度为35.0[Pa·s]的状态填充,作为第二密封树脂3填充时使其温度为40℃,以粘度为5.0[Pa·s]的状态填充、固化,通过这样在与半导体芯片2外周对应的部分不会产生以往的较大的***,能获得良好的电子元器件。
上述各实施方式中,具有以围住半导体芯片2的外周部的形态向基板1上供给第一粘度的第一密封树脂4并使其固化的工序、以及以覆盖半导体芯片2的形态向第一密封树脂4的内侧供给粘度比第一粘度低的第二密封树脂3并使其固化的工序,但也可不是在使第一密封树脂4固化后填充第二密封树脂3,而是通过以下工序来实现:以围住半导体芯片2的外周部的形态向基板1上供给第一粘度的第一密封树脂4的工序、以覆盖半导体芯片2的形态向第一密封树脂4的内侧供给粘度比第一粘度低的第二密封树脂3的工序、使第一密封树脂4和第二密封树脂3一并固化的工序。
本发明有助于提高存储卡等各种电子元器件的薄型化和可靠性。

Claims (10)

1.一种电子元器件,利用树脂对安装在基板(1)上的元器件(2)进行密封,其特征在于,具有:
围住所述元器件(2)的外周部的第一密封树脂(4);以及
填充在所述第一密封树脂(4)的内侧并覆盖所述元器件(2)的第二密封树脂(3),
第二密封树脂(3)比第一密封树脂(4)软。
2.如权利要求1所述的电子元器件,其特征在于,
利用引线(5)将所述元器件(2)与所述基板(1)电连接,将所述元器件(2)的外周的边缘部分之中的、所述引线(5)通过附近的一边的一部分或全部形成为经倒角后的倾斜面(31),所述引线(5)沿所述倾斜面向基板(1)延伸设置。
3.如权利要求2所述的电子元器件,其特征在于,
在所述引线(5)与所述元器件(2)的经倒角后的所述倾斜面(31)之间夹有电绝缘物质(11)。
4.如权利要求1所述的电子元器件,其特征在于,
所述元器件(2)是半导体芯片。
5.一种电子元器件的树脂封装方法,其特征在于,
当对安装在基板(1)上的元器件(2)进行树脂密封时,包括:
以围住所述元器件(2)的外周部的形式向所述基板(1)上供给第一粘度的第一密封树脂(4)并使其固化的工序;以及
以覆盖所述元器件(2)的形式向所述第一密封树脂(4)的内侧填充粘度比所述第一粘度低的第二密封树脂(3)并使其固化的工序。
6.如权利要求5所述的电子元器件的树脂封装方法,其特征在于,
所述第一密封树脂(4)和所述第二密封树脂(3)的材质是不同的。
7.如权利要求5所述的电子元器件的树脂封装方法,其特征在于,
所述第一密封树脂(4)和所述第二密封树脂(3)的材质是相同的,
向所述基板(1)上供给第一树脂温度的所述第一密封树脂(4)以围住所述元器件(2)的外周部,并向所述第一密封树脂(4)的内侧供给比第一树脂温度高的第二树脂温度的所述第二密封树脂(3)。
8.如权利要求5所述的电子元器件的树脂封装方法,其特征在于,具有:
对所述元器件(2)的外周的边缘部分之中的、所述引线(5)通过附近的一边的一部分或全部进行倒角,以做成倾斜面(31)的工序;以及
使所述引线(5)沿着所述进行倒角后的所述倾斜面(31)延伸并与基板(1)连接的工序。
9.如权利要求5所述的电子元器件的树脂封装方法,其特征在于,具有:
对所述元器件(2)的外周的边缘部分之中的、所述引线(5)通过附近的一边的一部分或全部进行倒角,以做成倾斜面(31)的工序;
向所述元器件(2)的经倒角后的所述倾斜面(31)供给电绝缘物质(11)的工序;以及
使连接所述元器件(2)和所述基板(1)的所述引线(5)的中途部分与电绝缘物质(11)接触并绷紧的工序。
10.一种电子元器件的树脂封装方法,其特征在于,
当对安装在基板(1)上的元器件(2)进行树脂密封时,包括:
以围住所述元器件(2)的外周部的形式向所述基板(1)上供给第一粘度的第一密封树脂(4)的工序;
以覆盖所述元器件(2)的形式向所述第一密封树脂(4)的内侧供给粘度比所述第一粘度低的第二密封树脂(3)的工序;以及
使所述第一密封树脂(4)和所述第二密封树脂(3)一并固化的工序。
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