CN101493674A - B code demodulating and decoding method and apparatus thereof - Google Patents
B code demodulating and decoding method and apparatus thereof Download PDFInfo
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Abstract
The invention discloses a method for demodulating and decoding an IRIG-B code, comprising the steps as follows: 1. the amplitude of an IRIG-B alternating current analog signal is measured and compared with a reference level so as to generate a square wave signal, thus determining the positive over-zero point of the analog signal; 2. according to the positive over-zero point of the analog signal, the IRIG-B alternating current analog signal is sampled and compared for judgment with the pre-arranged reference amplitude, thus generating an IRIG-B direct current signal; and 3. the high level width of the IRIG-B direct current signal is counted, the rising edge position of the reference code is judged and determined, the data information '1' and '0' is determined, the time slot information is inserted and second pulse and time information are output. The invention which adopts the technical proposal can realize demodulation of the analog signal and can obtain the benchmark second pulse signal, time information and the like; the second pulse obtained by demodulation has high synchronization precision, simple principle and easy execution.
Description
Technical field
The invention belongs to the automatic electronic field, particularly relate to a kind of coding/decoding method of IRIG-B sign indicating number, relate to a kind of device that utilizes this method to realize the decoding of B sign indicating number simultaneously.
Background technology
Along with the development of scientific and technological level and automatic technology, time synchronization network has been brought into play vital role as important infrastructure in fields such as telecommunications, electric power and national defence.People have proposed more and more higher requirement to the accuracy of time and time, and various time service means continue to bring out.Adopt the satellite receiver of systems such as the Big Dipper, GPS and GLONASS, synchronous signal such as output pulse per second (PPS) and IRIG-B is as reference time source, for automation equipment provides time synchronized.
IRIG originates from the time synchronized in septic yanks target range, and the time system in the target range is for satellite or spacecraft is launched, conventional weapon is tested, TT﹠C system provides the standard time.IRIG-B is a kind of of IRIG serial codes, carries abundant information, and anti-interference is good, possesses international general-purpose interface.IRIG-B is widely used in fields such as electric power, telecommunications and national defence with the advantage of himself.
The standard time form that uses between IRIG-B sign indicating number form target range has two big classes, and a class is a parallel time sign indicating number form, now seldom uses; Another kind of is serial timing code form.IRIG sata standard scale-of-two timing code form not only can satisfy closely temporal information transmission, and can satisfy remote temporal information transmission.In the application of reality, according to the requirement of the distance and the different time precision of distance B code generator, the B sign indicating number has adopted two kinds of sign indicating number type AC sign indicating numbers, i.e. alternating-current B sign indicating number and DC sign indicating number, i.e. DC B sign indicating numbers in actual transmissions.When transmission range is distant, adopt the AC sign indicating number, when transmission range is near, then adopt the DC sign indicating number.
Decoding that pith is IRIG-B in the IRIG-B time dissemination system.IRIG-B generally can not directly carry out time service to the time service terminal, therefore, before input time service terminal device, must extract pulse information and temporal information through the IRIG-B decoding, just can offer and tidy up terminal device and carry out application such as time service, make the IRIG-B time dissemination system realize as a total system.
In technology in the past, adopt to generate one with homophase frequently but the voltage analog signal of different amplitudes, carry out voltage ratio way with the IRIG-B simulating signal and realize decoding the IRIG-B sign indicating number, the implementation process complexity, and easily bring error, precision is not high.
Summary of the invention
The purpose of this invention is to provide a kind of B sign indicating number coding/decoding method that can improve B sign indicating number demodulation performance and decoding synchronization accuracy, and a kind of device that utilizes this method to realize the decoding of B sign indicating number is provided.
For achieving the above object, the present invention is by the following technical solutions:
The present invention includes following step:
1., measure the amplitude that IRIG-B exchanges simulating signal, and compare with datum, produce square-wave signal, determine the positive going zeror crossing point of simulating signal thus;
2., utilize the positive going zeror crossing point of simulating signal, sampled I RIG-B exchanges simulating signal, and and predefined reference amplitude compare judgement, generate the IRIG-B direct current signal;
3., the high level width of IRIG-B direct current signal is counted, judge the rising edge position of determining reference symbols sn, and specified data information " 1 ", " 0 " and insert gap information, pulse per second (PPS) and temporal information exported.
Step 2. in, behind positive going zeror crossing point, postpone, described time delay be step 1. in 1/4 cycle of square-wave signal; Sampled I RIG-B exchanges simulating signal, and compares judgement with predefined reference amplitude, if sampled value is higher than reference amplitude output high level, on the contrary output low level, the signal through relatively obtaining is the IRIG-B direct current signal.
Step 3. in, the high level width of IRIG-B direct current signal is counted, according to the judgment condition of B sign indicating number symbol width, obtain data " 1 ", " 0 " and code element information; According to the data frame structure of B sign indicating number, to the data that decoding obtains put in order, recombinating obtains reference symbols sn, temporal information, control information and SBS information; Compensation process is the time in middle 1/4 cycle of square-wave signal 1., the pps pulse per second signal of the standard that promptly obtains.
A kind of required B sign indicating number decoding device of this method of implementing, IRIG-B exchanges simulating signal and enters A/D converter, A/D converter links to each other with the alternating current code demodulating unit, and the alternating current code demodulating unit is connected with direct current sign indicating number decoding unit, and IRIG-B interchange simulating signal also enters the alternating current code demodulating unit through comparer; The clock source provides clock signal for A/D converter, alternating current code demodulating unit, direct current sign indicating number decoding unit.
IRIG-B exchanges simulating signal and enters A/D converter by transformer, and transformer also links to each other with comparer.
Direct current sign indicating number decoding unit is: the DC B sign indicating number passes through the direct current code element respectively along detection module sum counter module, and counter links to each other with the pulsewidth judging module, and the pps pulse per second signal of pulsewidth judging module is through the pulse per second (PPS) of pulse per second (PPS) compensation outputting standard; The data message of pulsewidth judging module is through B grouping of bits module and information storage module output time information and control information.
Alternating current code demodulating unit and direct current sign indicating number decoding unit are realized by programmable logic device (PLD).
Alternating current code demodulating unit and direct current sign indicating number decoding unit are realized by DSP.
Adopt the present invention of technique scheme, adopt comparer to obtain the positive going zeror crossing point of IRIG-B simulating signal, utilize A/D converter that the IRIG-B simulating signal is sampled and implement demodulation function.Not only simulating signal is realized demodulation, and can obtain benchmark second pulse signal and temporal information etc.; The pulse per second (PPS) synchronization accuracy height that demodulation obtains; Principle is simple, is easy to realize.
Description of drawings
Fig. 1 is DC B sign indicating number pulse synoptic diagram among the present invention;
Fig. 2 is DC B sign indicating number frame structure synoptic diagram among the present invention;
Fig. 3 is the comparison diagram of alternating-current B sign indicating number among the present invention and DC B sign indicating number;
Fig. 4 is positive going zeror crossing point schematic diagram among the present invention;
Fig. 5 is alternating-current B sign indicating number demodulation principle synoptic diagram among the present invention;
Fig. 6 is DC B sign indicating number decoding theory diagram among the present invention;
Fig. 7 is the decoding device theory diagram of total system among the present invention.
Embodiment
B sign indicating number coding/decoding method comprises following step among the present invention:
1., measure the amplitude that IRIG-B (AC) exchanges simulating signal, and compare with datum, the generation cycle is 1ms, dutycycle is 50% square-wave signal, determine the positive going zeror crossing point of simulating signal thus, level to square-wave signal utilizes DLC (digital logic circuit) to sample, and detects the level value of adjacent moment, just can obtain the moment of positive going zeror crossing point;
2., utilize the positive going zeror crossing point of simulating signal, sampled I RIG-B (AC) exchanges simulating signal, and and predefined reference amplitude compare judgement, generate IRIG-B (DC) direct current signal;
3., the high level width of IRIG-B (DC) direct current signal is counted, judge the rising edge position of determining reference symbols sn, and specified data information " 1 ", " 0 " and insert time slot, pulse per second (PPS) and temporal information exported.
As shown in Figure 1, the DC B sign indicating number is the time string sign indicating number of per second one frame, and each symbol width is 10ms, and a time frame cycle comprises 100 code elements, is pulsewidth coding.Code element " on time " reference point is its pulse front edge, and the witness marker of time frame is made up of a location recognition sign and adjacent reference symbols sn, and its width is 8ms; Per 10 code elements have location recognition sign a: P1, P2, and P3 ..., P9, P0, they are the 8ms width; PR is the frame reference point; The pulsewidth of binary one and " 0 " is 5ms and 2ms.
A time format frame is from the frame witness marker, and therefore continuous two 8ms broad pulses show the beginning of second, if since second 8ms code element is encoded, are respectively the 0th, 1,2 ..., 99 code elements.In B sign indicating number time format, contain the sky, the time, minute, second, sequential is second-minute-time-sky, shared information bit be 7 of seconds, 7 of branches, the time 10 of 6, days, its position is between P0～P5.P6～P0 comprises other control informations." second " information wherein: the 1st, 2,3,4,6,7,8 code elements; " branch " information: the 10th, 11,12,13,15,16,17 code elements; " time " information: the 20th, 21,22,23,25,26,27 code elements; The 5th, 14,24 code elements are index mark, and width is 2ms.The time, minute, second all represents with binary-coded decimal, low level is preceding, high-order after; Individual position is preceding, ten after.As shown in Figure 2, the time of representing among the figure is 173 days 21: 18: 2.
The comparison of wave shape figure of (AC) alternating current code of IRIG-B as shown in Figure 3 and IRIG-B (DC) direct current, IRIG-B (AC) alternating current code is suitable for longer-distance transmission, mainly as synchronization means between the timing equipment of master and slave station and timing equipment and remote subscriber's interface.IRIG-B (AC) alternating current code is a kind of pulse-length modulation sign indicating number, signal the 1kHz sine wave being made amplitude modulation(PAM) has three kinds of different modulating pulse widths, and second signal reference symbols sn and location recognition are masked as 8ms, code word " 1 " is 5ms, and code word " 0 " and index mark are 2ms.
Because the characteristic of IRIG-B (AC) alternating current code and IRIG-B (DC) direct current sign indicating number, B sign indicating number coding/decoding method step 1. in, simulating signal will be exchanged and datum compares, if the level of sinusoidal wave positive half cycle is higher than datum, then export high level, if the level of sinusoidal wave negative half period is lower than datum, output low level then, the generation cycle is 1ms thus, and dutycycle is 50% square-wave signal.The rising edge of square wave be simulating signal by the moment of negative half period to positive half cycle transition, be the positive going zeror crossing point.Datum is the intermediate value of simulating signal; When simulating signal fluctuateed up and down with zero level, datum was zero level, as shown in Figure 4.
A kind of required B sign indicating number decoding device of this method of implementing, its structure is as follows with annexation: IRIG-B (AC) exchanges simulating signal and enters A/D converter, the amplitude of the simulating signal that A/D converter obtains in order to sampling.A/D converter links to each other with the alternating current code demodulating unit, and the sampled value of this unit by using A/D converter is adjudicated IRIG-B (AC) AC signal amplitude, and demodulation obtains IRIG-B (DC) direct current signal.The alternating current code demodulating unit is connected with direct current sign indicating number decoding unit, and IRIG-B (DC) direct current signal is decoded obtains pulse per second (PPS) and temporal information etc.And IRIG-B (AC) exchanges simulating signal and also enters the alternating current code demodulating unit through comparer, and comparator input terminal receives B sign indicating number simulating signal and datum compares, and obtains the square-wave signal of 1KHz.
In whole device, the clock source provides clock signal for A/D converter, alternating current code demodulating unit, direct current sign indicating number decoding unit.
In this B sign indicating number decoding device, each functions of components is as follows:
Comparer: its input end receives B sign indicating number simulating signal, compares with datum then, be higher than datum and obtain high level, otherwise obtain low level, so dutycycle of comparer output is the square-wave signal of 50% 1KHz;
A/D converter: its input end receives B sign indicating number simulating signal, and 250us obtains the amplitude of simulating signal to analog signal sampling behind the square wave rising edge of comparer output.
Demodulating unit: be connected to A/D converter and decoding unit, utilize the sampled value and the datum amplitude of A/D converter to compare, if be higher than the datum amplitude then obtain high level, be lower than the datum amplitude and then obtain low level, the square wave of output is IRIG-B (DC) direct current signal, realized like this IRIG-B (AC) is exchanged demodulation, obtained IRIG-B (DC) direct current signal;
Decoding unit: connect demodulating unit, IRIG-B (DC) direct current signal is decoded.The process of DC B sign indicating number decoding is measured pulse in fact, and different width is representative data " 1 ", " 0 " and insertion code element respectively, and reference symbols sn and position code element.Because the interference of introducing in the sum of errors transmission course of signal modulation makes that symbol width is not accurate 2ms, therefore 5ms and 8ms need introduce fault tolerant mechanism in demodulating process, guarantee the correctness of decoding.Through the data that the extra pulse judgement obtains, reply arrangement according to the data rule of B sign indicating number, can find reference symbols sn, and produce the 1PPS signal according to the rising edge of reference symbols sn.And the temporal information of carrying among the IRIG-B that obtains by arrangement.
Clock source: be connected to A/D converter, demodulating unit and decoding unit, be used to provide clock signal; Wherein can be directly connected to demodulating unit and decoding unit, because the frequency in clock source is higher, generally be by being connected to A/D converter behind the frequency division.
Embodiment 2
B sign indicating number coding/decoding method comprises following step among the present invention:
1., measure the amplitude that IRIG-B (AC) exchanges simulating signal, and compare with datum, produce square-wave signal, determine the positive going zeror crossing point of simulating signal thus;
2., utilize the positive going zeror crossing point of simulating signal, sampled I RIG-B (AC) exchanges simulating signal, and and predefined reference amplitude compare judgement, generate IRIG-B (DC) direct current signal;
3., the high level width of IRIG-B (DC) signal is counted, judge the rising edge position of determining reference symbols sn, and specified data information " 1 ", " 0 " and insert gap information, pulse per second (PPS) and temporal information exported.
As shown in Figure 5, step 2. in, when receiving the rising edge of zero passage detection signal, zero degree for the sinusoidal signal phase place, 90 ° of sinusoidal signal, again to the simulating signal sampling, judgement was high amplitude signals or low amplitude signal when just the sinusoidal signal amplitude was maximum, and in general the reference amplitude value is not less than 70% of high-amplitude level; And the cycle of sinusoidal signal is 1ms, so after detecting positive going zeror crossing point back 250us, this moment, the amplitude of sinusoidal signal reached maximum, was the amplitude of sinusoidal signal.After gathering the amplitude data of alternating current code, according to predefined amplitude as decision threshold, with the amplitude of alternating current code and comparing with reference to thresholding, if being higher than threshold value, the collection amplitude exports high level, otherwise output low level so just exchanges simulating signal with IRIG-B (AC) and just has been demodulated to IRIG-B (DC) dc pulse signal.Because the cause that postpones, the DC B coded signal after the conversion than the direct current code delay of standard 250us.
A kind of required B sign indicating number decoding device of this method of implementing, its structure is as follows with annexation: IRIG-B (AC) exchanges simulating signal and enters A/D converter, A/D converter links to each other with the alternating current code demodulating unit, the alternating current code demodulating unit is connected with direct current sign indicating number decoding unit, and IRIG-B (AC) interchange simulating signal also enters the alternating current code demodulating unit through comparer; The clock source provides clock signal for A/D converter, alternating current code demodulating unit, direct current sign indicating number decoding unit.
IRIG-B (AC) exchanges simulating signal and enters A/D converter by transformer, and transformer also links to each other with comparer.Transformer carries out level to the simulating signal of B sign indicating number and transforms, and the signal amplitude that makes input is in the A/D converter working range, and transformer can also play the effect of Signal Spacing simultaneously.
Embodiment 3
B sign indicating number coding/decoding method comprises following step among the present invention:
1., measure the amplitude that IRIG-B (AC) exchanges simulating signal, and compare with datum, produce square-wave signal, determine the positive going zeror crossing point of simulating signal thus;
2., utilize the positive going zeror crossing point of simulating signal, sampled I RIG-B (AC) exchanges simulating signal, and and predefined reference amplitude compare judgement, generate IRIG-B (DC) direct current signal;
3., the high level width of IRIG-B (DC) direct current signal is counted, judge the rising edge position of determining reference symbols sn, and specified data information " 1 ", " 0 " and insert time slot, pulse per second (PPS) and temporal information exported.
Step 3. in, the high level width of IRIG-B (DC) direct current signal is counted, according to the judgment condition of B sign indicating number symbol width, obtain data " 1 ", " 0 " and code element information; According to the data frame structure of B sign indicating number, to the data that decoding obtains put in order, recombinating obtains reference symbols sn, temporal information, control information and SBS information; Compensation process is the time in middle 1/4 cycle of square-wave signal 1., the pps pulse per second signal of the standard that promptly obtains.
A kind of required B sign indicating number decoding device of this method of implementing, its structure is as follows with annexation: IRIG-B (AC) exchanges simulating signal and enters A/D converter, A/D converter links to each other with the alternating current code demodulating unit, the alternating current code demodulating unit is connected with direct current sign indicating number decoding unit, and IRIG-B (AC) interchange simulating signal also enters the alternating current code demodulating unit through comparer; The clock source provides clock signal for A/D converter, alternating current code demodulating unit, direct current sign indicating number decoding unit.
As shown in Figure 6, direct current sign indicating number decoding unit is: the DC B sign indicating number passes through the direct current code element respectively along detection module sum counter module, and counter links to each other with the pulsewidth judging module, and the pps pulse per second signal of pulsewidth judging module is through the pulse per second (PPS) of pulse per second (PPS) compensation outputting standard; The data message of pulsewidth judging module is through B grouping of bits module and information storage module output time information and control information.
The purpose of IRIG-B (DC) direct current sign indicating number decoding is to produce benchmark pulse per second (PPS) and temporal information, the DC B sign indicating number that obtains according to demodulation, rising edge by the direct current sign indicating number produces a rising edge indicator signal, following liter at the direct current sign indicating number rises along indicator signal under producing one again, the rising edge indicator signal starts a 10MS counter, the negative edge indicator signal is then suspended rolling counters forward, and the count results of counter has been represented the pulse width of high level.Pulse width values is sent into the pulsewidth judging module adjudicate, determine that the signal of receiving is ' 0 ' code element, ' 1 ' code element or reference symbols sn.Utilize reference symbols sn can recover the 1PPS signal through the pulse per second (PPS) compensating module; In addition, ' 0 ' code element that demodulates and ' 1 ' code element make up according to the rule of B sign indicating number in B grouping of bits module, can obtain temporal information and control information etc.
Alternating current code demodulating unit and direct current sign indicating number decoding unit are realized by programmable logic device (PLD), guarantee its precision.If do not consider precision, also can realize by DSP or single-chip microcomputer.
Claims (10)
1, a kind of IRIG-B code demodulating and decoding method, it is characterized in that: it comprises following step:
1., measure the amplitude that IRIG-B exchanges simulating signal, and compare with datum, produce square-wave signal, determine the positive going zeror crossing point of simulating signal thus;
2., utilize the positive going zeror crossing point of simulating signal, sampled I RIG-B exchanges simulating signal, and and predefined reference amplitude compare judgement, generate the IRIG-B direct current signal;
3., the high level width of IRIG-B direct current signal is counted, judge the rising edge position of determining reference symbols sn, and specified data information " 1 ", " 0 " and insert gap information, pulse per second (PPS) and temporal information exported.
2, B sign indicating number coding/decoding method according to claim 1, it is characterized in that: step 1. in, simulating signal will be exchanged and datum compares, if the level of sinusoidal wave positive half cycle is higher than datum, then export high level, if the level of sinusoidal wave negative half period is lower than datum, output low level then, produce square-wave signal thus, the rising edge of each square wave is the positive going zeror crossing point.
3, B sign indicating number coding/decoding method according to claim 1 and 2 is characterized in that: step 1. in, described datum is the intermediate value of simulating signal.
4, B sign indicating number coding/decoding method according to claim 1 is characterized in that: step 2. in, behind positive going zeror crossing point, postpone, described time delay be step 1. in 1/4 cycle of square-wave signal; Sampled I RIG-B exchanges simulating signal, and compares judgement with predefined reference amplitude, if sampled value is higher than reference amplitude output high level, on the contrary output low level, the signal through relatively obtaining is the IRIG-B direct current signal.
5, B sign indicating number coding/decoding method according to claim 1 is characterized in that: step 3. in, the high level width of IRIG-B direct current signal is counted, according to the judgment condition of B sign indicating number symbol width, obtain data " 1 ", " 0 " and code element information; According to the data frame structure of B sign indicating number, to the data that decoding obtains put in order, recombinating obtains reference symbols sn, temporal information, control information and SBS information; Compensation process is the time in middle 1/4 cycle of square-wave signal 1., the pps pulse per second signal of the standard that promptly obtains.
6, the required B sign indicating number decoding device of a kind of this method of enforcement as claimed in claim 1, it is characterized in that: IRIG-B exchanges simulating signal and enters A/D converter, A/D converter links to each other with the alternating current code demodulating unit, the alternating current code demodulating unit is connected with direct current sign indicating number decoding unit, and IRIG-B interchange simulating signal also enters the alternating current code demodulating unit through comparer; The clock source provides clock signal for A/D converter, alternating current code demodulating unit, direct current sign indicating number decoding unit.
7, B sign indicating number decoding device according to claim 6 is characterized in that: IRIG-B exchanges simulating signal and enters A/D converter by transformer, and transformer also links to each other with comparer.
8, B sign indicating number decoding device according to claim 6, it is characterized in that: described direct current sign indicating number decoding unit is: the DC B sign indicating number successively passes through the direct current code element along detection module sum counter module, counter links to each other with the pulsewidth judging module, and the pps pulse per second signal of pulsewidth judging module is through the pulse per second (PPS) of pulse per second (PPS) compensation outputting standard; The data message of pulsewidth judging module is through B grouping of bits module and information storage module output time information and control information.
9, according to claim 6 or 8 described B sign indicating number decoding devices, it is characterized in that: described alternating current code demodulating unit and direct current sign indicating number decoding unit are realized by programmable logic device (PLD).
10, B sign indicating number decoding device according to claim 9 is characterized in that: described alternating current code demodulating unit and direct current sign indicating number decoding unit are realized by DSP.
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| CN103684730A (en) * | 2012-09-07 | 2014-03-26 | 北京旋极信息技术股份有限公司 | Time synchronization method |
| CN104426565A (en) * | 2013-09-10 | 2015-03-18 | 円星科技股份有限公司 | Digital receiver and method of digital receiver |
| CN104426565B (en) * | 2013-09-10 | 2017-11-03 | 円星科技股份有限公司 | Digit receiver and its method |
| CN103760759A (en) * | 2014-01-22 | 2014-04-30 | 南京大全自动化科技有限公司 | Automatic forward/reverse direction IRIG-B code decoding method |
| CN103760759B (en) * | 2014-01-22 | 2017-05-10 | 南京大全自动化科技有限公司 | Automatic forward/reverse direction IRIG-B code decoding method |
| CN104102124A (en) * | 2014-06-30 | 2014-10-15 | 中国西电电气股份有限公司 | FPGA-based IRIG-B code decoder and decoding method thereof |
| CN104102124B (en) * | 2014-06-30 | 2017-04-19 | 中国西电电气股份有限公司 | FPGA-based IRIG-B code decoder and decoding method thereof |
| CN104270567B (en) * | 2014-09-11 | 2019-12-17 | 深圳市南航电子工业有限公司 | High-precision synchronous multi-channel image acquisition system and time synchronization method thereof |
| CN104270567A (en) * | 2014-09-11 | 2015-01-07 | 深圳市南航电子工业有限公司 | High-precision synchronous multi-channel image acquisition system and time synchronization method thereof |
| CN106341212A (en) * | 2016-08-26 | 2017-01-18 | 郑州威科姆科技股份有限公司 | Device and method for realizing multi-type time signal automatic identification and detection |
| CN106341212B (en) * | 2016-08-26 | 2019-08-27 | 郑州威科姆科技股份有限公司 | It is a kind of to realize polymorphic type time signal from the device and method for recognizing and detecting |
| CN109687876A (en) * | 2018-12-17 | 2019-04-26 | 中国科学院长春光学精密机械与物理研究所 | A kind of IRIG-B alternating current code decoding circuit and method |
| CN109617553A (en) * | 2018-12-28 | 2019-04-12 | 武汉依迅电子信息技术有限公司 | Exchange IRIG-B coding/decoding method and device |
| CN112987545A (en) * | 2021-03-29 | 2021-06-18 | 南方电网数字电网研究院有限公司 | Time signal code element identification method, device and time system equipment |
| CN114967417A (en) * | 2022-05-06 | 2022-08-30 | 北京九天利建信息技术股份有限公司 | IRIG-B alternating current code amplitude adaptive demodulation method and device |
| CN114967417B (en) * | 2022-05-06 | 2024-02-23 | 北京九天利建信息技术股份有限公司 | IRIG-B alternating current code amplitude self-adaptive demodulation method and device |
| CN115567144A (en) * | 2022-11-30 | 2023-01-03 | 中国船舶集团有限公司第七〇七研究所 | Demodulation method and system of reference time 1PPS in IRIG-B code |
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