CN102508423A - IRIG-B (Inter-Range Instrumentation Group-B) time-setting method adopting enhanced capture module - Google Patents
IRIG-B (Inter-Range Instrumentation Group-B) time-setting method adopting enhanced capture module Download PDFInfo
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- CN102508423A CN102508423A CN2011103716274A CN201110371627A CN102508423A CN 102508423 A CN102508423 A CN 102508423A CN 2011103716274 A CN2011103716274 A CN 2011103716274A CN 201110371627 A CN201110371627 A CN 201110371627A CN 102508423 A CN102508423 A CN 102508423A
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Abstract
The invention relates to an IRIG-B (Inter-Range Instrumentation Group-B) time-setting method adopting an enhanced capture module. The IRIG-B time-setting method comprises the following steps of: inputting a TTL (Time To Live) signal of an IRIG-B code into an ECAP (Enhanced Capture Module) pin through a photoelectric isolation device and transmitting the TTL signal to an edge and sequence examining part; configuring a trigger event of an ECAP module, defining a raising edge and a failing edge of pulse in a program for capturing and capturing the difference between the pulses in two times to obtain the width of the pulse, thereby calculating an IRIG-B code element; if two continuously-captured pulses are P code elements respectively, determining a calculated code value as a time reference point of the point; and after the time reference point is determined, receiving a code value within one second to calculate the current time and correcting the time of device equipment. According to the IRIG-B time-setting method disclosed by the invention, the interruption at the fixed time for sampling is not needed, so that frequent interruption caused by a query mode is avoided, the ambient interference is reduced, the handing period of an MCU (Micro Control Unit) is shortened and the bit error rate of receiving is improved; due to the utilization of the pulse capture capability of the ECAP, the pulse width can be easily calculated and the extraction of synchronizing signals is realized; and meanwhile, the time setting precision of the IRIG-B code is met and no other logic devices are added, so that the IRIG-B time-setting method is simple, convenient and reliable and is strong in practicability.
Description
Technical field
The present invention relates to be smart machine to the time technical field, in particular a kind of receive the decode IRIG-B to the time method, promptly adopt to strengthen IRIG-B (DC) setting means of catching (ECAP) module.
Background technology
Accurate and the unification of time. be crucial in electrical network.In many fields of electric system, such as sequence of event, relay protection, fault localization, electric energy tariffing, real-time information collection etc. all need a unification, the high precision time benchmark.Because accurately the unified time benchmark can break down and operate. particularly take place under the situation of continuous fault in the short time. the action behavior of each Microcomputer Protection of analyzing and researching easily, failure cause, fault type, fault incidence and development process.This is for crash analysis. guarantee that safe operation of power system has significance.Global position system GPS (Global Positioning System) provides unified split-second precision benchmark for the whole world. and be the high global time dissemination system of current precision.At present GPS to the time device extensively adopt IRIG-B (Inter-Range Instrumentation Group-B) coding mode, IRIG-B is a kind of serial time permutation code.The time frame rate be 1 frame/s; Can transmit 100 information.As widely used timing code, tool is used following principal feature: carry and contain much information high resolving power; B sign indicating number bandwidth after the modulation is applicable to long-distance transmissions; Divide direct current, exchange two kinds; Has nuclear interface standardizing, characteristics such as international.
IRIG time encoding sequence be propose by the subordinate's of U.S. Department of Defense target range instrument group (IRIG) and by the temporal information transmission system of widespread usage.This time-code sequence is divided into G, A, and B, E, H, D be totally six kinds of coded formats, and most widely used is the IRIG-B form. be called for short the B sign indicating number; Its outstanding advantage be with time synchronizing signal and second, branch, the time, sky equal time sign indicating number information is loaded in the signal vehicle that frequency is 1 kHz.
The B coded signal is the time string sign indicating number of per second one frame. its basic code element is " 0 " code element, " 1 " code element and " P " code element, and each code element takies the 10ms time, and a frame string sign indicating number contains 100 code elements.The corresponding pulse width in code element " 0 " and " 1 " is that 2 ms and 5 ms. " P " code element are the position code elements. corresponding pulse width is 8 ms.
Fig. 1 is IRIG-B sign indicating number frame format synoptic diagram; Referring to Fig. 1, every frame begins from witness marker Pr, and the forward position of the 2nd 8ms pulse in just continuous two 8ms pulses begins, and is respectively Pr, and the 0th, l,, 99 code elements.Be the BCD field between Pr and P6, transmission be the binary-coded decimal form temporal information (comprise second, branch, the time, sky, year information), low level is preceding, high-order after; Individual position top ten after.Be the CF field between P6 and P8, realize control function, the agreement in the time of can using according to reality is formulated method of application.Between P8 and next P0 is the SBS field, is the second number in a day with binary representation.
Because the B coded signal had both contained synchronizing signal; Comprise temporal information again; Need gather, analyze signal, and electric substation automation system to be very harsh again to the requirement of time synchronized. this will changes persuing power station smart machine has real-time and accuracy to the analysis of B coded signal.
Present B sign indicating number has two types of setting means, and the one, the method that adopts TTL integrated circuit, FPGA and MCU to combine realizes, utilizes gate circuit and trigger from coded signal, to extract a second synchronizing signal, and realizes the decoding of temporal information with MCU; But the setting means of external gate circuit of this employing or FPGA, it is more to there is device, complex structure, poor reliability, versatility be poor, be unfavorable for defect problems such as function expansion.The 2nd, adopt the GPIO port of MCU regularly to interrupt sampling through the time, the extraction of coded signal and decoding are all accomplished in regularly interrupting; Yet the setting means of existing GPIO in order to improve the resolution of code element, must improve sampling precision, improves the time interruption frequency, has increased the processing cycle of MCU.Therefore, the setting means of existing B sign indicating number remains further to be improved.
Summary of the invention
To the deficiency that exists on the prior art; The present invention seeks to be to provide a kind of bit error rate that improves reception and to the time real-time and accuracy; The employing that reduces the hardware circuit complexity strengthens IRIG-B (DC) setting means of catching (ECAP) module, realizes the extraction of synchronizing signal, has avoided adopting the frequent interruption of inquiry mode; Reduce the processing cycle of MCU, improved reliability and versatility.
To achieve these goals, the present invention realizes through following technical scheme:
Adopt and strengthen the IRIG-B setting means of catching (ECAP) module; It is characterized in that; Its setting means is: (1) is delivered to 32 pins that strengthen capture modules (ECAP) of the TTL signal process photoelectric isolating device input MCU of IRIG-B sign indicating number edge audit part and sequence and is examined part;
(2) trigger event of configuration ECAP module, the rising edge and the negative edge of definition paired pulses are caught in program;
Twice difference of (3) according to the ECAP module rising edge and negative edge being caught is exactly pulse width, calculates code value then;
If two pulses of catching continuously are P sign indicating number code element, the code value that then calculates is confirmed as this time reference point, gets into step (4);
(4) after confirming time reference point, the code value that receives in the 1s just can calculate the current time, for appliance arrangement carries out time calibration.
As preferred version, what above-mentioned enhancing capture module adopted is 32 enhancing capture modules;
As preferred version, the audit of above-mentioned edge promptly is set to rising edge or negative edge is effective, and above-mentioned sequence audit then is to distribute the current register that acts on (CAP1～CAP4).
Above-mentioned MCU (Micro Control Unit), Chinese is a micro-control unit.
The present invention promptly strengthens capture module IRIG-B sign indicating number TTL signal through photoelectric isolating device through using 32 ECAP (Enhanced Capture Module) module of MCU, reduces environmental disturbances.The setting means of the enhancement mode capture module of this MCU; Do not need regularly to interrupt sampling, avoided adopting the frequent interruption of inquiry mode, reduced the processing cycle of MCU; The bit error rate that improve to receive and to the time real-time and accuracy; Through ECAP pulse capture ability, can be easy to calculate pulse width, realize the extraction of synchronizing signal; Both satisfied simultaneously the IRIG-B sign indicating number to the time precision, need not to increase other logical device again, easy to be reliable, highly versatile.
Description of drawings
Specify the present invention below in conjunction with accompanying drawing and embodiment;
Fig. 1 is IRIG-B sign indicating number frame format synoptic diagram;
Fig. 2 is an IRIG-B sign indicating number time setting circuit module map;
Fig. 3 is the sequential chart of ECAP;
Fig. 4 is decoding process figure of the present invention.
Embodiment
For technological means, creation characteristic that the present invention is realized, reach purpose and effect and be easy to understand and understand, below in conjunction with embodiment, further set forth the present invention.
Fig. 2 is an IRIG-B sign indicating number time setting circuit module map; Fig. 3 is the sequential chart of ECAP; Referring to Fig. 2 and Fig. 3, present embodiment provides a kind of bit error rate that improves reception, reduces the hardware circuit complexity, and the employing that improves versatility strengthens IRIG-B (DC) setting means of catching (ECAP) module, and it is that direct current IRIG-B setting means is following:
(1) the TTL signal of IRIG-B sign indicating number is imported the pin of the enhancing capture module (ECAP) of MCU through photoelectric isolating device, and deliver to edge audit part and sequence audit part.Through tangible photoelectric isolating device, reduce environmental disturbances, improved its degree of accuracy.
In the present embodiment, the audit of above-mentioned edge promptly is set to rising edge or negative edge is effective, and the sequence audit then is to distribute the current register that acts on such as CAP1～CAP4.
(2) configuration strengthens the trigger event of capture module, and the rising edge and the negative edge of definition paired pulses are caught in program; Referring to Fig. 4, Fig. 4 is decoding process figure of the present invention;
(3) at first ECAP interrupts, and is exactly pulse width according to strengthening twice difference that capture module catches rising edge and negative edge, thereby tells the IRIG-B code value of this pulse.
If two pulses of catching continuously are P sign indicating number code element, the code value that then calculates is confirmed as this time reference point, gets into step (4);
(4) after confirming time reference point, the code value that receives in the 1s just can calculate the current time, for appliance arrangement carries out time calibration.
Enhancing capture module Enhanced Capture (ECAP) Module enhancement mode capture module in this enforcement has 4 32bit time window acquisition control registers, 4 characteristics such as edge polarity (rising edge/negative edge) event channel independently.
In addition, the MCU of any ECAP of having module all can adopt this method to realize.
Present embodiment adopts the setting means of 32 enhancement mode capture modules of MCU, does not need regularly to interrupt sampling, and can be easy to calculate pulse width through ECAP pulse capture ability, realizes the extraction of synchronizing signal; Avoid adopting the frequent interruption of inquiry mode, reduced the processing cycle of MCU.
And IRIG-B sign indicating number TTL signal reduces environmental disturbances through photoelectric isolating device, improve the bit error rate that receives and to the time real-time and accuracy, do not increase the external hardware circuit simultaneously, improved reliability and versatility.
Total the above, the present invention has made full use of the ECAP module of MCU, adopts the hardware interrupts decoding; Both satisfied the IRIG-B sign indicating number to the time precision, need not to increase other logical device again, easy to be reliable; Highly versatile avoids adopting the frequent interruption of inquiry mode, has reduced the processing cycle of MCU.
More than show and described ultimate principle of the present invention and principal character and advantage of the present invention.The technician of the industry should understand; The present invention is not restricted to the described embodiments; That describes in the foregoing description and the instructions just explains principle of the present invention; Under the prerequisite that does not break away from spirit and scope of the invention, the present invention also has various changes and modifications, and these variations and improvement all fall in the scope of the invention that requires protection.The present invention requires protection domain to be defined by appending claims and equivalent thereof.
Claims (3)
1. adopt the IRIG-B setting means that strengthens capture module; It is characterized in that; Its setting means is: (1) is delivered to 32 pins that strengthen capture modules of the TTL signal process photoelectric isolating device input MCU of IRIG-B sign indicating number edge audit part and sequence and is examined part;
(2) configuration strengthens the trigger event of capture module, and the rising edge and the negative edge of definition paired pulses are caught in program;
(3) be exactly pulse width according to strengthening twice difference that capture module catches rising edge and negative edge, calculate code value then;
If two pulses of catching continuously are P sign indicating number code element, the code value that then calculates is confirmed as this time reference point, gets into step (4);
(4) after confirming time reference point, the code value that receives in the 1s calculates the current time, for appliance arrangement carries out time calibration.
2. employing according to claim 1 strengthens the IRIG-B setting means of capture module, it is characterized in that, what above-mentioned enhancing capture module adopted is 32 enhancing capture modules.
3. employing according to claim 1 strengthens the IRIG-B setting means of capture module; It is characterized in that; In the said step (1), the audit of above-mentioned edge promptly is set to rising edge or negative edge is effective, and above-mentioned sequence audit then is to distribute the current register that acts on.
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Cited By (4)
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| CN104503217A (en) * | 2014-11-21 | 2015-04-08 | 广西智通节能环保科技有限公司 | Stopwatch detector |
| CN106873476A (en) * | 2017-04-12 | 2017-06-20 | 北京机械设备研究所 | A kind of method of use ECAP implement of interruption function electric voltage frequency and Phase Tracking |
| CN107147601A (en) * | 2014-08-21 | 2017-09-08 | 常州工学院 | A kind of FSK demodulation methods based on the isometric mechanism of pulsewidth |
| CN112231267A (en) * | 2020-10-16 | 2021-01-15 | 天津津航计算技术研究所 | B code timing device of homemade VPX framework |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107147601A (en) * | 2014-08-21 | 2017-09-08 | 常州工学院 | A kind of FSK demodulation methods based on the isometric mechanism of pulsewidth |
| CN107147601B (en) * | 2014-08-21 | 2020-07-31 | 常州工学院 | FSK demodulation method based on pulse width equal length mechanism |
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| CN106873476B (en) * | 2017-04-12 | 2019-03-15 | 北京机械设备研究所 | A method of using ECAP implement of interruption function electric voltage frequency and Phase Tracking |
| CN112231267A (en) * | 2020-10-16 | 2021-01-15 | 天津津航计算技术研究所 | B code timing device of homemade VPX framework |
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Application publication date: 20120620 |