CN102916800A - Full-digital decoding implementation method for IRIG (inter-range instrumentation group)-B (AC) codes - Google Patents

Full-digital decoding implementation method for IRIG (inter-range instrumentation group)-B (AC) codes Download PDF

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Publication number
CN102916800A
CN102916800A CN2011102161409A CN201110216140A CN102916800A CN 102916800 A CN102916800 A CN 102916800A CN 2011102161409 A CN2011102161409 A CN 2011102161409A CN 201110216140 A CN201110216140 A CN 201110216140A CN 102916800 A CN102916800 A CN 102916800A
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irig
code
digital decoding
chip
crest
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李猛
沈卓
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Chengdu Spaceon Electronics Co Ltd
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Chengdu Spaceon Electronics Co Ltd
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Abstract

The invention provides a full-digital decoding implementation method for IRIG (inter-range instrumentation group)-B (AC) codes. The full-digital decoding implementation method mainly overcomes shortcomings of complicated circuit, low decoding precision, incomplete decoding information and the like of an existing decoding method. A hardware circuit used in the full-digital decoding implementation method comprises a single chip microcomputer with a differential A/D (analog/digital) function, a pulse forming chip and a pulse shaping chip. The full-digital decoding implementation method includes transmitting an inputted IRIG-B (AC) code to an A/D circuit of the signal chip microcomputer and simultaneously transmitting the inputted IRIG-B (AC) code to a pulse forming circuit; transmitting a pulse signal formed by the pulse forming chip to the pulse shaping chip; and transmitting a control signal of the single chip microcomputer to the pulse shaping chip. The circuit transmits reference second information and serial decoding information after processing.

Description

The digital decoding realization method of a kind of IRIG-B (AC) code
Technical field
The present invention relates to the coding/decoding method of the technical a kind of IRIG-B of time unification (AC) code, specifically, relate to the implementation method that a kind of AVR of utilization single-chip microcomputer difference A/D function is carried out high accuracy, digital decoding to the positive polarity reversing signal of IGIG-B (AC) code.
Background technology
IRIG-B (AC) code is a kind of coded system of passing time.IRIG-B (AC) code has the characteristics such as antijamming capability is strong on wired passing time information, propagation distance is far away, and therefore, it is technical that it is widely used in time unification.
To the decoding of IRIG-B (AC) code, except demodulating the temporal information, the most important thing is to demodulate accurate second information.High accuracy, the digital coding/decoding method of IRIG-B of the present invention (AC) code can demodulate accurately accurate second information and more and out of Memory, as: the modulation ratio of IRIG-B (AC) code, amplitude information etc.
Summary of the invention
The object of the present invention is to provide a kind of new coding/decoding method, not only want Exact Solutions to access temporal information and the accurate second information of IRIG-B (AC) code, and will demodulate the information such as signal amplitude and modulation ratio, and can externally provide IRIG-B (AC) the various demodulating informations of coded signal by serial bus.
To achieve these goals, the technical solution used in the present invention is as follows:
The digital coding/decoding method of a kind of IRIG-B (AC) code, its circuit feature is, comprise and be built-in with the RS232 serial interface bus, 5V difference analogue input channel, and before the A/D conversion, the ATmega128 single-chip microcomputer of the amplifying stage of 0 dB (1x), 20 dB (10x) or 46 dB (200x) is provided for the difference input voltage; 5mV comparison threshold, only the fast differential comparator MAX942 of 80ns time-delay; The 5V programmable logic device XC9536 of XILINX company.
The function of ATmega128 single-chip microcomputer is: finish the digitlization to Simulation with I RIG-B (AC) code, carry out error code and play and remove, demodulate temporal information, modulation ratio, amplitude, and by the judgement to temporal information, send and put a second control signal (putting positive polarity or negative polarity); Finish the communication work with host computer, send various demodulating informations, and can adopt host function or slave function, namely initiatively send out and accessed after send out again demodulating information.
The function of MAX942 is: IRIG-B (AC) coded signal is become square-wave signal, selecting twin-channel comparator reason is to prevent in the positive-negative polarity situation, because 5mV comparison threshold and hour cause time-delay in IRIG-B (AC) coded signal amplitude reduces synchronization accuracy.By the two group pulse signals that the binary channels comparator produces, all send into XC9536.
The function of XC9536 is: the two group pulse signals that cooperate ATmega128 single-chip microcomputer and MAX942 comparator to emit, putting under second control signal effect of ATmega128 single-chip microcomputer, emit corresponding (being positive polarity or negative polarity) pulse signal that the MAX942 comparator feed is come, and be shaped as the pulse signal of 30ms in inside, as second signal send.
The present invention can be used on the demodulation of IRIG-B (AC) code or the checkout equipment, and through the side circuit test, described function can realize fully, and decode precision has very high promotion and application prospect about 1us, belongs to the time unification technology.
Description of drawings
Fig. 1 is theory diagram of the present invention.
Fig. 2 is physical structure schematic diagram of the present invention.
Fig. 3 is the program flow diagram of implementation method of the present invention.
Embodiment
The invention will be further described below in conjunction with accompanying drawing.
Such as Fig. 1, the digital decoding realization method of a kind of IRIG-B (AC) code, its hardware components mainly comprises: A/D conversion and decoding, and the Atmega128 single-chip microcomputer of responsible communication, pulse shaping chip MAX942, shaping pulse chip XC9536.
Described decoding chip by after the A/D function digit, then judges that by program waveform is significant waveform or waveform by a small margin with IRIG-B (AC) code, and the process of judgement is: the A/D numerical value after will sampling compares.If be on the occasion of, and the numeric ratio last time of receiving is large, then carries out the renewal of positive; If the numerical value of receiving is negative value, and compare the little of last time, carry out the renewal of negative value, simultaneously, during the negative value minimum value, whether judgement satisfies 13:20 on the occasion of the ratio of the absolute value of maximum and negative value minimum value.If this is judged as vacation, then the positive pulse number is added 1; If this is judged as very, then the positive pulse number is taken out, judge decoding.To judge that simultaneously initial waveform is positive polarity or negative polarity, judge when sending accurate second control signal, put the accurate pulse per second (PPS) of positive polarity or put the accurate pulse per second (PPS) of negative polarity.In decode procedure, if after receiving second head, just prepare the demodulation time, and prepare to deliver to CPLD putting a second control signal; Simultaneously, after receiving the visit information of host computer, send demodulating information.
Described decoding chip for the processing of IRIG-B (AC) code positive-negative polarity is: the crest value that samples and the crest value of storage are compared, if the crest value of storage than the crest value that samples less than or equal to 13:20, judge that then waveform is negative polarity; If their ratio is greater than 13:20, then waveform is positive polarity.
Described pulse shaping chip becomes IRIG-B (AC) code into pulse signal, and pulse signal is sent into CPLD, does to put a second preparation.
Described shaping pulse chip under the effect of putting second control signal, is elected the pulse that the pulse shaping chip is sent here, as accurate second signal, simultaneously, it is shaped to 30ms after, run out the accurate second signal as IRIG-B (AC) code.The effect of shaping chip, except shaping pulse will being become 30ms, also because of the pulse shaping chip, the pulse that its forms has a vibration interval, and the shaping pulse chip is just in order to eliminate this vibration interval.

Claims (7)

1. the digital decoding realization method of an IRIG-B (AC) code, it is characterized in that, the single-chip microcomputer that comprises 5V difference A/D translation function, and the binary channels comparator chip of delaying time little, that comparison threshold voltage is low, programmable logic chip, described programmable logic chip links to each other with comparator with single-chip microcomputer.
2. according to the digital decoding realization method of right 1 described a kind of IRIG-B (AC) code, it is characterized in that, described single-chip microcomputer is ATmega128.
3. according to the digital decoding realization method of right 1 described a kind of IRIG-B (AC) code, it is characterized in that, described single-chip microcomputer has difference A/D function.
4. according to the digital decoding realization method of right 1 described a kind of IRIG-B (AC) code, it is characterized in that, described comparator is MAX942.
5. according to the digital decoding realization method of right 1 described a kind of IRIG-B (AC) code, it is characterized in that, described comparator is binary channels.
6. according to the digital decoding realization method of right 1 described a kind of IRIG-B (AC) code, it is characterized in that, is the RS232 serial bus with communicating by letter of host computer.
7. according to the digital decoding realization method of right 1 described a kind of IRIG-B (AC) code, the feature of implementation procedure comprises: if the A/D data that receive are positive number, then judge whether it is greater than previous A/D sampled value, if greater than previous sampled value, illustrate also not sample crest, until the data of sampling are less than previous sampled data; If the A/D data that receive are negative, then judge whether it is less than previous A/D sampled value, if less than previous sampled value, illustrate also not sample trough, until the data of sampling are greater than previous sampled data; After sampling the Wave crest and wave trough value, get the coded pulse value, when trough, judge whether last large crest of crest, if be large crest, then count the crest pulse number, continue sampling, if not large crest, judge then the crest pulse number of counting is what, according to this decoding data with put second.
CN2011102161409A 2011-07-31 2011-07-31 Full-digital decoding implementation method for IRIG (inter-range instrumentation group)-B (AC) codes Pending CN102916800A (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101493674A (en) * 2008-01-24 2009-07-29 郑州威科姆技术开发有限公司 B code demodulating and decoding method and apparatus thereof
CN201674483U (en) * 2010-06-02 2010-12-15 北京中恒博瑞数字电力科技有限公司 IRIG_B code decoding interface circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101493674A (en) * 2008-01-24 2009-07-29 郑州威科姆技术开发有限公司 B code demodulating and decoding method and apparatus thereof
CN201674483U (en) * 2010-06-02 2010-12-15 北京中恒博瑞数字电力科技有限公司 IRIG_B code decoding interface circuit

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
佟刚,等: "MSP430F149 在IRIG- B 码解码中的应用", 《计算机测量与控制》, vol. 15, 15 November 2007 (2007-11-15) *
单风云: "ATmegal128+CPLD在IRIG-B码中的应用", 《中国科技论文在线》, 9 November 2010 (2010-11-09) *
郑海生,等: "IRIG-B码解码编码卡", 《电子测量技术》, no. 6, 14 December 2005 (2005-12-14) *

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Application publication date: 20130206