CN109617553A - Exchange IRIG-B coding/decoding method and device - Google Patents
Exchange IRIG-B coding/decoding method and device Download PDFInfo
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- CN109617553A CN109617553A CN201811625170.3A CN201811625170A CN109617553A CN 109617553 A CN109617553 A CN 109617553A CN 201811625170 A CN201811625170 A CN 201811625170A CN 109617553 A CN109617553 A CN 109617553A
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- H—ELECTRICITY
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Abstract
The embodiment of the present invention provides a kind of exchange IRIG-B coding/decoding method and device, which comprises carries out zero passage detection to alternating-current B code signal, extracts the lkHz square-wave signal in the alternating-current B code signal；It is sampled based on peak value of the A/D converter to the alternating-current B code signal, amplitude detection is carried out to the alternating-current B code signal according to sampled result, converts pulse square wave signal for the alternating-current B code signal；DC B code signal is converted by the pulse square wave signal based on FPGA, the DC B code signal is compensated using the lkHz square-wave signal, the compensated DC B code signal is demodulated, obtains the corresponding temporal information of the alternating-current B code signal.The embodiment of the present invention is simple and practical, small in size, low in energy consumption, while having stronger anti-interference, improves and enhances the decoded reliability of alternating-current B code and decoded adaptability, improves decoding precision.
Description
Technical field
The embodiment of the present invention belongs to electronic automation technology field, more particularly, to a kind of decoding side exchange IRIG-B
Method and device.
Background technique
IRIG-B IRIG-B format time code (hereinafter referred to as B code) is that one of time system commonly uses serial transmission mode, compared with
Parallel transmission mode its physical connection is simple, long transmission distance, nuclear interface standardizing, general specification, high reliablity, and flexibly side
Just.B code becomes the standard pattern of timing equipment first choice with its superior function.China's target range measurement, control, calculating, communication, gas
As etc. test equipments, be all made of the IRIG-B IRIG-B format time code of international standard as time synchronizing standard.
B code be divided into direct current (Direct Current, DC) code with exchange (Alternating Current, AC) code.Its
In, alternating current code is formed after carrying out amplitude modulation to direct current code with the sine wave carrier frequency of 1KHz；Direct current code is pulsewidth coding side
Formula.IRIG-B signal 1 frame per second includes 100 symbols, and each code element 10ms, code output combination can be ever-changing, but basic
Code only there are three types of, i.e. 2ms width means Binary Zero, and separate mark or uncoded position, 5ms width means binary one,
The whole 100ms reference mark of 8ms width means.
Alternating current code is the 1kHz sinusoidal signal of modulation, and amplitude variation is high, and peak-to-peak value range is 3~12V P-P, and modulation ratio is
1:6~1:2.Lighted on time from the second, by the second, point, hour and time of day information encoded.The demodulation principle of direct current code is opposite
Simply, it combines timer to detect pulsewidth with the I/O mouth of CPU, or is decoded with the method for the clock detection pulsewidth of FPGA.For
The decoding of alternating-current B code generally uses automatic growth control (Automatic Generation Control, AGC) circuit.Due to
Alternating-current B code is amplitude-modulated wave, and the modulation ratio of alternating-current B code is be easy to cause to change, and along with the range of linearity of agc circuit is narrow, is held
Easy distorton, response speed is slow, and the demodulation time is long, poor reliability.
Summary of the invention
To overcome above-mentioned existing exchange IRIG-B coding/decoding method to be easy to happen distorton, response speed is slow, when demodulation
Between it is long, the problem of poor reliability or at least be partially solved the above problem, the embodiment of the present invention provides a kind of exchange IRIG-B
Coding/decoding method and device.
According to a first aspect of the embodiments of the present invention, a kind of exchange IRIG-B coding/decoding method is provided, comprising:
Zero passage detection is carried out to exchange IRIG-B code signal, extracts the lkHz square wave in the exchange IRIG-B code signal
Signal；
It is sampled based on peak value of the A/D converter to the exchange IRIG-B code signal, according to sampled result to described
It exchanges IRIG-B code signal and carries out amplitude detection, convert pulse square wave signal for the exchange IRIG-B code signal；
Direct current IRIG-B code signal is converted by the pulse square wave signal based on FPGA, uses the lkHz square-wave signal
The direct current IRIG-B code signal is compensated, the compensated direct current IRIG-B code signal is demodulated, obtains institute
State the corresponding temporal information of exchange IRIG-B code signal.
Second aspect according to embodiments of the present invention provides a kind of exchange IRIG-B decoding apparatus, comprising:
First detection module extracts the exchange IRIG-B for carrying out zero passage detection to exchange IRIG-B code signal
LkHz square-wave signal in code signal；
Second detection module, for being sampled based on peak value of the A/D converter to the exchange IRIG-B code signal, root
Amplitude detection is carried out to the exchange IRIG-B code signal according to sampled result, converts arteries and veins for the exchange IRIG-B code signal
Rush square-wave signal；
Demodulation module uses institute for converting direct current IRIG-B code signal for the pulse square wave signal based on FPGA
LkHz square-wave signal is stated to compensate the direct current IRIG-B code signal, to the compensated direct current IRIG-B code signal into
Row demodulation obtains the corresponding temporal information of the exchange IRIG-B code signal.
In terms of third according to an embodiment of the present invention, a kind of electronic equipment is also provided, comprising:
At least one processor；And
At least one processor being connect with the processor communication, in which:
The memory is stored with the program instruction that can be executed by the processor, and the processor calls described program to refer to
Order, which is able to carry out in the various possible implementations of first aspect, exchanges IRIG- provided by any possible implementation
B coding/decoding method.
4th aspect according to an embodiment of the present invention, also provides a kind of non-transient computer readable storage medium, described
Non-transient computer readable storage medium stores computer instruction, and the computer instruction makes the computer execute first aspect
Various possible implementations in IRIG-B coding/decoding method is exchanged provided by any possible implementation.
The embodiment of the present invention provides a kind of exchange IRIG-B coding/decoding method and device, and this method, which passes through, is based on A/D converter
The peak value of exchange IRIG-B code signal is sampled, amplitude inspection is carried out to exchange IRIG-B code signal according to sampled result
It surveys, converts pulse square wave signal for exchange IRIG-B code signal, be then based on FPGA for pulse square wave signal and be converted into direct current
IRIG-B code signal, and direct current IRIG-B code signal is compensated using the zero passage detection result of exchange IRIG-B code signal,
The present embodiment is simple and practical, small in size, low in energy consumption, while having stronger anti-interference, improves and enhances the decoding of alternating-current B code
Reliability and decoded adaptability, improve decoding precision.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is this hair
Bright some embodiments for those of ordinary skill in the art without creative efforts, can be with root
Other attached drawings are obtained according to these attached drawings.
Fig. 1 is exchange IRIG-B coding/decoding method overall flow schematic diagram provided in an embodiment of the present invention；
Fig. 2 is decoding principle flow diagram in exchange IRIG-B coding/decoding method provided in an embodiment of the present invention；
Fig. 3 is the 1kHz square-wave signal of zero passage detection result in exchange IRIG-B coding/decoding method provided in an embodiment of the present invention
Schematic diagram；
Fig. 4 is the pulse square wave letter of high-amplitude testing result in exchange IRIG-B coding/decoding method provided in an embodiment of the present invention
Number schematic diagram；
Fig. 5 is the pulse square wave in exchange IRIG-B coding/decoding method provided in an embodiment of the present invention by high-amplitude testing result
The DC B code signal schematic diagram that signal generates；
Fig. 6 is exchange IRIG-B decoding apparatus overall structure diagram provided in an embodiment of the present invention；
Fig. 7 is electronic equipment overall structure diagram provided in an embodiment of the present invention.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art
Every other embodiment obtained without creative efforts, shall fall within the protection scope of the present invention.
A kind of exchange IRIG-B coding/decoding method is provided in one embodiment of the invention, and Fig. 1 mentions for the embodiment of the present invention
The exchange IRIG-B coding/decoding method overall flow schematic diagram of confession, this method comprises: S101, carried out exchange IRIG-B code signal
Zero detection extracts the lkHz square-wave signal in the exchange IRIG-B code signal；
The present embodiment realizes the demodulation to exchange IRIG-B code signal using FPGA and its peripheral circuit.First from alternating-current B
DC B code signal is demodulated in code signal, then DC B code signal is demodulated, to realize the demodulation of alternating-current B code.Fig. 2
To exchange IRIG-B decoding principle flow diagram.Enter as shown in Fig. 2, the alternating-current B code signal of input is divided into three road signals
Outer net processing circuit.Wherein, signal passes through zero cross detection circuit all the way, extracts the 1kHz clock of alternating-current B code.Zero passage detection
It as a result is the 1kHz square-wave signal of standard, as shown in Figure 3.The top of Fig. 3 is alternating-current B code signal, and lower section is top alternating-current B code letter
Number zero passage detection result.
S102 is sampled based on peak value of the A/D converter to the exchange IRIG-B code signal, according to sampled result pair
The exchange IRIG-B code signal carries out amplitude detection, converts pulse square wave signal for the exchange IRIG-B code signal；
In addition signal passes through amplitude detection circuit all the way, converts pulse square wave signal for the amplitude of alternating-current B code.Most
Signal enters A/D converter all the way afterwards, realizes the sampling to alternating-current B code peak value.By FPGA control digital regulation resistance according to sampling
As a result it is divided, generates suitable comparative level, so that amplitude detection circuit is to the high-amplitude waveform in alternating-current B code signal
Pulse signal detected.Top is alternating-current B code signal in Fig. 4, and lower section is that the amplitude of top alternating-current B code signal detects knot
Fruit.The result of amplitude detection is inputted into FPGA.The processing of zero passage detection and amplitude detection can use dedicated comparator
AD790 is realized, to greatly reduce the complexity of circuit hardware design.
S103 converts direct current IRIG-B code signal for the pulse square wave signal based on FPGA, uses the side lkHz
Wave signal compensates the direct current IRIG-B code signal, demodulates to the compensated direct current IRIG-B code signal,
Obtain the corresponding temporal information of the exchange IRIG-B code signal.
DC B code signal is readily generated by FPGA by the pulse signal that high-amplitude detects, as shown in Figure 5.Above Fig. 5
For the pulse square wave signal of high-amplitude detection, the lower section Fig. 5 is the DC B code signal that top pulse square wave signal generates.It can see
Displacement to the right, i.e. time lag has occurred in opposite alternating-current B code of punctual quarter at this time out.By zero passage detection as a result, the i.e. side 1kHz
Wave signal carries out compensation appropriate as the foundation carved on time, to DC B code signal, to guarantee the decoded precision of alternating-current B code.
The present embodiment can be verified on the hardware platform using the EP2C5T144C8 of altera corp as core devices.Logic electricity
It is realized using Verilog Programming with Pascal Language road part.Actual test the result shows that, the temporal information demodulated is correct, demodulation
Synchronization accuracy can reach degree of precision by compensation appropriate, fully meet application request.
The present embodiment is tied by being sampled based on peak value of the A/D converter to exchange IRIG-B code signal according to sampling
Fruit carries out amplitude detection to exchange IRIG-B code signal, converts pulse square wave signal for exchange IRIG-B code signal, then
Direct current IRIG-B code signal is converted by pulse square wave signal based on FPGA, and uses the zero passage detection of exchange IRIG-B code signal
As a result direct current IRIG-B code signal is compensated, the present embodiment is simple and practical, small in size, low in energy consumption, while having stronger
Anti-interference improves and enhances the decoded reliability of alternating-current B code and decoded adaptability, improves decoding precision.
On the basis of the above embodiments, in the present embodiment based on A/D converter to the exchange IRIG-B code signal
The step of peak value is sampled specifically includes: based on A/D converter TLC1549 to it is described exchange IRIG-B code signal peak value into
Row sampling；Wherein, the clock of A/D conversion is provided by FPGA, and the initial time of each A/D conversion is determined by FPGA.
Specifically, A/D conversion circuit can using 10 AD conversion device TLC1549, the clock of A/D conversion by
FPGA is provided, and FPGA passes through the initial time that timing determination is converted every time, and realization samples alternating-current B code peak value.
On the basis of the above embodiments, in the present embodiment according to sampled result, to the exchange IRIG-B code signal into
The step of row amplitude detects specifically includes: according to sampled result, divided using FPGA control digital regulation resistance X9313U,
Obtain the reversion threshold of comparator in amplitude detection；The exchange IRIG-B code signal is carried out according to the reversion threshold high
Amplitude detection.
Specifically, in amplitude detection comparator reversion threshold according to AD sample as a result, digital electric by FPGA control
Position device X9313U divides to obtain, and compares threshold voltage between the exchange high low amplitude of IRIG-B code.X9313U can be 32 grades of 50k
Digital potentiometer ensure that the resolution ratio of comparator reversion threshold adjustment, it is ensured that comparator reference voltage is in best size.
On the basis of the various embodiments described above, the compensated direct current IRIG-B code signal is solved in the present embodiment
The step of adjusting, obtaining the exchange IRIG-B code signal corresponding temporal information specifically includes: after being based on fault-tolerance approach to compensation
The direct current IRIG-B code signal demodulated, obtain the corresponding temporal information of the exchange IRIG-B code signal.
Specifically, to overcome since wave distortion, distortion bring influence, fault-toleranr technique is used in demodulating process.Even if
Alternating current code high-amplitude sinusoidal signal with the second mark or tick lables of 8ms wide, corresponding 1kHz modulation is 8；The two of 5ms wide into
It is 5 corresponding to make " 1 "；The binary zero of 2ms wide is 2 corresponding.It is handled in demodulation to improve fault-tolerant ability, 7,8 and 9 by 8,4,5
With 6 by 5 processing, 1,2 and 3 by 2 processing, to be greatly improved demodulation adaptability.
On the basis of the various embodiments described above, the compensated direct current IRIG-B code signal is solved in the present embodiment
After the step of adjusting, obtaining the exchange IRIG-B code signal corresponding temporal information further include: if the temporal information of present frame
Meet preset range, and the time interval between the present frame and adjacent two frame time information of the present frame is 1 second,
Then know that the temporal information of the present frame is correct；If the temporal information of present frame is unsatisfactory for the preset range or described works as
Time interval between previous frame two frame time informations adjacent at least one of the present frame is not 1 second, then knows described work as
The temporal information mistake of previous frame.
Specifically, to the temporal information demodulated, range judgement is carried out first, i.e. hour less than 24, divides and the second is respectively less than
60, then judge whether the difference of adjacent two frame time information is equal to 1s.If these conditions all meet, the time demodulated is known
Information is correct, otherwise knows the temporal information mistake demodulated.It can also be judged by multiframe, such as continuous relatively three frames are correct
In the case of determine present frame it is correct, be otherwise considered as error.
On the basis of the various embodiments described above, based on A/D converter to the exchange IRIG-B code signal in the present embodiment
Peak value the step of being sampled specifically include: magnitude-squared operation is carried out to the exchange IRIG-B code signal；After operation
The exchange IRIG-B code signal be converted to digital quantity, the digital quantity is sampled.
Specifically, digital quantity is converted to after alternating-current B code being carried out magnitude-squared operation, to improve high-amplitude and tune by a narrow margin
Ratio processed more easily extracts and judges the number of high-amplitude signal, to improve the ability for obtaining orthochronous information.
A kind of exchange IRIG-B decoding apparatus is provided in another embodiment of the present invention, and the device is for realizing aforementioned
Method in each embodiment.Therefore, the description and definition in each embodiment of aforementioned exchange IRIG-B coding/decoding method, Ke Yiyong
The understanding of each execution module in the embodiment of the present invention.Fig. 6 is exchange IRIG-B decoding apparatus provided in an embodiment of the present invention
Overall structure diagram, the device include first detection module 601, the second detection module 602 and demodulation module 603；Wherein:
First detection module 601 is used to carry out zero passage detection to exchange IRIG-B code signal, extracts the exchange IRIG-
LkHz square-wave signal in B code signal；
The present embodiment realizes the demodulation to exchange IRIG-B code signal using FPGA and its peripheral circuit.First from alternating-current B
DC B code signal is demodulated in code signal, then DC B code signal is demodulated, to realize the demodulation of alternating-current B code.The
One 601 pairs of detection module is detected by the signal all the way of zero cross detection circuit, extracts the 1kHz clock of alternating-current B code.It crosses
The result of zero detection is the 1kHz square-wave signal of standard.
Second detection module 602 is used to sample based on peak value of the A/D converter to the exchange IRIG-B code signal,
Amplitude detection is carried out to the exchange IRIG-B code signal according to sampled result, converts the exchange IRIG-B code signal to
Pulse square wave signal；
All the way signal of second 602 pairs of the detection module Jing Guo amplitude detection circuit detects, by the high-amplitude of alternating-current B code
Value is converted into pulse square wave signal.Finally signal enters A/D converter all the way, realizes the sampling to alternating-current B code peak value.By FPGA
Control digital regulation resistance is divided according to sampled result, generates suitable comparative level, for the use of the second detection module 602
Amplitude detection circuit detects the pulse signal of the high-amplitude waveform in alternating-current B code signal.The knot that amplitude is detected
Fruit inputs FPGA.The processing of zero passage detection and amplitude detection can be realized using dedicated comparator AD790, to subtract significantly
The complexity of small circuit hardware design.
Demodulation module 603 is used to convert direct current IRIG-B code signal for the pulse square wave signal based on FPGA, uses
The lkHz square-wave signal compensates the direct current IRIG-B code signal, to the compensated direct current IRIG-B code signal
It is demodulated, obtains the corresponding temporal information of the exchange IRIG-B code signal.
DC B code signal is readily generated by FPGA by the pulse signal that high-amplitude detects.Punctual quarter at this time is opposite
Displacement to the right, i.e. time lag has occurred in alternating-current B code.Demodulation module 603 is by zero passage detection as a result, i.e. 1kHz square-wave signal is made
Subject to the moment foundation, compensation appropriate is carried out to DC B code signal, to guarantee the decoded precision of alternating-current B code.The present embodiment
It can be verified on the hardware platform using the EP2C5T144C8 of altera corp as core devices.Logic circuitry portions are adopted
It is realized with Verilog Programming with Pascal Language.Actual test the result shows that, the temporal information demodulated is correct, demodulate synchronization accuracy
Degree of precision can be reached by compensation appropriate, fully meet application request.
The present embodiment is tied by being sampled based on peak value of the A/D converter to exchange IRIG-B code signal according to sampling
Fruit carries out amplitude detection to exchange IRIG-B code signal, converts pulse square wave signal for exchange IRIG-B code signal, then
Direct current IRIG-B code signal is converted by pulse square wave signal based on FPGA, and uses the zero passage detection of exchange IRIG-B code signal
As a result direct current IRIG-B code signal is compensated, the present embodiment is simple and practical, small in size, low in energy consumption, while having stronger
Anti-interference improves and enhances the decoded reliability of alternating-current B code and decoded adaptability, improves decoding precision.
On the basis of the above embodiments, first detection module is specifically used in the present embodiment: to exchange IRIG-B code letter
Number carry out zero passage detection, extract it is described exchange IRIG-B code signal in lkHz square-wave signal；
Second detection module is further used for: device AD790 based on the comparison, according to sampled result to the exchange
IRIG-B code signal carries out amplitude detection.
On the basis of the above embodiments, the second detection module is further used in the present embodiment: being based on A/D converter
TLC1549 samples the peak value of the exchange IRIG-B code signal；Wherein, the clock of A/D conversion is provided by FPGA, every time
The initial time of A/D conversion is determined by FPGA.
On the basis of the above embodiments, the second detection module is further used in the present embodiment: according to sampled result, making
It is divided with FPGA control digital regulation resistance X9313U, obtains the reversion threshold of comparator in amplitude detection；According to described
It inverts threshold and amplitude detection is carried out to the exchange IRIG-B code signal.
On the basis of the various embodiments described above, demodulation module is specifically used in the present embodiment: based on fault-tolerance approach to compensation
The direct current IRIG-B code signal afterwards is demodulated, and the corresponding temporal information of the exchange IRIG-B code signal is obtained.
It further include correction module in the present embodiment on the basis of the various embodiments described above, if the time for present frame believes
Breath meets preset range, and the time interval between the present frame and adjacent two frame time information of the present frame is 1
Second, then know that the temporal information of the present frame is correct；If the temporal information of present frame is unsatisfactory for the preset range or described
Time interval between present frame two frame time informations adjacent at least one of the present frame is not 1 second, then knows described
The temporal information mistake of present frame.
It further include modulation module in the present embodiment on the basis of the various embodiments described above, for the exchange IRIG-B
Code signal carries out magnitude-squared operation；The exchange IRIG-B code signal after operation is converted into digital quantity, to the number
Amount is sampled.
The present embodiment provides a kind of electronic equipment, Fig. 7 is electronic equipment overall structure provided in an embodiment of the present invention signal
Figure, which includes: at least one processor 701, at least one processor 702 and bus 703；Wherein,
Processor 701 and memory 702 pass through bus 703 and complete mutual communication；
Memory 702 is stored with the program instruction that can be executed by processor 701, and the instruction of processor caller is able to carry out
Method provided by above-mentioned each method embodiment, for example, zero passage detection is carried out to alternating-current B code signal, extracts the friendship
Flow the lkHz square-wave signal in B code signal；It is sampled based on peak value of the A/D converter to the alternating-current B code signal, according to adopting
Sample result carries out amplitude detection to the alternating-current B code signal, converts pulse square wave signal for the alternating-current B code signal；Base
DC B code signal is converted by the pulse square wave signal in FPGA, the DC B code is believed using the lkHz square-wave signal
It number compensates, the compensated DC B code signal is demodulated, obtain the corresponding time letter of the alternating-current B code signal
Breath.
The present embodiment provides a kind of non-transient computer readable storage medium, non-transient computer readable storage medium storages
Computer instruction, computer instruction make computer execute method provided by above-mentioned each method embodiment, for example, to exchange
B code signal carries out zero passage detection, extracts the lkHz square-wave signal in the alternating-current B code signal；Based on A/D converter to described
The peak value of alternating-current B code signal is sampled, and carries out amplitude detection to the alternating-current B code signal according to sampled result, will be described
Alternating-current B code signal is converted into pulse square wave signal；DC B code signal is converted by the pulse square wave signal based on FPGA, is made
The DC B code signal is compensated with the lkHz square-wave signal, the compensated DC B code signal is solved
It adjusts, obtains the corresponding temporal information of the alternating-current B code signal.
Those of ordinary skill in the art will appreciate that: realize that all or part of the steps of above method embodiment can pass through
The relevant hardware of program instruction is completed, and program above-mentioned can be stored in a computer readable storage medium, the program
When being executed, step including the steps of the foregoing method embodiments is executed；And storage medium above-mentioned includes: ROM, RAM, magnetic disk or light
The various media that can store program code such as disk.
The apparatus embodiments described above are merely exemplary, wherein described, unit can as illustrated by the separation member
It is physically separated with being or may not be, component shown as a unit may or may not be physics list
Member, it can it is in one place, or may be distributed over multiple network units.It can be selected according to the actual needs
In some or all of the modules achieve the purpose of the solution of this embodiment.Those of ordinary skill in the art are not paying creativeness
Labour in the case where, it can understand and implement.
Through the above description of the embodiments, those skilled in the art can be understood that each embodiment can
It realizes by means of software and necessary general hardware platform, naturally it is also possible to pass through hardware.Based on this understanding, on
Stating technical solution, substantially the part that contributes to existing technology can be embodied in the form of software products in other words, should
Computer software product may be stored in a computer readable storage medium, such as ROM/RAM, magnetic disk, CD, including several fingers
It enables and using so that a computer equipment (can be personal computer, server or the network equipment etc.) executes each implementation
Method described in certain parts of example or embodiment.
Finally, it should be noted that the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although
Present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: it still may be used
To modify the technical solutions described in the foregoing embodiments or equivalent replacement of some of the technical features；
And these are modified or replaceed, technical solution of various embodiments of the present invention that it does not separate the essence of the corresponding technical solution spirit and
Range.
Claims (10)
1. a kind of exchange IRIG-B coding/decoding method characterized by comprising
Zero passage detection is carried out to exchange IRIG-B code signal, extracts the lkHz square wave letter in the exchange IRIG-B code signal
Number；
It is sampled based on peak value of the A/D converter to the exchange IRIG-B code signal, according to sampled result to the exchange
IRIG-B code signal carries out amplitude detection, converts pulse square wave signal for the exchange IRIG-B code signal；
Direct current IRIG-B code signal is converted by the pulse square wave signal based on FPGA, using the lkHz square-wave signal to institute
It states direct current IRIG-B code signal to compensate, the compensated direct current IRIG-B code signal is demodulated, the friendship is obtained
Flow the corresponding temporal information of IRIG-B code signal.
2. the method according to claim 1, wherein the step of carrying out zero passage detection to exchange IRIG-B code signal
It specifically includes:
Zero passage detection is carried out to exchange IRIG-B code signal based on comparator AD790；And/or
According to sampled result, the step of exchange IRIG-B code signal progress amplitude detection, is specifically included:
Device AD790 based on the comparison carries out amplitude detection to the exchange IRIG-B code signal according to sampled result.
3. the method according to claim 1, wherein based on A/D converter to the exchange IRIG-B code signal
Peak value the step of being sampled specifically include:
It is sampled based on peak value of the A/D converter TLC1549 to the exchange IRIG-B code signal；Wherein, A/D conversion when
Clock is provided by FPGA, and the initial time of each A/D conversion is determined by FPGA.
4. the method according to claim 1, wherein according to sampled result, to the exchange IRIG-B code signal
The step of carrying out amplitude detection specifically includes:
According to sampled result, is divided using FPGA control digital regulation resistance X9313U, obtain comparator in amplitude detection
Reversion threshold；
Amplitude detection is carried out to the exchange IRIG-B code signal according to the reversion threshold.
5. method according to claim 1 to 4, which is characterized in that the compensated direct current IRIG-B code signal
The step of being demodulated, obtaining the exchange IRIG-B code signal corresponding temporal information specifically includes:
The compensated direct current IRIG-B code signal is demodulated based on fault-tolerance approach, obtains the exchange IRIG-B code letter
Number corresponding temporal information.
6. method according to claim 1 to 4, which is characterized in that the compensated direct current IRIG-B code signal
After the step of being demodulated, obtaining the exchange IRIG-B code signal corresponding temporal information further include:
If the temporal information of present frame meets preset range, and adjacent two frame time information of the present frame and the present frame
Between time interval be 1 second, then know that the temporal information of the present frame is correct；
If the temporal information of present frame is unsatisfactory at least one phase of the preset range or the present frame with the present frame
Time interval between adjacent two frame time informations is not 1 second, then knows the temporal information mistake of the present frame.
7. method according to claim 1 to 4, which is characterized in that based on A/D converter to the exchange IRIG-B
The step of peak value of code signal is sampled specifically includes:
Magnitude-squared operation is carried out to the exchange IRIG-B code signal；
The exchange IRIG-B code signal after operation is converted into digital quantity, the digital quantity is sampled.
8. a kind of exchange IRIG-B decoding apparatus characterized by comprising
First detection module extracts the exchange IRIG-B code letter for carrying out zero passage detection to exchange IRIG-B code signal
LkHz square-wave signal in number；
Second detection module, for being sampled based on peak value of the A/D converter to the exchange IRIG-B code signal, according to adopting
Sample result carries out amplitude detection to the exchange IRIG-B code signal, converts pulse side for the exchange IRIG-B code signal
Wave signal；
Demodulation module, for converting direct current IRIG-B code signal for the pulse square wave signal based on FPGA, using described
LkHz square-wave signal compensates the direct current IRIG-B code signal, carries out to the compensated direct current IRIG-B code signal
Demodulation obtains the corresponding temporal information of the exchange IRIG-B code signal.
9. a kind of electronic equipment characterized by comprising
At least one processor, at least one processor and bus；Wherein,
The processor and memory complete mutual communication by the bus；
The memory is stored with the program instruction that can be executed by the processor, and the processor calls described program to instruct energy
Enough methods executed as described in claim 1 to 7 is any.
10. a kind of non-transient computer readable storage medium, which is characterized in that the non-transient computer readable storage medium is deposited
Computer instruction is stored up, the computer instruction makes the computer execute the method as described in claim 1 to 7 is any.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112751640A (en) * | 2020-12-25 | 2021-05-04 | 北京航星机器制造有限公司 | Gigabit network NTP time server based on alternating current B code |
| CN112751569A (en) * | 2020-12-25 | 2021-05-04 | 北京航星机器制造有限公司 | Alternating current B code decoding circuit and decoding method |
| CN114006620A (en) * | 2021-10-27 | 2022-02-01 | 北斗天汇（北京）科技有限公司 | IRIG alternating-current B code decoding method and system with automatic adjustment function |
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| CN101493674A (en) * | 2008-01-24 | 2009-07-29 | 郑州威科姆技术开发有限公司 | B code demodulating and decoding method and apparatus thereof |
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| CN101493674A (en) * | 2008-01-24 | 2009-07-29 | 郑州威科姆技术开发有限公司 | B code demodulating and decoding method and apparatus thereof |
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| 蒋志颀: "交流IRIG-B解码技术的研究与实现", 《中国新通信》 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112751640A (en) * | 2020-12-25 | 2021-05-04 | 北京航星机器制造有限公司 | Gigabit network NTP time server based on alternating current B code |
| CN112751569A (en) * | 2020-12-25 | 2021-05-04 | 北京航星机器制造有限公司 | Alternating current B code decoding circuit and decoding method |
| CN112751640B (en) * | 2020-12-25 | 2022-11-15 | 北京航星机器制造有限公司 | Gigabit network NTP time server based on alternating current B code |
| CN114006620A (en) * | 2021-10-27 | 2022-02-01 | 北斗天汇（北京）科技有限公司 | IRIG alternating-current B code decoding method and system with automatic adjustment function |
| CN114006620B (en) * | 2021-10-27 | 2023-01-17 | 北斗天汇（北京）科技有限公司 | IRIG alternating-current B code decoding method and system with automatic adjustment function |
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Application publication date: 20190412 |