WO2020191623A1 - 显示基板及其制备方法、显示装置 - Google Patents

显示基板及其制备方法、显示装置 Download PDF

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Publication number
WO2020191623A1
WO2020191623A1 PCT/CN2019/079717 CN2019079717W WO2020191623A1 WO 2020191623 A1 WO2020191623 A1 WO 2020191623A1 CN 2019079717 W CN2019079717 W CN 2019079717W WO 2020191623 A1 WO2020191623 A1 WO 2020191623A1
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WIPO (PCT)
Prior art keywords
layer
metal
barrier wall
display
etching
Prior art date
Application number
PCT/CN2019/079717
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English (en)
French (fr)
Inventor
黄炜赟
高永益
姜尚勋
胡文博
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN201980000392.2A priority Critical patent/CN112005377B/zh
Priority to JP2020563401A priority patent/JP7331016B2/ja
Priority to PCT/CN2019/079717 priority patent/WO2020191623A1/zh
Priority to US16/642,099 priority patent/US11575102B2/en
Priority to EP19858633.1A priority patent/EP3951881A4/en
Priority to US16/768,283 priority patent/US11575103B2/en
Priority to JP2020562581A priority patent/JP7386811B2/ja
Priority to PCT/CN2019/115059 priority patent/WO2020192121A1/zh
Priority to EP19921020.4A priority patent/EP3955305A4/en
Priority to CN201980002261.8A priority patent/CN112005378B/zh
Publication of WO2020191623A1 publication Critical patent/WO2020191623A1/zh
Priority to US18/093,054 priority patent/US11903234B2/en
Priority to JP2023130348A priority patent/JP2023156420A/ja
Priority to US18/486,502 priority patent/US20240040819A1/en
Priority to JP2023190826A priority patent/JP2024020320A/ja

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/88—Dummy elements, i.e. elements having non-functional features
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H10K50/813—Anodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/822—Cathodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/842—Containers
    • H10K50/8426—Peripheral sealing arrangements, e.g. adhesives, sealants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/844—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H10K59/8731—Encapsulations multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M1/00—Substation equipment, e.g. for use by subscribers
    • H04M1/02—Constructional features of telephone sets
    • H04M1/0202—Portable telephone sets, e.g. cordless phones, mobile phones or bar type handsets
    • H04M1/026—Details of the structure or mounting of specific components
    • H04M1/0264—Details of the structure or mounting of specific components for a camera module assembly
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M1/00—Substation equipment, e.g. for use by subscribers
    • H04M1/02—Constructional features of telephone sets
    • H04M1/0202—Portable telephone sets, e.g. cordless phones, mobile phones or bar type handsets
    • H04M1/026—Details of the structure or mounting of specific components
    • H04M1/0266—Details of the structure or mounting of specific components for a display module assembly
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements

Definitions

  • the embodiments of the present disclosure relate to a display substrate, a preparation method thereof, and a display device.
  • the display screen of the display device is developing in the direction of large screen and full screen.
  • a display device such as a mobile phone, a tablet computer, etc.
  • the camera device is usually arranged on a side outside the display area of the display screen.
  • the camera device can be combined with the display area of the display screen to reserve a place for the camera device in the display area to maximize the display area of the display screen.
  • At least one embodiment of the present disclosure provides a display substrate.
  • the display substrate includes a display area and an opening area.
  • the display area surrounds the opening area, wherein the display area and the opening area include a first A barrier wall, the first barrier wall surrounds the opening area; the first barrier wall includes a first metal layer structure, at least one side of the first metal layer structure surrounding the opening area has a concave mouth.
  • At least one embodiment of the present disclosure provides a display substrate, the display area includes an electrode pattern, the electrode pattern includes a second metal layer structure, and the first metal layer structure and the second metal layer structure have The same structure, and includes the same materials.
  • At least one embodiment of the present disclosure provides a display substrate that further includes a base substrate, the first metal layer structure includes a first metal sublayer and a second metal sublayer; the first metal sublayer is on the base substrate The second metal sublayer is on the side of the first metal sublayer away from the base substrate, wherein the orthographic projection of the first metal sublayer on the base substrate is located at the The second metal sublayer is in an orthographic projection on the base substrate, thereby forming the notch.
  • At least one embodiment of the present disclosure provides a display substrate, the first metal layer structure further includes a third metal sublayer, and the third metal sublayer is located on the first side of the base substrate, wherein, the first metal sublayer is on the side of the third metal sublayer away from the base substrate, and the orthographic projection of the first metal sublayer on the base substrate is located on the third metal sublayer.
  • the metal sublayer is in an orthographic projection on the base substrate.
  • At least one embodiment of the present disclosure provides a display substrate, in which the orthographic projection of the second metal sublayer on the base substrate is located on the orthographic projection of the third metal sublayer on the base substrate Inside.
  • At least one embodiment of the present disclosure provides a display substrate in which the thickness of the first metal sublayer is greater than the thickness of the second metal sublayer and the thickness of the third metal sublayer.
  • At least one embodiment of the present disclosure provides a display substrate, wherein the thickness of the first metal sublayer is 150nm-900nm, the thickness of the second metal sublayer is 30nm-300nm, and the third metal sublayer The thickness is 30nm-300nm.
  • At least one embodiment of the present disclosure provides a display substrate in which the opening direction of the recess is parallel to the base substrate.
  • At least one embodiment of the present disclosure provides a display substrate, further comprising a second barrier wall between the display area and the opening area,
  • the second barrier wall surrounds the opening area, has the same structure as the first barrier wall, and is arranged on a side of the first barrier wall away from the opening area.
  • At least one embodiment of the present disclosure provides a display substrate, the display area further includes a first electrode layer, a second electrode layer, and an organic layer between the first electrode layer and the second electrode layer for forming a light emitting device.
  • the functional layer, the organic functional layer is disconnected on the side of the first barrier wall with the notch.
  • At least one embodiment of the present disclosure provides a display substrate in which the second electrode layer is a cathode layer, and the cathode layer is disconnected on the side surface of the first barrier wall having the notch.
  • At least one embodiment of the present disclosure provides a display substrate that further includes an image sensor and/or an infrared sensor, wherein the image sensor and/or the infrared sensor are combined with the base substrate, and on the base substrate The orthographic projection of at least partially overlaps with the opening area.
  • At least one embodiment of the present disclosure provides a display substrate in which the rate at which the material of the first metal sublayer is etched under the action of the etching solution used to etch the first metal layer structure The rate at which the material of the second metal sub-layer is etched is higher.
  • At least one embodiment of the present disclosure provides a display substrate, wherein the material of the first metal sublayer includes aluminum or copper; and the material of the second metal sublayer includes titanium or molybdenum.
  • At least one embodiment of the present disclosure provides a display substrate, the first barrier wall further includes an insulating layer structure, the insulating layer structure is located on the first side of the base substrate, and the first metal The layer structure is on the side of the insulating layer structure away from the base substrate.
  • At least one embodiment of the present disclosure provides a display substrate in which the insulating layer structure includes a plurality of sub-insulating layers.
  • At least one embodiment of the present disclosure provides a method for preparing a display substrate, including: forming a display area and an open area, the display area surrounds the open area, and is formed between the display area and the open area A first barrier wall, wherein the first barrier wall surrounds the opening area and includes a first metal layer structure, and at least one side surface of the first metal layer structure surrounding the opening area is formed with a notch .
  • the opening area is formed by laser cutting or mechanical punching.
  • forming the display area includes forming an electrode pattern while forming a first metal layer structure, wherein the electrode pattern includes a second metal layer structure, and the A metal layer structure and the second metal layer structure are formed by using the same film layer.
  • forming the first barrier wall includes: forming a first metal material layer on a first side of a base substrate, and forming a first metal material layer away from the first metal material layer.
  • a second metal material layer is formed on one side of the base substrate; the first metal material layer and the second metal material layer are first etched to form the electrode pattern and the initial barrier wall;
  • the barrier wall is subjected to a second etching to form the first barrier wall, wherein the second etching adopts wet etching, and the etching speed of the first metal material layer is higher than that of the etching solution used.
  • the etching rate of the second metal material layer thereby forming the notch.
  • forming the first barrier wall includes: sequentially forming a third metal material layer, a first metal material layer, and a second metal material layer on the first side of the base substrate Perform a first etching on the third metal material layer, the first metal material layer and the second metal material layer to form the electrode pattern and the initial barrier wall; perform a second etching on the initial barrier wall, To form the first barrier wall, wherein the second etching adopts wet etching, and the etching speed used for the first metal material layer is greater than that for the second metal material layer. The etching speed and the etching speed of the third metal material layer, thereby forming the notch.
  • the first etching is dry etching.
  • forming the display area further includes forming a first electrode layer, a second electrode layer, and an organic layer between the first electrode layer and the second electrode layer for the light emitting device.
  • Functional layer wherein the etching solution used in the second etching is the same as the etching solution used in etching to form the first electrode layer, and the organic functional layer has the recess in the first barrier wall The side of the mouth is broken.
  • forming the first barrier wall includes: forming a first metal material layer on the first side of a base substrate; A second metal material layer is formed on one side of the base substrate; the first metal material layer and the second metal material layer are wet-etched once, and the etching solution used for the wet etching performs the wet etching on the first The etching speed of the metal material layer is greater than the etching speed of the second metal material layer.
  • a second barrier wall is further formed between the display area and the opening area, wherein the second barrier wall surrounds the opening area, and It is formed on a side of the first barrier wall away from the opening area, and the second barrier wall and the first barrier wall are formed by using the same film layer.
  • At least one embodiment of the present disclosure provides a display device including any of the above-mentioned display substrates.
  • Figure 1A is a schematic plan view of a display substrate
  • FIG. 1B is a schematic cross-sectional view of the display substrate in FIG. 1A along line A-A;
  • FIG. 2A is a schematic plan view of a display substrate provided by some embodiments of the present disclosure.
  • FIG. 2B is a schematic cross-sectional view of the display substrate in FIG. 2A along the line B-B;
  • FIG. 2C is another schematic cross-sectional view of the display substrate in FIG. 2A along the line B-B;
  • FIG. 3 is a schematic cross-sectional view of a barrier wall in a display substrate provided by some embodiments of the present disclosure
  • FIG. 4 is a schematic cross-sectional view of a barrier wall in a display substrate provided by some embodiments of the present disclosure
  • 5A is a schematic plan view of another display substrate provided by some embodiments of the present disclosure.
  • 5B is a schematic cross-sectional view of the display substrate in FIG. 2A along the line C-C;
  • 5C is another schematic cross-sectional view of the display substrate in FIG. 2A along the line C-C;
  • FIG. 6 is a schematic cross-sectional view of another barrier wall in a display substrate provided by some embodiments of the present disclosure.
  • FIG. 7 is a schematic cross-sectional view of another barrier wall in a display substrate provided by some embodiments of the present disclosure.
  • FIG. 8A is a schematic plan view of still another display substrate provided by some embodiments of the present disclosure.
  • FIG. 8B is a schematic cross-sectional view of the display substrate in FIG. 8A along the line D-D;
  • FIG. 9 is a schematic cross-sectional view showing still another barrier wall in a substrate provided by some embodiments of the present disclosure.
  • FIG. 10 is a schematic cross-sectional view showing still another barrier wall in a substrate provided by some embodiments of the present disclosure
  • FIG. 11 is a schematic cross-sectional view showing still another barrier wall in a substrate provided by some embodiments of the present disclosure.
  • 12A-12B are schematic plan views of a display substrate during the manufacturing process provided by some embodiments of the disclosure.
  • FIGS. 13A-13C are schematic cross-sectional views of a display substrate in the manufacturing process provided by some embodiments of the disclosure.
  • FIG. 14 is a schematic diagram of a display device provided by some embodiments of the present disclosure.
  • the camera device (imaging device) of the display device can be integrated with the display area, and the camera device can be arranged in the display area.
  • FIG. 1A shows a schematic plan view of a display substrate for a display device
  • FIG. 1B is a schematic cross-sectional view of the display substrate in FIG. 1A along the line A-A
  • the display substrate 100 includes a display area 101.
  • the display area 101 includes a pixel array and has an opening 1011 in the pixel array.
  • the opening 1011 is a reserved position for a camera device (not shown).
  • the camera device may It is arranged on the back side of the display substrate 100 opposite to the display side, so that the imaging device can acquire an image through the opening 1011.
  • the imaging device and the display area 101 of the display substrate 100 are integrated.
  • the display area 101 has a light-emitting device for display.
  • the light-emitting device is an organic light-emitting diode.
  • the organic functional layer 103 and the electrode layer 104 of the multiple light-emitting devices in all or part of the display area 101 are usually formed in the display area 101 It is a whole surface. Therefore, when the packaging layer 105 is used for packaging, the area near the opening 1011 is often difficult to be packaged, or even if it is packaged, it is difficult to ensure the packaging effect of the area. At this time, as shown in FIG.
  • impurities such as water and oxygen can enter the display area 101 from the organic functional layer 103 and the electrode layer 104 formed along the entire surface of the opening 1011, contaminating the functional materials in the display area 101, resulting in The performance of these functional materials degrades, which in turn affects the display effect of the display area 101.
  • At least one embodiment of the present disclosure provides a display substrate.
  • the display substrate includes a display area and an opening area.
  • the display area surrounds the opening area.
  • a first barrier wall is included between the display area and the opening area.
  • the first barrier wall Surrounding the opening area; the first barrier wall includes a first metal layer structure, and at least one side surface of the first metal layer structure surrounding the opening area has a notch.
  • At least one embodiment of the present disclosure provides a method for preparing a display substrate, including: forming a display area and an opening area, and forming a first barrier wall between the display area and the opening area; wherein the display area surrounds the opening area, and A barrier wall surrounds the opening area and includes a first metal layer structure. At least one side surface of the first metal layer structure surrounding the opening area is formed with a notch.
  • At least one embodiment of the present disclosure provides a display device including the above-mentioned display substrate.
  • FIG. 2A shows a schematic plan view of the display substrate
  • FIG. 2B is a schematic cross-sectional view of the display substrate in FIG. 2A along the line B-B.
  • the display substrate 200 includes a display area 201 and an opening area 2011.
  • the display area 201 surrounds the opening area 2011;
  • the display area 201 and the opening area 2011 include a first barrier wall 2012.
  • the barrier wall 2012 surrounds the opening area 2011;
  • the first barrier wall 2012 includes a first metal layer structure, and at least one side surface of the first metal layer structure surrounding the opening area 2011 has a notch 2012A.
  • the opening area 2011 allows light from the display side (upper side in FIG. 2B) of the display substrate to transmit through the display substrate, thereby reaching the back side (lower side in FIG. 2B) of the display substrate.
  • the side of the first metal layer structure facing the opening area 2011 and the side facing away from the opening area 2011 have notches 2012A.
  • the display area 201 includes a pixel array for performing display operations, the pixel array includes a plurality of pixel units arranged in an array, and these pixel units include driving circuits, light emitting circuits, etc., so the display area 201 also
  • the electrode pattern includes a second metal layer structure.
  • the first metal layer structure and the second metal layer structure have the same structure and have the same material.
  • the first metal layer structure and the second metal layer structure can be formed in the same layer during the preparation process and have the same multi-layer structure, and in the first metal layer structure and the second metal multi-layer structure, the materials of the corresponding layers are the same. The same, so that the first metal layer structure and the second metal layer structure can be formed by the same film layer.
  • the display area 201 includes a pixel array, and a plurality of pixel units of the pixel array include a plurality of light-emitting devices for display and a driving circuit for driving the light-emitting devices.
  • the light-emitting device includes structures such as electrode layers and organic functional layers
  • the driving circuit includes structures such as thin film transistors and capacitors.
  • the light emitting device includes a first electrode layer 218, a second electrode layer 204, and an organic functional layer between the first electrode layer 218 and the second electrode layer 204.
  • the organic functional layer includes, for example, an organic light emitting material layer 220 and
  • the auxiliary light-emitting layer 203 is, for example, an electron transport layer or an electron injection layer. At least part of the organic functional layer of the light-emitting device used in multiple pixel units, such as the auxiliary light-emitting layer 203 and the second electrode layer 204, is usually formed as a whole surface in the display area 201. At this time, the organic functional layer is in the first barrier. The side of the wall 2012 with the notch 2012A is broken.
  • the first electrode layer 218 is an anode layer (or called a pixel electrode layer)
  • the second electrode layer 204 is a cathode layer
  • the cathode layer is also disconnected on the side of the first barrier wall 2012 with the notch 1012A. Therefore, when the organic functional layer and the second electrode layer 204 on the side close to the opening area 2011 are contaminated by impurities such as water and oxygen, the organic functional layer and the second electrode layer 204 are separated by the first barrier wall 2012, so that These contaminating impurities do not extend to the organic functional layer and the portion of the second electrode layer 204 for the light emitting device to emit light.
  • part of the organic functional layer and part of the second electrode layer 204 are also formed on the top of the first barrier wall 2012, but these parts are separated from other parts.
  • the thin film transistor includes a gate 211, a source and drain 212, and the capacitor includes a first electrode 213, a second electrode 214, and a first insulating layer 215 between the first electrode 213 and the second electrode 214.
  • the gate 211 or the source and drain 212 may be implemented as an electrode pattern having a second metal layer structure.
  • FIG. 2B shows that the source and drain electrodes 212 include a second metal layer structure.
  • the first metal layer structure of the first barrier wall 2012 and the second metal layer structure of the source and drain 212 have the same structure and include the same materials, for example, the first metal layer structure and the source and drain of the first barrier wall 2012
  • the second metal layer structure of the electrode 212 is formed in the same layer and has the same multi-layer structure, so that during the preparation process of the display substrate 200, the first metal layer structure of the first barrier wall 2012 and the second metal layer of the source and drain 212
  • the structure can be formed using the same film layer.
  • both the first metal layer structure and the second metal layer structure have a multilayer structure such as a double-layer structure or a triple-layer structure.
  • the display substrate 200 further includes a base substrate 202, the display area 201 is on the base substrate 202, and the base substrate 202 has an opening 2021 located in the opening area 2011.
  • the opening direction of the notch in the first metal layer structure of the first barrier wall 2012 is parallel to the base substrate 202.
  • the base substrate 202 is placed in a horizontal direction, and the opening direction of the recess is the horizontal direction.
  • the first metal layer structure of the first barrier wall 2012 includes a double-layer metal layer structure, that is, a first metal sublayer 20121 and a second metal sublayer 20122.
  • the first metal sublayer 20121 is on the first side of the base substrate 202 (the side where the light-emitting device will be formed, shown as the upper side in the figure), and the second metal sublayer 20122 is on the first metal sublayer 20121 away from the substrate.
  • the orthographic projection of the first metal sublayer 20121 on the base substrate 202 is within the orthographic projection of the second metal sublayer 20122 on the base substrate 202, thus A notch 2012A is formed on the side surface of the two laminated layers.
  • the organic functional layer and the second electrode layer 204 are formed on the base substrate 202 on which the first barrier wall 2012 is formed, the organic functional layer and the second electrode layer 204 can be disconnected at the first barrier wall 2012.
  • the route for impurities such as water and oxygen to enter the display area 201 is disconnected.
  • the first metal layer structure of the first barrier wall 2012 includes a three-layer metal layer structure, namely, a first metal sublayer 20121, a second metal sublayer 20122, and a third metal sublayer 20121.
  • Layer 20123, the third metal sublayer 20123 is on the first side of the base substrate 202 (shown as the upper side in the figure), and the first metal sublayer 20121 is on the side of the third metal sublayer 20123 away from the base substrate 202 (Shown as the upper side in the figure), the second metal sublayer 20122 is on the side of the first metal sublayer 20121 away from the base substrate 202 (shown as the upper side in the figure), and the first metal sublayer 20121 is on the liner
  • the orthographic projection on the base substrate 202 is located within the orthographic projection of the second metal sublayer 20122 on the base substrate 202, and the orthographic projection of the first metal sublayer 20121 on the base substrate 202 is also located on the third metal sublayer 20123.
  • a notch 2012A is thus formed on the side surface of the three-layer stack.
  • the organic functional layer and the second electrode layer 204 are formed on the base substrate 202 on which the first barrier wall 2012 is formed, the organic functional layer and the second electrode layer 204 can be disconnected at the first barrier wall 2012.
  • the route for impurities such as water and oxygen to enter the display area 201 is disconnected.
  • the orthographic projection of the second metal sublayer 20122 on the base substrate 202 is within the orthographic projection of the third metal sublayer 20123 on the base substrate 202.
  • the orthographic projection of the third metal sublayer 20123 on the base substrate 202 is the largest, which can increase the bonding strength between the first metal layer structure of the first barrier wall 2012 and the display substrate, and enhance the first metal layer structure. It is stable and helps the organic functional layer and the second electrode layer 204 to be disconnected at the first barrier wall 2012.
  • FIG. 2B shows an example with the three-layer metal layer structure.
  • the second metal layer structure of the source and drain electrodes 212 includes the metal sublayer 2123, which is the same layer as the third metal sublayer 20123, The metal sublayer 2121 at the same layer as the first metal sublayer 20121 and the metal sublayer 2122 at the same layer as the second metal sublayer 20122.
  • the second metal layer structure of the source and drain electrodes 212 in the thin film transistor is formed in the same layer as the first metal layer structure and has the same multi-layer structure, that is, both have a three-layer metal layer structure.
  • the first metal layer structure of the first barrier wall 2012 and the second metal layer structure of the source and drain electrodes 212 can be formed by using the same film layer through the same preparation process to simplify the process steps.
  • the thickness of the first metal sublayer 20121 is greater than the thickness of the second metal sublayer 20122 and the thickness of the third metal sublayer 20123, thereby making it easier to form the notch and It is more conducive to disconnect the organic material layer 203 and the second electrode layer 204 at the first barrier wall 2012, so that the first barrier wall 2012 can achieve a better barrier effect.
  • the thickness of the first metal sublayer 20121 is 150nm-900nm, such as 200nm, 400nm, 600nm, or 800nm; the thickness of the second metal sublayer 20122 is 30nm-300nm, such as 100nm, 150nm, or 200nm, etc.; The thickness of the layer 20123 is 30 nm-300 nm, such as 100 nm, 150 nm, or 200 nm.
  • the thickness of the first metal sublayer 20121 is 600nm
  • the thickness of the second metal sublayer 20122 is 200nm
  • the thickness of the third metal sublayer 20123 is 200nm.
  • the first barrier wall 2012 can fully realize the barrier effect.
  • the material of the second metal sublayer 20122 and the material of the third metal sublayer 20123 may be the same, and the material of the first metal sublayer 20121 and the material of the second metal sublayer 20122 are being etched.
  • the rate at which the material of the first metal sublayer 20121 is etched is greater than the rate at which the material of the second metal sublayer 20122 is etched, thereby It is easy to form the first metal layer structure with the recess 2012A during preparation.
  • the material of the first metal sublayer 20121 includes metals such as aluminum or copper or alloys thereof
  • the material of the second metal sublayer 20122 includes metals such as titanium or molybdenum or their alloys
  • the third metal sublayer 20123 The material of is the same as that of the second metal sublayer 20122, including metals such as titanium or molybdenum or their alloys.
  • the rate at which aluminum or copper is etched is greater than the rate at which titanium or molybdenum is etched. Therefore, the first metal sublayer 20121, the second metal sublayer 20122, and the third metal sublayer 20123 can be etched at the same time as the electrode structure such as the second electrode layer 204 is formed by etching to form the recess 2012A.
  • the material combination of the first metal sublayer 20121 and the second metal sublayer 20122 may be aluminum/titanium, aluminum/molybdenum, copper/titanium, or copper. /Molybdenum, etc.; when the first metal layer structure adopts a three-layer structure, the material combination of the third metal sublayer 20123, the first metal sublayer 20121 and the second metal sublayer 20122 can be titanium/aluminum/titanium, molybdenum/aluminum /Molybdenum, titanium/copper/titanium or molybdenum/copper/molybdenum etc.
  • the display substrate 200 further includes an image sensor and/or an infrared sensor.
  • the image sensor and/or the infrared sensor are combined with the base substrate 202, for example, the base substrate 202
  • the side far away from the light-emitting device, and the orthographic projection on the base substrate 202 at least partially overlaps the opening area 2011, for example, the image sensor and/or the infrared sensor are arranged at the position indicated by the reference number 210 in the figure. Therefore, the image sensor and/or the infrared sensor can realize the functions of image collection, face recognition, infrared sensing and the like through the opening area 2011.
  • the display substrate 200 may further include a second insulating layer 216 covering the capacitor, a planarization layer 217 that planarizes the driving circuit, a pixel defining layer 219 that defines a pixel array, and a packaging space.
  • the column spacer 208, the encapsulation layer 205 for sealing, the second encapsulation layer 206 and the third encapsulation layer 207 to further improve the encapsulation effect, etc., will not be repeated in the embodiment of the present disclosure.
  • the thin film transistor since one of the source and drain electrodes 212 of the thin film transistor is connected to the first electrode layer 218, the thin film transistor may be a driving transistor, that is, the light emission flowing through the light emitting device is controlled by the applied data signal. The magnitude of the current, thereby controlling the gray scale of the pixel unit in the display process.
  • the encapsulation layer 205 is an inorganic encapsulation layer, including materials such as silicon oxide and silicon nitride
  • the second encapsulation layer 206 is an organic encapsulation layer, including organic materials such as polyimide
  • the third encapsulation layer 207 is an inorganic encapsulation layer, including Materials such as silicon oxide and silicon nitride.
  • the encapsulation layer 205, the second encapsulation layer 206, and the third encapsulation layer 207 all extend to the side of the first barrier wall 2012 that is close to the opening area 2011, so that the three encapsulation layers are opposite to each other.
  • a barrier wall 2012 is encapsulated.
  • the encapsulation layer 205 extends to the side of the first barrier wall 2012 close to the opening area 2011, and the second encapsulation layer 206 and the third encapsulation layer 207 both terminate in the first barrier wall 2012
  • the second encapsulation layer 206 including organic materials ends at a position farther away from the hole area 201, which can prevent impurities such as water and oxygen from passing through
  • the second encapsulation layer 206 enters the inside of the display area 201.
  • the encapsulation layer 205 and the third encapsulation layer 207 extend to the side of the first barrier wall 2012 close to the opening area 2011, and only the second encapsulation layer 206 terminates at the first barrier wall 2012 On the side close to the display area 201, this example can also prevent impurities such as water and oxygen from entering the display area 201 through the second encapsulation layer 206 including organic materials.
  • the embodiment of the present disclosure does not limit the specific arrangement of the encapsulation layer 205, the second encapsulation layer 206, and the third encapsulation layer 207.
  • more than one layer of barrier walls may be provided around the perforated area 2011 of the display panel, that is, it may include multiple layers of barrier walls, for example, two layers, three layers, four layers, five layers, etc., To enhance the barrier effect.
  • the display substrate shown in FIGS. 5A and 5B includes a double-layer barrier wall, wherein FIG. 5A is a schematic plan view of the display substrate, and FIG. 5B is a schematic cross-sectional view of the display substrate in FIG. 5A along the line C-C.
  • the display substrate 300 includes a display area 301 and an opening area 3011.
  • the display area 301 surrounds the opening area 3011.
  • the display area 301 and the opening area 3011 include a first barrier wall 3012 and a second The barrier wall 3013, the first barrier wall 3012 and the second barrier wall 3013 surround the opening area 3011.
  • the second barrier wall 3013 is arranged on the side of the first barrier wall 3012 far away from the hole region 3011, and is spaced apart by a certain distance; the first barrier wall 3012 and the second barrier wall 3013 both include the first metal layer structure, and the first barrier wall 3012 At least one side surface of the first metal layer structure of the wall 3012 surrounding the opening area 3011 has a notch 3012A, and at least one side surface of the first metal layer structure of the second barrier wall 3013 surrounding the opening area 3011 has a notch 3013A.
  • the display area 301 includes an electrode pattern, and the electrode pattern includes a second metal layer structure.
  • the first metal layer structure of the first barrier wall 3012 and the second barrier wall 3013 are the same as the second metal layer structure. And includes the same material, for example, the first metal layer structure and the second metal layer structure of the first barrier wall 3012 and the second barrier wall 3013 are formed in the same layer and have the same multilayer structure.
  • the display area 301 includes a pixel array, and a plurality of pixel units of the pixel array includes a plurality of light-emitting devices for display and a driving circuit for driving the light-emitting devices.
  • the driving circuit includes structures such as thin film transistors and capacitors.
  • the light emitting device includes a first electrode layer 318, a second electrode layer 304, and an organic functional layer between the first electrode layer 320 and the second electrode layer.
  • the organic functional layer includes, for example, an organic light emitting material layer 210 and an auxiliary layer.
  • the light-emitting layer 303, at least part of the organic functional layer, such as the auxiliary light-emitting layer 303 and the second electrode layer 304, is usually formed as a whole surface in the display area 301.
  • the organic functional layer is formed on the first barrier wall 3012 and the second barrier wall 3012. The side of the wall 3013 with notches 3012A/3013A is broken.
  • the first electrode layer 318 is an anode layer (or called a pixel electrode layer), and the second electrode layer 304 is a cathode layer.
  • the cathode layer also has notches 3012A/3013A in the first barrier wall 2012 and the second barrier wall 3013. The side is disconnected. Therefore, when the organic functional layer and the second electrode layer 304 on the side close to the opening area 3011 are contaminated by impurities such as water and oxygen, the organic functional layer and the second electrode layer 304 are separated by the first barrier wall 3012, so that The contamination does not extend to the organic functional layer and the portion of the second electrode layer 304 for the light emitting device to emit light.
  • the organic functional layer and the second electrode layer 304 are also formed on the first barrier wall 3012, but these parts are separated from other parts.
  • the thin film transistor includes a gate 311, a source and drain 312 and other structures
  • the capacitor includes a first electrode 313, a second electrode 314, and a first insulating layer 315 between the first electrode 313 and the second electrode 314.
  • the gate 311 or the source and drain 312 may be implemented as an electrode pattern having a second metal layer structure.
  • the source and drain electrodes 312 include a second metal layer structure, and the first metal layer structure of the first barrier wall 3012 and the second barrier wall 3013 and the second metal layer structure of the source drain electrode 312 are in the same layer.
  • the first metal layer structure of the first barrier wall 3012 and the second barrier wall 3013 and the second metal layer structure of the source and drain electrodes 312 can be the same in the manufacturing process of the display substrate 300.
  • the film layer is formed.
  • both the first metal layer structure and the second metal layer structure have a multilayer structure such as a double-layer structure or a triple-layer structure.
  • the first metal layer structure of the first barrier wall 3012 and the second barrier wall 3013 is basically the same as the foregoing embodiment.
  • similar reference numerals Represents the same structure, and will not be repeated in this embodiment.
  • the display substrate 300 further includes a base substrate 302 having an opening 3021 located in the opening area 3011.
  • the opening directions of the notches in the first metal layer structure of the first barrier wall 3012 and the second barrier wall 3013 are parallel to the base substrate 202.
  • the display substrate 300 further includes an image sensor and/or an infrared sensor.
  • the image sensor and/or infrared sensor are combined with the base substrate 302, for example, on the side of the base substrate 302 away from the light-emitting device, and on the base substrate.
  • the orthographic projection on 302 and the opening area 3011 at least partially overlap, for example, the image sensor and/or the infrared sensor are arranged at the position indicated by reference numeral 310 in the figure. Therefore, the image sensor and/or the infrared sensor can realize the functions of image collection, face recognition, infrared sensing and the like through the opening area 3011.
  • the display substrate 300 may further include a second insulating layer 316 covering the capacitor, a planarization layer 317 that planarizes the driving circuit, a pixel defining layer 319 that defines the pixel array, and columnar partitions that form a packaging space.
  • the cushion 308, the encapsulation layer 305 for sealing, the second encapsulation layer 306 and the third encapsulation layer 307 to further improve the encapsulation effect, etc., will not be repeated in the embodiment of the present disclosure.
  • the thin film transistor since one of the source and drain electrodes 312 of the thin film transistor is connected to the first electrode layer 318, the thin film transistor may be a driving transistor, that is, the light emission flowing through the light emitting device is controlled by the applied data signal. The magnitude of the current, thereby controlling the gray scale of the pixel unit in the display process.
  • the encapsulation layer 305 is an inorganic encapsulation layer including materials such as silicon oxide and silicon nitride
  • the second encapsulation layer 306 is an organic encapsulation layer including organic materials such as polyimide
  • the third encapsulation layer 307 is an inorganic encapsulation layer including Materials such as silicon oxide and silicon nitride.
  • the encapsulation layer 305, the second encapsulation layer 306, and the third encapsulation layer 307 all extend to the side of the first barrier wall 3012 close to the opening area 3011, so that the three encapsulation layers are opposite to each other.
  • a barrier wall 3012 and a second barrier wall 3013 are packaged.
  • the encapsulation layer 305 extends to the side of the first barrier wall 3012 close to the opening area 3011, and the second encapsulation layer 306 and the third encapsulation layer 307 both terminate in the first barrier wall 3012. And the second barrier wall 3013.
  • the encapsulation layer 305 and the third encapsulation layer 307 extend to the side of the first barrier wall 3012 close to the opening area 3011, and only the second encapsulation layer 306 terminates at the first barrier wall 3012. And the second barrier wall 3013.
  • the encapsulation layer 305 and the third encapsulation layer 307 extend to the side of the first barrier wall 3012 close to the opening area 3011, and only the second encapsulation layer 306 terminates at the second barrier wall 3013. On the side close to the display area 301.
  • the embodiments of the present disclosure do not limit the specific settings of each packaging layer.
  • the first barrier wall in addition to the above-mentioned first metal layer structure, also includes an insulating layer structure.
  • the first metal layer structure is laminated on the insulating layer structure to form a structure with more layers.
  • the first barrier wall to enhance the barrier effect.
  • the display substrate shown in FIGS. 8A and 8B includes a first barrier wall having a first metal layer structure and an insulating layer structure, wherein FIG. 8A is a schematic plan view of the display substrate, and FIG. 8B is the edge of the display substrate in FIG. 8A.
  • FIG. 8A is a schematic plan view of the display substrate
  • FIG. 8B is the edge of the display substrate in FIG. 8A.
  • the display substrate 400 includes a display area 401 and an opening area 4011.
  • a first barrier wall 4012 is included between the display area 401 and the opening area 4011.
  • the display area 401 surrounds the opening area 4011.
  • the barrier wall 4012 surrounds the opening area 4011.
  • the first barrier wall 4012 includes a first metal layer structure and an insulating layer structure. At least one side surface of the first metal layer structure surrounding the opening area 4011 has a notch 4012A.
  • the first barrier wall 4012 includes a first metal layer structure 4012B and an insulating layer structure 4012C.
  • the structure of the first metal layer structure 4012B is basically the same as the above-mentioned embodiment.
  • the insulating layer structure 4012C includes at least one insulating layer, and the insulating layer is, for example, obtained by etching an insulating layer formed under the first metal layer structure 4012B.
  • the cross section of the insulating layer structure 4012C is formed as a rectangle. At this time, at least part 403 and the second electrode layer 404 of the organic functional layer formed after the first barrier wall 4012 are on the insulating layer of the first barrier wall 3012. The sides of the structure 4012C can be disconnected.
  • the cross section of the insulating layer structure 4012C of the first barrier wall 4012 may be formed in a regular trapezoidal structure.
  • the organic functional layer formed after the first barrier wall 4012 The and second electrode layer 404 will extend along the side surface of the insulating layer structure 4012C of the first barrier wall 3012 to the first metal layer structure 4012B, and then disconnect at the side surface of the first metal layer structure 4012B.
  • the contact area between the packaging layer 405 formed on the second electrode layer 404 and the second electrode layer 404 is larger, so the packaging effect of the packaging layer 405 will be enhanced.
  • the insulating layer structure 4012C usually includes inorganic materials (such as silicon nitride, silicon oxide, etc.). At this time, if the edge of the opening region 4011 has an inorganic insulating layer, the inorganic insulating layer is likely to be produced when the opening region 4011 is formed. Cracks, and the cracks easily propagate into the display area of the display substrate.
  • inorganic materials such as silicon nitride, silicon oxide, etc.
  • the insulating layer formed under the first metal layer structure 4012B is etched to form the insulating layer structure 4012C of the first barrier wall 4012, so that the edge of the opening region 4011 no longer has an inorganic insulating layer, or reduces
  • the material of the inorganic insulating layer at the edge of the opening region 4011 can reduce the path of crack propagation, and the formed first barrier wall 4012 can also prevent the crack from further propagation.
  • the display substrate shown in FIG. 8B has a first barrier wall 4012 as shown in FIG. 10, and the insulating layer structure 4012C of the first barrier wall 4012 includes a plurality of sub-insulating layers, for example, the first insulating layer 415 and the second insulating layer
  • the insulating layer 416 is a sub-insulating layer of the same layer.
  • the insulating layer structure 4012C may further include a sub-insulating layer of the same layer as the buffer layer 4020 above the base substrate 402. At this time, the buffer layer 4020 is further etched so that part of the base substrate 402 The surface is exposed, and the part of the exposed surface can directly contact the organic functional layer formed later.
  • the insulating layer structure 4012C may further include a sub-insulating layer in the same layer as the gate insulating layer 430 above the buffer layer 4020.
  • the insulating layer structure 4012C may also include only one or two sub-insulating layers. The embodiment of the present disclosure does not specifically limit the number of layers of the insulating layer structure 4012C.
  • the display area 401 further includes an electrode pattern, and the electrode pattern includes a second metal layer structure.
  • the first metal layer structure and the second metal layer structure have the same structure and include the same material.
  • the first metal layer structure and the second metal layer structure are formed in the same layer and have the same multilayer structure.
  • the display area 401 includes a pixel array, and a plurality of pixel units of the pixel array include a plurality of light-emitting devices for display and a driving circuit for driving the light-emitting devices.
  • the driving circuit includes structures such as thin film transistors and capacitors.
  • the light emitting device includes a first electrode layer 418, a second electrode layer 404, and an organic functional layer between the first electrode layer 420 and the second electrode layer 404.
  • the organic functional layer includes an organic light emitting material layer 420 and an auxiliary layer.
  • the light-emitting layer 403, at least part of the organic functional layer, such as the auxiliary light-emitting layer 403 and the second electrode layer 404, is usually formed as a whole surface in the display area 401.
  • the organic functional layer has a recess 4012A in the first barrier wall 4012. The side is disconnected.
  • the first electrode layer 418 is an anode layer
  • the second electrode layer 404 is a cathode layer
  • the cathode layer is also disconnected on the side of the first barrier wall 4012 with the notch 4012A.
  • part of the organic functional layer and the second electrode layer 404 are also formed on the top of the first barrier wall 4012, but these parts are separated from other parts.
  • the thin film transistor includes a gate 411, a source and drain 412 and other structures
  • the capacitor includes a first electrode 413, a second electrode 414, and a first insulating layer 415 between the first electrode 413 and the second electrode 414.
  • the gate 411 or the source and drain 412 may be implemented as an electrode pattern having a second metal layer structure.
  • the source and drain electrodes 412 include a second metal layer structure, and the first metal layer structure of the first barrier wall 4012 and the second metal layer structure of the source and drain electrodes 412 are formed in the same layer and have the same thickness.
  • the first metal layer structure of the first barrier wall 4012 and the second metal layer structure of the source and drain electrodes 412 can be formed by using the same film layer.
  • both the first metal layer structure and the second metal layer structure have a multilayer structure such as a double-layer structure or a triple-layer structure.
  • the display substrate 400 further includes a base substrate 402, and the base substrate 402 has an opening 4021 located in the opening area 4011.
  • the display substrate 400 further includes an image sensor and/or an infrared sensor.
  • the image sensor and/or infrared sensor are combined with the base substrate 402, for example, on the side of the base substrate 402 away from the light-emitting device, and on the base substrate.
  • the orthographic projection on 402 and the opening area 4011 at least partially overlap, for example, the image sensor and/or the infrared sensor are arranged at the position indicated by the reference number 410 in the figure. Therefore, the image sensor and/or the infrared sensor can realize the functions of image collection, face recognition, infrared sensing and the like through the opening area 4011.
  • the display substrate 400 may further include a second insulating layer 416 that covers the capacitor, a flat layer 417 that planarizes the driving circuit, a pixel defining layer 419 that defines a pixel array, and a columnar partition that forms a packaging space.
  • the cushion 408, the encapsulation layer 405 for sealing, the second encapsulation layer 406 and the third encapsulation layer 407 to further improve the encapsulation effect, etc., will not be repeated in the embodiments of the present disclosure.
  • the thin film transistor since one of the source and drain electrodes 412 of the thin film transistor is connected to the first electrode layer 418, the thin film transistor may be a driving transistor, that is, the light emission flowing through the light emitting device is controlled by the applied data signal.
  • the magnitude of the current thereby controlling the gray scale of the pixel unit in the display process.
  • the configuration of the encapsulation layer 405, the second encapsulation layer 406, and the third encapsulation layer 407 can refer to the above-mentioned embodiment, and will not be repeated here.
  • the display substrate 400 may also form more than one layer of barrier walls, that is, may include multiple layers of barrier walls.
  • the multiple layers of barrier walls may form multiple layers of the display area 401. protection.
  • At least one embodiment of the present disclosure provides a method for manufacturing a display substrate, including: forming a display area and an opening area, and forming a first barrier wall between the display area and the opening area.
  • the formed display area surrounds the opening area.
  • the first barrier wall surrounds the opening area and includes a first metal layer structure. At least one side surface of the first metal layer structure surrounding the opening area is formed with a notch.
  • forming the display area includes: forming an electrode pattern while forming a first metal layer structure, the electrode pattern includes a second metal layer structure, and the first metal layer structure and the second metal layer structure use the same film layer. form.
  • the first metal layer structure and the second metal layer structure are multilayer electrode structures such as double-layer, triple-layer, etc.
  • forming the first barrier wall while forming the electrode pattern includes: forming a first metal material layer on the first side of the base substrate; A second metal material layer is formed on the side of the first metal material layer away from the base substrate; the first metal material layer and the second metal material layer are first etched to form electrode patterns and initial barrier walls; The barrier wall is subjected to a second etching to form the first barrier wall, wherein the second etching adopts wet etching, and the etching speed used for the first metal material layer is greater than that for the second metal material layer. Etching rate, thereby forming notches.
  • forming the first barrier wall while forming the electrode pattern includes: sequentially forming a third metal material layer on the first side of the base substrate, The first metal material layer and the second metal material layer; the first etching is performed on the third metal material layer, the first metal material layer, and the second metal material layer to form electrode patterns and initial barrier walls; The second etching to form the first barrier wall, wherein the second etching adopts wet etching, and the etching speed of the first metal material layer is greater than the etching speed of the second metal material layer by the etching solution used And the etching speed of the third metal material layer, thereby forming a notch.
  • forming the display area further includes: forming a first electrode layer, a second electrode layer, and an organic functional layer between the first electrode layer and the second electrode layer for the light emitting device located in the display area, wherein the second etching
  • the etching solution used is the same as the etching solution used for etching to form the first electrode layer. Therefore, the first barrier wall can be formed at the same time as the electrode pattern and the first electrode layer are formed, so the original process steps are not increased.
  • the first metal layer structure and the second metal layer structure may be formed by a wet etching process.
  • forming the electrode pattern while forming the first barrier wall includes: forming a first metal material layer on the first side of the base substrate; forming a second metal material layer on the side of the first metal material layer away from the base substrate; The first metal material layer and the second metal material layer are wet-etched once, and the etching speed of the first metal material layer is higher than the etching speed of the second metal material layer by the etching solution used in the wet etching. The notch is formed by wet etching once.
  • This method is also suitable for forming the first metal layer structure and the second metal layer structure having a three-layer structure, which will not be repeated here.
  • the opening area 2011 is formed by opening a hole at the position 20111.
  • forming the display area 201 includes forming a light emitting device for the pixel array and a driving circuit for driving the light emitting device.
  • the first barrier wall 2012 formed between the display area 201 and the opening area 2011 is formed in the same layer as the multiple functional layers in the display area 201.
  • the embodiments of the present disclosure do not limit the specific structures of the light-emitting device of the pixel array and the driving circuit for driving the light-emitting device.
  • a driving circuit layer is formed on the base substrate 202, including the formation of thin film transistors and storage capacitors.
  • a patterning process is used to sequentially form layers of structures such as thin film transistors and storage capacitors on the base substrate 202.
  • a patterning process includes photoresist formation, exposure, development, and etching.
  • the gate 211 of the thin film transistor and the first electrode 213 of the storage capacitor are formed by using the same film layer and using the same patterning process to simplify the manufacturing process.
  • the gate 211 and the first electrode 213 of the storage capacitor include metals or alloy materials such as aluminum, titanium, and cobalt.
  • a gate material layer is first formed by sputtering or evaporation, and then a patterning process is performed on the gate material layer to form the patterned gate 211 and the first electrode 213 of the storage capacitor.
  • the source and drain 212 of the thin film transistor can be formed as a multilayer electrode structure, for example, a titanium material layer, an aluminum material layer, and a titanium material layer are sequentially formed by sputtering or evaporation, and then the same patterning process is used for the three materials.
  • the layers are patterned to form a titanium 2121/aluminum 2122/titanium 2123 three-layer electrode structure that constitutes the source and drain 212, and an initial first barrier wall 20120 is formed at the same time.
  • the initial first barrier wall 20120 surrounds the position 20111 where the opening area 2011 will be formed.
  • the etching method used in the above patterning process is dry etching, so that the formed source and drain electrodes 212 and the sides of the initial first barrier wall 20120 have a flat structure.
  • a flat layer 217, a first electrode layer 218, and a pixel defining layer 219 are formed, and an organic functional layer is formed in the opening of the pixel defining layer 219, It includes an organic light-emitting material layer 220 and an auxiliary light-emitting layer 203.
  • the planarization layer 217 can be formed by a patterning process using organic materials such as resin materials or inorganic materials such as silicon nitride and silicon oxide, and the formed planarization layer 217 has via holes so that the first electrode layer 218 formed later can pass through the overpass.
  • the hole is connected to the source and drain 212.
  • a patterning process is used to form the first electrode layer 218 on the flat layer 217.
  • the first electrode layer 218 is an anode layer, and the material of the first electrode layer 218 includes metal oxides such as ITO, IZO, or metals such as Ag, Al, Mo, or alloys thereof.
  • the first electrode layer 218 is formed on the flat layer 217 through a patterning process, and the first electrode layer 218 is connected to the source and drain electrodes 212 through via holes in the flat layer 217.
  • the etching solution used will etch the initial first barrier wall 20120 at the same time, and the etching solution will affect the titanium/aluminum/titanium three forming the first barrier wall 20120.
  • the etching rate of the aluminum located in the middle layer in the layer electrode structure is greater than the etching rate of the titanium located on the upper and lower sides, thereby forming a notch on the side surface of the initial first barrier wall 20120.
  • a pixel defining layer 219 exposing the first electrode layer 218 is formed on the first electrode layer 218 through a patterning process.
  • the material of the pixel defining layer 219 includes organic materials such as resin materials or inorganic materials such as silicon nitride and silicon oxide, and the pixel defining layer 219 is formed with openings to form the organic functional layer and the second electrode layer of the light emitting device. 204.
  • the organic light-emitting material layer 220 may be formed in the opening of the pixel defining layer 219 by inkjet printing or vapor deposition. Then, as shown in FIG. 13C, column spacers 208, auxiliary light-emitting layers 203, and second electrode layers 204 are formed on the pixel defining layer 219 on which the organic light-emitting material layer 220 is formed.
  • the columnar spacers 208 can be formed by a patterning process using organic materials such as resin materials or inorganic materials such as silicon nitride and silicon oxide, and the columnar spacers 2026 are used to form an encapsulation space to facilitate subsequent formation of an encapsulation layer.
  • the auxiliary light-emitting layer 203 and the second electrode layer 204 are formed as a whole surface by evaporation, deposition or inkjet printing.
  • the organic light-emitting material layer 220 includes a light-emitting material that can emit light of colors such as red, green, or blue, and the auxiliary light-emitting layer 203 may be, for example, an electron injection layer or an electron transport layer.
  • the second electrode layer 204 is, for example, a cathode layer.
  • the material of the second electrode layer 204 includes metals such as Mg, Ca, Li, or Al, or their alloys, or metal oxides such as IZO, ZTO, or PEDOT/PSS (poly 3, 4-ethylenedioxythiophene/polystyrene sulfonate) and other conductive organic materials.
  • metals such as Mg, Ca, Li, or Al, or their alloys, or metal oxides such as IZO, ZTO, or PEDOT/PSS (poly 3, 4-ethylenedioxythiophene/polystyrene sulfonate) and other conductive organic materials.
  • the organic functional layer formed as a whole surface and the second electrode layer 204 are disconnected on the side of the first barrier wall 2012 with notches. In the figure, both sides of the first barrier wall 2012 have notches, so the organic function The layer and the second electrode layer 204 are completely separated by the first barrier wall 2012.
  • the organic functional layer and the second electrode layer 204 are contaminated in the portion of the first barrier wall 2012 close to the opening area 2011, due to the barrier effect of the first barrier wall 2012, impurities such as water and oxygen will not diffuse. It extends to the organic functional layer and the portion of the second electrode layer 204 for light emission.
  • an organic functional layer and a second electrode layer 204 are also formed on the first barrier wall 2012.
  • the encapsulation layer 205 can be formed on the second electrode layer 204 by chemical vapor deposition, physical vapor deposition, coating, or the like.
  • the encapsulation layer 205 can provide encapsulation and protection to the functional structure located in the display area.
  • a second encapsulation layer 206 and a third encapsulation layer 207 may also be formed on the encapsulation layer 205.
  • the second encapsulation layer 206 can planarize the encapsulation layer 205, and the third encapsulation layer 207 can form an outer layer encapsulation.
  • the encapsulation layer 205 and the third encapsulation layer 207 use inorganic materials, such as silicon nitride, silicon oxide, silicon oxynitride, etc.
  • the second encapsulation layer 206 uses organic materials, such as polyimide. (PI), epoxy resin, etc.
  • PI polyimide.
  • the encapsulation layer 205, the second encapsulation layer 206, and the third encapsulation layer 207 are formed as a composite encapsulation layer, which forms multiple protections for the functional structure of the display area, and has a better encapsulation effect.
  • other necessary functional film layers may be formed in the display area 201 according to needs, and these film layers may be formed by conventional methods, which will not be repeated here.
  • the opening area 2011 is formed in the position 20111.
  • laser cutting or mechanical punching is used to open the position 20111 to form the opening area 2011.
  • the opening area 2011 penetrates the base substrate 202, so the base substrate 202 also has openings.
  • the opening position can be installed with an image sensor, an infrared sensor, etc., and connected with a signal such as a central processing unit.
  • the image sensor or infrared sensor can be arranged on the side of the base substrate 202 away from the light-emitting structure (that is, the non-display side of the display substrate), and can realize photographing, facial recognition, infrared sensing, etc. through the aperture area 2011 A variety of functions.
  • the thin film transistor shown is of a top gate type, but the embodiment of the present disclosure is not limited thereto, for example, the thin film transistor may also be of a bottom gate type.
  • the driving circuit may include a plurality of thin film transistors, and these thin film transistors may be top-gate or bottom-gate, and may be N-type or P-type, which is not limited in the embodiments of the present disclosure.
  • the light-emitting device is an organic light-emitting diode or a quantum dot light-emitting diode.
  • the organic light-emitting diode may be a top-gate emission type, a bottom emission type or a double-side emission type, and the organic functional layer of the organic light-emitting diode It may be a composite layer, which includes an organic light-emitting material layer and other auxiliary light-emitting layers such as an electron injection layer, an electron transport layer, a hole transport layer, and a hole injection layer.
  • the embodiments of the present disclosure do not limit the specific structure and type of the organic light emitting diode.
  • the preparation method of some embodiments of the present disclosure can also form the display substrate as shown in FIGS. 5A and 5B.
  • the difference from the above example is that when the display substrate as shown in FIGS. 5A and 5B is formed, the display substrate A second barrier wall is also formed between the display area and the opening area.
  • the second barrier wall surrounds the opening area and is formed on the side of the first barrier wall far away from the hole area.
  • the second barrier wall can be
  • the first barrier wall is formed by the same film layer, so that the formed multilayer barrier wall can play a better barrier effect without increasing the process steps.
  • the preparation method of some embodiments of the present disclosure can also form the display substrate as shown in FIGS. 8A and 8B.
  • a first The barrier wall further includes etching an insulating layer located under the first metal layer structure of the first barrier wall.
  • the etching process may be performed before forming the first metal layer structure, or may be performed after forming the first metal layer structure, and
  • the etching process can also be performed simultaneously with etching other insulating layers (for example, etching the via holes where the source and drain electrodes 412 are formed), so that the first barrier with better barrier effect can be obtained without increasing the process steps. wall.
  • the display device 500 includes any display substrate provided by the embodiments of the present disclosure, and the display substrate 200 is shown in the figure.
  • the display device 500 may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, etc.
  • the embodiment of the present disclosure does not limit this.

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Abstract

一种显示基板及其制备方法、显示装置。该显示基板(200/300/400)包括显示区(201/301/401)和开孔区(2011/3011/4011)，显示区(201/301/401)围绕开孔区(2011/3011/4011)，显示区(201/301/401)和开孔区(2011/3011/4011)之间包括第一阻隔墙(2012/3012/4012)，第一阻隔墙(2012/3012/4012)围绕开孔区(2011/3011/4011)；第一阻隔墙(2012/3012/4012)包括第一金属层结构，第一金属层结构的围绕开孔区(2011/3011/4011)的至少一个侧面具有凹口(2012A/3012A/4012A)。该显示基板将摄像装置与显示基板的显示区结合在一起，并且具有更好的封装效果。

Description

显示基板及其制备方法、显示装置 技术领域
本公开的实施例涉及一种显示基板及其制备方法、显示装置。
背景技术
目前，显示器件的显示屏正往大屏化、全屏化方向发展。通常，显示器件(例如手机、平板电脑等)具有摄像装置(或成像装置)，该摄像装置通常设置在显示屏显示区域外的一侧。但是，由于摄像装置的安装需要一定的位置，因此不利于显示屏的全屏化、窄边框设计。例如，可以将摄像装置与显示屏的显示区域结合在一起，在显示区域中为摄像装置预留位置，以获得显示屏显示区域的最大化。
发明内容
本公开至少一实施例提供一种显示基板，该显示基板包括显示区和开孔区，所述显示区围绕所述开孔区，其中，所述显示区和所述开孔区之间包括第一阻隔墙，所述第一阻隔墙围绕所述开孔区；所述第一阻隔墙包括第一金属层结构，所述第一金属层结构的围绕所述开孔区的至少一个侧面具有凹口。
例如，本公开至少一实施例提供一种显示基板中，所述显示区包括电极图案，所述电极图案包括第二金属层结构，所述第一金属层结构和所述第二金属层结构具有相同的结构，并且包括相同的材料。
例如，本公开至少一实施例提供一种显示基板还包括衬底基板，所述第一金属层结构包括第一金属子层和第二金属子层；第一金属子层在所述衬底基板的第一侧，第二金属子层在所述第一金属子层的远离所述衬底基板的一侧，其中，所述第一金属子层在所述衬底基板上的正投影位于所述第二金属子层在所述衬底基板上的正投影内，由此形成所述凹口。
例如，本公开至少一实施例提供一种显示基板中，所述第一金属层结构还包括第三金属子层，所述第三金属子层位于所述衬底基板的所述第一侧，其中，所述第一金属子层在所述第三金属子层的远离所述衬底基板的一侧， 所述第一金属子层在所述衬底基板上的正投影位于所述第三金属子层在所述衬底基板上的正投影内。
例如，本公开至少一实施例提供一种显示基板中，所述第二金属子层在所述衬底基板上的正投影位于所述第三金属子层在所述衬底基板上的正投影内。
例如，本公开至少一实施例提供一种显示基板中，所述第一金属子层的厚度大于所述第二金属子层的厚度以及所述第三金属子层的厚度。
例如，本公开至少一实施例提供一种显示基板中，所述第一金属子层的厚度为150nm-900nm，所述第二金属子层的厚度为30nm-300nm，所述第三金属子层的厚度为30nm-300nm。
例如，本公开至少一实施例提供一种显示基板中，所述凹口的开口方向平行于所述衬底基板。
例如，本公开至少一实施例提供一种显示基板中，所述显示区和所述开孔区之间还包括第二阻隔墙，
所述第二阻隔墙围绕所述开孔区，具有与所述第一阻隔墙相同的结构，并设置在所述第一阻隔墙的远离所述开孔区的一侧。
例如，本公开至少一实施例提供一种显示基板中，所述显示区还包括用于形成发光器件的第一电极层、第二电极层以及第一电极层和第二电极层之间的有机功能层，所述有机功能层在所述第一阻隔墙具有所述凹口的侧面断开。
例如，本公开至少一实施例提供一种显示基板中，所述第二电极层为阴极层，所述阴极层在所述第一阻隔墙具有所述凹口的侧面断开。
例如，本公开至少一实施例提供一种显示基板还包括图像传感器和/或红外传感器，其中，所述图像传感器和/或红外传感器结合于所述衬底基板，并且在所述衬底基板上的正投影与所述开孔区至少部分重叠。
例如，本公开至少一实施例提供一种显示基板中，在用于刻蚀形成所述第一金属层结构的刻蚀液的作用下，所述第一金属子层的材料被刻蚀的速度大于所述第二金属子层的材料被刻蚀的速度。
例如，本公开至少一实施例提供一种显示基板中，所述第一金属子层的材料包括铝或铜；所述第二金属子层的材料包括钛或钼。
例如，本公开至少一实施例提供一种显示基板中，所述第一阻隔墙还包 括绝缘层结构，所述绝缘层结构位于所述衬底基板的所述第一侧，所述第一金属层结构在所述绝缘层结构的远离所述衬底基板的一侧。
例如，本公开至少一实施例提供一种显示基板中，所述绝缘层结构包括多个子绝缘层。
本公开至少一实施例提供一种显示基板的制备方法，包括：形成显示区和开孔区，所述显示区围绕所述开孔区，在所述显示区和所述开孔区之间形成第一阻隔墙，其中，所述第一阻隔墙围绕所述开孔区，且包括第一金属层结构，所述第一金属层结构的围绕所述开孔区的至少一个侧面形成有凹口。
例如，本公开至少一实施例提供的制备方法中，采用激光切割或者机械冲压的方式形成所述开孔区。
例如，本公开至少一实施例提供的制备方法中，形成所述显示区包括：在形成第一金属层结构的同时形成电极图案，其中，所述电极图案包括第二金属层结构，所述第一金属层结构和所述第二金属层结构采用相同的膜层形成。
例如，本公开至少一实施例提供的制备方法中，形成所述第一阻隔墙包括：在衬底基板的第一侧形成第一金属材料层，在所述第一金属材料层的远离所述衬底基板的一侧形成第二金属材料层；对所述第一金属材料层和所述第二金属材料层进行第一刻蚀，以形成所述电极图案以及初始阻隔墙；对所述初始阻隔墙进行第二刻蚀，以形成所述第一阻隔墙，其中，所述第二刻蚀采用湿刻蚀，并且使用的刻蚀液对所述第一金属材料层的刻蚀速度大于对所述第二金属材料层的刻蚀速度，由此形成所述凹口。
例如，本公开至少一实施例提供的制备方法中，形成所述第一阻隔墙包括：在衬底基板的第一侧依次形成第三金属材料层、第一金属材料层以及第二金属材料层；对所述第三金属材料层、第一金属材料层以及第二金属材料层进行第一刻蚀，以形成所述电极图案以及初始阻隔墙；对所述初始阻隔墙进行第二刻蚀，以形成所述第一阻隔墙，其中，所述第二刻蚀采用湿刻蚀，并且使用的刻蚀液对所述第一金属材料层的刻蚀速度大于对所述第二金属材料层的刻蚀速度以及对所述第三金属材料层的刻蚀速度，由此形成所述凹口。
例如，本公开至少一实施例提供的制备方法中，所述第一刻蚀为干刻蚀。
例如，本公开至少一实施例提供的制备方法中，形成所述显示区还包括形成用于发光器件的第一电极层、第二电极层以及第一电极层和第二电极层之间的有机功能层，其中，所述第二刻蚀采用的刻蚀液与刻蚀形成所述第一电极层所采用的刻蚀液相同，所述有机功能层在所述第一阻隔墙具有所述凹口的侧面断开。
例如，本公开至少一实施例提供的制备方法中，形成所述第一阻隔墙包括：在衬底基板的第一侧形成第一金属材料层；在所述第一金属材料层的远离所述衬底基板的一侧形成第二金属材料层；对所述第一金属材料层和所述第二金属材料层进行一次湿刻蚀，所述湿刻蚀使用的刻蚀液对所述第一金属材料层的刻蚀速度大于对所述第二金属材料层的刻蚀速度。
例如，本公开至少一实施例提供的制备方法中，在所述显示区和所述开孔区之间还形成第二阻隔墙，其中，所述第二阻隔墙围绕所述开孔区，并且形成在所述第一阻隔墙的远离所述开孔区的一侧，所述第二阻隔墙与所述第一阻隔墙采用相同的膜层形成。
本公开至少一实施例提供一种显示装置，包括上述任一的显示基板。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1A为一种显示基板的平面示意图；
图1B为图1A中的显示基板沿A-A线的截面示意图；
图2A为本公开一些实施例提供的一种显示基板的平面示意图；
图2B为图2A中的显示基板沿B-B线的截面示意图；
图2C为图2A中的显示基板沿B-B线的另一截面示意图；
图3为本公开一些实施例提供的一种显示基板中阻隔墙的截面示意图；
图4为本公开一些实施例提供的一种显示基板中阻隔墙的截面示意图；
图5A为本公开一些实施例提供的另一种显示基板的平面示意图；
图5B为图2A中的显示基板沿C-C线的截面示意图；
图5C为图2A中的显示基板沿C-C线的另一截面示意图；
图6为本公开一些实施例提供的另一种显示基板中阻隔墙的截面示意 图；
图7为本公开一些实施例提供的另一种显示基板中阻隔墙的截面示意图；
图8A为本公开一些实施例提供的再一种显示基板的平面示意图；
图8B为图8A中的显示基板沿D-D线的截面示意图；
图9为本公开一些实施例提供的再一种显示基板中阻隔墙的截面示意图；
图10为本公开一些实施例提供的再一种显示基板中阻隔墙的截面示意图；
图11为本公开一些实施例提供的再一种显示基板中阻隔墙的截面示意图；
图12A-12B为本公开一些实施例提供的一种显示基板在制备过程中的平面示意图；
图13A-13C为本公开一些实施例提供的一种显示基板在制备过程中的截面示意图；
图14为本公开一些实施例提供的一种显示装置的示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后， 则该相对位置关系也可能相应地改变。
为实现显示装置的显示区域的最大化，可以将显示装置所具有的摄像装置(成像装置)与显示区域整合在一起，将摄像装置布置在显示区域之中。
例如，图1A示出了一种用于显示装置的显示基板的平面示意图，图1B为图1A中的显示基板沿A-A线的截面示意图。如图1A所示，显示基板100包括显示区域101，显示区域101包括像素阵列且具有在像素阵列中的开孔1011，该开孔1011为摄像装置(未示出)预留位置，摄像装置可以设置在该显示基板100的与显示侧相对的背侧，从而摄像装置可以通过开孔1011获取图像。由此，将摄像装置与显示基板100的显示区域101整合在一起。
显示区域101具有用于显示的发光器件，例如该发光器件为有机发光二极管，显示区域101的全部或部分中的多个发光器件具有的有机功能层103和电极层104通常在显示区101中形成为一整面，因此采用封装层105进行封装时，位于开孔1011附近的区域往往难以被封装，或者即使被封装，也难以保证该区域的封装效果。此时，如图1B所示，例如水、氧等杂质可以从开孔1011沿整面形成的有机功能层103和电极层104进入到显示区域101内部，污染显示区域101中的功能材料，导致这些功能材料的性能退化，进而影响显示区域101的显示效果。
本公开至少一实施例提供一种显示基板，该显示基板包括显示区和开孔区，显示区围绕开孔区，其中，显示区和开孔区之间包括第一阻隔墙，第一阻隔墙围绕开孔区；第一阻隔墙包括第一金属层结构，第一金属层结构的围绕开孔区的至少一个侧面具有凹口。
本公开至少一实施例提供一种显示基板的制备方法，包括：形成显示区和开孔区，在显示区和开孔区之间形成第一阻隔墙；其中，显示区围绕开孔区，第一阻隔墙围绕开孔区，且包括第一金属层结构，第一金属层结构的围绕开孔区的至少一个侧面形成有凹口。
本公开至少一实施例提供一种显示装置，包括上述显示基板。
下面通过几个具体的实施例对本公开一些实施例的显示基板及其制备方法、显示装置进行说明。
本公开至少一实施例提供一种显示基板，图2A示出了该显示基板的平面示意图，图2B为图2A中的显示基板沿B-B线的截面示意图。
如图2A和图2B所示，显示基板200包括显示区201与开孔区2011， 显示区201围绕开孔区2011；显示区201与开孔区2011之间包括第一阻隔墙2012，第一阻隔墙2012围绕开孔区2011；第一阻隔墙2012包括第一金属层结构，第一金属层结构的围绕开孔区2011的至少一个侧面具有凹口2012A。该开孔区2011允许来自显示基板的显示侧(图2B中的上侧)的光传输通过显示基板，从而到达显示基板的背侧(图2B中的下侧)。
例如，在图2B示出的第一金属层结构中，第一金属层结构面向开孔区2011的侧面和背离开孔区2011的侧面均具有凹口2012A，在本实施例的其他示例中，也可以在第一金属层结构的一个侧面具有凹口2012A。
例如，本实施例中，显示区201包括用于进行显示操作的像素阵列，该像素阵列包括阵列排布的多个像素单元，这些像素单元包括驱动电路、发光电路等，因此该显示区201还包括电极图案，该电极图案包括第二金属层结构，第一金属层结构和第二金属层结构的结构相同，并且具有相同的材料。例如，第一金属层结构和第二金属层结构在制备工艺中可同层形成且具有相同的多层结构，并且在第一金属层结构和第二金属多层结构中，对应层的材料均相同，由此第一金属层结构和第二金属层结构可由相同的膜层形成。
例如，如图2B所示，显示区201包括像素阵列，该像素阵列的多个像素单元包括多个用于显示的发光器件以及驱动这些发光器件的驱动电路。例如，该发光器件包括电极层、有机功能层等结构，该驱动电路包括薄膜晶体管、电容等结构。
如图2B所示，发光器件包括第一电极层218、第二电极层204以及第一电极层218和第二电极层204之间的有机功能层，有机功能层例如包括有机发光材料层220和辅助发光层203，辅助发光层203例如为电子传输层或者电子注入层等。用于多个像素单元的发光器件的有机功能层的至少部分，例如辅助发光层203和第二电极层204在显示区201中通常形成为一整面，此时，有机功能层在第一阻隔墙2012具有凹口2012A的侧面断开。例如，第一电极层218为阳极层(或称为像素电极层)，第二电极层204为阴极层，阴极层也在第一阻隔墙2012具有凹口1012A的侧面断开。由此，当位于靠近开孔区2011一侧的有机功能层和第二电极层204被水、氧等杂质污染时，由于有机功能层和第二电极层204被第一阻隔墙2012隔断，使得这些污染杂质不会延伸至有机功能层和第二电极层204的用于发光器件进行发光的部分中。例如，第一阻隔墙2012的顶部上也形成有部分的有机功能层和部分 的第二电极层204，但是这些部分与其他部分相分离。
例如，薄膜晶体管包括栅极211、源漏极212等结构，电容包括第一极213、第二极214以及第一极213和第二极214之间的第一绝缘层215。例如，栅极211或者源漏极212可以实现为具有第二金属层结构的电极图案。例如，图2B中示出为源漏极212包括第二金属层结构。此时，第一阻隔墙2012的第一金属层结构和源漏极212的第二金属层结构的结构相同，并且包括相同的材料，例如第一阻隔墙2012的第一金属层结构和源漏极212的第二金属层结构同层形成且具有相同的多层结构，从而在显示基板200的制备过程中，第一阻隔墙2012的第一金属层结构和源漏极212的第二金属层结构可以采用相同的膜层形成。例如，在一些示例中，第一金属层结构和第二金属层结构均具有双层结构或者三层结构等多层结构。
例如，如图2B所示，显示基板200还包括衬底基板202，显示区201在衬底基板202上，衬底基板202具有位于开孔区2011的开孔2021。例如，第一阻隔墙2012的第一金属层结构中的凹口的开口方向平行于衬底基板202。例如，在图2B的实施例中，衬底基板202沿水平方向放置，凹口的开口方向为水平方向。
例如，在一个示例中，如图3所示，第一阻隔墙2012的第一金属层结构包括双层金属层结构，即第一金属子层20121和第二金属子层20122。第一金属子层20121在衬底基板202的第一侧(发光器件将要形成的一侧，图中示出为上侧)，第二金属子层20122在第一金属子层20121的远离衬底基板202的一侧(图中示出为上侧)，第一金属子层20121在衬底基板202上的正投影位于第二金属子层20122在衬底基板202上的正投影内，由此在二者的叠层的侧面形成凹口2012A。此时，在形成有第一阻隔墙2012的衬底基板202上形成有机功能层以及第二电极层204时，可以使得有机功能层和第二电极层204在第一阻隔墙2012处断开，从而断开水、氧等杂质进入显示区201内部的路线。
例如，在一个示例中，如图4所示，第一阻隔墙2012的第一金属层结构包括三层金属层结构，即第一金属子层20121、第二金属子层20122和第三金属子层20123，第三金属子层20123在衬底基板202的第一侧(图中示出为上侧)，第一金属子层20121在第三金属子层20123的远离衬底基板202的一侧(图中示出为上侧)，第二金属子层20122在第一金属子层20121的 远离衬底基板202的一侧(图中示出为上侧)，第一金属子层20121在衬底基板202上的正投影位于第二金属子层20122在衬底基板202上的正投影内，并且第一金属子层20121在衬底基板202上的正投影还位于第三金属子层20123在衬底基板202上的正投影内，由此在三者的叠层的侧面形成凹口2012A。此时，在形成有第一阻隔墙2012的衬底基板202上形成有机功能层以及第二电极层204时，可以使得有机功能层和第二电极层204在第一阻隔墙2012处断开，从而断开水、氧等杂质进入显示区201内部的路线。
例如，在一些示例中，第二金属子层20122在衬底基板202上的正投影位于第三金属子层20123在衬底基板202上的正投影内。此时，第三金属子层20123在衬底基板202上的正投影最大，由此可增大第一阻隔墙2012的第一金属层结构与显示基板的结合强度，增强第一金属层结构的稳定性，并有助于有机功能层和第二电极层204在第一阻隔墙2012处断开。
例如，图2B中示出的即为具有该三层金属层结构的示例，此时源漏极212所具有的第二金属层结构包括与第三金属子层20123同层的金属子层2123、与第一金属子层20121同层的金属子层2121和第二金属子层20122同层的金属子层2122。
在图2B示出的情况下，薄膜晶体管中源漏极212的第二金属层结构与第一金属层结构同层形成且具有相同的多层结构，即均具有三层金属层结构，从而在显示基板200的制备过程中，第一阻隔墙2012的第一金属层结构和源漏极212的第二金属层结构可以采用相同的膜层通过同一次制备工艺形成，以简化工艺步骤。
例如，在第一阻隔墙2012的第一金属层结构中，第一金属子层20121的厚度大于第二金属子层20122的厚度以及第三金属子层20123的厚度，从而更便于形成凹口且更有利于使得有机材料层203和第二电极层204在第一阻隔墙2012处断开，由此第一阻隔墙2012可以实现更好的阻隔作用。例如，第一金属子层20121的厚度为150nm-900nm，例如200nm、400nm、600nm或800nm等；第二金属子层20122的厚度为30nm-300nm，例如100nm、150nm或200nm等；第三金属子层20123的厚度为30nm-300nm，例如100nm、150nm或200nm等。例如在一个示例中，第一金属子层20121的厚度为600nm，第二金属子层20122的厚度为200nm，第三金属子层20123的厚度为200nm，此时第一阻隔墙2012可充分实现阻隔作用。
例如，本公开的一些实施例中，第二金属子层20122的材料和第三金属子层20123的材料可以相同，第一金属子层20121的材料和第二金属子层20122的材料在刻蚀时具有不同的刻蚀速率。例如，在用于刻蚀形成第一金属层结构的刻蚀液的作用下，第一金属子层20121的材料被刻蚀的速度大于第二金属子层20122的材料被刻蚀的速度，从而在制备时容易形成具有凹口2012A的第一金属层结构。
例如，在一些实施例中，第一金属子层20121的材料包括铝或铜等金属或其合金，第二金属子层20122的材料包括钛或钼等金属或其合金，第三金属子层20123的材料与第二金属子层20122的材料相同，包括钛或钼等金属或其合金。在用于刻蚀形成显示基板的电极结构，例如第二电极层204的刻蚀液的作用下，铝或铜被刻蚀的速度大于钛或钼被刻蚀的速度。由此，可以在刻蚀形成第二电极层204等电极结构的同时，刻蚀第一金属子层20121、和第二金属子层20122和第三金属子层20123，以形成凹口2012A。
例如，在一些示例中，当第一金属层结构采用双层结构时，第一金属子层20121和第二金属子层20122的材料组合可以为铝/钛、铝/钼、铜/钛或者铜/钼等；当第一金属层结构采用三层结构时，第三金属子层20123、第一金属子层20121和第二金属子层20122的材料组合可以为钛/铝/钛、钼/铝/钼、钛/铜/钛或者钼/铜/钼等。
例如，本公开的一些实施例中，如图2B所示，显示基板200还包括图像传感器和/或红外传感器，图像传感器和/或红外传感器结合于衬底基板202，例如结合在衬底基板202的远离发感光器件的一侧，并且在衬底基板202上的正投影与开孔区2011至少部分重叠，例如图像传感器和/或红外传感器设置在图中标号210指示的位置。由此，图像传感器和/或红外传感器可以通过开孔区2011实现图像采集、人脸识别、红外感应等功能。
需要注意的是，本实施例的一些示例中，显示基板200还可以包括覆盖电容的第二绝缘层216、平坦化驱动电路的平坦层217、限定像素阵列的像素界定层219、形成封装空间的柱状隔垫物208、用于密封的封装层205以及进一步提高封装效果的第二封装层206以及第三封装层207等结构，本公开的实施例对此不再赘述。在该实施例的示例中，由于薄膜晶体管的源漏极212之一与第一电极层218连接，从而该薄膜晶体管可以为驱动晶体管，即根据所施加的数据信号的控制流过发光器件的发光电流的大小，从而控制像 素单元在显示过程中的灰阶。
例如，封装层205为无机封装层，包括氧化硅、氮化硅等材料，第二封装层206为有机封装层，包括聚酰亚胺等有机材料，第三封装层207为无机封装层，包括氧化硅、氮化硅等材料。例如，在图2B的示例中，封装层205、第二封装层206和第三封装层207均延伸至第一阻隔墙2012的靠近开孔区2011的一侧，从而三个封装层均对第一阻隔墙2012进行封装。在其他示例中，如图2C所示，封装层205延伸至第一阻隔墙2012的靠近开孔区2011的一侧，第二封装层206和第三封装层207均终止于第一阻隔墙2012的靠近显示区201的一侧，由于有机材料阻挡水氧的能力相对较弱，因此包括有机材料的第二封装层206终止于更远离开孔区201的位置，可避免水、氧等杂质通过第二封装层206进入到显示区201内部。例如，在一些示例中，也可以是封装层205和第三封装层207延伸至第一阻隔墙2012的靠近开孔区2011的一侧，而仅第二封装层206终止于第一阻隔墙2012的靠近显示区201的一侧，该示例同样可以避免水、氧等杂质通过包括有机材料的第二封装层206进入到显示区201内部。本公开的实施例对封装层205、第二封装层206以及第三封装层207的具体设置方式不做限定。
在本公开的一些实施例中，例如显示面板的开孔区2011周围还可以设置不止一层阻隔墙，即可以包括多层阻隔墙，例如设置双层、三层、四层、五层等，以增强阻隔效果。
例如，图5A和图5B示出的显示基板包括双层阻隔墙，其中图5A为该显示基板的平面示意图，图5B是图5A中的显示基板沿C-C线的截面示意图。
如图5A和图5B所示，显示基板300包括显示区301和开孔区3011，显示区301围绕开孔区3011，显示区301和开孔区3011之间包括第一阻隔墙3012和第二阻隔墙3013，第一阻隔墙3012和第二阻隔墙3013围绕开孔区3011。第二阻隔墙3013设置在第一阻隔墙3012的远离开孔区3011的一侧，且间隔开一定距离；第一阻隔墙3012和第二阻隔墙3013均包括第一金属层结构，第一阻隔墙3012的第一金属层结构的围绕开孔区3011的至少一个侧面具有凹口3012A，第二阻隔墙3013的第一金属层结构的围绕开孔区3011的至少一个侧面具有凹口3013A。
与上述实施例相同，显示区301包括电极图案，电极图案包括第二金 属层结构，第一阻隔墙3012和第二阻隔墙3013的第一金属层结构和该第二金属层结构的结构相同，并且包括相同的材料，例如第一阻隔墙3012和第二阻隔墙3013的第一金属层结构和第二金属层结构同层形成且具有相同的多层结构。
例如，显示区301包括像素阵列，该像素阵列的多个像素单元包括多个用于显示的发光器件以及驱动这些发光器件的驱动电路。例如，该驱动电路包括薄膜晶体管、电容等结构。
如图5B所示，发光器件包括第一电极层318、第二电极层304以及第一电极层320和第二电极层之间的有机功能层，有机功能层例如包括有机发光材料层210和辅助发光层303，有机功能层的至少部分，例如辅助发光层303和第二电极层304在显示区301中通常形成为一整面，此时，有机功能层在第一阻隔墙3012和第二阻隔墙3013具有凹口3012A/3013A的侧面断开。例如，第一电极层318为阳极层(或称为像素电极层)，第二电极层304为阴极层，阴极层也在第一阻隔墙2012和第二阻隔墙3013具有凹口3012A/3013A的侧面断开。由此，当位于靠近开孔区3011一侧的有机功能层和第二电极层304被水、氧等杂质污染时，由于有机功能层和第二电极层304被第一阻隔墙3012隔断，使得该污染不会延伸至有机功能层和第二电极层304的用于发光器件进行发光的部分中。例如，第一阻隔墙3012上也形成有有机功能层和第二电极层304，但是这些部分与其他部分相分离。
类似地，薄膜晶体管包括栅极311、源漏极312等结构，电容包括第一极313、第二极314以及第一极313和第二极314之间的第一绝缘层315。例如，栅极311或者源漏极312可以实现为具有第二金属层结构的电极图案。例如，图5B中示出为源漏极312包括第二金属层结构，且第一阻隔墙3012和第二阻隔墙3013的第一金属层结构和源漏极312的第二金属层结构同层形成且具有相同的多层结构，从而在显示基板300的制备过程中，第一阻隔墙3012和第二阻隔墙3013的第一金属层结构和源漏极312的第二金属层结构可以采用相同的膜层形成。例如，在一些示例中，第一金属层结构和第二金属层结构均具有双层结构或者三层结构等多层结构。
本实施例中，如图6和图7所示，第一阻隔墙3012和第二阻隔墙3013的第一金属层结构与上述实施例基本相同，具体描述可参见上述实施例，其中类似的标号代表相同的结构，本实施例不再赘述。
如图5B所示，显示基板300还包括衬底基板302，衬底基板302具有位于开孔区3011的开孔3021。例如，第一阻隔墙3012和第二阻隔墙3013的第一金属层结构中的凹口的开口方向平行于衬底基板202。
例如，显示基板300还包括图像传感器和/或红外传感器，图像传感器和/或红外传感器结合于衬底基板302，例如结合在衬底基板302的远离发感光器件的一侧，并且在衬底基板302上的正投影与开孔区3011至少部分重叠，例如图像传感器和/或红外传感器设置在图中标号310指示的位置。由此，图像传感器和/或红外传感器可以通过开孔区3011实现图像采集、人脸识别、红外感应等功能。
类似地，本实施例的一些示例中，显示基板300还可以包括覆盖电容的第二绝缘层316、平坦化驱动电路的平坦层317、限定像素阵列的像素界定层319、形成封装空间的柱状隔垫物308、用于密封的封装层305以及进一步提高封装效果的第二封装层306以及第三封装层307等结构，本公开的实施例对此不再赘述。在该实施例的示例中，由于薄膜晶体管的源漏极312之一与第一电极层318连接，从而该薄膜晶体管可以为驱动晶体管，即根据所施加的数据信号的控制流过发光器件的发光电流的大小，从而控制像素单元在显示过程中的灰阶。
例如，封装层305为无机封装层，包括氧化硅、氮化硅等材料，第二封装层306为有机封装层，包括聚酰亚胺等有机材料，第三封装层307为无机封装层，包括氧化硅、氮化硅等材料。例如，在图5B的示例中，封装层305、第二封装层306和第三封装层307均延伸至第一阻隔墙3012的靠近开孔区3011的一侧，从而三个封装层均对第一阻隔墙3012和第二阻隔墙3013进行封装。在其他示例中，如图5C所示，封装层305延伸至第一阻隔墙3012的靠近开孔区3011的一侧，第二封装层306和第三封装层307均终止于第一阻隔墙3012和第二阻隔墙3013之间。例如，在一些示例中，也可以是封装层305和第三封装层307延伸至第一阻隔墙3012的靠近开孔区3011的一侧，而仅第二封装层306终止于第一阻隔墙3012和第二阻隔墙3013之间。例如，在一些示例中，还可以是封装层305和第三封装层307延伸至第一阻隔墙3012的靠近开孔区3011的一侧，而仅第二封装层306终止于第二阻隔墙3013的靠近显示区301的一侧。本公开的实施例对各封装层的具体设置不做限定。
在本公开的一些实施例中，第一阻隔墙除了包括上述第一金属层结构 外，例如还包括绝缘层结构，第一金属层结构层叠在绝缘层结构上，从而形成具有更多层结构的第一阻隔墙以增强阻隔效果。
例如，图8A和图8B示出的显示基板包括具有第一金属层结构和绝缘层结构的第一阻隔墙，其中图8A为该显示基板的平面示意图，图8B是图8A中的显示基板沿D-D线的截面示意图。
如图8A和图8B所示，显示基板400包括显示区401和开孔区4011，显示区401和开孔区4011之间包括第一阻隔墙4012，显示区401围绕开孔区4011，第一阻隔墙4012围绕开孔区4011，第一阻隔墙4012包括第一金属层结构和绝缘层结构，第一金属层结构的围绕开孔区4011的至少一个侧面具有凹口4012A。
在一个示例中，如图9所示，第一阻隔墙4012包括第一金属层结构4012B和绝缘层结构4012C。第一金属层结构4012B的结构与上述实施例基本相同，具体描述可参见上述实施例，其中类似的标号代表相同的结构，在此不再赘述。绝缘层结构4012C包括至少一个绝缘层，该绝缘层例如是通过刻蚀形成于第一金属层结构4012B下方的绝缘层得到的。如图9所示，绝缘层结构4012C的截面形成为长方形，此时，在第一阻隔墙4012之后形成的有机功能层的至少部分403和第二电极层404在第一阻隔墙3012的绝缘层结构4012C的侧面即可断开。
在一个示例中，如图10所示，由于工艺的原因，第一阻隔墙4012的绝缘层结构4012C的截面可以形成为正梯形结构，此时，在第一阻隔墙4012之后形成的有机功能层和第二电极层404会沿第一阻隔墙3012的绝缘层结构4012C的侧面延伸至第一金属层结构4012B，然后在第一金属层结构4012B的侧面断开。该情况下，第二电极层404上形成的封装层405与第二电极层404的接触面积更大，因此会增强封装层405的封装效果。
另一方面，绝缘层结构4012C通常包括无机材料(例如氮化硅、氧化硅等)，此时若开孔区4011的边缘具有无机绝缘层，该无机绝缘层在形成开孔区4011时容易产生裂纹，并且该裂纹容易向显示基板的显示区内部扩展。本实施例中，将形成于第一金属层结构4012B下方的绝缘层通过刻蚀形成第一阻隔墙4012的绝缘层结构4012C，使得开孔区4011的边缘不再具有无机绝缘层，或者减少位于开孔区4011边缘的无机绝缘层材料，从而可以减少裂纹扩展的路径，并且形成的第一阻隔墙4012也可以防止裂纹进一步扩展。
例如，图8B示出的显示基板具有如图10所示的第一阻隔墙4012，并且第一阻隔墙4012的绝缘层结构4012C包括多个子绝缘层，例如包括与第一绝缘层415和第二绝缘层416同层的子绝缘层等。例如在其他一些实施例中，绝缘层结构4012C还可以包括与衬底基板402上方的缓冲层4020同层的子绝缘层，此时，缓冲层4020被进一步刻蚀，使得衬底基板402的部分表面被暴露，该部分被暴露的表面可与之后形成的有机功能层直接接触。例如，在其他一些实施例中，绝缘层结构4012C还可以包括与缓冲层4020上方的栅绝缘层430同层的子绝缘层。例如，在其他一些实施例中，绝缘层结构4012C也可以只包括一层或者两层子绝缘层，本公开的实施例对绝缘层结构4012C的层数不做具体限定。
另外，与上述实施例相同，显示区401还包括电极图案，电极图案包括第二金属层结构，第一金属层结构和第二金属层结构具有相同的结构，且包括相同的材料。例如第一金属层结构和第二金属层结构同层形成且具有相同的多层结构。
例如，显示区401包括像素阵列，该像素阵列的多个像素单元包括多个用于显示的发光器件以及驱动这些发光器件的驱动电路。例如，该驱动电路包括薄膜晶体管、电容等结构。
如图8B所示，发光器件包括第一电极层418、第二电极层404以及第一电极层420和第二电极层404之间的有机功能层，有机功能层包括有机发光材料层420和辅助发光层403，有机功能层的至少部分，例如辅助发光层403和第二电极层404在显示区401中通常形成为一整面，此时，有机功能层在第一阻隔墙4012具有凹口4012A的侧面断开。例如，第一电极层418为阳极层，第二电极层404为阴极层，阴极层也在第一阻隔墙4012具有凹口4012A的侧面断开。例如，第一阻隔墙4012的顶部上也形成有部分有机功能层和第二电极层404，但是这些部分与其他部分相分离。
类似地，薄膜晶体管包括栅极411、源漏极412等结构，电容包括第一极413、第二极414以及第一极413和第二极414之间的第一绝缘层415。例如，栅极411或者源漏极412可以实现为具有第二金属层结构的电极图案。例如，图8B中示出为源漏极412包括第二金属层结构，且第一阻隔墙4012的第一金属层结构和源漏极412的第二金属层结构同层形成且具有相同的多层结构，从而在显示基板400的制备过程中，第一阻隔墙4012的第一金属 层结构和源漏极412的第二金属层结构可以采用相同的膜层形成。例如，在一些示例中，第一金属层结构和第二金属层结构均具有双层结构或者三层结构等多层结构。
如图8B所示，显示基板400还包括衬底基板402，衬底基板402具有位于开孔区4011的开孔4021。
例如，显示基板400还包括图像传感器和/或红外传感器，图像传感器和/或红外传感器结合于衬底基板402，例如结合在衬底基板402的远离发感光器件的一侧，并且在衬底基板402上的正投影与开孔区4011至少部分重叠，例如图像传感器和/或红外传感器设置在图中标号410指示的位置。由此，图像传感器和/或红外传感器可以通过开孔区4011实现图像采集、人脸识别、红外感应等功能。
类似地，本实施例的一些示例中，显示基板400还可以包括覆盖电容的第二绝缘层416、平坦化驱动电路的平坦层417、限定像素阵列的像素界定层419、形成封装空间的柱状隔垫物408、用于密封的封装层405以及进一步提高封装效果的第二封装层406以及第三封装层407等结构，本公开的实施例对此不再赘述。在该实施例的示例中，由于薄膜晶体管的源漏极412之一与第一电极层418连接，从而该薄膜晶体管可以为驱动晶体管，即根据所施加的数据信号的控制流过发光器件的发光电流的大小，从而控制像素单元在显示过程中的灰阶。例如，封装层405、第二封装层406以及第三封装层407的设置可以参见上述实施例，在此不再赘述。
例如，在该实施例的其他示例中，显示基板400也可以形成不止一层阻隔墙，即可以包括多层阻隔墙，参照图5A和图11，该多层阻隔墙可以对显示区401形成多重保护。
本公开至少一实施例提供一种显示基板的制备方法，包括：形成显示区和开孔区，并在显示区和开孔区之间形成第一阻隔墙。形成的显示区围绕开孔区。第一阻隔墙围绕开孔区，且包括第一金属层结构，第一金属层结构的围绕开孔区的至少一个侧面形成有凹口。
例如，在一个示例中，形成显示区包括：在形成第一金属层结构的同时形成电极图案，电极图案包括第二金属层结构，第一金属层结构和第二金属层结构采用相同的膜层形成。例如，第一金属层结构和第二金属层结构为双层、三层等多层电极结构。
例如，当第一金属层结构和第二金属层结构形成为双层电极结构时，形成第一阻隔墙的同时形成电极图案包括：在衬底基板的第一侧形成第一金属材料层，在第一金属材料层的远离衬底基板的一侧形成第二金属材料层；对第一金属材料层和第二金属材料层进行第一刻蚀，以形成电极图案以及初始阻隔墙；然后对初始阻隔墙进行第二刻蚀，以形成第一阻隔墙，其中，第二刻蚀采用湿刻蚀，并且使用的刻蚀液对第一金属材料层的刻蚀速度大于对第二金属材料层的刻蚀速度，由此形成凹口。
例如，当第一金属层结构和第二金属层结构形成为三层电极结构时，形成第一阻隔墙的同时形成电极图案包括：在衬底基板的第一侧依次形成第三金属材料层、第一金属材料层以及第二金属材料层；对第三金属材料层、第一金属材料层以及第二金属材料层进行第一刻蚀，以形成电极图案以及初始阻隔墙；对初始阻隔墙进行第二刻蚀，以形成第一阻隔墙，其中，第二刻蚀采用湿刻蚀，并且使用的刻蚀液对第一金属材料层的刻蚀速度大于对第二金属材料层的刻蚀速度以及对第三金属材料层的刻蚀速度，由此形成凹口。
例如，形成显示区还包括：形成用于位于显示区的发光器件的第一电极层、第二电极层以及第一电极层和第二电极层之间的有机功能层，其中，第二刻蚀采用的刻蚀液与刻蚀形成第一电极层所采用的刻蚀液相同。由此，第一阻隔墙在形成电极图案和第一电极层的同时即可形成，因此不会增加原有的工艺步骤。
例如，在另外一些实施例中，可以采用一次湿刻蚀工艺形成第一金属层结构和第二金属层结构。例如，形成第一阻隔墙的同时形成电极图案包括：在衬底基板的第一侧形成第一金属材料层；在第一金属材料层的远离衬底基板的一侧形成第二金属材料层；对第一金属材料层和第二金属材料层进行一次湿刻蚀，该湿刻蚀使用的刻蚀液对第一金属材料层的刻蚀速度大于对第二金属材料层的刻蚀速度，由此通过一次湿刻蚀形成凹口。该方法同样适用于形成具有三层结构的第一金属层结构和第二金属层结构，在此不再赘述。
下面，以形成图2A和图2B示出的显示基板200为例，对本公开一些实施例提供的制备方法进行详细介绍。
如图12A所示，首先形成显示区201和开孔区2011。开孔区2011通过在位置20111处开孔而形成。
如图13A-图13C所示，形成显示区201包括形成用于像素阵列的发光 器件以及驱动发光器件的驱动电路等结构。例如，在显示区201和开孔区2011之间形成的第一阻隔墙2012与显示区201中的多个功能层同层形成。本公开的实施例对于像素阵列的发光器件以及驱动发光器件的驱动电路等的具体结构不作限制。
如图12A所示，首先在衬底基板202上形成驱动电路层，包括形成薄膜晶体管和存储电容等结构。例如，采用构图工艺依次在衬底基板202上形成薄膜晶体管和存储电容等结构的各膜层。例如，一次构图工艺包括光刻胶的形成、曝光、显影以及刻蚀等工艺。
例如，薄膜晶体管的栅极211与存储电容的第一极213利用同一膜层、采用同一次构图工艺形成，以简化制备工艺。例如，栅极211与存储电容的第一极213包括铝、钛、钴等金属或者合金材料。在制备时，首先采用溅射或者蒸镀等方式形成一层栅极材料层，然后对栅极材料层进行构图工艺，以形成图案化的栅极211与存储电容的第一极213。
例如，薄膜晶体管的源漏极212可以形成为多层电极结构，例如采用溅射或者蒸镀等方式依次形成钛材料层、铝材料层以及钛材料层，然后采用同一次构图工艺对三个材料层进行构图，从而形成构成源漏极212的钛2121/铝2122/钛2123三层电极结构，同时形成初始第一阻隔墙20120，初始第一阻隔墙20120围绕开孔区2011将要形成的位置20111。例如，上述构图工艺中所采用的刻蚀方法为干刻蚀，从而形成的源漏极212以及初始第一阻隔墙20120的侧面具有平齐的结构。
如图13B所示，在薄膜晶体管以及存储电容的各膜层形成完成后，形成平坦层217、第一电极层218和像素界定层219，并且在像素界定层219的开口中形成有机功能层，包括有机发光材料层220以及辅助发光层203等。
例如，平坦层217可以采用树脂材料等有机材料或者氮化硅、氧化硅等无机材料通过构图工艺形成，且形成的平坦层217中具有过孔，以便之后形成的第一电极层218通过该过孔与源漏极212连接。
例如，在平坦层217上采用构图工艺形成第一电极层218。例如，第一电极层218为阳极层，第一电极层218的材料包括ITO、IZO等金属氧化物或者Ag、Al、Mo等金属或其合金。例如，第一电极层218通过构图工艺形成在平坦层217上，且第一电极层218通过平坦层217中的过孔与源漏极212连接。
例如，在构图第一电极层218的刻蚀工艺中，所采用的刻蚀液会同时刻蚀初始第一阻隔墙20120，并且该刻蚀液对构成第一阻隔墙20120的钛/铝/钛三层电极结构中的位于中间层的铝的刻蚀速率大于对位于上下两侧的钛的刻蚀速率，从而在初始第一阻隔墙20120的侧面形成凹口。
例如，在第一电极层218上通过构图工艺形成暴露第一电极层218的像素界定层219。例如，像素界定层219的材料包括树脂材料等有机材料或者氮化硅、氧化硅等无机材料，且形成的像素界定层219中具有开口，以便之后形成发光器件的有机功能层和第二电极层204。
例如，如图13B所示，可以通过喷墨打印或者蒸镀等方式在像素界定层219的开口中形成有机发光材料层220。然后，如图13C所示，在形成有有机发光材料层220的像素界定层219上形成柱状隔垫物208、辅助发光层203以及第二电极层204。
例如，柱状隔垫物208可以采用树脂材料等有机材料或者氮化硅、氧化硅等无机材料通过构图工艺形成，柱状隔垫物2026用于形成封装空间，以便于之后封装层的形成。
例如，辅助发光层203以及第二电极层204采用蒸镀、沉积或者喷墨打印等方式形成为一整面。有机发光材料层220包括可发红、绿、或蓝等颜色光的发光材料，辅助发光层203例如可以为电子注入层或者电子传输层等。第二电极层204例如为阴极层，第二电极层204的材料例如包括Mg、Ca、Li或Al等金属或其合金，或者IZO、ZTO等金属氧化物，又或者PEDOT/PSS(聚3，4-乙烯二氧噻吩/聚苯乙烯磺酸盐)等具有导电性能有机材料。此时，形成为一整面的有机功能层以及第二电极层204在第一阻隔墙2012具有凹口的侧面断开，图中第一阻隔墙2012的两侧均具有凹口，因此有机功能层以及第二电极层204被第一阻隔墙2012完全隔断。
由此，当有机功能层以及第二电极层204在第一阻隔墙2012的靠近开孔区2011的部分被污染时，由于第一阻隔墙2012的阻隔作用，水、氧等杂质不会扩散、延伸至有机功能层以及第二电极层204的用于发光的部分。例如，第一阻隔墙2012上也形成有机功能层以及第二电极层204。
例如，可以采用化学气相沉积、物理气相沉积、涂覆等方式在第二电极层204上形成封装层205。封装层205可以对位于显示区的功能结构提供封装与保护。例如，在封装层205上还可以形成第二封装层206和第三封装层 207。第二封装层206可以对封装层205进行平坦化，第三封装层207可以形成外层封装。例如，封装层205以及第三封装层207采用无机材料，该无机材料例如包括氮化硅、氧化硅、氮氧化硅等，第二封装层206采用有机材料，该有机材料例如包括聚酰亚胺(PI)、环氧树脂等。由此，封装层205、第二封装层206和第三封装层207形成为复合封装层，该复合封装层对显示区的功能结构形成多重保护，具有更好的封装效果。
本公开的一些实施例中，根据需要，显示区201中还可以形成其他必要的功能膜层，这些膜层可采用常规方法形成，在此不再赘述。
例如，在显示区形成完成后，如图12B所示，在位置20111内形成开孔区2011。例如，采用激光切割或者机械冲压的方式对位置20111进行开孔以形成开孔区2011。
例如，开孔区2011贯穿衬底基板202，因此衬底基板202上也形成有开孔。该开孔位置可以安装图像传感器、红外传感器等结构，并与例如中央处理器等信号连接。例如，该图像传感器或者红外传感器等结构可以设置在衬底基板202的远离发光结构的一侧(即显示基板的非显示侧)，并可通过开孔区2011实现拍照、面部识别、红外感应等多种功能。
需要注意的是，在本公开的实施例中，所示出的薄膜晶体管为顶栅型，但是本公开的实施例对此不作限定，例如该薄膜晶体管也可以为底栅型。例如，驱动电路可以包括多个薄膜晶体管，这些薄膜晶体管可以为顶栅型或底栅型，可以为N型或P型，本公开的实施例对此不作限定。
在本公开的一些实施例中，发光器件为有机发光二极管或量子点发光二极管，例如该有机发光二极管可以为顶栅发射型、底发射型或双面发射型，并且有机发光二极管的有机功能层可以为复合层，该复合层包括有机发光材料层以及电子注入层、电子传输层、空穴传输层、空穴注入层等其他辅助发光层。本公开的实施例对于有机发光二极管的具体结构、类型不作限定。
例如，本公开的一些实施例的制备方法还可以形成如图5A和5B所示的显示基板，与上述是示例不同的是，在形成如图5A和5B所示的显示基板时，显示基板的显示区和开孔区之间还形成第二阻隔墙，该第二阻隔墙围绕开孔区，并且形成在第一阻隔墙的远离开孔区的一侧，此时，第二阻隔墙可以与第一阻隔墙采用相同的膜层形成，从而在不增加工艺步骤的基础上，形成的多层阻隔墙可以起到更好的阻隔作用。
例如，本公开的一些实施例的制备方法还可以形成如图8A和8B所示的显示基板，与上述是示例不同的是，在形成如图8A和8B所示的显示基板时，形成第一阻隔墙还包括刻蚀位于第一阻隔墙的第一金属层结构下方的绝缘层，该刻蚀过程可以在形成第一金属层结构之前进行，也可以在形成第一金属层结构之后进行，并且该刻蚀过程也可以与刻蚀其他绝缘层(例如刻蚀形成源漏极412所在的过孔)同时进行，从而在不增加工艺步骤的基础上，可以获得具有更好阻隔效果的第一阻隔墙。
本公开至少一实施例还提供了一种显示装置，如图14所示，显示装置500包括本公开实施例提供的任一显示基板，图中示出为显示基板200。该显示装置500可以为手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件，本公开的实施例对此不做限定。
还有以下几点需要说明：
(1)本公开实施例附图只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)为了清晰起见，在用于描述本公开的实施例的附图中，层或区域的厚度被放大或缩小，即这些附图并非按照实际的比例绘制。可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”或者可以存在中间元件。
(3)在不冲突的情况下，本公开的实施例及实施例中的特征可以相互组合以得到新的实施例。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以权利要求的保护范围为准。

Claims (26)

  1. 一种显示基板，包括显示区和开孔区，所述显示区围绕所述开孔区，其中，所述显示区和所述开孔区之间包括第一阻隔墙，所述第一阻隔墙围绕所述开孔区；
    所述第一阻隔墙包括第一金属层结构，所述第一金属层结构的围绕所述开孔区的至少一个侧面具有凹口。
  2. 根据权利要求1所述的显示基板，其中，所述显示区包括电极图案，
    所述电极图案包括第二金属层结构，所述第一金属层结构和所述第二金属层结构具有相同的结构，并且包括相同的材料。
  3. 根据权利要求1所述的显示基板，还包括衬底基板，
    所述第一金属层结构包括：
    第一金属子层，在所述衬底基板的第一侧，
    第二金属子层，在所述第一金属子层的远离所述衬底基板的一侧，
    其中，所述第一金属子层在所述衬底基板上的正投影位于所述第二金属子层在所述衬底基板上的正投影内，由此形成所述凹口。
  4. 根据权利要求3所述的显示基板，其中，所述第一金属层结构还包括第三金属子层，所述第三金属子层位于所述衬底基板的所述第一侧，
    其中，所述第一金属子层在所述第三金属子层的远离所述衬底基板的一侧，所述第一金属子层在所述衬底基板上的正投影位于所述第三金属子层在所述衬底基板上的正投影内。
  5. 根据权利要求4所述的显示基板，其中，所述第二金属子层在所述衬底基板上的正投影位于所述第三金属子层在所述衬底基板上的正投影内。
  6. 根据权利要求4所述的显示基板，其中，所述第一金属子层的厚度大于所述第二金属子层的厚度以及所述第三金属子层的厚度。
  7. 根据权利要求6所述的显示基板，其中，所述第一金属子层的厚度为150nm-900nm，所述第二金属子层的厚度为30nm-300nm，所述第三金属子层的厚度为30nm-300nm。
  8. 根据权利要求3-7所述的显示基板，其中，所述凹口的开口方向平行于所述衬底基板。
  9. 根据权利要求1所述的显示基板，其中，所述显示区和所述开孔区 之间还包括第二阻隔墙，
    所述第二阻隔墙围绕所述开孔区，具有与所述第一阻隔墙相同的结构，并设置在所述第一阻隔墙的远离所述开孔区的一侧。
  10. 根据权利要求1所述的显示基板，其中，所述显示区还包括用于形成发光器件的第一电极层、第二电极层以及第一电极层和第二电极层之间的有机功能层，所述有机功能层在所述第一阻隔墙具有所述凹口的侧面断开。
  11. 根据权利要求10所述的显示基板，其中，所述第二电极层为阴极层，所述阴极层在所述第一阻隔墙具有所述凹口的侧面断开。
  12. 根据权利要求3所述的显示基板，还包括图像传感器和/或红外传感器，
    其中，所述图像传感器和/或红外传感器结合于所述衬底基板，并且在所述衬底基板上的正投影与所述开孔区至少部分重叠。
  13. 根据权利要求3所述的显示基板，其中，在用于刻蚀形成所述第一金属层结构的刻蚀液的作用下，所述第一金属子层的材料被刻蚀的速度大于所述第二金属子层的材料被刻蚀的速度。
  14. 根据权利要求13所述的显示基板，其中，所述第一金属子层的材料包括铝或铜；
    所述第二金属子层的材料包括钛或钼。
  15. 根据权利要求3-8任一所述的显示基板，其中，所述第一阻隔墙还包括绝缘层结构，所述绝缘层结构位于所述衬底基板的所述第一侧，所述第一金属层结构在所述绝缘层结构的远离所述衬底基板的一侧。
  16. 根据权利要求15所述的显示基板，其中，所述绝缘层结构包括多个子绝缘层。
  17. 一种显示基板的制备方法，包括：
    形成显示区和开孔区，所述显示区围绕所述开孔区，
    在所述显示区和所述开孔区之间形成第一阻隔墙，其中，所述第一阻隔墙围绕所述开孔区，且包括第一金属层结构，所述第一金属层结构的围绕所述开孔区的至少一个侧面形成有凹口。
  18. 根据权利要求17所述的制备方法，其中，采用激光切割或者机械冲压的方式形成所述开孔区。
  19. 根据权利要求17所述的制备方法，其中，形成所述显示区包括： 在形成第一金属层结构的同时形成电极图案，
    其中，所述电极图案包括第二金属层结构，所述第一金属层结构和所述第二金属层结构采用相同的膜层形成。
  20. 根据权利要求19所述的制备方法，其中，形成所述第一阻隔墙包括：
    在衬底基板的第一侧形成第一金属材料层，在所述第一金属材料层的远离所述衬底基板的一侧形成第二金属材料层；
    对所述第一金属材料层和所述第二金属材料层进行第一刻蚀，以形成所述电极图案以及初始阻隔墙；
    对所述初始阻隔墙进行第二刻蚀，以形成所述第一阻隔墙，其中，所述第二刻蚀采用湿刻蚀，并且使用的刻蚀液对所述第一金属材料层的刻蚀速度大于对所述第二金属材料层的刻蚀速度，由此形成所述凹口。
  21. 根据权利要求19所述的制备方法，其中，形成所述第一阻隔墙包括：
    在衬底基板的第一侧依次形成第三金属材料层、第一金属材料层以及第二金属材料层；
    对所述第三金属材料层、第一金属材料层以及第二金属材料层进行第一刻蚀，以形成所述电极图案以及初始阻隔墙；
    对所述初始阻隔墙进行第二刻蚀，以形成所述第一阻隔墙，其中，所述第二刻蚀采用湿刻蚀，并且使用的刻蚀液对所述第一金属材料层的刻蚀速度大于对所述第二金属材料层的刻蚀速度以及对所述第三金属材料层的刻蚀速度，由此形成所述凹口。
  22. 根据权利要求20或21所述的制备方法，其中，所述第一刻蚀为干刻蚀。
  23. 根据权利要求20或21所述的制备方法，其中，形成所述显示区还包括形成用于发光器件的第一电极层、第二电极层以及第一电极层和第二电极层之间的有机功能层，
    其中，所述第二刻蚀采用的刻蚀液与刻蚀形成所述第一电极层所采用的刻蚀液相同，所述有机功能层在所述第一阻隔墙具有所述凹口的侧面断开。
  24. 根据权利要求19所述的制备方法，其中，形成所述第一阻隔墙包括：
    在衬底基板的第一侧形成第一金属材料层；
    在所述第一金属材料层的远离所述衬底基板的一侧形成第二金属材料层；
    对所述第一金属材料层和所述第二金属材料层进行一次湿刻蚀，所述湿刻蚀使用的刻蚀液对所述第一金属材料层的刻蚀速度大于对所述第二金属材料层的刻蚀速度。
  25. 根据权利要求17所述的制备方法，其中，在所述显示区和所述开孔区之间还形成第二阻隔墙，其中，所述第二阻隔墙围绕所述开孔区，并且形成在所述第一阻隔墙的远离所述开孔区的一侧，所述第二阻隔墙与所述第一阻隔墙采用相同的膜层形成。
  26. 一种显示装置，包括权利要求1-16任一所述的显示基板。
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