WO2017104500A1 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

Info

Publication number
WO2017104500A1
WO2017104500A1 PCT/JP2016/086340 JP2016086340W WO2017104500A1 WO 2017104500 A1 WO2017104500 A1 WO 2017104500A1 JP 2016086340 W JP2016086340 W JP 2016086340W WO 2017104500 A1 WO2017104500 A1 WO 2017104500A1
Authority
WO
WIPO (PCT)
Prior art keywords
electrode
plate
frame
semiconductor element
shaped member
Prior art date
Application number
PCT/JP2016/086340
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
藤野　純司
裕一郎 鈴木
翔平 小川
井本　裕児
大輔 村田
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to CN201680071859.9A priority Critical patent/CN108369933B/zh
Priority to JP2017555999A priority patent/JP6444537B2/ja
Priority to DE112016005807.1T priority patent/DE112016005807B4/de
Publication of WO2017104500A1 publication Critical patent/WO2017104500A1/ja

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867—Applying pastes or inks, e.g. screen printing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/2912—Antimony [Sb] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29139—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/331—Disposition
    • H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/33181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4823—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a pin of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73215—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/83424—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83447—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/85424—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85447—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92147—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385—Assembly of a plurality of insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other

Definitions

  • the present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device as a power module including a power semiconductor element and a manufacturing method thereof.
  • Power semiconductor devices that is, power modules
  • power modules mounted on home appliances are required to have high productivity and high reliability that can be used in various types as well as being reduced in size and weight.
  • the power module is also required to have a package form that can be applied to a SiC semiconductor that is likely to become the mainstream in the future because of its high operating temperature and excellent conversion efficiency.
  • the power module is characterized by being a semiconductor that handles a large current at a high voltage, and in order to form a large current circuit, a plurality of wires, such as a thick aluminum wire with a diameter of 0.5 mm, are formed on the surface electrode of the power semiconductor element. Generally, an electric circuit is formed by wiring. On the other hand, for the purpose of increasing the current capacity, a system in which a plate-like electrode is disposed on a power semiconductor element and directly joined to a surface electrode by solder or the like is becoming widespread.
  • solder is supplied between the plate electrode mainly composed of copper or the like and the surface electrode of the power semiconductor element to form a bonding portion.
  • a method for forming the joint portion a method of preliminarily sandwiching a plate-like solder between both electrodes or pouring molten solder can be considered.
  • An object of the present invention is to provide a semiconductor device capable of reducing the occurrence of the above-described problems and improving productivity and quality as compared with the conventional one and a manufacturing method thereof.
  • a semiconductor device includes a plate-like electrode and a semiconductor element, and a semiconductor device having a bonding portion in which the surface electrode of the semiconductor element and the plate-like electrode are bonded with a bonding material.
  • the electrode has a frame-like member that surrounds the bonding portion and has heat resistance against the bonding material on an opposing surface facing the semiconductor element.
  • the semiconductor device of one embodiment of the present invention by providing the plate-shaped electrode with the frame-shaped member, it is possible to restrict the bonding material forming the bonding portion from spreading more than necessary in the plate-shaped electrode. Therefore, the joining portion can be formed reliably and the occurrence of open defects can be prevented. In addition, it is possible to prevent insulation failure even when the amount of the bonding material is excessive.
  • FIG. 2B is a diagram showing a state where the surface electrode and the plate-like electrode of the power semiconductor element shown in FIG. 1B are soldered together, and a cross-sectional view taken along a line AA shown in FIG. 2A. It is a figure which shows the state which carried out resin sealing about the power module shown to FIG. 1C. It is a conceptual diagram which shows the modification of the power module shown to FIG.
  • FIG. 1A to FIG. 1D It is a figure similar to FIG. 1C, and is a cross-sectional view for explaining a bonding state when the surface electrode of the power semiconductor element and the frame-like member are not in close contact.
  • FIG. 1G It is a perspective view which shows the auxiliary
  • FIG. 1G It is a perspective view which shows the frame-shaped member of the plate-shaped electrode in the power module shown to FIG. 1C.
  • FIG. 1B is a figure which abbreviate
  • FIG. 6 is a conceptual diagram of a power module according to a third embodiment.
  • a power module that is, a power semiconductor device is taken as an example of the semiconductor device, but the present disclosure is not limited to the power semiconductor device. That is, the present disclosure can be applied to a semiconductor device having a configuration in which a plate-like electrode is arranged opposite to a surface electrode in a semiconductor element and the two electrodes are joined by a joining material.
  • FIG. 1A to 1H are conceptual diagrams showing a schematic configuration of a power module 100 according to the first embodiment.
  • the schematic configuration of the power module 100 will be described.
  • the power module 100 includes a plate-shaped electrode 61 and a power semiconductor element (such as the following IGBT 22) corresponding to an example of a semiconductor element, and a surface electrode and a plate in the power semiconductor element.
  • the electrode 61 has a joined portion joined by a joining material. Further, the plate electrode 61 has a frame-shaped member 52.
  • the power module 100 will be described in detail below.
  • an IGBT (Insulated Gate Bipolar Transistor) 22 having a size of 15 mm ⁇ 15 mm ⁇ thickness of 0.25 mm as an example, and a size of 13 mm ⁇ 15 mm ⁇ thickness of 0.25 mm as an example.
  • the diode 21 corresponds.
  • the IGBT 22 has a surface main electrode 221, and the diode 21 has a surface main electrode 211.
  • the surface main electrode is included in the surface electrode and corresponds to the main electrode among the surface electrodes.
  • the ceramic substrate 10 corresponding to an example of an insulating substrate on which the diode 21 and the IGBT 22 are mounted has a size of 25 mm ⁇ 50 mm as an example, and the front conductor layer 13 and the back conductor layer 12 are provided on the ceramic base 11. It is constructed by stacking.
  • the ceramic base material 11 is, for example, alumina and has a size of 25 mm ⁇ 50 mm ⁇ thickness of 0.635 mm, for example.
  • Both the front conductor layer 13 and the back conductor layer 12 are made of copper, for example, 21 mm ⁇ 46 mm ⁇ thickness.
  • the size is 0.4 mm. As shown in FIG.
  • the backside electrodes of the diode 21 and the IGBT 22 are die-bonded to the surface conductor layer 13 of the ceramic substrate 10 using a solder (melting point 219 ° C.) 31 corresponding to an example of a bonding material.
  • solder 31 for example, Sn—Ag—Cu solder is used.
  • the ceramic substrate 10 on which the diode 21 and the IGBT 22 are mounted is attached to a case 51 corresponding to the casing of the power module 100 by using an adhesive 8 (made of silicone resin) around the ceramic substrate 10.
  • the case 51 is made of PPS (Poly Phenylene Sulfide Resin) resin, and in the case 51, a plate electrode 61 and a signal electrode 62, which will be described in detail below, are insert-molded and held.
  • the plate electrode 61 and the signal electrode 62 are both made of copper, and the plate electrode 61 has a size of 12 mm width ⁇ 0.7 mm thickness as an example, and the signal electrode 62 is 2 mm width ⁇ 0.4 mm thickness as an example. Is the size of A screw terminal 611 is formed at one end of the plate electrode 61 and is fastened using a nut embedded in the side wall of the case 51. Furthermore, the plate electrode 61 has two through portions 612 that penetrate the plate electrode 61. The through portion 612 is a hole through which molten solder can pass in this embodiment when the surface main electrodes 221 and 211 of the IGBT 22 and the diode 21 and the plate electrode 61 are joined.
  • the electrodes 221 (size: 12 mm ⁇ 12 mm) and the surface main electrode 211 (size: 12 mm ⁇ 12 mm) of the diode 21 are positioned so as to correspond to the respective centers.
  • the penetrating portion 612 has a diameter of 2.5 mm as an example. Note that the size of the through portion 612 can be determined according to the size of the surface main electrode in the power semiconductor element such as the IGBT 22.
  • the plate electrode 61 further has a frame-like member 52 on the facing surface 614 facing the power semiconductor element such as the IGBT 22, and the back surface 615 on the opposite side to the facing surface 614 is auxiliary to the back surface 615.
  • a frame-shaped member 53 is provided.
  • the frame-shaped member 52 and the auxiliary frame-shaped member 53 are connected to the sandwiching case 51 by sandwiching the plate-like electrode 61 from the thickness direction, as shown in FIGS. 2A and 2B (may be collectively referred to as FIG. 2). It has a connecting part 530.
  • the frame-shaped member 52 and the auxiliary frame-shaped member 53 are made of the same material as the case 51 via the connecting portion 530, and the case 51 is formed in the same process as the process of molding the case 51 and forming the plate electrode 61 by insert molding. And is integrally formed.
  • the shapes of the frame-shaped member 52 and the auxiliary frame-shaped member 53 will be described in detail below.
  • the frame-shaped member 52 and the auxiliary frame-shaped member 53 together with the case 51 in this way, an increase in the number of parts can be suppressed, and the plate-shaped electrode 61 can be more firmly held in the case 51.
  • the positional accuracy of the plate electrode 61 can be improved, and variations in the distance between the plate electrode 61 and the power semiconductor element can be suppressed.
  • the ceramic substrate 10 on which the diode 21 and the IGBT 22 are mounted is bonded as described above to the case 51 in which the plate-like electrode 61 is insert-molded while forming the frame-shaped member 52 and the auxiliary frame-shaped member 53 as described above. .
  • the solder 32 melted through the through-holes 612 in the plate electrode 61 between the plate electrode 61 and the surface main electrode 221 of the IGBT 22 and the surface main electrode 211 of the diode 21. inject.
  • the solder 32 is, for example, Sn—Ag—Cu and has a melting point of 219 ° C.
  • the plate-like electrode 61, the main surface electrode 221 of the IGBT 22, and the main surface electrode 211 of the diode 21 are joined by the solder 32.
  • an aluminum wire 4 having a diameter of 0.2 mm is used for wire bonding connection between the signal terminal 222 and the signal electrode 62 of the IGBT 22.
  • a sealing gel 7 made of silicone resin is injected into the case 51 to perform insulation sealing.
  • the frame-like member 52 included in the plate-like electrode 61 includes the first opening 521 on the surface of the IGBT 22 and the diode 21 in contact with the surface main electrodes 221, 211, and the plate-like electrode 61. 2nd opening part 522 in the surface which touches.
  • both the first opening 521 and the second opening 522 are openings in which the through portion 612 in the plate-like electrode 61 is located at the center portion thereof.
  • the first opening 521 has a size of 11 mm ⁇ 11 mm as an example, for example, a substantially square shape having four corners of an arc shape with a radius of 3 mm
  • the second opening 522 has a size of 8 mm ⁇ 8 mm as an example.
  • the frame-shaped member 52 has a mortar-shaped portion 523.
  • the depth in this mortar shape part 523 is 0.5 mm as an example.
  • the solder 32 is injected to form a solder joint portion 32A (FIGS. 1C to 1F).
  • the frame-shaped member 52 is a member surrounding the joint portion 32 ⁇ / b> A made of the solder 32, and is a member having heat resistance to the solder 32.
  • the solder 32 that has passed through the through-hole 612 of the plate-like electrode 61 is injected into the mortar-shaped portion 523 formed by the frame-like member 52, and at the mortar-shaped portion 523. Movement is restricted. Therefore, when joining the surface main electrodes 221 and 211 of the IGBT 22 and the diode 21 and the plate-like electrode 61, it is possible to prevent the molten solder from getting wet only to the plate-like electrode 61 and causing an open defect. Can do. Further, even when the amount of the bonding material such as the solder 32 is excessive, it is possible to prevent the insulation failure. As a result, the occurrence of problems in the power module 100 can be reduced, and the productivity and quality of the power module can be improved as compared with the conventional case.
  • the first opening 521 has a size of 11 mm ⁇ 11 mm having arc shapes at the four corners as described above, and the size of the surface main electrodes 221 and 211 in the IGBT 22 and the diode 21 is the same as that in the present embodiment.
  • both are 12 mm ⁇ 12 mm
  • the size of the first opening 521 in contact with the surface main electrode is smaller than the size of the surface main electrodes 221, 211. Therefore, when the surface main electrodes 221 and 211 of the IGBT 22 and the diode 21 and the plate electrode 61 are joined, if the frame-like member 52 is in close contact with the surface main electrodes 221 and 211, the surface main electrodes 221 and 211 are melted.
  • the solder cannot spread to the ends of the surface main electrodes 221 and 211. Therefore, it is possible to prevent the joining stress concentrated on the end portion of the joint portion 32A of the solder 32 from overlapping the end portions of the surface main electrodes 221 and 211 that are liable to be peeled off. It becomes easy to ensure the reliability of the. Furthermore, the joint portion 32A of the solder 32 can be reliably formed, and the occurrence of open defects can be prevented. As a result, the occurrence of problems in the power module 100 can be reduced, and the productivity and quality of the power module can be improved as compared with the conventional case.
  • a thin solder layer 321 is formed. Exists around the surface main electrode. This part can be used as an electrical path for effectively utilizing the transistor circuit arranged on the surface of the semiconductor element, and it is extremely thin to prevent the junction stress from propagating to the end of the surface main electrode. Can do.
  • the joint stress can be dispersed because the solder joint has a fillet shape in which the bottom is widened. Therefore, the solder joint 32A can obtain higher joint reliability as compared with the joint having a sharp periphery.
  • the four corners of the mortar-shaped portion 523 are rounded, the four corners of the formed solder joint portion 32A are also rounded. Therefore, in the solder joint portion 32A, the concentration of joint stress is suppressed, and the occurrence of cracks can be delayed.
  • the dimension of the first opening 521 of the frame-like member 52 relative to the dimension of the surface main electrode of the semiconductor element is the surface main electrode on one side thereof in consideration of the positional deviation of the component or the dimensional tolerance of the member at the time of manufacture. If it is smaller than 5% of the long side, it is considered that the effect of suppressing the above-mentioned joint stress concentration is exhibited. On the other hand, if the size of the first opening 521 is too small, the transistor utilization efficiency of the surface main electrode is lowered. Therefore, it is desirable that the length of the long side of the surface main electrode is at most 40%.
  • the transistor utilization efficiency refers to a ratio of transistors actually driven by a current flowing among transistors formed on the surface of the semiconductor element.
  • the auxiliary frame member 53 provided on the back surface 615 of the plate electrode 61 includes the third opening 531 on the surface in contact with the plate electrode 61 and the surface of the auxiliary frame member 53 as shown in FIGS. 1B and 2A. And a fourth opening 532. Both the third opening portion 531 and the fourth opening portion 532 are located concentrically with the penetrating portion 612 in the plate electrode 61.
  • the third opening 531 has a diameter of 2.2 mm as an example
  • the fourth opening 532 has a diameter of 5.0 mm as an example. Therefore, the auxiliary frame member 53 has a truncated cone-shaped portion 533. Have As an example, the depth of the truncated cone-shaped portion 533 is 0.5 mm.
  • the penetration part 612 in the plate electrode 61 has a diameter of 2.5 mm as described above. Therefore, the size of the third opening 531 is smaller than the size of the through portion 612.
  • the solder 32 injected into the mortar-shaped portion 523 in the frame-like member 52 enters the back surface 615 side of the plate-like electrode 61. It is possible to prevent the solder 32 from coming up, and to prevent the solder 32 from getting wet to the back surface 615. Therefore, the protrusion at the time of supplying the solder 32 can be suppressed.
  • the portion having the third opening portion 531 and the fourth opening portion 532 in the auxiliary frame-shaped member 53 is the truncated cone-shaped portion 533 as described above. Therefore, for example, when a cylindrical “thread solder” having a required length is introduced from the fourth opening 532 side, the truncated cone-shaped part 533 can fulfill the function of guiding the thread solder.
  • the conical trapezoidal portion 533 can also function as a guide when forming the joining portion 32A by pouring molten solder.
  • the ceramic substrate 10 an alumina ceramic substrate is used in the present embodiment, but a ceramic substrate such as aluminum nitride or silicon nitride may be used, and the same effect as described above can be obtained.
  • a ceramic substrate such as aluminum nitride or silicon nitride may be used, and the same effect as described above can be obtained.
  • copper was used as the surface conductor layer 13 and the back conductor layer 12, an aluminum conductor layer may be used, and the same effects as described above can be obtained.
  • a copper electrode is used in the present embodiment, but an aluminum or CIC (copper invar clad material) electrode may be used, and the same effect as described above is obtained. It is done.
  • one end of the plate electrode 61 is used as the screw terminal 611 as an external electrode, this is an example, and the nut may be removed to form a welding terminal, and the same effect as described above can be obtained.
  • a hole is formed in the plate electrode 61 as the penetrating portion 612, a plurality of penetrating portions may be formed for a slit or one power semiconductor element, and the same effect as described above can be obtained.
  • the Sn—Ag—Cu solder 31 is used for die bonding between the power semiconductor element such as the IGBT 22 and the ceramic substrate 10, but other solder materials such as Sn—Cu series or Sn—Sb series are used. It may be used. Furthermore, for example, a conductive adhesive in which an Ag filler is dispersed in an epoxy resin, or a low-temperature fired bonding material using, for example, Ag nanoparticles may be used as the bonding material, and the same effect as described above can be obtained.
  • PPS is used as the material of the case 51.
  • LCP liquid-crystal polymer
  • a silicone resin is used as the sealing gel 7.
  • an epoxy direct potting material may be used, and the same effect as described above can be obtained.
  • a lead 621 with a signal electrode 62 extended may be used for solder bonding to the signal terminal 222 of the IGBT 22 in place of the wire bonding by the aluminum wire 4, as described above. The same effect can be obtained.
  • the frame-like member 52 and the auxiliary frame-like member 53 are formed at the time of insert mold formation using the same PPS as the case 51.
  • PPS the same PPS as the case 51.
  • other than heat resistance by 3D printer or dispenser application, etc. The same effect as described above can be obtained.
  • the frame-shaped member 52 and the auxiliary frame-shaped member 53 are formed integrally with the case 51 when the insert mold is formed using the same PPS as the case 51.
  • FIG. the frame-shaped member 52 and the auxiliary frame-shaped member 53 may be assembled as independent parts divided into separate parts. That is, a plurality of components 52A that form the frame-shaped member 52 and a plurality of components 53A that form the auxiliary frame-shaped member 53 are separately manufactured. Then, the independent parts of the part 52A and the part 53A are fixed to the plate-like electrode 61 or the case 51 by a method such as adhesion, thermocompression bonding, or fitting, and as shown in FIG. Auxiliary frame members 53 are formed respectively. By adopting such a method, there is an advantage that, for example, the frame-shaped member 52 and the auxiliary frame-shaped member 53 can be formed even when the case size is increased and insert molding is difficult.
  • FIG. The power module 102 according to the second embodiment will be described with reference to FIGS. 3A to 3D (also collectively referred to as FIG. 3).
  • the power module 102 in the second embodiment has basically the same configuration as the power module 100 in the first embodiment.
  • the main differences between the power module 102 and the power module 100 are that the plate-like electrode 61 further has a spacer 54, and that solder bonding is performed using a reflow furnace. Therefore, in the following, components that are different from each other will be mainly described, and descriptions of common components will be omitted.
  • FIGS. 3A to 3C the display in FIG. 1B and FIG.
  • FIG. 3A shows a state in which the case 51 holding the plate electrode 61 and the like is turned upside down.
  • the plate electrode 61 has a spacer 54.
  • the spacer 54 is disposed between the plate electrode 61 and the ceramic substrate 10, and defines a distance between the plate electrode 61 and the ceramic substrate 10.
  • the frame-shaped member 52 described in the first embodiment includes the spacer 54, and the spacer 54 is formed in the same process as the frame-shaped member 52.
  • the spacer 54 is formed at the position of the frame-shaped member 52 such that the main body portion of the spacer 54 does not contact the IGBT 22 and the diode 21 and the tip of the spacer 54 contacts the ceramic substrate 10.
  • the plate solder 320 is placed on the mortar-shaped portion 523 of the frame-shaped member 52.
  • the plate solder 320 has a diameter of 8 mm and a thickness of 0.5 mm, for example.
  • the IGBT 22 or the diode 21 can be accommodated between the two spacers 54, with the surface main electrodes 221, 211 facing the mortar-shaped portion 523 of the frame-shaped member 52,
  • the IGBT 22 and the diode 21 are disposed on each frame member 52.
  • a sheet solder 310 having the same dimensions and a thickness of 0.1 mm as the power semiconductor elements is mounted.
  • the surface conductor layer 13 in the ceramic substrate 10 is disposed facing the plate solder 310, and the ceramic substrate 10 is placed on the protrusion 511 formed on the case 51.
  • the periphery of the ceramic substrate 10 is fixed to the case 51 with an adhesive 8.
  • the surface conductor layer 13 of the ceramic substrate 10 and the IGBT 22 and the diode 21 are joined by the solder joint portion of the plate solder 310 as shown in FIG. 3C.
  • the surface main electrodes 221 and 211 of the IGBT 22 and the diode 21 and the plate-like electrode 61 are joined by a joint portion 32 ⁇ / b> A made of a plate solder 320.
  • the whole is turned over, and the wire terminal connection is made between the signal terminal 222 and the signal electrode 62 of the IGBT 22 using, for example, an aluminum wire 4 having a diameter of 0.2 mm. Further, for example, a sealing gel 7 made of silicone resin is injected into the case 51 for insulation sealing.
  • the power module 102 according to the second embodiment described above also includes the frame-shaped member 52 and the auxiliary frame-shaped member 53, the same effects as those achieved by the power module 100 according to the first embodiment can be obtained. it can.
  • the plate-like electrode 61 has the spacers 54. Therefore, the joint portion of the solder 31 between the ceramic substrate 10 and the power semiconductor element such as the IGBT 22, and the IGBT 22 or the like. The height of the solder joint portion 32A between the power semiconductor element and the plate-like electrode 61 can be defined. Therefore, the power module 102 according to the second embodiment can achieve an effect that the insulation failure due to the protrusion of solder, for example, solder, can be further suppressed by the spacer 54.
  • the modification described in the first embodiment can be applied to the power module 102 of the second embodiment.
  • the spacer 54 in the power module 102 can be formed by using a heat-resistant other resin by 3D printer or dispenser application.
  • the whole is reversed and wire bonding or the like is performed.
  • the power module 102 is put into the reflow furnace before being put into the reflow furnace. Can be reversed.
  • Embodiment 3 The power module 103 according to the third embodiment will be described with reference to FIG.
  • the power module 103 according to the third embodiment has basically the same configuration as the power modules 100 and 102 according to the first and second embodiments.
  • the main difference between the power module 103 and the power module 102 is that the molten solder is injected instead of soldering by a reflow furnace, and that the molding is performed by transfer molding without using the case 51. .
  • a plate electrode 66 having a shape different from that of the plate electrode 61 is used. Therefore, hereinafter, different components will be mainly described, and descriptions of common components will be omitted.
  • the plate-like electrode 66 corresponds to the plate-like electrode 61 having the spacer 54 described in the second embodiment, but is for transfer molding without using the case 51 as described above. Therefore, the plate-like electrode 66 is a linear shape in the present embodiment, and the frame-like member 52 and the auxiliary frame-like member 53 are molded so as to sandwich the plate-like electrode 66 therebetween.
  • Such a plate-like electrode 66 is made of copper as an example, and has a size of width 12 mm ⁇ thickness 0.7 mm.
  • the plate electrode 66 is mounted on the ceramic substrate 10 and fixed using a transfer mold.
  • the ceramic substrate 10 is die-bonded to the IGBT 22 as the power semiconductor element and the diode 21 with the solder 31.
  • each through portion 612 in the plate electrode 66 includes the surface main electrode 221 of the IGBT 22 and the diode. 21 is located approximately at the center of the surface main electrode 211.
  • the melted solder 32 is injected into the mortar-shaped portion 523 of the frame-shaped member 52 through the respective through portions 612 of the plate-like electrode 66.
  • the power semiconductor element such as the IGBT 22 and the plate electrode 66 are The height of the joint portion 32A of the solder 32 can be defined.
  • an epoxy resin sealing transfer mold resin 74 is used as a transfer mold molding die. Insulating sealing is performed by injecting into the inside.
  • the power module 103 according to the third embodiment described above also includes the frame-shaped member 52 and the auxiliary frame-shaped member 53, it is possible to obtain the same effects as the power module 100 according to the first embodiment. it can.
  • the plate-like electrode 66 has the spacer 54, it is possible to obtain the same effect as that produced by the power module 102 in the second embodiment.
  • the modification described in the first and second embodiments can be applied to the power module 103 of the third embodiment.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
PCT/JP2016/086340 2015-12-16 2016-12-07 半導体装置及びその製造方法 WO2017104500A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201680071859.9A CN108369933B (zh) 2015-12-16 2016-12-07 半导体装置及其制造方法
JP2017555999A JP6444537B2 (ja) 2015-12-16 2016-12-07 半導体装置及びその製造方法
DE112016005807.1T DE112016005807B4 (de) 2015-12-16 2016-12-07 Halbleitereinheit und Verfahren zur Herstellung derselben

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015-245191 2015-12-16
JP2015245191 2015-12-16

Publications (1)

Publication Number Publication Date
WO2017104500A1 true WO2017104500A1 (ja) 2017-06-22

Family

ID=59056443

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2016/086340 WO2017104500A1 (ja) 2015-12-16 2016-12-07 半導体装置及びその製造方法

Country Status (4)

Country Link
JP (1) JP6444537B2 (zh)
CN (1) CN108369933B (zh)
DE (1) DE112016005807B4 (zh)
WO (1) WO2017104500A1 (zh)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019009328A (ja) * 2017-06-27 2019-01-17 三菱電機株式会社 電力用半導体装置
WO2019171684A1 (ja) * 2018-03-07 2019-09-12 三菱電機株式会社 半導体装置及び電力変換装置
WO2019194272A1 (ja) * 2018-04-06 2019-10-10 三菱電機株式会社 半導体装置および電力変換装置ならびに半導体装置の製造方法
JP2020047912A (ja) * 2018-09-20 2020-03-26 ヘレウス ドイチェラント ゲーエムベーハー ウント カンパニー カーゲー 少なくとも１つの電子部材を接続するための基板アレイおよび基板アレイの製造方法
JP2021019139A (ja) * 2019-07-23 2021-02-15 三菱電機株式会社 電力用半導体装置及び電力変換装置

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112016005807B4 (de) 2015-12-16 2024-05-08 Mitsubishi Electric Corporation Halbleitereinheit und Verfahren zur Herstellung derselben

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003218306A (ja) * 2002-01-28 2003-07-31 Fuji Electric Co Ltd 半導体装置およびその製造方法
JP2004134445A (ja) * 2002-10-08 2004-04-30 Toyota Motor Corp 上部電極、パワーモジュール、および上部電極のはんだ付け方法
JP2004303869A (ja) * 2003-03-31 2004-10-28 Denso Corp 半導体装置およびその製造方法
JP2009170596A (ja) * 2008-01-15 2009-07-30 Nissan Motor Co Ltd 電力変換装置およびその製造方法
JP2012164880A (ja) * 2011-02-08 2012-08-30 Denso Corp 半導体装置及びその製造方法
JP2013211497A (ja) * 2012-03-30 2013-10-10 Keihin Corp 部品接合構造
WO2015016017A1 (ja) * 2013-07-31 2015-02-05 富士電機株式会社 半導体装置
JP2015103542A (ja) * 2013-11-21 2015-06-04 三菱電機株式会社 半導体装置の製造方法
WO2015107871A1 (ja) * 2014-01-15 2015-07-23 パナソニックＩｐマネジメント株式会社 半導体装置
US20150270207A1 (en) * 2014-03-18 2015-09-24 Samsung Electro-Mechanics Co., Ltd. Semiconductor module package and method of manufacturing the same
JP2016076670A (ja) * 2014-10-09 2016-05-12 三菱電機株式会社 電力用半導体装置
JP2016086069A (ja) * 2014-10-24 2016-05-19 三菱電機株式会社 半導体素子および半導体装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003100957A (ja) * 2001-09-26 2003-04-04 Nec Corp 半導体パッケージ
CN100587930C (zh) * 2005-05-17 2010-02-03 松下电器产业株式会社 倒装片安装体及倒装片安装方法
JP4640345B2 (ja) 2007-01-25 2011-03-02 三菱電機株式会社 電力用半導体装置
JP4579314B2 (ja) 2008-06-02 2010-11-10 本田技研工業株式会社 半導体モジュール
JP5414336B2 (ja) * 2009-04-16 2014-02-12 パナソニック株式会社 電子部品
JP5251991B2 (ja) * 2011-01-14 2013-07-31 トヨタ自動車株式会社 半導体モジュール
JP6228412B2 (ja) * 2013-09-18 2017-11-08 エスアイアイ・セミコンダクタ株式会社 半導体装置
DE112016005807B4 (de) 2015-12-16 2024-05-08 Mitsubishi Electric Corporation Halbleitereinheit und Verfahren zur Herstellung derselben

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003218306A (ja) * 2002-01-28 2003-07-31 Fuji Electric Co Ltd 半導体装置およびその製造方法
JP2004134445A (ja) * 2002-10-08 2004-04-30 Toyota Motor Corp 上部電極、パワーモジュール、および上部電極のはんだ付け方法
JP2004303869A (ja) * 2003-03-31 2004-10-28 Denso Corp 半導体装置およびその製造方法
JP2009170596A (ja) * 2008-01-15 2009-07-30 Nissan Motor Co Ltd 電力変換装置およびその製造方法
JP2012164880A (ja) * 2011-02-08 2012-08-30 Denso Corp 半導体装置及びその製造方法
JP2013211497A (ja) * 2012-03-30 2013-10-10 Keihin Corp 部品接合構造
WO2015016017A1 (ja) * 2013-07-31 2015-02-05 富士電機株式会社 半導体装置
JP2015103542A (ja) * 2013-11-21 2015-06-04 三菱電機株式会社 半導体装置の製造方法
WO2015107871A1 (ja) * 2014-01-15 2015-07-23 パナソニックＩｐマネジメント株式会社 半導体装置
US20150270207A1 (en) * 2014-03-18 2015-09-24 Samsung Electro-Mechanics Co., Ltd. Semiconductor module package and method of manufacturing the same
JP2016076670A (ja) * 2014-10-09 2016-05-12 三菱電機株式会社 電力用半導体装置
JP2016086069A (ja) * 2014-10-24 2016-05-19 三菱電機株式会社 半導体素子および半導体装置

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019009328A (ja) * 2017-06-27 2019-01-17 三菱電機株式会社 電力用半導体装置
WO2019171684A1 (ja) * 2018-03-07 2019-09-12 三菱電機株式会社 半導体装置及び電力変換装置
CN111788676A (zh) * 2018-03-07 2020-10-16 三菱电机株式会社 半导体装置以及电力变换装置
JPWO2019171684A1 (ja) * 2018-03-07 2021-01-14 三菱電機株式会社 半導体装置及び電力変換装置
JP7019024B2 (ja) 2018-03-07 2022-02-14 三菱電機株式会社 半導体装置及び電力変換装置
WO2019194272A1 (ja) * 2018-04-06 2019-10-10 三菱電機株式会社 半導体装置および電力変換装置ならびに半導体装置の製造方法
JPWO2019194272A1 (ja) * 2018-04-06 2020-10-22 三菱電機株式会社 半導体装置および電力変換装置ならびに半導体装置の製造方法
JP7047900B2 (ja) 2018-04-06 2022-04-05 三菱電機株式会社 半導体装置および電力変換装置ならびに半導体装置の製造方法
JP2020047912A (ja) * 2018-09-20 2020-03-26 ヘレウス ドイチェラント ゲーエムベーハー ウント カンパニー カーゲー 少なくとも１つの電子部材を接続するための基板アレイおよび基板アレイの製造方法
JP2021019139A (ja) * 2019-07-23 2021-02-15 三菱電機株式会社 電力用半導体装置及び電力変換装置
JP7287164B2 (ja) 2019-07-23 2023-06-06 三菱電機株式会社 電力用半導体装置及び電力変換装置

Also Published As

Publication number Publication date
JP6444537B2 (ja) 2018-12-26
CN108369933B (zh) 2021-06-29
CN108369933A (zh) 2018-08-03
DE112016005807B4 (de) 2024-05-08
DE112016005807T5 (de) 2018-09-27
JPWO2017104500A1 (ja) 2018-05-24

Similar Documents

Publication Publication Date Title
JP6444537B2 (ja) 半導体装置及びその製造方法
JP6139710B2 (ja) 電極端子、電力用半導体装置、および電力用半導体装置の製造方法
US9673118B2 (en) Power module and method of manufacturing power module
US9418916B2 (en) Semiconductor device
WO2016024445A1 (ja) 半導体装置
US9059153B2 (en) Semiconductor device
WO2022080055A1 (ja) 半導体モジュール
KR20180106957A (ko) 반도체 장치와 그 제조 방법 및 전극판
US9076782B2 (en) Semiconductor device and method of manufacturing same
JP2013102112A (ja) 半導体装置及び半導体装置の製造方法
JP2016134540A (ja) 電力用半導体装置
JP7382534B1 (ja) 半導体モジュール
JP2017199809A (ja) 電力用半導体装置
JP5233853B2 (ja) 半導体装置
CN108292642B (zh) 电力用半导体装置
JP2015220295A (ja) パワーモジュール及びその製造方法
JP2013187437A (ja) 樹脂封止型パワーモジュール
JP2013004658A (ja) 電力用半導体装置及びその製造方法
WO2022080072A1 (ja) 半導体モジュール
CN111354709B (zh) 半导体装置及其制造方法
US20210217721A1 (en) Semiconductor device
JP5217014B2 (ja) 電力変換装置およびその製造方法
JP7274954B2 (ja) 半導体装置
JP3239692U (ja) 半導体モジュール
KR20170014635A (ko) 반도체 패키지 및 그 제조 방법

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16875480

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2017555999

Country of ref document: JP

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 112016005807

Country of ref document: DE

122 Ep: pct application non-entry in european phase

Ref document number: 16875480

Country of ref document: EP

Kind code of ref document: A1