WO2016121456A1 - Dispositif à semi-conducteur - Google Patents

Dispositif à semi-conducteur Download PDF

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Publication number
WO2016121456A1
WO2016121456A1 PCT/JP2016/050462 JP2016050462W WO2016121456A1 WO 2016121456 A1 WO2016121456 A1 WO 2016121456A1 JP 2016050462 W JP2016050462 W JP 2016050462W WO 2016121456 A1 WO2016121456 A1 WO 2016121456A1
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WIPO (PCT)
Prior art keywords
circuit board
semiconductor device
insulating substrate
semiconductor element
board base
Prior art date
Application number
PCT/JP2016/050462
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English (en)
Japanese (ja)
Inventor
勇輔 梶
研史 三村
耕三 原田
暁紅 殷
啓行 原田
Original Assignee
三菱電機株式会社
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Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to CN201680007637.0A priority Critical patent/CN107210291B/zh
Priority to DE112016000517.2T priority patent/DE112016000517T5/de
Priority to JP2016557166A priority patent/JP6054009B1/ja
Publication of WO2016121456A1 publication Critical patent/WO2016121456A1/fr

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Definitions

  • the present invention relates to a semiconductor device, and more particularly to a semiconductor device in which a power semiconductor element is sealed with a sealing resin.
  • a wide gap semiconductor such as silicon carbide (SiC) or gallium nitride (GaN) has a larger band gap than a silicon (Si) semiconductor, and has attracted attention as a material suitable for development of semiconductor devices in recent years.
  • Patent Document 1 the periphery of the chip is sealed with a high heat-resistant sealing resin having a low linear expansion coefficient, and the surface of the semiconductor device is covered with a sealing material excellent in oxidation degradation resistance. Techniques have been proposed to improve module reliability. Further, in Patent Document 2, by mounting a second insulating substrate in which a resistive element is fixed by solder on a portion of a case member that constitutes a semiconductor device, separately from a first insulating substrate on which a semiconductor element is mounted, There has been proposed a technique for suppressing cracks and the like in solder due to heat generated from a semiconductor element. In addition to these, there is Patent Document 3.
  • a semiconductor device in which a power semiconductor element is sealed with a sealing resin is required to stably ensure insulation even in a state where the semiconductor device is operating under a high temperature. .
  • the present invention has been made as part of such development, and an object of the present invention is to provide a semiconductor device capable of stably ensuring insulation even at a relatively high temperature.
  • the semiconductor device includes a semiconductor element substrate, a semiconductor element, a case material, a circuit board base, a conductive second circuit board, electrode terminals, wiring, and a sealing material.
  • the semiconductor element substrate includes a base material, an insulating substrate disposed on the surface of the base material, and a conductive first circuit substrate disposed on the surface of the insulating substrate.
  • the semiconductor element is mounted on the first circuit board of the semiconductor element substrate.
  • the case material is attached to the semiconductor element substrate so as to surround the semiconductor element.
  • the circuit board base is provided on the case material and protrudes toward the inside where the semiconductor element is located, and is arranged at a height position different from the insulating board.
  • the conductive second circuit board is directly disposed on the surface of the circuit board base.
  • the electrode terminal is attached to the case material.
  • the wiring electrically connects the semiconductor element and the electrode terminal via the second circuit board.
  • the sealing material is filled in a region surrounded by the case material, and seals the semiconductor element and the
  • the conductive second circuit board is directly disposed on the circuit board base disposed at a height position different from that of the insulating substrate.
  • FIG. 1 is a plan view of a semiconductor device according to a first embodiment of the present invention.
  • FIG. 2 is a cross-sectional view taken along a cross-sectional line II-II shown in FIG. 1 in the same embodiment. It is sectional drawing of the semiconductor device which concerns on a comparative example.
  • FIG. 4 is a partially enlarged cross-sectional view for explaining problems of the semiconductor device shown in FIG. 3.
  • FIG. 4 is a partial enlarged cross-sectional view for explaining the function and effect of the semiconductor device in the embodiment. It is a top view of the semiconductor device which concerns on Embodiment 2 of this invention.
  • FIG. 7 is a cross-sectional view taken along a cross-sectional line VII-VII shown in FIG. 6 in the same embodiment.
  • FIG. 9 is a cross sectional view taken along a cross sectional line IX-IX shown in FIG. 8 in the embodiment. In the same embodiment, it is a partial expanded sectional view which shows a mode that sealing resin is filled. It is a top view of the semiconductor device which concerns on Embodiment 4 of this invention.
  • FIG. 12 is a cross sectional view taken along a cross sectional line XII-XII shown in FIG. 11 in the embodiment.
  • it is sectional drawing of the semiconductor device which concerns on a 1st modification.
  • Embodiment 3 it is sectional drawing of the semiconductor device which concerns on a 2nd modification.
  • Embodiment 1 A semiconductor device according to the first embodiment will be described.
  • This semiconductor device is a semiconductor power module.
  • Semiconductor power modules are widely used in devices that perform power control, for example, home appliances and automobiles.
  • the semiconductor device 1 mainly includes a semiconductor element substrate 3, a semiconductor element 13, a case material 15, and a sealing resin 29.
  • a conductive first circuit substrate 9 is disposed on the surface of the base plate 5 with an insulating substrate 7 interposed.
  • the insulating substrate 7 for example, a ceramic substrate or aluminum nitride is used.
  • the first circuit board 9 for example, one copper plate that has been subjected to predetermined patterning based on the layout of the semiconductor elements or the like is used.
  • the semiconductor element 13 is mounted on the first circuit board 9 with a bonding agent 11 such as solder.
  • a bonding agent 11 such as solder.
  • a plurality of semiconductor elements 13 connected in parallel to the power semiconductor elements are mounted.
  • the case material 15 is fixed to the semiconductor element substrate 3 with an adhesive 23.
  • the case material 15 is provided with a circuit board base 17 protruding from the inner wall toward the side where the semiconductor element 13 is disposed.
  • the circuit board base 17 is disposed at a position higher than the insulating board 7.
  • the circuit board base 17 is formed integrally with the case material 15.
  • a conductive second circuit board 21 is directly mounted on the circuit board base 17. As the second circuit board 21, for example, a copper plate subjected to predetermined patterning is used.
  • the case material 15 is provided with a copper electrode terminal 19.
  • the electrode terminal 19 and the second circuit board 21 are electrically connected by a wiring 25. Further, the second circuit board 21 and the semiconductor element 13 are electrically connected by the wiring 27. Thus, each of the plurality of semiconductor elements 13 is electrically connected to the electrode terminal 19 via the second circuit board 21.
  • a width L1, a length L2, and a thickness T1 sufficient to mount the second circuit board 21 are set on the circuit board base 17 on which the second circuit board 21 is directly mounted.
  • the width L1 is a length along the inner wall of the case material 15, and is set to 10 mm to 100 mm, for example. When the width L1 is narrower than 10 mm, it is not sufficient for mounting the second circuit board 21. On the other hand, when the width L1 exceeds 100 mm, there is a possibility that the sealing resin 29 may be hindered.
  • the length L2 is a length protruding from the inner wall of the case material 15, and is set to, for example, 5 mm to 20 mm.
  • the thickness T1 is set to 1 mm to 10 mm, for example. If the thickness T1 is thinner than 1 mm, the mechanical strength is not sufficient. On the other hand, if the thickness T1 exceeds 10 mm, the thickness becomes excessive and is not appropriate.
  • the distance H1 in the height direction between the circuit board base 17 and the insulating board 7 is set to 3 mm to 10 mm, for example. If the distance H1 is shorter than 3 mm, the sealing resin 29 may not be sufficiently filled when the sealing resin 29 is filled. On the other hand, if the distance H1 exceeds 10 mm, the second circuit board 21 or the like may not be reliably sealed.
  • a commonly used copper (copper plate) is given as an example. It is not limited. For example, aluminum (Al), iron (Fe), or a composite of aluminum and iron may be used. A composite material such as copper / invar / copper may be used. Further, an alloy such as an aluminum-silicon carbide alloy (AlSiC) or a copper-molybdenum alloy (CuMo) may be used.
  • AlSiC aluminum-silicon carbide alloy
  • CuMo copper-molybdenum alloy
  • the surfaces of the first circuit board 9 and the second circuit board 21 are usually plated with nickel (Ni). However, if the structure can supply the necessary current and voltage to the semiconductor element 13, the plating is performed. Even if it is applied, the plating may not be applied. When plating is performed, in addition to nickel plating, for example, gold plating or tin plating may be performed.
  • the electrode terminal 19, 1st Small irregularities may be provided on the respective surfaces of the circuit board 9 and the second circuit board 21.
  • an adhesion improver such as a primer treatment may be applied to the surfaces of the electrode terminal 19, the first circuit board 9 and the second circuit board 21.
  • a silane coupling agent, polyimide, epoxy resin, or the like is used as the adhesion improver.
  • the insulating substrate 7 is made of resin in which ceramic powder such as alumina (Al 2 O 3 ), silicon dioxide (SiO 2 ), aluminum nitride (AlN), boron nitride (BN), silicon nitride (Si 3 N 4 ) is dispersed. A cured resin substrate is obtained.
  • the semiconductor element substrate 3 is obtained by attaching the first circuit board 9 to one surface of such an insulating substrate 7 and the base plate 5 to the other surface.
  • the insulating substrate 7 is a cured resin substrate in which a ceramic plate is embedded in resin, or an insulating substrate simply composed of ceramic.
  • a semiconductor element substrate in which the first circuit board is attached to one surface of the insulating substrate and the base plate is attached to the other surface may be used.
  • Examples of the ceramic powder contained in the insulating substrate 7 include alumina (Al 2 O 3 ), silicon dioxide (SiO 2 ), aluminum nitride (AlN), boron nitride (BN), and silicon nitride (Si 3 N 4 ).
  • alumina Al 2 O 3
  • silicon dioxide SiO 2
  • AlN aluminum nitride
  • BN boron nitride
  • Si 3 N 4 silicon nitride
  • the present invention is not limited to these.
  • diamond (C), silicon carbide (SiC), boron oxide (B 2 O 3 ), or the like may be used.
  • resin powder such as silicone resin or acrylic resin may be used.
  • a spherical powder is often used.
  • the present invention is not limited to this, and for example, a powder such as a crushed shape, a granular shape, a flake shape, and an aggregate may be used.
  • the filling amount of the powder it is sufficient that the insulating substrate 7 is filled with a necessary amount of heat dissipation and insulation.
  • an epoxy resin is usually used, but is not limited thereto.
  • a polyimide resin, a silicone resin, an acrylic resin, or the like may be used as long as the resin is a material having both insulating properties and adhesiveness.
  • the metal used for the base plate 5 is usually a metal such as copper (Cu) or aluminum (Al), but is not limited thereto.
  • a metal such as copper (Cu) or aluminum (Al)
  • AlSiC aluminum-silicon carbide alloy
  • CuMo copper-molybdenum alloy
  • an organic material such as an epoxy resin, a polyimide resin, or an acrylic resin may be used.
  • linear bodies formed of aluminum or gold and having a circular cross-sectional shape are used, but are not limited thereto.
  • a wire body in which a copper plate having a square (rectangular) cross-sectional shape may be used.
  • FIG. 1 a structure in which one wiring 27 is connected to one semiconductor element 13 is shown, but this is simply shown for convenience of explanation regarding the wirings 25 and 27.
  • a necessary number of wirings are provided depending on the current density of the semiconductor element 13 and the like.
  • a fusion joining in which a metal piece such as copper or tin is melted or joining, an ultrasonic joining to which an ultrasonic wave is applied, or the like can be used. Any bonding method can be used as long as it can be supplied to the semiconductor element.
  • an epoxy resin is used as the material of the sealing resin 29, but the material is not limited to this, and any resin having a desired elastic modulus and heat resistance may be used. it can.
  • a silicone resin, a urethane resin, a polyimide resin, a polyamide resin, a polyamideimide resin, an acrylic resin, or the like may be used as long as the material has both insulating properties and adhesiveness.
  • the semiconductor element 13 mounted on the first circuit board 9 and the electrode terminal 19 are electrically connected via the second circuit board 21 by wirings 27 and 25.
  • the second circuit board 21 is directly mounted on the circuit board base 17 of the case material 15. Thereby, insulation can be ensured more stably. This will be described in comparison with a semiconductor device according to a comparative example.
  • the semiconductor device 101 mainly includes a semiconductor element substrate 103, a semiconductor element 113, a case material 115, and a sealing resin 129.
  • a first circuit substrate 109 is disposed on the surface of the base plate 105 with an insulating substrate 107 interposed therebetween.
  • a second circuit board 121 is disposed on the surface of the insulating substrate 107.
  • the semiconductor element 113 is mounted on the first circuit board 9 with a bonding agent 111 such as solder.
  • the case material 115 is fixed to the semiconductor element substrate 103 with an adhesive 123.
  • An electrode terminal 119 is attached to the case material 115.
  • the electrode terminal 119 and the second circuit board 121 are electrically connected by a wiring 125, and the second circuit board 121 and the semiconductor element 113 are electrically connected by a wiring 127.
  • a sealing resin 129 is filled in a region inside the case material 115 so as to seal the semiconductor element 113 and the wirings 125 and 127.
  • the semiconductor element 113 is electrically connected to the electrode terminal 119 via the second circuit board 121 by wirings 127 and 125.
  • the second circuit board 121 serving as the electrical relay point is disposed in a predetermined region on the insulating substrate 107 on which the first circuit board 109 is disposed.
  • the area of the second circuit board 121 as a relay point is smaller than the area of the first circuit board 109 on which the semiconductor element 113 is mounted. For this reason, the contact area between the sealing resin 129 and the first circuit board 109 is relatively large, whereas the contact area between the sealing resin 129 and the second circuit board 121 is relatively small.
  • the adhesive strength with the sealing resin 129 is also low.
  • the sealing resin 129 expands due to heat history associated with heat cycle or high-temperature storage.
  • the peeling 131 may reach the insulating substrate 107 by repeating the contraction.
  • the second circuit board 21 is directly mounted on the circuit board base 17 protruding from the inner wall of the case material 15 as shown in FIG. 1 or FIG. Therefore, as shown in FIG. 5, even if the separation 31 occurs at the interface between the sealing resin 29 and the second circuit board 21, the separation 31 is caused by the expansion and contraction of the sealing resin 29. The circuit board base 17 is reached. Thereby, the peeling 31 generated at the interface between the second circuit board 21 and the sealing resin 29 does not cause the insulating substrate 7 to crack. As a result, it is possible to reliably suppress the occurrence of insulation failure in the semiconductor device 1.
  • the stress generated in the sealing resin during operation is relatively large and peeling easily occurs.
  • the circuit board 21 is directly mounted on the circuit board base 17, it is possible to stably ensure the insulation of the semiconductor device.
  • the second circuit board 21 is not directly mounted on the circuit board base 17, but is mounted with another insulating substrate interposed between the second circuit board and the circuit board base 17 (not shown). ), In the same manner as described for the semiconductor device according to the comparative example, cracks may occur in the other insulating substrate from the portion of the other insulating substrate where the peeling has arrived, and eventually an insulation failure may occur. is assumed.
  • the second circuit board 21 is mounted on the circuit board base 17 that protrudes from the inner wall of the case material 15 to the side on which the semiconductor element 13 is mounted.
  • the length of the wiring 27 that electrically connects the semiconductor element 13 and the second circuit board 21 can be made relatively short, which contributes to a long life of the wiring.
  • the insulation failure can be suppressed and the life of the wiring can be extended, and the reliability as the semiconductor device can be further improved.
  • Embodiment 2 Here, a semiconductor device in which a circuit board base is arranged so as to pass between inner walls of the case materials facing each other will be described.
  • the semiconductor device 1 mainly includes a semiconductor element substrate 3, a semiconductor element 13, a case material 15, and a sealing resin 29.
  • the circuit board base 17 having a bridge structure is provided on the case material 15 so as to pass between one inner wall and the other inner wall facing each other.
  • the circuit board base 17 is disposed at a position higher than the insulating board 7.
  • the circuit board base 17 is formed integrally with the case material 15.
  • the second circuit board 21 is directly mounted on the circuit board base 17. Since other configurations are the same as those of the semiconductor device shown in FIGS. 1 and 2, the same members are denoted by the same reference numerals, and description thereof will not be repeated unless necessary.
  • a width L3 and a thickness T2 sufficient to mount the second circuit board 21 are set in the bridged circuit board base 17 on which the second circuit board 21 is directly mounted.
  • the width L3 is set to 5 mm to 30 mm, for example. If the width L3 is narrower than 5 mm, it is not sufficient for mounting the second circuit board 21. On the other hand, when the width L3 exceeds 30 mm, there is a possibility that the sealing resin 29 may be hindered.
  • the thickness T2 is set to 1 mm to 10 mm, for example. If the thickness T2 is thinner than 1 mm, the mechanical strength is not sufficient. On the other hand, if the thickness T2 exceeds 10 mm, the thickness becomes excessive and is not appropriate.
  • the distance H2 in the height direction between the circuit board base 17 and the insulating board 7 is set to 3 mm to 10 mm, for example. If the distance H2 is shorter than 3 mm, the sealing resin 29 may not be sufficiently filled when the sealing resin 29 is filled. On the other hand, if the distance H2 exceeds 10 mm, the second circuit board 21 or the like may not be reliably sealed.
  • the second circuit board 21 is directly mounted on the circuit board base 17 having a bridging structure provided so as to pass between one inner wall and the other inner wall of the case material 15 facing each other. .
  • the peeling is repeated due to the expansion and contraction of the sealing resin 29. Will be reached.
  • the peeling that occurs at the interface between the second circuit board 21 and the sealing resin 29 does not cause the insulating substrate 7 to crack.
  • it is possible to reliably suppress the occurrence of an insulation failure in the semiconductor device 1, and to ensure stable insulation of the semiconductor device.
  • the circuit board base 17 has a bridge structure, the position of the second circuit board 21 in the circuit board base 17 can be easily approached to the semiconductor element 13. As a result, the length of the wiring 27 that electrically connects the semiconductor element 13 and the second circuit board 21 can be made relatively short, which contributes to a long life of the wiring.
  • the second circuit board 21 is arranged at a position separated from the outer peripheral portion of the semiconductor device 1 by arranging the circuit board table 17 having a bridge structure in the vicinity of the center of the case material 15. The stress generated in the second circuit board 21 can be reduced. Thereby, it can suppress that peeling arises in the interface of sealing resin 29 and the 2nd circuit board 21.
  • Embodiment 3 a first example of a semiconductor device in which an inclined portion is provided on a circuit board base will be described.
  • the semiconductor device 1 mainly includes a semiconductor element substrate 3, a semiconductor element 13, a case material 15, and a sealing resin 29.
  • the circuit board base 17 provided on the case material 15 includes an inclined portion 18.
  • the inclined portion 18 is formed on the circuit board base 17 on the lower surface side facing the insulating substrate 7.
  • the second circuit board 21 is directly mounted on the circuit board base 17. Since other configurations are the same as those of the semiconductor device shown in FIGS. 1 and 2, the same members are denoted by the same reference numerals, and description thereof will not be repeated unless necessary.
  • the width L1 and the length L2 sufficient to mount the second circuit board 21 are set on the circuit board base 17.
  • the width L1 is a length along the inner wall of the case material 15, and is set to 10 mm to 100 mm, for example.
  • the width L1 is narrower than 10 mm, it is not sufficient for mounting the second circuit board 21.
  • the width L1 exceeds 100 mm, there is a possibility that the sealing resin 29 may be hindered.
  • the length L2 is a length protruding from the inner wall of the case material 15, and is set to, for example, 5 mm to 20 mm.
  • the length L2 is narrower than 5 mm, it is not sufficient for mounting the second circuit board 21.
  • the length L2 exceeds 20 mm, there is a possibility that the sealing resin 29 may be hindered.
  • the distance H1 in the height direction between the inner end of the circuit board base 17 and the insulating substrate 7 is set to 3 mm to 10 mm, for example. If the distance H1 is shorter than 3 mm, the sealing resin 29 may not be sufficiently filled when the sealing resin 29 is filled. On the other hand, if the distance H1 exceeds 10 mm, the second circuit board 21 or the like may not be reliably sealed.
  • the inclined portion 18 is inclined so as to approach the insulating substrate 7 from the protruding tip portion of the circuit board base 17 toward the case material 15.
  • the inclined portion 18 is inclined with respect to the insulating substrate 7 with an inclination angle ⁇ of 5 ° or more.
  • the minimum inclination angle ⁇ is about 8.5 °. If the inclination angle ⁇ is further reduced and the inclination angle ⁇ is smaller than 5 °, the sealing resin 29 may not be sufficiently filled between the circuit board base 17 and the insulating substrate 7. Therefore, the inclination angle ⁇ of the inclined portion 18 is desirably 5 ° or more.
  • the circuit board table 17 is provided with an inclined portion 18 that is inclined from the protruding end of the circuit board table 17 toward the case member 15 in a manner approaching the insulating substrate 7. As shown in FIG. 10, the provision of the inclined portion 18 facilitates the sealing resin 29 to flow into a relatively narrow space between the circuit board base 17 and the insulating substrate 7 (see arrows).
  • Embodiment 4 a second example of a semiconductor device in which an inclined portion is provided on a circuit board base will be described.
  • the semiconductor device 1 mainly includes a semiconductor element substrate 3, a semiconductor element 13, a case material 15, and a sealing resin 29.
  • the circuit board base 17 having a bridge structure provided in the case material 15 includes an inclined portion 18. The inclined portion 18 is formed on the circuit board base 17 on the lower surface side facing the insulating substrate 7.
  • the second circuit board 21 is directly mounted on the circuit board base 17. Since other configurations are the same as those of the semiconductor device shown in FIGS. 6 and 7, the same members are denoted by the same reference numerals, and the description thereof will not be repeated unless necessary.
  • the circuit board base 17 having a bridge structure in which the inclined portion 18 is formed will be described in detail.
  • the circuit board base 17 is set with a width L ⁇ b> 3 sufficient to mount the second circuit board 21.
  • the width L3 is set to 5 mm to 30 mm, for example. If the width L3 is narrower than 5 mm, it is not sufficient for mounting the second circuit board 21. On the other hand, when the width L3 exceeds 30 mm, there is a possibility that the sealing resin 29 may be hindered.
  • the distance H2 in the height direction between the circuit board base 17 and the insulating board 7 is set to 3 mm to 10 mm, for example. If the distance H2 is shorter than 3 mm, the sealing resin 29 may not be sufficiently filled when the sealing resin 29 is filled. On the other hand, if the distance H2 exceeds 10 mm, the second circuit board 21 or the like may not be reliably sealed.
  • the inclined portion 18 is inclined so as to approach the insulating substrate 7 toward the case material 15 from a predetermined position spaced apart from the case material 15 in the circuit board base 17 having a bridge structure.
  • the inclined portion 18 is inclined with respect to the insulating substrate 7 with an inclination angle ⁇ of 5 ° or more.
  • the inclination angle ⁇ of the inclined portion 18 is desirably 5 ° or more.
  • the circuit board base 17 is configured such that the distance (height) between the insulating board 7 and the circuit board base 17 gradually decreases from a predetermined position of the circuit board base 17 having a bridge structure toward the case material 15.
  • An inclined portion 18 is provided. By providing the inclined portion 18, the sealing resin 29 can easily flow into a relatively narrow space between the circuit board base 17 and the insulating substrate 7.
  • the inclined surface of the inclined portion 18 is flat.
  • the inclined surface may be a curved surface. As shown in FIG. 13, it may be a concave surface (convex upward). Moreover, as shown in FIG. 14, it may be a convex surface (convex downward). Further, the inclined surface of the inclined portion 18 of the circuit board base 17 having a bridge structure may be similarly concave or convex (not shown).
  • circuit board base 17 and the case material 15 are integrally formed has been described as an example.
  • the circuit board base is not limited to this.
  • a circuit board base separately formed of the same material as the case material 15 may be fixed to the case material.
  • the semiconductor devices described in the embodiments can be variously combined as necessary.
  • a circuit board base positioned along the inner wall of the case member 15 and a circuit board having a bridge structure are combined. Also good.
  • the present invention is effectively used for a semiconductor device in which a power semiconductor element is sealed with a sealing resin.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

L'invention concerne un dispositif à semi-conducteur (1) comportant principalement un substrat d'élément semi-conducteur (3), un élément semi-conducteur (13), un élément boîtier (15) et une résine d'étanchéité (29). Dans le substrat d'élément semi-conducteur (3), un premier substrat de circuit conducteur (9) est disposé sur la surface d'une plaque de base (5), un substrat isolant (7) étant interposé entre eux. L'élément boîtier (15) est doté d'une base de substrat de circuit (17) qui fait saillie à partir d'une paroi interne vers le côté où l'élément semi-conducteur (13) est disposé, et une borne d'électrode (19). Un second substrat de circuit conducteur (21) est monté directement sur la base de substrat de circuit (17). La borne d'électrode (19) et le second substrat de circuit (21) sont connectés électriquement par un fil (25), et le second substrat de circuit (21) et l'élément semi-conducteur (13) sont connectés électriquement par un fil (27).
PCT/JP2016/050462 2015-01-30 2016-01-08 Dispositif à semi-conducteur WO2016121456A1 (fr)

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CN201680007637.0A CN107210291B (zh) 2015-01-30 2016-01-08 半导体装置
DE112016000517.2T DE112016000517T5 (de) 2015-01-30 2016-01-08 Halbleitervorrichtung
JP2016557166A JP6054009B1 (ja) 2015-01-30 2016-01-08 半導体装置

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JP2015017000 2015-01-30

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JP2018082069A (ja) * 2016-11-17 2018-05-24 三菱電機株式会社 半導体装置および半導体装置の製造方法
WO2019008828A1 (fr) * 2017-07-03 2019-01-10 三菱電機株式会社 Dispositif à semi-conducteur
JP2021002610A (ja) * 2019-06-24 2021-01-07 富士電機株式会社 半導体モジュール、車両、および半導体モジュールの製造方法
JP2021077817A (ja) * 2019-11-13 2021-05-20 三菱電機株式会社 半導体装置

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JP6816691B2 (ja) * 2017-09-29 2021-01-20 三菱電機株式会社 半導体装置
JP7062688B2 (ja) * 2017-12-28 2022-05-06 京セラ株式会社 配線基板、電子装置及び電子モジュール
JP2020013920A (ja) * 2018-07-19 2020-01-23 三菱電機株式会社 半導体装置及び電力変換装置
JP7074046B2 (ja) * 2018-12-21 2022-05-24 株式会社デンソー 半導体装置とその製造方法
JP7170614B2 (ja) * 2019-09-18 2022-11-14 株式会社東芝 半導体装置

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JP2018082069A (ja) * 2016-11-17 2018-05-24 三菱電機株式会社 半導体装置および半導体装置の製造方法
WO2019008828A1 (fr) * 2017-07-03 2019-01-10 三菱電機株式会社 Dispositif à semi-conducteur
JP6461441B1 (ja) * 2017-07-03 2019-01-30 三菱電機株式会社 半導体装置
CN110800105A (zh) * 2017-07-03 2020-02-14 三菱电机株式会社 半导体装置
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JP7367352B2 (ja) 2019-06-24 2023-10-24 富士電機株式会社 半導体モジュール、車両、および半導体モジュールの製造方法
JP2021077817A (ja) * 2019-11-13 2021-05-20 三菱電機株式会社 半導体装置
JP7209615B2 (ja) 2019-11-13 2023-01-20 三菱電機株式会社 半導体装置

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CN107210291A (zh) 2017-09-26
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DE112016000517T5 (de) 2017-10-19
CN107210291B (zh) 2019-07-16

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