WO2016011711A1 - 像素电路、像素电路的驱动方法和显示装置 - Google Patents

像素电路、像素电路的驱动方法和显示装置 Download PDF

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Publication number
WO2016011711A1
WO2016011711A1 PCT/CN2014/088753 CN2014088753W WO2016011711A1 WO 2016011711 A1 WO2016011711 A1 WO 2016011711A1 CN 2014088753 W CN2014088753 W CN 2014088753W WO 2016011711 A1 WO2016011711 A1 WO 2016011711A1
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Prior art keywords
driving
transistor
pixel
row
line
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PCT/CN2014/088753
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English (en)
French (fr)
Inventor
吴博
祁小敬
谭文
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京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US14/771,374 priority Critical patent/US9666132B2/en
Priority to EP14883527.5A priority patent/EP3174041A4/en
Publication of WO2016011711A1 publication Critical patent/WO2016011711A1/zh

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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
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    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
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Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a pixel circuit, a driving method of a pixel circuit, and a display device.
  • AMOLED Active Matrix/Organic Light Emitting Diode
  • LTPS Low Temperature Polysilicon Technology
  • TFT Thin Film Transistor
  • the 6T1C pixel driving circuit includes a first control transistor T1, a second control transistor T2, a third control transistor T3, a fourth control transistor T4, a fifth control transistor T5, a storage capacitor Cs, and a driving transistor DTFT.
  • the gate of T1, the gate of T3 and the gate of T4 are connected to the first scan voltage VSCAN1, the gate of T2 and the gate of T5 are connected with the second scan voltage VSCAN2, and T1 is connected
  • the data input voltage Vdata the first end of Cs is denoted as A, the second end of Cs is denoted as B, the point where T2 and T3 are connected to the gate of DTFT is denoted as C, and the anode of OLED is connected to high level VDD, T5 One end is connected to a low level VSS.
  • the existing pixel circuit includes L rows of pixel units, each row of pixel units includes M 6T1C sub-pixel units, and each of the 6T1C sub-pixel units includes a 6T1C pixel driving unit and a light-emitting element; wherein L and M are both A positive integer greater than 2, n is a positive integer, n is greater than 1, n is less than L, and n is less than M, Gate_1 is the first gate line, Gate_n-1 is the n-1th gate line, and Gate_n is the nth gate line.
  • Gate_L is the Lth gate line, Data_1 is the first data line, Data_n-1 is the n-1th data line, Data_n is the nth data line, and Data_M is the Mth data line.
  • a main object of the present disclosure is to provide a pixel circuit, a driving method of a pixel circuit, and a display device, which increase an aperture ratio of a pixel, thereby reducing a current density of the organic light-emitting layer while obtaining uniform display.
  • the present disclosure provides a pixel circuit including a plurality of rows of pixel units, each row of pixel units including a plurality of sub-pixel units, each of the sub-pixel units including a light emitting element; the pixel circuit further comprising a row sharing unit, the row sharing unit A plurality of row driving illumination control modules are included;
  • Each of the plurality of sub-pixel units included in each row of pixel units is connected to a signal line;
  • Each of the row driving illumination control modules is respectively connected to an illumination control signal
  • a row driving illumination control module and each sub-pixel unit included in a row of pixel units are connected by the signal line to drive the light-emitting elements included in the sub-pixel unit to emit light under the control of the illumination control signal.
  • the sub-pixel unit is disposed in an effective display area, and the row sharing unit is disposed outside the effective display area.
  • each of the sub-pixel units included in the nth row of pixel units includes a sub-pixel driving circuit; wherein n is a positive integer and n is less than or equal to a total number of rows of pixel units included in the pixel circuit;
  • the sub-pixel driving circuit includes a driving compensation module, a data writing module and a driving transistor;
  • the driving transistor has a first pole connected to the first end of the light emitting element, a second pole being connected to the first level, and a second end of the light emitting element being connected to the signal line;
  • the driving compensation module is respectively connected to the nth scan line, the gate of the driving transistor, the first electrode of the driving transistor, and the second electrode of the driving transistor, and is configured to be effective when the scan signal output by the nth scan line is valid Controlling the gate-source voltage of the driving transistor to compensate the threshold voltage of the driving transistor:
  • the data writing module is respectively connected to the nth scan line, a data line, and the driving compensation module Connecting, when the scan signal outputted by the nth scan line is valid, controlling a data voltage on the data line to be written into a gate of the driving transistor through the driving compensation module;
  • Each of the row driving illumination control modules is respectively connected to an illumination control signal and a second level, and is respectively connected to the second end of the illumination element through a signal line for when the illumination control signal is valid The potential of the signal line is controlled to be the second level.
  • the driving compensation module is further configured to control and maintain a gate-source voltage of the driving transistor when the light-emitting control signal is valid and the scan signal output by the nth scan line is invalid, and control the driving transistor to drive the light-emitting element to emit light.
  • the driving compensation module includes a first compensation transistor, a second compensation transistor, and a storage capacitor;
  • the first compensation transistor has a gate connected to the nth scan line, a first pole connected to the gate of the driving transistor, and a second pole connected to the first end of the storage capacitor;
  • the storage capacitor has a second end connected to the first pole of the driving transistor
  • the second compensation transistor has a gate connected to the nth scan line, a first pole connected to the first pole of the first compensation transistor, and a second pole connected to the second pole of the driving transistor.
  • the data writing module comprises: a data writing transistor, the gate is connected to the nth scan line, the first pole is connected to the data line, and the second pole is connected to the first end of the storage capacitor.
  • each of the row driving illumination control modules includes: a row driving illumination control transistor, the gate is connected to an illumination control signal, the first pole is connected to the second level, and the second pole is connected to the signal line connection.
  • the driving transistor, the second compensation transistor, the data writing transistor, and the row driving light emitting control transistor are all n-type TFTs, and the first compensation transistor is a p-type TFT.
  • the light emitting element is an organic light emitting diode.
  • the present disclosure also provides a driving method of a pixel circuit, which is applied to the pixel circuit described above, and the driving method of the pixel circuit includes:
  • Threshold compensation and data writing step invalidating the scan signal outputted by the scan line of the current line and invalidating the light emission control signal, driving the compensation module to control the gate-source voltage of the driving transistor to compensate the threshold voltage of the driving transistor, and the data writing module controls the data line
  • the upper data voltage is written into the gate of the driving transistor through the driving compensation module; the row driving illumination control module is turned off, so that the signal line is suspended and sent
  • the optical element has no conduction path;
  • Buffering step invalidating the scan line and the illumination control signal of the current line, the gate of the driving transistor is floating, the driving compensation module controls and maintains the gate-source voltage of the driving transistor, and disconnects the connection with the data writing module;
  • the illuminating step the illuminating control signal is valid and the scanning signal outputted by the scanning line of the line is invalid, and the row driving illuminating control module controls the potential of the signal line to be the second level, and the driving compensation module controls and maintains the gate-source voltage of the driving transistor, and The control driving transistor drives the light emitting element to emit light.
  • the present disclosure also provides a display device including the above-described pixel circuit.
  • the pixel circuit of the present disclosure employs a row sharing unit such that the number of TFTs in the effective display region is reduced while being able to compensate for the threshold of the driving transistor, and a simple control signal can be used, that is, The aperture ratio of the pixel is increased, thereby reducing the current density of the organic light-emitting layer and extending the service life of the AMOLED panel while uniformly displaying.
  • 1A is a circuit diagram of a conventional 6T1C pixel driving circuit
  • 1B is a structural block diagram of a conventional pixel circuit
  • FIG. 2 is a structural diagram of a pixel circuit according to an embodiment of the present disclosure
  • FIG. 3 is a structural block diagram of an interconnected sub-pixel unit and a row driving illumination control module included in a pixel circuit according to an embodiment of the present disclosure
  • FIG. 4 is a circuit diagram of an interconnected sub-pixel unit and a row driving illumination control module included in a pixel circuit according to an embodiment of the present disclosure
  • FIG. 5 is an operational timing diagram including interconnected sub-pixel units and row drive illumination control modules as shown in FIG. 4;
  • 6A, 6B, and 6C are equivalent circuit diagrams of the circuit shown in Fig. 4 in the first stage, the second stage, and the third stage, respectively.
  • the transistors employed in all embodiments of the present disclosure may each be a thin film transistor or a field effect transistor or other device having the same characteristics.
  • the first pole may be a source or a drain
  • the second pole may be a drain or a source.
  • the transistor can be classified into an n-type transistor or a p-type transistor according to the characteristics of the transistor.
  • the driving circuit provided by the embodiment of the present disclosure, it is conceivable that the use of an n-type transistor or a p-type transistor can be easily conceived by those skilled in the art without creative work, and thus is also in the present disclosure. Within the scope of the protection of the embodiments.
  • the pixel circuit of the embodiment of the present disclosure includes a plurality of rows of pixel units, each row of pixel units includes a plurality of sub-pixel units, each of the sub-pixel units includes a light emitting element; the pixel circuit further includes a row sharing unit, the row The shared unit includes a plurality of row driving illumination control modules;
  • Each of the plurality of sub-pixel units included in each row of pixel units is connected to a signal line;
  • Each of the row driving illumination control modules is respectively connected to an illumination control signal
  • a row driving illumination control module and each sub-pixel unit included in a row of pixel units are connected by the signal line to drive the illumination element to emit light under the control of the illumination control signal.
  • each of the sub-pixel units includes a sub-pixel driving circuit and a light emitting element.
  • the light-emitting element can be, for example, an OLED (Organic Light Emitting Diode).
  • the pixel circuit of this embodiment of the present disclosure adopts a row common unit such that the number of TFTs in the effective display region is reduced while being able to compensate the threshold of the driving transistor, and a simple light emission control signal is adopted, that is, an opening of the pixel can be made The rate is increased, thereby reducing the current density of the organic light-emitting layer and extending the service life of the AMOLED panel while uniformly displaying.
  • the sub-pixel unit is disposed in an effective display area, and the row sharing unit is disposed outside the effective display area.
  • the common circuit in each row of pixel units outside the effective display area the number of TFTs in the effective display area is further reduced, and the aperture ratio is increased.
  • each of the sub-pixel units included in the nth row of pixel units includes a sub-pixel driving circuit and a light emitting element; wherein n is a positive integer and n is less than or equal to a total number of rows of pixel units included in the pixel circuit.
  • the sub-pixel driving circuit includes a driving compensation module, a data writing module, and a driving transistor.
  • the driving transistor has a first pole connected to the first end of the light emitting element, a second pole connected to the first level, and a second end of the light emitting element connected to the signal line.
  • the driving compensation module is respectively connected to the nth scan line, the gate of the driving transistor, the first pole of the driving transistor, and the second pole of the driving transistor, for the first stage of a time period, when the When the scan signal output from the nth scan line is valid, the gate-source voltage of the drive transistor is controlled to compensate the threshold voltage of the drive transistor.
  • the data writing module is respectively connected to the nth scan line, a data line and the driving compensation module, and is configured to control a data voltage on the data line to pass when the scan signal outputted by the nth scan line is valid
  • the drive compensation module writes to the gate of the drive transistor.
  • Each of the row driving illumination control modules is respectively connected to an illumination control signal and a second level, and is respectively connected to the second end of the illumination element through a signal line for when the illumination control signal is valid The potential of the signal line is controlled to be the second level.
  • the driving compensation module is further configured to control and maintain a gate-source voltage of the driving transistor when the light-emitting control signal is valid and the scan signal output by the nth scan line is invalid, and control the driving transistor to drive the light-emitting element to emit light.
  • the pixel circuit of the embodiment of the present disclosure includes L rows of pixel units, each row of pixel units includes M sub-pixel units; and the m sub-pixel units included in the nth row of pixel units are all connected to the nth scan line; each row The kth sub-pixel unit included in the pixel unit is connected to the kth data line; L and M are integers greater than 1, n is a positive integer less than or equal to L, and k is a positive integer less than or equal to M;
  • Data_1 is the first data line
  • Data_k-1 is the k-1th data line
  • Data_k is the kth data line
  • Data_k+1 is the k+1th data line
  • Data_M is the Mth data line
  • VL_1 is a signal line connected to a plurality of sub-pixel units included in the pixel unit of the 1st row
  • VL_n-1 is a signal line connected to a plurality of sub-pixel units included in the pixel unit of the n-1th row
  • VL_n is a signal line connected to the plurality of sub-pixel units included in the pixel unit of the nth row
  • VL_n+1 is a signal line connected to the plurality of sub-pixel units included in the pixel unit of the n+1th row
  • VL_L is included in the pixel unit of the Lth row Signal lines connected by sub-pixel units
  • each of the sub-pixel units is a 4T1C sub-pixel unit.
  • connection between the driving control module included in the row sharing unit and the sub-pixel unit included in the pixel unit of the nth row is taken as an example:
  • the sub-pixel unit includes a sub-pixel driving circuit and an organic light emitting diode OLED, the sub-pixel driving circuit includes a driving transistor DTFT, a driving compensation module 31, and a data writing module 32;
  • the driving transistor DTFT the first pole is connected to the anode of the OLED, and the second pole is connected to the high level VDD;
  • the cathode of the OLED is connected to the signal line VL;
  • the driving compensation module 31 is respectively connected to the nth scan line Scan_n, the gate of the driving transistor DTFT, the first electrode of the driving transistor DTFT, and the second electrode of the driving transistor DTFT, for the nth scan line
  • Scan_n the scan signal outputted by Scan_n is valid, controlling the gate-source voltage of the driving transistor DTFT to compensate the threshold voltage Vth of the driving transistor DTFT;
  • the data writing module 32 is respectively connected to the nth scan line Scan_n, a data line Data, and the driving compensation module 31, and is configured to control the data line Data when the scan signal output by the nth scan line Scan_n is valid.
  • the upper data voltage Vdata is written to the gate of the driving transistor DTFT through the driving compensation module 31;
  • Each row of the driving illumination control module 33 is respectively connected to an illumination control signal EM_n and a low level VSS, and is respectively connected to a cathode of the OLED through a signal line VL for controlling when the illumination control signal EM_n is valid.
  • the potential of the signal line VL is a low level VSS.
  • the driving compensation module 31 is further configured to control the potential of the gate of the driving transistor DTFT and control the driving transistor DTFT driving when the light emission control signal EM_n is valid and the scan signal output by the nth scan line Scan_n is invalid. OLED illumination.
  • the DTFT is an n-type TFT.
  • the type of the DTFT is not limited thereto, and the DTFT may also be a p-type.
  • the driving compensation module includes a first compensation transistor, a second compensation transistor, and a storage capacitor;
  • the first compensation transistor has a gate connected to the nth scan line, a first pole connected to the gate of the driving transistor, and a second pole connected to the first end of the storage capacitor;
  • the second compensation transistor has a gate connected to the nth scan line, a first pole connected to the first pole of the first compensation transistor, and a second pole connected to the second pole of the driving transistor;
  • the storage capacitor has a second end connected to the first pole of the driving transistor.
  • the driving transistor DTFT has a first pole connected to an anode of the OLED, a second pole connected to a high level VDD, and a cathode of the OLED connected to the signal line VL.
  • the low level VSS may be a ground level GND.
  • the driving compensation module may include a first compensation transistor T1, a second compensation transistor T2, and a storage capacitor Cs;
  • the first compensation transistor T1 has a gate connected to the nth scan line Scan_n, a first pole connected to the gate of the driving transistor DTFT, and a second pole connected to the first end A of the storage capacitor Cs;
  • the storage capacitor Cs, the second end B is connected to the first pole of the driving transistor DTFT;
  • the second compensation transistor T2 has a gate connected to the nth scan line Scan_n, a first pole connected to the first pole of the first compensation transistor T1, and a second pole connected to the second pole of the drive transistor DTFT.
  • the data writing module may include: a data writing transistor T3, a gate connected to the nth scan line Scan_n, a first pole connected to the data line Data, and a second pole and a first end A of the storage capacitor Cs connection.
  • Each of the row driving illumination control modules may include: a row driving illumination control transistor T4, the gate being connected to an illumination control signal EM_n, the first pole being connected to the ground level GND, and the second pole being connected to the signal line VL.
  • point C is a point connected to the gate of the DTFT, and DTFT, T2, T3, and T4 are both n-type TFTs, and T1 is a p-type TFT.
  • the sub-pixel unit including the DTFT, T1, T2, T3, Cs, and OLED is disposed in the effective display area, and the line driving illumination control module including T4 is disposed outside the effective display area, and A plurality of sub-pixel units of the same row of pixel units are connected to the row driving illumination control module to have a threshold compensation function.
  • the purpose of reducing the TFT in the effective display area can be achieved by using a row sharing unit including a plurality of row driving illumination control modules, and the pixel size can be reduced.
  • FIG. 5 The operation sequence of the embodiment shown in FIG. 4 is shown in FIG. 5, and is divided into three stages:
  • phase (threshold voltage compensation and data voltage writing phase): Scan_n outputs a high level, EM_n outputs a low level, the common row driving illumination control tube T4 is turned off, the VL of the sub-pixel driving circuit is suspended, and the OLED has no conduction path.
  • Scan_n outputs a low level
  • EM_n outputs a high level
  • T4 is turned on
  • the signal line VL is grounded through T4, thereby forming a conduction path between the DTFT and the OLED, and an equivalent circuit of the sub-pixel driving circuit. As shown in FIG.
  • the basic sub-pixel unit is a 4T1C sub-pixel unit, and the common row drives the light-emission control transistor, and the threshold voltage compensation function is realized by less TFT and simple control signal. Simplify the pixel circuit.
  • the present disclosure also provides a driving method of a pixel circuit, which is applied to the pixel circuit described above, and the driving method of the pixel circuit includes:
  • Threshold compensation and data writing step the scan signal outputted by the scan line of the current line is valid (for example, high level) and the light emission control signal is invalid (for example, low level), and the driving compensation module controls the gate-source voltage compensation of the driving transistor.
  • the threshold voltage of the driving transistor the data writing module controls the data voltage on the data line to be written to the gate of the driving transistor through the driving compensation module; The module is closed, the signal line is suspended, and the light-emitting element has no conduction path;
  • Buffering step invalidating the scan line and the illumination control signal of the current line, the gate of the driving transistor is floating, the driving compensation module controls and maintains the gate-source voltage of the driving transistor, and disconnects the connection with the data writing module;
  • the illuminating step the illuminating control signal is valid and the scanning signal outputted by the scanning line of the line is invalid, and the row driving illuminating control module controls the potential of the signal line to be the second level, and the driving compensation module controls and maintains the gate-source voltage of the driving transistor, and The control driving transistor drives the light emitting element to emit light.
  • Embodiments of the present disclosure also provide a display device including the above-described pixel circuit.
  • the display device may include a liquid crystal display device such as a liquid crystal panel, a liquid crystal television, a mobile phone, or a liquid crystal display.
  • the display device may also include an organic light emitting display or other type of display device such as an electronic reader or the like.

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Abstract

一种像素电路、像素电路的驱动方法和显示装置。像素电路包括多个行像素单元，每一行像素单元包括多个子像素单元，每一子像素单元包括发光元件；每一行像素单元还包括行共用单元，行共用单元包括多个行驱动发光控制模块（33）；每一行像素单元包括的多个子像素单元均与一信号线（VL）连接；每一行驱动发光控制模块（33）分别接入一发光控制信号（EM_n）；每一行驱动发光控制模块（33）与一行像素单元包括的每一子像素单元均通过信号线（VL）连接，以在发光控制信号（EM_n）的控制下驱动发光元件发光。

Description

像素电路、像素电路的驱动方法和显示装置
相关申请的交叉引用
本申请主张在2014年7月21日在中国提交的中国专利申请号No.201410347862.1的优先权，其全部内容通过引用包含于此。
技术领域
本公开涉及显示技术领域，尤其涉及像素电路、像素电路的驱动方法和显示装置。
背景技术
对于基于LTPS(Low Temperature Poly-silicon，低温多晶硅技术)的AMOLED(Active Matrix/Organic Light Emitting Diode，有源矩阵有机发光二极管)像素驱动电路，由于LTPS存在阈值电压均一性差等问题，所以在AMOLED的像素设计中需要增加驱动TFT(Thin Film Transistor，薄膜场效应晶体管)阈值电压补偿的电路。
如图1A所示，具有阈值电压补偿的AMOLED像素驱动电路的常见设计需要6T1C像素驱动电路，或者需要更多的TFT和/或电容。如图1A所示，该6T1C像素驱动电路包括第一控制晶体管T1、第二控制晶体管T2、第三控制晶体管T3、第四控制晶体管T4、第五控制晶体管T5、存储电容Cs和驱动晶体管DTFT，用于驱动有机发光二极管OLED；T1的栅极、T3的栅极和T4的栅极接入第一扫描电压VSCAN1，T2的栅极和T5的栅极与第二扫描电压VSCAN2连接，T1还接入数据电压Vdata，Cs的第一端标示为A，Cs的第二端标示为B，T2和T3与DTFT的栅极连接的点标示为C，OLED的阳极接入高电平VDD，T5的一端接入低电平VSS。
如图1B所示，现有的像素电路包括L行像素单元，每一行像素单元都包括M个6T1C子像素单元，每一个6T1C子像素单元包括6T1C像素驱动单元和发光元件；其中L和M均为大于2的正整数，n为正整数，n大于1，n小于L，并n小于M，Gate_1为第一栅线，Gate_n-1为第n-1栅线，Gate_n为第n栅线，Gate_L为第L栅线，Data_1为第一数据线线，Data_n-1为第n-1数据线，Data_n为第n数据线，Data_M为第M数据线。
在现有技术中，为了阈值补偿而导致TFT和/或电容数量的增加，将需要较多的控制信号，并占用较大的布局空间，不利于AMOLED像素尺寸的缩小，即限制了高PPI(Pixel Per Inch，每英寸所拥有的像素数目)的AMOLED像素驱动电路的发展。
发明内容
本公开的主要目的在于提供一种像素电路、像素电路的驱动方法和显示装置，增加像素的开口率，从而在获得均匀显示的同时，降低有机发光层的电流密度。
本公开提供了一种像素电路，包括多行像素单元，每一行像素单元包括多个子像素单元，每一该子像素单元均包括发光元件；所述像素电路还包括行共用单元，该行共用单元包括多个行驱动发光控制模块；
每一行像素单元包括的多个子像素单元均与一信号线连接；
每一所述行驱动发光控制模块分别接入一发光控制信号；
一所述行驱动发光控制模块与一所述行像素单元包括的每一子像素单元均通过该信号线连接，以在该发光控制信号的控制下驱动该子像素单元包括的发光元件发光。
可选地，所述子像素单元设置于有效显示区内，所述行共用单元设置于有效显示区外。
可选地，第n行像素单元包括的每一所述子像素单元均包括子像素驱动电路；其中n为正整数并且n小于或等于所述像素电路包括的像素单元的总行数；
该子像素驱动电路包括驱动补偿模块、数据写入模块和驱动晶体管；
该驱动晶体管，第一极与所述发光元件的第一端连接，第二极接入第一电平；所述发光元件的第二端与该信号线连接；
所述驱动补偿模块，分别与第n扫描线、该驱动晶体管的栅极、该驱动晶体管的第一极、该驱动晶体管的第二极连接，用于当该第n扫描线输出的扫描信号有效时，控制该驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压：
所述数据写入模块，分别与第n扫描线、一数据线和所述驱动补偿模块 连接，用于当该第n扫描线输出的扫描信号有效时，控制该数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极；
每一所述行驱动发光控制模块，分别接入一发光控制信号和第二电平，并分别通过一所述信号线与该发光元件的第二端连接，用于当该发光控制信号有效时控制该信号线的电位为该第二电平。
所述驱动补偿模块，还可以用于当该发光控制信号有效并该第n扫描线输出的扫描信号无效时，控制并维持驱动晶体管的栅源电压，并控制驱动晶体管驱动发光元件发光。
可选地，所述驱动补偿模块包括第一补偿晶体管、第二补偿晶体管和存储电容；
该第一补偿晶体管，栅极接入第n扫描线，第一极与所述驱动晶体管的栅极连接，第二极与所述存储电容的第一端连接；
所述存储电容，第二端与所述驱动晶体管的第一极连接；
该第二补偿晶体管，栅极接入第n扫描线，第一极与所述第一补偿晶体管的第一极连接，第二极与所述驱动晶体管的第二极连接。
可选地，所述数据写入模块包括：数据写入晶体管，栅极接入第n扫描线，第一极与所述数据线连接，第二极与所述存储电容的第一端连接。
可选地，每一所述行驱动发光控制模块包括：行驱动发光控制晶体管，栅极接入一发光控制信号，第一极接入所述第二电平，第二极与所述信号线连接。
可选地，所述驱动晶体管、所述第二补偿晶体管、所述数据写入晶体管和所述行驱动发光控制晶体管都为n型TFT，所述第一补偿晶体管为p型TFT。
可选地，所述发光元件为有机发光二极管。
本公开还提供了一种像素电路的驱动方法，应用于上述的像素电路，所述像素电路的驱动方法包括：
阈值补偿和数据写入步骤：使本行扫描线输出的扫描信号有效而发光控制信号无效，驱动补偿模块控制驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压，数据写入模块控制该数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极；行驱动发光控制模块关闭，使所述信号线悬空，发 光元件无导通路径；
缓冲步骤：使本行扫描线和发光控制信号都无效，驱动晶体管的栅极浮空，驱动补偿模块控制并维持驱动晶体管的栅源电压，同时断开与数据写入模块的连接；
发光步骤：使发光控制信号有效而本行扫描线输出的扫描信号无效，行驱动发光控制模块控制该信号线的电位为第二电平，驱动补偿模块控制并维持驱动晶体管的栅源电压，并控制驱动晶体管驱动发光元件发光。
本公开还提供了一种显示装置，包括上述的像素电路。
与现有技术相比，本公开所述的像素电路采用行共用单元，以使得在能够补偿驱动晶体管的阈值的同时使得有效显示区内的TFT数目减少，并采用简单的控制信号，即可以使得像素的开口率增加，从而在均匀显示的同时，降低了有机发光层的电流密度，延长了AMOLED面板的使用寿命。
附图说明
图1A是现有的6T1C像素驱动电路的电路图；
图1B是现有的像素电路的结构框图；
图2是本公开实施例所述的像素电路的结构图；
图3是本公开实施例所述的像素电路包括的相互连接的子像素单元和行驱动发光控制模块的结构框图；
图4是本公开实施例所述的像素电路包括的相互连接的子像素单元和行驱动发光控制模块的电路图；
图5是包括如图4所示的相互连接的子像素单元和行驱动发光控制模块的工作时序图；
图6A、图6B、图6C分别是如图4所示的电路在第一阶段、第二阶段、第三阶段的等效电路图。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
本公开所有实施例中采用的晶体管均可以为薄膜晶体管或场效应管或其他特性相同的器件。在本公开实施例中，为区分晶体管除栅极之外的两极，其中第一极可以为源极或漏极，第二极可以为漏极或源极。此外，按照晶体管的特性区分可以将晶体管分为n型晶体管或p型晶体管。在本公开实施例提供的驱动电路中，可以想到的是无论采用n型晶体管还是采用p型晶体管均是本领域技术人员可在没有做出创造性劳动前提下轻易想到的，因此也是在本公开的实施例保护范围内的。
本公开实施例所述的像素电路，包括多行像素单元，每一行像素单元包括多个子像素单元，每一该子像素单元均包括发光元件；所述的像素电路还包括行共用单元，该行共用单元包括多个行驱动发光控制模块；
每一行像素单元包括的多个子像素单元均与一信号线连接；
每一所述行驱动发光控制模块分别接入一发光控制信号；
一所述行驱动发光控制模块与一所述行像素单元包括的每一子像素单元均通过该信号线连接，以在该发光控制信号的控制下驱动发光元件发光。
在具体实施时，每一所述子像素单元包括子像素驱动电路和发光元件。该发光元件例如可以为OLED(有机发光二极管)。
本公开该实施例所述的像素电路采用行共用单元，以使得在能够补偿驱动晶体管的阈值的同时使得有效显示区内的TFT数目减少，并采用简单的发光控制信号，即可以使得像素的开口率增加，从而在均匀显示的同时，降低了有机发光层的电流密度，延长了AMOLED面板的使用寿命。
可选地，所述子像素单元设置于有效显示区内，所述行共用单元设置于有效显示区外。通过将每一行像素单元中的具有共性的电路设置于有效显示区外，以进一步减小有效显示区内的TFT数目，增加开口率。
可选的，第n行像素单元包括的每一所述子像素单元均包括子像素驱动电路和发光元件；其中n为正整数并且n小于或等于所述像素电路包括的像素单元的总行数。
该子像素驱动电路包括驱动补偿模块、数据写入模块和驱动晶体管。
该驱动晶体管，第一极与所述发光元件的第一端连接，第二极接入第一电平；所述发光元件的第二端与该信号线连接。
所述驱动补偿模块，分别与第n扫描线、该驱动晶体管的栅极、该驱动晶体管的第一极、该驱动晶体管的第二极连接，用于在一时间周期的第一阶段，当该第n扫描线输出的扫描信号有效时，控制该驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压。
所述数据写入模块，分别与第n扫描线、一数据线和所述驱动补偿模块连接，用于当该第n扫描线输出的扫描信号有效时，控制该数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极。
每一所述行驱动发光控制模块，分别接入一发光控制信号和第二电平，并分别通过一所述信号线与该发光元件的第二端连接，用于当该发光控制信号有效时控制该信号线的电位为该第二电平。
所述驱动补偿模块，还可以用于当该发光控制信号有效并该第n扫描线输出的扫描信号无效时，控制并维持驱动晶体管的栅源电压，并控制驱动晶体管驱动发光元件发光。
具体的，本公开实施例所述的像素电路，包括L行像素单元，每一行像素单元包括M个子像素单元；第n行像素单元包括的M个子像素单元都与第n扫描线连接；每一行像素单元包括的第k子像素单元都与第k数据线连接；L和M为大于1的整数，n为小于或等于L的正整数，k为小于或等于M的正整数；
如图2所示，Data_1是第一数据线，Data_k-1是第k-1数据线，Data_k是第k数据线，Data_k+1是第k+1数据线，Data_M是第M数据线；
在图2中，VL_1是与第1行像素单元包括的多个子像素单元连接的信号线；VL_n-1是与第n-1行像素单元包括的多个子像素单元连接的信号线，VL_n是与第n行像素单元包括的多个子像素单元连接的信号线，VL_n+1是与第n+1行像素单元包括的多个子像素单元连接的信号线，VL_L是与第L行像素单元包括的多个子像素单元连接的信号线；
在本实施例中，在图2所示的像素电路中，每个所述子像素单元都为4T1C子像素单元。
具体的，以行共用单元包括的一行驱动发光控制模块与第n行像素单元包括的一子像素单元的连接为例说明如下：
如图3所示，所述子像素单元包括子像素驱动电路和有机发光二极管OLED，该子像素驱动电路包括驱动晶体管DTFT、驱动补偿模块31和数据写入模块32；
数据线Data输出数据电压Vdata；
所述驱动晶体管DTFT，第一极与OLED的阳极连接，第二极接入高电平VDD；
所述OLED的阴极与信号线VL连接；
所述驱动补偿模块31，分别与第n扫描线Scan_n、该驱动晶体管DTFT的栅极、该驱动晶体管DTFT的第一极、该驱动晶体管DTFT的第二极连接，用于当该第n扫描线Scan_n输出的扫描信号有效时，控制该驱动晶体管DTFT的栅源电压补偿该驱动晶体管DTFT的阈值电压Vth；
所述数据写入模块32，分别与第n扫描线Scan_n、一数据线Data和所述驱动补偿模块31连接，用于当该第n扫描线Scan_n输出的扫描信号有效时，控制该数据线Data上的数据电压Vdata通过该驱动补偿模块31写入该驱动晶体管DTFT的栅极；
每一行驱动发光控制模块33，分别接入一发光控制信号EM_n和低电平VSS，并分别通过一所述信号线VL与一该OLED的阴极连接，用于当该发光控制信号EM_n有效时控制该信号线VL的电位为低电平VSS。
所述驱动补偿模块31，还用于当该发光控制信号EM_n有效和该第n扫描线Scan_n输出的扫描信号无效时，控制维持所述驱动晶体管DTFT的栅极的电位，并控制驱动晶体管DTFT驱动OLED发光。
在如图3所示的具体实施例中，DTFT为n型TFT。但可以理解的是，DTFT的类型并不限于此，DTFT也可以为p型。
在一个实施例中，所述驱动补偿模块包括第一补偿晶体管、第二补偿晶体管和存储电容；
该第一补偿晶体管，栅极接入第n扫描线，第一极与所述驱动晶体管的栅极连接，第二极与所述存储电容的第一端连接；
该第二补偿晶体管，栅极接入第n扫描线，第一极与所述第一补偿晶体管的第一极连接，第二极与所述驱动晶体管的第二极连接；
所述存储电容，第二端与所述驱动晶体管的第一极连接。
具体的，如图4所示，所述驱动晶体管DTFT，第一极与OLED的阳极连接，第二极接入高电平VDD；OLED的阴极与信号线VL连接。
所述低电平VSS可以为地电平GND。
所述驱动补偿模块可以包括第一补偿晶体管T1、第二补偿晶体管T2和存储电容Cs；
该第一补偿晶体管T1，栅极接入第n扫描线Scan_n，第一极与所述所述驱动晶体管DTFT的栅极连接，第二极与所述存储电容Cs的第一端A连接；
所述存储电容Cs，第二端B与所述驱动晶体管DTFT的第一极连接；
该第二补偿晶体管T2，栅极与第n扫描线Scan_n连接，第一极与所述第一补偿晶体管T1的第一极连接，第二极与所述驱动晶体管DTFT的第二极连接。
所述数据写入模块可以包括：数据写入晶体管T3，栅极接入第n扫描线Scan_n，第一极与所述数据线Data连接，第二极与所述存储电容Cs的第一端A连接。
每一所述行驱动发光控制模块可以包括：行驱动发光控制晶体管T4，栅极接入一发光控制信号EM_n，第一极接入地电平GND，第二极与所述信号线VL连接。
在图4中，C点为与DTFT的栅极连接的点，DTFT、T2、T3和T4都为n型TFT，T1为p型TFT。
在如图4所示的实施例中，包括DTFT、T1、T2、T3、Cs和OLED的子像素单元设置于有效显示区内，包括T4的行驱动发光控制模块设置于有效显示区外，并且同一行像素单元的多个子像素单元都与该行驱动发光控制模块连接，以具有阈值补偿功能。
在具体实施时，并不仅限于以上的实施例，只需采用包括多个行驱动发光控制模块的行共用单元即可达到减少有效显示区内的TFT的目的，可以使得像素尺寸缩小。
如图4所示的实施例的操作时序如图5所示，分成三个阶段：
在第一阶段(阈值电压补偿和数据电压写入阶段)：Scan_n输出高电平， EM_n输出低电平，共用的行驱动发光控制管T4关闭，子像素驱动电路的VL悬空，OLED无导通路径。Scan_n为高电平，T2和T3都开启，T1关闭，子像素驱动电路的等效电路如图6A所示；此时，DTFT为一个进入饱和状态的二极管，数据电压Vdata写入，Cs的第一端A的电位VA＝Vdata，Cs的第二端B的电位VB为VDD-Vth，Cs的第一端A的电位和Cs的第二端B的电位之间的差值VCs＝VA-VB＝Vdata-VDD+Vth；
在第二阶段(缓冲阶段)：Scan_n输出低电平，EM_n输出低电平，T4关闭，信号线VL悬空，OLED无导通路径；Scan_n输出低电平，T2和T3关闭，T1开启，子像素驱动电路的等效电路如图6B所示；没有电压从数据线输入，DTFT的栅极浮空，Cs的A端和C点(与DTFT的栅极连接的点)相连，Cs没有充电或放电的路径，Cs两端的电压保持不变，C点的电位VC与VA相等，DTFT的栅源电压Vgs＝VCB＝VAB＝VCs＝Vdata-VDD+Vth；
在第三阶段(OLED发光阶段)：Scan_n输出低电平，EM_n输出高电平，T4开启，信号线VL通过T4接地，从而使DTFT和OLED形成导通路径，子像素驱动电路的等效电路如图6C所示；T2和T3关闭，T1开启，Cs没有充电或放电的路径，因此Cs两端的电压保持不变，即DTFT的栅源电压保持不变，Vgs＝Vdata-VDD+Vth，因此流过OLED的电流为I＝K(Vdata-VDD)2，K为与工艺和设计相关的常数，如此消除了DTFT的Vth不均匀和漂移的影响，同时消除了OLED的开启电压Vth_oled退化的影响，这样就可以改善电流的均匀性，达到亮度的均匀；
同时由于子像素驱动电路中控制信号简单、部分TFT共用，基本子像素单元为4T1C子像素单元，共用行驱动发光控制晶体管，通过较少的TFT和简单的控制信号，实现阈值电压补偿功能，同时简化像素电路。
本公开还提供了一种像素电路的驱动方法，应用于上述的像素电路，所述像素电路的驱动方法包括：
阈值补偿和数据写入步骤：使本行扫描线输出的扫描信号有效(例如为高电平)而发光控制信号无效(例如，为低电平)，驱动补偿模块控制驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压，数据写入模块控制该数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极；行驱动发光控 制模块关闭，使所述信号线悬空，发光元件无导通路径；
缓冲步骤：使本行扫描线和发光控制信号都无效，驱动晶体管的栅极浮空，驱动补偿模块控制并维持驱动晶体管的栅源电压，同时断开与数据写入模块的连接；
发光步骤：使发光控制信号有效而本行扫描线输出的扫描信号无效，行驱动发光控制模块控制该信号线的电位为第二电平，驱动补偿模块控制并维持驱动晶体管的栅源电压，并控制驱动晶体管驱动发光元件发光。
本公开实施例还提供一种显示装置，包括上述的像素电路。所述显示装置可以包括液晶显示装置，例如液晶面板、液晶电视、手机、液晶显示器。除了液晶显示装置外，所述显示装置还可以包括有机发光显示器或者其他类型的显示装置，比如电子阅读器等。
以上说明对本公开而言只是说明性的，而非限制性的，本领域普通技术人员理解，在不脱离所附权利要求所限定的精神和范围的情况下，可做出许多修改、变化或等效，但都将落入本公开的保护范围内。

Claims (11)

  1. 一种像素电路，包括多行像素单元，每一行像素单元包括多个子像素单元，每一该子像素单元均包括发光元件；所述像素电路还包括行共用单元，该行共用单元包括多个行驱动发光控制模块；
    每一行像素单元包括的多个子像素单元均与一信号线连接；
    每一所述行驱动发光控制模块分别接入一发光控制信号；
    一所述行驱动发光控制模块与一所述行像素单元包括的每一子像素单元均通过该信号线连接，以在该发光控制信号的控制下驱动该子像素单元包括的发光元件发光。
  2. 如权利要求1所述的像素电路，其中，所述子像素单元设置于有效显示区内，所述行共用单元设置于有效显示区外。
  3. 如权利要求1或2所述的像素电路，其中，第n行像素单元包括的每一所述子像素单元均包括子像素驱动电路；其中n为正整数并且n小于或等于所述像素电路包括的像素单元的总行数；
    该子像素驱动电路包括驱动补偿模块、数据写入模块和驱动晶体管；
    该驱动晶体管，第一极与所述发光元件的第一端连接，第二极接入第一电平；所述发光元件的第二端与该信号线连接；
    所述驱动补偿模块，分别与第n扫描线、该驱动晶体管的栅极、该驱动晶体管的第一极、该驱动晶体管的第二极连接，用于当该第n扫描线输出的扫描信号有效时，控制该驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压；
    所述数据写入模块，分别与第n扫描线、一数据线和所述驱动补偿模块连接，用于当该第n扫描线输出的扫描信号有效时，控制该数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极；
    每一所述行驱动发光控制模块，分别接入一发光控制信号和第二电平，并分别通过一所述信号线与该发光元件的第二端连接，用于当该发光控制信号有效时控制该信号线的电位为该第二电平。
  4. 如权利要求3所述的像素电路，其中，
    所述驱动补偿模块，还用于当该发光控制信号有效并该第n扫描线输出的 扫描信号无效时，控制并维持驱动晶体管的栅源电压，并控制驱动晶体管驱动发光元件发光。
  5. 如权利要求4所述的像素电路，其中，所述驱动补偿模块包括第一补偿晶体管、第二补偿晶体管和存储电容；
    该第一补偿晶体管，栅极接入第n扫描线，第一极与所述驱动晶体管的栅极连接，第二极与所述存储电容的第一端连接；
    所述存储电容，第二端与所述驱动晶体管的第一极连接；
    该第二补偿晶体管，栅极接入第n扫描线，第一极与所述第一补偿晶体管的第一极连接，第二极与所述驱动晶体管的第二极连接。
  6. 如权利要求5所述的像素电路，其中，所述数据写入模块包括：数据写入晶体管，栅极接入第n扫描线，第一极与所述数据线连接，第二极与所述存储电容的第一端连接。
  7. 如权利要求5所述的像素电路，其中，每一所述行驱动发光控制模块包括：行驱动发光控制晶体管，栅极接入一发光控制信号，第一极接入所述第二电平，第二极与所述信号线连接。
  8. 如权利要求7所述的像素电路，其中，所述驱动晶体管、所述第二补偿晶体管、所述数据写入晶体管和所述行驱动发光控制晶体管都为n型TFT，所述第一补偿晶体管为p型TFT。
  9. 如权利要求1-8任一所述的像素电路，其中，所述发光元件为有机发光二极管。
  10. 一种像素电路的驱动方法，应用于如权利要求3至7中任一权利要求所述的像素电路，其中，所述像素电路的驱动方法包括：
    阈值补偿和数据写入步骤：使本行扫描线输出的扫描信号有效而发光控制信号无效，驱动补偿模块控制驱动晶体管的栅源电压补偿该驱动晶体管的阈值电压，数据写入模块控制该数据线上的数据电压通过该驱动补偿模块写入该驱动晶体管的栅极；行驱动发光控制模块关闭，使所述信号线悬空，发光元件无导通路径；
    缓冲步骤：使本行扫描线和发光控制信号都无效，驱动晶体管的栅极浮空，驱动补偿模块控制并维持驱动晶体管的栅源电压，同时断开与数据写入 模块的连接；
    发光步骤：使发光控制信号有效而本行扫描线输出的扫描信号无效，行驱动发光控制模块控制该信号线的电位为第二电平，驱动补偿模块控制并维持驱动晶体管的栅源电压，并控制驱动晶体管驱动发光元件发光。
  11. 一种显示装置，包括如权利要求1至9中任一权利要求所述的像素电路。
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CN104157238B (zh) 2016-08-17
US20160365032A1 (en) 2016-12-15

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