WO2018076719A1 - 像素驱动电路及其驱动方法、显示面板和显示装置 - Google Patents

像素驱动电路及其驱动方法、显示面板和显示装置 Download PDF

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WO2018076719A1
WO2018076719A1 PCT/CN2017/088938 CN2017088938W WO2018076719A1 WO 2018076719 A1 WO2018076719 A1 WO 2018076719A1 CN 2017088938 W CN2017088938 W CN 2017088938W WO 2018076719 A1 WO2018076719 A1 WO 2018076719A1
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Prior art keywords
transistor
node
pole
level
module
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PCT/CN2017/088938
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English (en)
French (fr)
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杨盛际
董学
薛海林
陈小川
王海生
赵卫杰
刘英明
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京东方科技集团股份有限公司
北京京东方光电科技有限公司
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Priority to US15/737,255 priority Critical patent/US20180374417A1/en
Publication of WO2018076719A1 publication Critical patent/WO2018076719A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0814—Several active elements per pixel in active matrix panels used for selection purposes, e.g. logical AND for partial update
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0871—Several active elements per pixel in active matrix panels with level shifting
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a pixel driving circuit, a display panel including the pixel driving circuit, a display device including the display panel, and a driving method of the pixel driving circuit.
  • AMOLED active matrix organic light emitting diode
  • TFT LCD thin film transistor liquid crystal display panel
  • the active matrix organic light emitting diode display panel has the advantages of low power consumption, low production cost, self-luminescence, wide viewing angle and fast response speed.
  • active matrix OLED display panels have gradually replaced traditional LCD displays in display fields such as mobile phones, PDAs, and digital cameras.
  • TFT LCDs which use a stable voltage to control brightness
  • AMOLEDs are current-driven and require a constant current to control illumination.
  • an existing pixel driving circuit for driving OLED light emission includes a switching transistor T1, a driving transistor T2, a storage capacitor C, and a light emitting device OLED.
  • the gate of the driving transistor T2 is connected to the drain of the switching transistor T1 and one end of the storage capacitor C, the source is connected to the high voltage signal terminal Vdd and the other end of the storage capacitor C, and the drain is connected to one end of the light emitting device OLED.
  • the gate of the switching transistor T1 is connected to the scanning signal terminal Vscan, and the source is connected to the data signal terminal Vdata.
  • the other end of the light emitting device OLED is connected to the low voltage signal terminal Vss.
  • the driving transistor T2 drives the light emitting device OLED to emit light
  • the driving current is commonly controlled by the high voltage signal terminal Vdd, the data signal terminal Vdata, and the driving transistor T2.
  • the driving transistor T2 reaches saturation
  • the voltage difference between the gates, Vth is the threshold voltage, and for the P-type transistor, Vth is a negative value.
  • An object of the present disclosure is to provide a pixel driving circuit, a display panel including the pixel driving circuit, a display device including the display panel, and a driving method of the pixel driving circuit, which can at least partially alleviate or eliminate the above-mentioned existing One or more of the problems in the technology.
  • a pixel driving circuit including a driving transistor, a reset module, an energy storage module, a compensation module, a data writing module, and a light emitting module.
  • the gate of the driving transistor is connected to the third node, the first pole is connected to the first node, and the second pole is connected to the fourth node for driving the light emitting module to emit light.
  • the reset module is connected to the illuminating signal control end, the first scanning signal end, the first level end, the second level end, the first node and the second node for resetting the energy storage module.
  • the energy storage module is coupled to the first node and the second node for preserving a threshold voltage of the driving transistor.
  • the compensation module is connected to the second node, the third node, the fourth node, the first scan signal end, the second scan signal end and the second level end for performing threshold voltage compensation on the driving transistor.
  • the data writing module is connected to the data signal end, the first scanning signal end and the third node, and is configured to write the signal level input by the data signal end to the third node.
  • the light emitting module is connected to the fourth node and the second level terminal for emitting light under the driving of the driving transistor.
  • the reset module includes a first transistor and a second transistor, a gate of the first transistor is connected to the light emission control signal end, a first pole is connected to the first level end, and the second pole is connected to the first A node is connected; a gate of the second transistor is connected to the first scan signal end, a first pole is connected to the second level terminal, and a second pole is connected to the second node.
  • the energy storage module includes a storage capacitor, a first plate of the storage capacitor is coupled to the first node, and a second plate is coupled to the second node.
  • the compensation module includes a third transistor and a fifth transistor, a gate of the third transistor is connected to the second scan signal end, a first pole is connected to the second node, and the second pole is connected to the third node.
  • the nodes are connected, the gate of the fifth transistor is connected to the first scan signal end, the first pole is connected to the fourth node, and the second pole is connected to the second level terminal.
  • the data writing module includes a fourth transistor, a gate of the fourth transistor is connected to the first scan signal end, a first pole is connected to the data signal end, and a second pole is connected to the third node. .
  • the light emitting module includes an organic light emitting diode, the first end of the organic light emitting diode is connected to the fourth node, and the second end is connected to the second level end.
  • the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the driving transistor are P-type transistors, the first extreme source, the second extremely drain,
  • the first level terminal is a high level terminal, and the second level terminal is a low level terminal.
  • the transistors used in the present disclosure may each be a thin film transistor or a field effect transistor or other devices having the same characteristics. Since the source and the drain of the transistor used therein are symmetrical, the source and the drain are substantially There is no difference.
  • one of the poles is referred to as a first pole and the other pole is referred to as a second pole.
  • the transistor can be divided into an N-type and a P-type. When a P-type transistor is used, the first electrode can be the source of the P-type transistor, and the second electrode can be the drain of the P-type transistor. pole.
  • one or more of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the drive transistor may also be N-type transistors.
  • the threshold voltage component of the driving transistor is stored in the energy storage module in advance, and the driving transistor drives the light emitting module to emit light, pre-existing
  • the threshold voltage component of the driving transistor in the energy storage module is offset from the threshold voltage component in the current driving the light emitting module, thereby eliminating the influence of the change of the threshold voltage of the driving transistor in the pixel driving circuit on the luminance of the light emitting module, and ensuring driving of the light emitting module.
  • the uniformity of the current ensures the quality of the displayed picture.
  • the second scan signal end is formed by passing the first scan signal end through a NOT gate.
  • another scanning signal terminal can be realized by a combination of a scanning signal terminal and a NOT gate. From the final display panel, this can greatly reduce the number of signal lines, reduce wiring complexity, and reduce the occupation of limited wiring space, thereby facilitating miniaturization and thinning of the display panel.
  • the pixel driving circuit includes a driving transistor, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a storage capacitor, and an organic light emitting diode.
  • the gate of the driving transistor is connected to the third node, the first pole is connected to the first node, and the second pole is connected to the fourth node.
  • the gate of the first transistor is connected to the light-emitting control signal end, the first pole is connected to the first level end, and the second pole is connected to the first node.
  • the gate of the second transistor is connected to the first scan signal terminal, the first pole is connected to the second level terminal, and the second pole is connected to the second node.
  • the gate of the third transistor is connected to the second scan signal end, the first pole is connected to the second node, and the second pole is connected to the third node.
  • the gate of the fourth transistor is connected to the first scan signal end, the first pole is connected to the data signal end, and the second pole is connected to the third node.
  • the gate of the fifth transistor is connected to the first scan signal end, the first pole is connected to the fourth node, and the second pole is connected to the second level terminal.
  • the first plate of the storage capacitor is connected to the first node, and the second plate is connected to the second node.
  • the first end of the organic light emitting diode is connected to the fourth node, and the second end is connected to the second level end.
  • a display panel comprising any of the above pixel driving circuits.
  • a driving method of a pixel driving circuit includes: a reset module, an energy storage module, a driving transistor, a compensation module, a data writing module, and a light emitting module, wherein the resetting The module is connected to the illuminating signal control end, the first scanning signal end, the first level end, the second level end, the first node and the second node; the energy storage module is connected to the first node and the second node; the gate of the driving transistor Connected to the third node, the first pole is connected to the first node, the second pole is connected to the fourth node, the compensation module is connected to the second node, the third node, the fourth node, the first scanning signal end, and the second scanning signal end And the second level end is connected; the data writing module is connected to the data signal end, the first scanning signal end and the third node; the lighting module is connected to the fourth node and the second level end.
  • the pixel driving circuit driving method provided by the embodiment of the present disclosure, by storing the threshold voltage component of the driving transistor in the energy storage module in advance in the compensation phase, when When the illumination module drives the illumination module to emit light, the threshold voltage component of the drive transistor pre-stored in the energy storage module cancels the threshold voltage component of the current driving the illumination module, thereby eliminating the change of the threshold voltage of the driving transistor in the pixel driving circuit to the illumination module
  • the influence of the brightness of the light ensures the uniformity of the current driving the light-emitting module, thereby ensuring the quality of the displayed picture.
  • the reset module includes a first transistor and a second transistor.
  • the gate of the first transistor is connected to the light-emitting control signal end, the first pole is connected to the first level end, and the second pole is connected to the first node.
  • the gate of the second transistor is connected to the first scan signal terminal, the first pole is connected to the second level terminal, and the second pole is connected to the second node.
  • the compensation module includes a third transistor and a fifth transistor.
  • the gate of the third transistor is connected to the second scan signal end, the first pole is connected to the second node, and the second pole is connected to the third node.
  • the gate of the fifth transistor is connected to the first scan signal end, the first pole is connected to the fourth node, and the second pole is connected to the second level terminal.
  • the data write module includes a fourth transistor.
  • the gate of the fourth transistor is connected to the first scan signal end, the first pole is connected to the data signal end, and the second pole is connected to the third node.
  • the first transistor, the second transistor, the fourth transistor, and the fifth transistor are turned on, and the third transistor is turned off.
  • the second transistor, the fourth transistor, the fifth transistor, and the drive transistor are turned on, and the first transistor and the third transistor are turned off.
  • the first transistor, the third transistor, and the drive transistor are turned on, and the second transistor, the fourth transistor, and the fifth transistor are turned off.
  • FIG. 1 schematically illustrates a circuit diagram of a 2T1C pixel driving circuit in the prior art
  • FIG. 2 schematically illustrates a structural block diagram of a pixel driving circuit according to an embodiment of the present disclosure
  • FIG. 3 schematically illustrates a circuit diagram of a pixel driving circuit in accordance with an embodiment of the present disclosure
  • FIG. 5 schematically illustrates a signal timing diagram of the pixel driving circuit shown in FIG. 3;
  • FIG. 6-8 schematically illustrate signal flows at various times shown in FIG. 5, respectively;
  • FIG. 9 schematically illustrates a flowchart of a driving method of a pixel driving circuit according to an embodiment of the present disclosure.
  • FIG. 2 schematically illustrates a structural block diagram of a pixel driving circuit according to an embodiment of the present disclosure.
  • the pixel driving circuit includes a reset module 01, an energy storage module 02, a driving transistor DTFT, a compensation module 03, a data writing module 04, and a light emitting module 05.
  • the gate of the driving transistor DTFT is connected to the third node c, the first pole is connected to the first node a, and the second pole is connected to the fourth node d.
  • the reset module 01 is connected to the illumination signal control terminal EM, the first scan signal terminal Scan1, the first level terminal Vdd, the second level terminal Vss, the first node a and the second node b.
  • the energy storage module 02 is connected to the first node a and the second node b.
  • the compensation module 03 is connected to the second node b, the third node c, the fourth node d, the first scan signal terminal Scan1, the second scan signal terminal Scan2, and the second level terminal Vss.
  • the data writing module 04 is connected to the data signal terminal Vdata, the first scanning signal terminal Scan1, and the third node c. hair
  • the optical module 05 is connected to the fourth node d and the second level terminal Vss.
  • the reset module includes a first transistor T1 and a second transistor T2.
  • the gate of the first transistor T1 is connected to the light-emission control signal terminal EM, the first pole is connected to the first level terminal Vdd, and the second pole is connected to the first node a.
  • the gate of the second transistor T2 is connected to the first scan signal terminal Scan1, the first pole is connected to the second level terminal Vss, and the second pole is connected to the second node b.
  • the energy storage module includes a storage capacitor Cm. The first plate of the storage capacitor Cm is connected to the first node a, and the second plate is connected to the second node b.
  • the compensation module includes a third transistor T3 and a fifth transistor T5.
  • the first scan signal terminal Scan1 and the light-emission control signal terminal EM are low-powered Flat
  • the second scan signal terminal Scan2 is at a high level. Therefore, the first transistor T1, the second transistor T2, the fourth transistor T4, and the fifth transistor T5 are turned on, and the third transistor T3 is turned off.
  • the organic light emitting diode OLED does not emit light.
  • the first node a is pulled up to the high level Vdd by the first transistor T1
  • the second node b is pulled down to the low level Vss by the second transistor T2, and the level of the third node c is
  • the fourth transistor T4 is turned on to be Vdata.
  • the level of the second node b jumps to (Vdd - (Vdata + Vth)). Since the third transistor T3 is turned on, the level of the third node c is equal to the level of the second node b, that is, (Vdd - (Vdata + Vth)).
  • the current flowing through the organic light emitting diode OLED is:
  • the current flowing through the organic light emitting diode OLED is not affected by the threshold voltage Vth of the driving transistor DTFT, and thus the pixel driving circuit in the embodiment of the present disclosure completely eliminates the variation of the threshold voltage of the driving transistor in the pixel driving circuit.
  • the influence of the brightness of the module ensures the uniformity of the current driving the light-emitting module, thus ensuring display The quality of the picture.
  • An embodiment of the present disclosure provides a display panel including the above pixel driving circuit provided by an embodiment of the present disclosure.
  • the present disclosure by storing the threshold voltage component of the driving transistor in the energy storage module in advance, when the driving transistor drives the light emitting module to emit light, it is pre-existing in the energy storage module.
  • the threshold voltage component of the driving transistor is offset from the threshold voltage component of the current driving the light emitting module, thereby eliminating the influence of the change of the threshold voltage of the driving transistor in the pixel driving circuit on the luminance of the light emitting module, and ensuring the uniformity of the current driving the light emitting module. Thereby ensuring the quality of the displayed picture.
  • FIG. 9 schematically illustrates a flowchart of a driving method of a pixel driving circuit according to an embodiment of the present disclosure.
  • the pixel driving circuit includes: a reset module, an energy storage module, a driving transistor, a compensation module, a data writing module, and a light emitting module, wherein the reset module and the light emitting signal control end, the first scan signal end, and the first power a flat end, a second level end, the first node and the second node are connected; the energy storage module is connected to the first node and the second node; the gate of the driving transistor is connected to the third node, and the first pole is connected to the first node, The second pole is connected to the fourth node; the compensation module is connected to the second node, the third node, the fourth node, the first scanning signal end, the second scanning signal end and the second level end; the data writing module and the data signal end, The first scanning signal end is connected to the third node; the lighting module is connected to the fourth node and the second level end.
  • the reset module pulls up the level of the first node to the first level, and the energy storage module and the compensation module cause the level of the third node to jump to the first level minus the input signal.
  • the sum of the signal level of the terminal input and the threshold voltage of the driving transistor, and the light emitting module emits light.
  • the pixel driving circuit driving method provided by the embodiment of the present disclosure, by storing the threshold voltage component of the driving transistor in the energy storage module in advance in the compensation phase, when When the illumination module drives the illumination module to emit light, the threshold voltage component of the drive transistor pre-stored in the energy storage module cancels the threshold voltage component of the current driving the illumination module, thereby eliminating the change of the threshold voltage of the driving transistor in the pixel driving circuit to the illumination module
  • the influence of the brightness of the light ensures the uniformity of the current driving the light-emitting module, thereby ensuring the quality of the displayed picture.
  • the driving method of the pixel driving circuit is divided into three stages in FIG. 9, this is merely for the sake of simplicity and convenience of description. Moreover, although the driving method of the pixel driving circuit is shown in a flowchart, the driving method is not limited to the illustrated order. In fact, the driving method in FIG. 9 can be divided into several stages as appropriate, and the different stages can be interleaved or merged in time without departing from the spirit and scope of the present disclosure.

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  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of El Displays (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种像素驱动电路及其驱动方法、显示面板和显示装置。像素驱动电路包括：驱动晶体管（DTFT）、重置模块（01）、储能模块（02）、补偿模块（03）、数据写入模块（04）和发光模块（05）。驱动晶体管（DTFT）用于驱动发光模块（05）发光；重置模块（01）用于对储能模块（02）进行重置；储能模块（02）用于预存驱动晶体管（DTFT）的阈值电压（Vth）；补偿模块（03）用于对驱动晶体管（DTFT）进行阈值电压（Vth）补偿；数据写入模块（04）用于将数据信号端（Vdata）输入的信号电平写入到第三节点（c）；并且发光模块（05）用于在驱动晶体管（DTFT）的驱动下发光。

Description

像素驱动电路及其驱动方法、显示面板和显示装置
相关申请
本申请要求享有2016年10月26日提交的中国专利申请No.201610945383.9的优先权，其全部公开内容通过引用并入本文。
技术领域
本公开涉及显示技术领域，尤其涉及像素驱动电路、包括像素驱动电路的显示面板、包括显示面板的显示装置，以及像素驱动电路的驱动方法。
背景技术
随着显示技术的进步，越来越多的有源矩阵有机发光二极管(AMOLED)显示面板进入市场。与传统的薄膜晶体管液晶显示面板(TFT LCD)相比，有源矩阵有机发光二极管显示面板具有低能耗、生产成本低、自发光、宽视角及响应速度快等优点。目前，有源矩阵有机发光二极管显示面板在手机、PDA、数码相机等显示领域已经开始逐步取代传统的LCD显示屏。与TFT LCD利用稳定的电压来控制亮度不同，AMOLED属于电流驱动，需要稳定的电流来控制发光。
如图1所示，驱动OLED发光的现有像素驱动电路包括：开关晶体管T1、驱动晶体管T2、存储电容器C以及发光器件OLED。驱动晶体管T2的栅极与开关晶体管T1的漏极和存储电容器C的一端相连，源极与高电压信号端Vdd和存储电容器C的另一端相连，并且漏极与发光器件OLED的一端相连。开关晶体管T1的栅极与扫描信号端Vscan相连，源极与数据信号端Vdata相连。发光器件OLED的另一端与低电压信号端Vss相连。当驱动晶体管T2驱动发光器件OLED发光时，驱动电流由高电压信号端Vdd、数据信号端Vdata以及驱动晶体管T2共同控制。以P型晶体管为例，当驱动晶体管T2达到饱和时，流过发光器件OLED的电流为IOLED＝K(VSG-Vth)2，其中K为常数，VSG为驱动晶体管T2的源极和栅极之间的电压差，Vth为阈值电压，对于P型晶体管而言，Vth为负值。
在实际使用中，OLED的发光亮度对其驱动电流的变化相当敏感。 不幸的是，由于驱动晶体管T2在制作过程中无法做到完全一致，另外还由于工艺制程和器件老化，以及工作过程中温度的变化等原因，各像素驱动电路中的驱动晶体管T2的阈值电压Vth存在不均匀性，这样就导致流过每个像素点OLED的电流发生变化，使得显示亮度不均，从而影响整个图像的显示效果。
因此，如何消除像素驱动电路中驱动晶体管阈值电压的变化对发光器件的发光亮度的影响，保证驱动发光器件OLED的电流的均一性，从而保证显示画面的质量，是本领域技术人员亟待解决的问题。
发明内容
本公开的一个目的在于提供一种像素驱动电路、包括像素驱动电路的显示面板、包括显示面板的显示装置，以及像素驱动电路的驱动方法，其能够至少部分地缓解或消除以上提到的现有技术中的问题中的一个或多个。
根据本公开的第一方面，提供了一种像素驱动电路，包括：驱动晶体管、重置模块、储能模块、补偿模块、数据写入模块和发光模块。驱动晶体管的栅极与第三节点相连，第一极与第一节点相连，第二极与第四节点相连，用于驱动发光模块发光。重置模块与发光信号控制端、第一扫描信号端、第一电平端、第二电平端、第一节点和第二节点相连，用于对储能模块进行重置。储能模块与第一节点和第二节点相连，用于预存驱动晶体管的阈值电压。补偿模块与第二节点、第三节点、第四节点、第一扫描信号端、第二扫描信号端和第二电平端相连，用于对驱动晶体管进行阈值电压补偿。数据写入模块与数据信号端、第一扫描信号端和第三节点相连，用于将数据信号端输入的信号电平写入到第三节点。发光模块与第四节点和第二电平端相连，用于在驱动晶体管的驱动下发光。
在一些实施例中，所述重置模块包括第一晶体管和第二晶体管，所述第一晶体管的栅极与发光控制信号端相连，第一极与第一电平端相连，第二极与第一节点相连；所述第二晶体管的栅极与第一扫描信号端相连，第一极与第二电平端相连，第二极与第二节点相连。
在一些实施例中，所述储能模块包括储能电容器，所述储能电容器的第一极板与第一节点相连，第二极板与第二节点相连。
在一些实施例中，所述补偿模块包括第三晶体管和第五晶体管，所述第三晶体管的栅极与第二扫描信号端相连，第一极与第二节点相连，第二极与第三节点相连，所述第五晶体管的栅极与第一扫描信号端相连，第一极与第四节点相连，第二极与第二电平端相连。
在一些实施例中，所述数据写入模块包括第四晶体管，所述第四晶体管的栅极与第一扫描信号端相连，第一极与数据信号端相连，第二极与第三节点相连。
在一些实施例中，所述发光模块包括有机发光二极管，所述有机发光二极管的第一端与第四节点相连，第二端与第二电平端相连。
在一些实施例中，第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管和驱动晶体管为P型晶体管，所述第一极为源极，所述第二极为漏极，所述第一电平端为高电平端，并且所述第二电平端为低电平端。
需要说明的是，本公开中采用的晶体管均可以为薄膜晶体管或场效应管或其它特性相同的器件，由于其中采用的晶体管的源极、漏极是对称的，所以其源极、漏极实质上没有区别。在本公开中，为区分晶体管除栅极之外的两极，将其中一极称为第一极，将另一极称为第二极。此外，按照晶体管的特性区分可以将晶体管分为N型和P型，当采用P型晶体管时，第一极可以是该P型晶体管的源极，第二极则可以是该P型晶体管的漏极。然而，如本领域技术人员将领会到的，第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管和驱动晶体管中的一个或多个也可以为N型晶体管。
相较于现有技术中的像素驱动电路，在本公开实施例提供的像素驱动电路中，通过预先在储能模块中存储驱动晶体管的阈值电压成分，当驱动晶体管驱动发光模块发光时，预存在储能模块中的驱动晶体管的阈值电压成分与驱动发光模块的电流中的阈值电压成分抵消，从而消除像素驱动电路中驱动晶体管阈值电压的变化对发光模块的发光亮度的影响，保证驱动发光模块的电流的均一性，从而保证显示画面的质量。
在一些实施例中，第二扫描信号端通过使第一扫描信号端经过非门形成。
由于第一扫描信号端上的信号与第二扫描信号端上的信号相反， 因此可以通过一个扫描信号端和非门的组合来实现另一扫描信号端。从最终得到的显示面板来看，这样做能够大大减少信号线数目，降低布线复杂度，减少有限的布线空间的占用，因而有利于显示面板的小型化和轻薄化。
在一些实施例中，像素驱动电路包括驱动晶体管、第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管、储能电容器和有机发光二极管。驱动晶体管的栅极与第三节点相连，第一极与第一节点相连，第二极与第四节点相连。第一晶体管的栅极与发光控制信号端相连，第一极与第一电平端相连，第二极与第一节点相连。第二晶体管的栅极与第一扫描信号端相连，第一极与第二电平端相连，第二极与第二节点相连。第三晶体管的栅极与第二扫描信号端相连，第一极与第二节点相连，第二极与第三节点相连。第四晶体管的栅极与第一扫描信号端相连，第一极与数据信号端相连，第二极与第三节点相连。第五晶体管的栅极与第一扫描信号端相连，第一极与第四节点相连，第二极与第二电平端相连。储能电容器的第一极板与第一节点相连，第二极板与第二节点相连。有机发光二极管的第一端与第四节点相连，第二端与第二电平端相连。
根据本公开的第二方面，提供了一种显示面板，包括上述任一种像素驱动电路。
根据本公开的第三方面，提供了一种显示装置，包括上述显示面板。
根据本公开的第四方面，提供了一种像素驱动电路的驱动方法，其中像素驱动电路包括：重置模块、储能模块、驱动晶体管、补偿模块、数据写入模块和发光模块，其中重置模块与发光信号控制端、第一扫描信号端、第一电平端、第二电平端、第一节点和第二节点相连；储能模块与第一节点和第二节点相连；驱动晶体管的栅极与第三节点相连，第一极与第一节点相连，第二极与第四节点相连；补偿模块与第二节点、第三节点、第四节点、第一扫描信号端、第二扫描信号端和第二电平端相连；数据写入模块与数据信号端、第一扫描信号端和第三节点相连；发光模块与第四节点和第二电平端相连。所述方法包括：在重置和充电阶段，所述重置模块将第一节点的电平上拉至第一电平，并且将第二节点的电平下拉至第二电平，所述数据写入模块将 输入信号端输入的信号电平写入到第三节点；在放电阶段，所述储能模块通过驱动晶体管和补偿模块放电，使得第一节点的电平为输入信号端输入的信号电平与驱动晶体管的阈值电压之和，并且所述重置模块将第二节点的电平下拉至第二电平；以及在补偿和发光阶段，所述重置模块将第一节点的电平上拉至第一电平，所述储能模块和所述补偿模块使第三节点的电平跳变至第一电平减去输入信号端输入的信号电平与驱动晶体管的阈值电压之和，并且所述发光模块发光。
相较于现有技术中的像素驱动电路的驱动方法，在本公开实施例提供的像素驱动电路驱动方法中，通过在补偿阶段中将驱动晶体管的阈值电压成分预先存储在储能模块中，当在发光阶段驱动发光模块发光时，预存在储能模块中的驱动晶体管的阈值电压成分与驱动发光模块的电流中的阈值电压成分抵消，从而消除像素驱动电路中驱动晶体管阈值电压的变化对发光模块的发光亮度的影响，保证驱动发光模块的电流的均一性，从而保证显示画面的质量。
在一些实施例中，重置模块包括第一晶体管和第二晶体管。第一晶体管的栅极与发光控制信号端相连，第一极与第一电平端相连，第二极与第一节点相连。第二晶体管的栅极与第一扫描信号端相连，第一极与第二电平端相连，第二极与第二节点相连。补偿模块包括第三晶体管和第五晶体管。第三晶体管的栅极与第二扫描信号端相连，第一极与第二节点相连，第二极与第三节点相连。第五晶体管的栅极与第一扫描信号端相连，第一极与第四节点相连，第二极与第二电平端相连。数据写入模块包括第四晶体管。第四晶体管的栅极与第一扫描信号端相连，第一极与数据信号端相连，第二极与第三节点相连。在重置和充电阶段，第一晶体管、第二晶体管、第四晶体管和第五晶体管导通，并且第三晶体管关断。
在一些实施例中，在放电阶段，第二晶体管、第四晶体管、第五晶体管和驱动晶体管导通，并且第一晶体管和第三晶体管关断。
在一些实施例中，在补偿和发光阶段，第一晶体管、第三晶体管和驱动晶体管导通，并且第二晶体管、第四晶体管和第五晶体管关断。
应当指出的是，本公开的第二、第三和第四方面具有与本公开的第一方面类似或相同的示例实现和益处，在此不再赘述。
本公开的这些和其它方面将从以下描述的实施例显而易见并且将 参照以下描述的实施例加以阐述。
附图说明
图1示意性地图示了现有技术中的2T1C像素驱动电路的电路图；
图2示意性地图示了根据本公开的实施例的像素驱动电路的结构框图；
图3示意性地图示了根据本公开的实施例的像素驱动电路的电路图；
图4示意性地图示了根据本公开的另一实施例的像素驱动电路的电路图；
图5示意性地图示了图3中所示的像素驱动电路的信号时序图；
图6-8分别示意性地图示了图5中所示的各时刻处的信号流动；以及
图9示意性地图示了根据本公开的实施例的像素驱动电路的驱动方法的流程图。
具体实施方式
以下将结合附图详细描述本公开的示例性实施例。附图是示意性的，并未按比例绘制，且只是为了说明本公开的实施例而并不意图限制本公开的保护范围。在附图中，相同的附图标记表示相同或相似的部分。为了使本公开的技术方案更加清楚，本领域熟知的工艺步骤及器件结构在此省略。
图2示意性地图示了根据本公开的实施例的像素驱动电路的结构框图。如图2所示，像素驱动电路包括重置模块01、储能模块02、驱动晶体管DTFT、补偿模块03、数据写入模块04和发光模块05。驱动晶体管DTFT的栅极与第三节点c相连，第一极与第一节点a相连，并且第二极与第四节点d相连。重置模块01与发光信号控制端EM、第一扫描信号端Scan1、第一电平端Vdd、第二电平端Vss、第一节点a和第二节点b相连。储能模块02与第一节点a和第二节点b相连。补偿模块03与第二节点b、第三节点c、第四节点d、第一扫描信号端Scan1、第二扫描信号端Scan2和第二电平端Vss相连。数据写入模块04与数据信号端Vdata、第一扫描信号端Scan1和第三节点c相连。发 光模块05与第四节点d和第二电平端Vss相连。
具体地，如图3所示，重置模块包括第一晶体管T1和第二晶体管T2。第一晶体管T1的栅极与发光控制信号端EM相连，第一极与第一电平端Vdd相连，第二极与第一节点a相连。第二晶体管T2的栅极与第一扫描信号端Scan1相连，第一极与第二电平端Vss相连，第二极与第二节点b相连。储能模块包括储能电容器Cm。储能电容器Cm的第一极板与第一节点a相连，第二极板与第二节点b相连。补偿模块包括第三晶体管T3和第五晶体管T5。第三晶体管T3的栅极与第二扫描信号端Scan2相连，第一极与第二节点b相连，第二极与第三节点c相连。第五晶体管T5的栅极与第一扫描信号端Scan1相连，第一极与第四节点d相连，第二极与第二电平端Vss相连。数据写入模块包括第四晶体管T4。第四晶体管T4的栅极与第一扫描信号端Scan1相连，第一极与数据信号端Vdata相连，第二极与第三节点c相连。发光模块包括有机发光二极管OLED。有机发光二极管OLED的第一端与第四节点d相连，第二端与第二电平端Vss相连。
图4示意性地图示了根据本公开的另一实施例的像素驱动电路的电路图。与图3中所示的像素驱动电路不同的是，在图4中，第二扫描信号端通过使第一扫描信号端Scan1经过非门M1形成。由于第一扫描信号端Scan1上的信号与第二扫描信号端上的信号相反，因此可以通过第一扫描信号端Scan1和非门M1的组合来实现第二扫描信号端。从最终得到的显示面板来看，这样做能够大大减少信号线数目，降低布线复杂度，减少有限的布线空间的占用，因而有利于显示面板的小型化和轻薄化。
图5图示了图3中所示的像素驱动电路的信号时序图，并且图6-8分别示意性地图示了图5中所示的各时刻处的信号流动。以下描述以第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5和驱动晶体管DTFT均为P型晶体管、第一电平端Vdd为高电平端、第二电平端Vss为低电平端为例。然而，如本领域技术人员将领会到的，本公开中所提供的像素驱动电路也可以使用N型晶体管，此时第一电平端Vdd为低电平端，并且第二电平端Vss为高电平端。
在t1时刻，第一扫描信号端Scan1和发光控制信号端EM为低电 平，第二扫描信号端Scan2为高电平。因此，第一晶体管T1、第二晶体管T2、第四晶体管T4和第五晶体管T5导通，并且第三晶体管T3关断。有机发光二极管OLED不发光。此时，如图6所示，第一节点a被第一晶体管T1上拉至高电平Vdd，第二节点b被第二晶体管T2下拉至低电平Vss，并且第三节点c的电平由于第四晶体管T4导通而为Vdata。
在t2时刻，第一扫描信号端Scan1为低电平，第二扫描信号端Scan2和发光控制信号端EM为高电平。因此，第二晶体管T2、第四晶体管T4、第五晶体管T5和驱动晶体管DTFT导通，并且第一晶体管T1和第三晶体管T3关断。由于第五晶体管T5导通，因此有机发光二极管OLED被短接而不发光。此时，如图7所示，储能电容器Cm通过驱动晶体管DTFT和第五晶体管T5放电，使得第一节点a的电平为Vdata+Vth，Vth为驱动晶体管DTFT的阈值电压。第二节点b由于第二晶体管T2导通而仍旧保持低电平Vss。此时，储能电容器Cm的两个极板之间的电压差为Vdata+Vth。
在t3时刻，第一扫描信号端Scan1为高电平，第二扫描信号端Scan2和发光控制信号端EM为低电平。因此，第一晶体管T1、第三晶体管T3和驱动晶体管DTFT导通，并且第二晶体管T2、第四晶体管T4和第五晶体管T5关断。由于第五晶体管T5关断并且驱动晶体管DTFT导通，因此有机发光二极管OLED发光。此时，如图8所示，由于第一晶体管T1导通，因此第一节点a的电平再次被上拉至Vdd，而第二节点b由于第二晶体管T2关断而浮接。由于储能电容器Cm要保持两个极板之间的电压差Vdata+Vth不变，因此第二节点b的电平跳至(Vdd-(Vdata+Vth))。由于第三晶体管T3导通，因此第三节点c的电平与第二节点b的电平相等，即为(Vdd-(Vdata+Vth))。
在有机发光二极管OLED导通的t3时刻，根据驱动晶体管DTFT的饱和电流公式，流过有机发光二极管OLED的电流为：
IOLED＝K(VSG-Vth)2＝K[Vdd-(Vdd-(Vdata+Vth))-Vth]2＝K·Vdata2。
由此可见，流过有机发光二极管OLED的电流不受驱动晶体管DTFT的阈值电压Vth的影响，因而本公开的实施例中的像素驱动电路彻底消除了像素驱动电路中驱动晶体管阈值电压的变化对发光模块的发光亮度的影响，保证驱动发光模块的电流的均一性，从而保证显示 画面的质量。
本公开实施例提供了一种显示面板，包括本公开实施例提供的上述像素驱动电路。
本公开实施例还提供了一种显示装置，包括本公开实施例提供的上述显示面板。该显示装置可以是手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
相较于现有技术中的显示面板和显示装置，在本公开中，通过预先在储能模块中存储驱动晶体管的阈值电压成分，当驱动晶体管驱动发光模块发光时，预存在储能模块中的驱动晶体管的阈值电压成分与驱动发光模块的电流中的阈值电压成分抵消，从而消除像素驱动电路中驱动晶体管阈值电压的变化对发光模块的发光亮度的影响，保证驱动发光模块的电流的均一性，从而保证显示画面的质量。
图9示意性地图示了根据本公开实施例的像素驱动电路的驱动方法的流程图。结合图2，像素驱动电路包括：重置模块、储能模块、驱动晶体管、补偿模块、数据写入模块和发光模块，其中重置模块与发光信号控制端、第一扫描信号端、第一电平端、第二电平端、第一节点和第二节点相连；储能模块与第一节点和第二节点相连；驱动晶体管的栅极与第三节点相连，第一极与第一节点相连，第二极与第四节点相连；补偿模块与第二节点、第三节点、第四节点、第一扫描信号端、第二扫描信号端和第二电平端相连；数据写入模块与数据信号端、第一扫描信号端和第三节点相连；发光模块与第四节点和第二电平端相连。该驱动方法包括重置和充电阶段、放电阶段以及补偿和发光阶段。在重置和充电阶段S102中，重置模块将第一节点的电平上拉至第一电平，并且将第二节点的电平下拉至第二电平，所述数据写入模块将输入信号端输入的信号电平写入到第三节点。在放电阶段S104中，储能模块通过驱动晶体管和补偿模块放电，使得第一节点的电平为输入信号端输入的信号电平与驱动晶体管的阈值电压之和，并且所述重置模块将第二节点的电平下拉至第二电平。在补偿和发光阶段S106中，重置模块将第一节点的电平上拉至第一电平，储能模块和补偿模块使第三节点的电平跳变至第一电平减去输入信号端输入的信号电平与驱动晶体管的阈值电压之和，并且发光模块发光。
结合如图3所示的电路图和如图5所示的信号时序图，在重置和 充电阶段(t1时刻)，第一晶体管、第二晶体管、第四晶体管和第五晶体管导通，并且第三晶体管关断。在放电阶段(t2时刻)，第二晶体管、第四晶体管、第五晶体管和驱动晶体管导通，并且第一晶体管和第三晶体管关断。在补偿和发光阶段(t3时刻)，第一晶体管、第三晶体管和驱动晶体管导通，并且第二晶体管、第四晶体管和第五晶体管关断。
相较于现有技术中的像素驱动电路的驱动方法，在本公开实施例提供的像素驱动电路驱动方法中，通过在补偿阶段中将驱动晶体管的阈值电压成分预先存储在储能模块中，当在发光阶段驱动发光模块发光时，预存在储能模块中的驱动晶体管的阈值电压成分与驱动发光模块的电流中的阈值电压成分抵消，从而消除像素驱动电路中驱动晶体管阈值电压的变化对发光模块的发光亮度的影响，保证驱动发光模块的电流的均一性，从而保证显示画面的质量。
应当指出的是，尽管在图9中将像素驱动电路的驱动方法划分为三个阶段，但是这仅仅为了描述的简单和方便。而且，尽管以流程图示出像素驱动电路的驱动方法，但是该驱动方法不受限于所图示的顺序。事实上，图9中的驱动方法可以如适当的那样划分成若干个阶段，并且不同阶段之间可以在时间上交错或合并而不脱离于本公开的精神和范围。
尽管上文已经详细描述了几个实施例，但是其它修改是可能的。例如，以上描述的流程图不要求所描述的特定次序或顺序的次序来实现合期望的结果。可以提供其它步骤，或者可以从所描述的流中除去步骤，并且其它组件可以添加到所描述的***或者从所描述的***移除。其它实施例可以在本公开的范围内。本领域技术人员鉴于本公开的教导，可以实现众多变型和修改而不脱离于本公开的精神和范围。

Claims (16)

  1. 一种像素驱动电路，包括：驱动晶体管、重置模块、储能模块、补偿模块、数据写入模块和发光模块，其中
    所述驱动晶体管的栅极与第三节点相连，第一极与第一节点相连，第二极与第四节点相连，用于驱动发光模块发光；
    所述重置模块与发光信号控制端、第一扫描信号端、第一电平端、第二电平端、第一节点和第二节点相连，用于对储能模块进行重置；
    所述储能模块与第一节点和第二节点相连，用于预存驱动晶体管的阈值电压；
    所述补偿模块与第二节点、第三节点、第四节点、第一扫描信号端、第二扫描信号端和第二电平端相连，用于对驱动晶体管进行阈值电压补偿；
    所述数据写入模块与数据信号端、第一扫描信号端和第三节点相连，用于将数据信号端输入的信号电平写入到第三节点；并且
    所述发光模块与第四节点和第二电平端相连，用于在驱动晶体管的驱动下发光。
  2. 权利要求1所述的像素驱动电路，其中，所述重置模块包括第一晶体管和第二晶体管，所述第一晶体管的栅极与发光控制信号端相连，第一极与第一电平端相连，第二极与第一节点相连；所述第二晶体管的栅极与第一扫描信号端相连，第一极与第二电平端相连，第二极与第二节点相连。
  3. 权利要求1所述的像素驱动电路，其中，所述储能模块包括储能电容器，所述储能电容器的第一极板与第一节点相连，第二极板与第二节点相连。
  4. 权利要求1所述的像素驱动电路，其中，所述补偿模块包括第三晶体管和第五晶体管，所述第三晶体管的栅极与第二扫描信号端相连，第一极与第二节点相连，第二极与第三节点相连，所述第五晶体管的栅极与第一扫描信号端相连，第一极与第四节点相连，第二极与第二电平端相连。
  5. 权利要求1所述的像素驱动电路，其中，所述数据写入模块包括第四晶体管，所述第四晶体管的栅极与第一扫描信号端相连，第一 极与数据信号端相连，第二极与第三节点相连。
  6. 权利要求1所述的像素驱动电路，其中，所述发光模块包括有机发光二极管，所述有机发光二极管的第一端与第四节点相连，第二端与第二电平端相连。
  7. 权利要求1-6中任一项所述的像素驱动电路，其中，所述晶体管为P型晶体管，所述第一极为源极，所述第二极为漏极，所述第一电平端为高电平端，并且所述第二电平端为低电平端。
  8. 权利要求1所述的像素驱动电路，其中，所述第二扫描信号端通过使所述第一扫描信号端经过非门形成。
  9. 权利要求1所述的像素驱动电路，其中，
    所述重置模块包括第一晶体管和第二晶体管，所述第一晶体管的栅极与发光控制信号端相连，第一极与第一电平端相连，第二极与第一节点相连；所述第二晶体管的栅极与第一扫描信号端相连，第一极与第二电平端相连，第二极与第二节点相连；
    所述储能模块包括储能电容器，所述储能电容器的第一极板与第一节点相连，第二极板与第二节点相连；
    所述补偿模块包括第三晶体管和第五晶体管，所述第三晶体管的栅极与第二扫描信号端相连，第一极与第二节点相连，第二极与第三节点相连，所述第五晶体管的栅极与第一扫描信号端相连，第一极与第四节点相连，第二极与第二电平端相连；
    所述数据写入模块包括第四晶体管，所述第四晶体管的栅极与第一扫描信号端相连，第一极与数据信号端相连，第二极与第三节点相连；并且
    所述发光模块包括有机发光二极管，所述有机发光二极管的第一端与第四节点相连，第二端与第二电平端相连。
  10. 一种像素驱动电路，包括：驱动晶体管、第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管、储能电容器和有机发光二极管，
    其中，
    所述驱动晶体管的栅极与第三节点相连，第一极与第一节点相连，第二极与第四节点相连；
    所述第一晶体管的栅极与发光控制信号端相连，第一极与第一电 平端相连，第二极与第一节点相连；
    所述第二晶体管的栅极与第一扫描信号端相连，第一极与第二电平端相连，第二极与第二节点相连；
    所述第三晶体管的栅极与第二扫描信号端相连，第一极与第二节点相连，第二极与第三节点相连；
    所述第四晶体管的栅极与第一扫描信号端相连，第一极与数据信号端相连，第二极与第三节点相连；
    所述第五晶体管的栅极与第一扫描信号端相连，第一极与第四节点相连，第二极与第二电平端相连；
    所述储能电容器的第一极板与第一节点相连，第二极板与第二节点相连；并且
    所述有机发光二极管的第一端与第四节点相连，第二端与第二电平端相连。
  11. 一种显示面板，包括权利要求1-10中任一项所述的像素驱动电路。
  12. 一种显示装置，包括权利要求11所述的显示面板。
  13. 一种像素驱动电路的驱动方法，其中像素驱动电路包括：重置模块、储能模块、驱动晶体管、补偿模块、数据写入模块和发光模块，其中重置模块与发光信号控制端、第一扫描信号端、第一电平端、第二电平端、第一节点和第二节点相连；储能模块与第一节点和第二节点相连；驱动晶体管的栅极与第三节点相连，第一极与第一节点相连，第二极与第四节点相连；补偿模块与第二节点、第三节点、第四节点、第一扫描信号端、第二扫描信号端和第二电平端相连；数据写入模块与数据信号端、第一扫描信号端和第三节点相连；发光模块与第四节点和第二电平端相连，
    所述方法包括：
    在重置和充电阶段，所述重置模块将第一节点的电平上拉至第一电平，并且将第二节点的电平下拉至第二电平，所述数据写入模块将输入信号端输入的信号电平写入到第三节点；
    在放电阶段，所述储能模块通过驱动晶体管和补偿模块放电，使得第一节点的电平为输入信号端输入的信号电平与驱动晶体管的阈值电压之和，并且所述重置模块将第二节点的电平下拉至第二电平；以 及
    在补偿和发光阶段，所述重置模块将第一节点的电平上拉至第一电平，所述储能模块和所述补偿模块使第三节点的电平跳变至第一电平减去输入信号端输入的信号电平与驱动晶体管的阈值电压之和，并且所述发光模块发光。
  14. 权利要求13所述的方法，其中，
    所述重置模块包括第一晶体管和第二晶体管，所述第一晶体管的栅极与发光控制信号端相连，第一极与第一电平端相连，第二极与第一节点相连，所述第二晶体管的栅极与第一扫描信号端相连，第一极与第二电平端相连，第二极与第二节点相连；
    所述补偿模块包括第三晶体管和第五晶体管，所述第三晶体管的栅极与第二扫描信号端相连，第一极与第二节点相连，第二极与第三节点相连，所述第五晶体管的栅极与第一扫描信号端相连，第一极与第四节点相连，第二极与第二电平端相连；
    所述数据写入模块包括第四晶体管，所述第四晶体管的栅极与第一扫描信号端相连，第一极与数据信号端相连，第二极与第三节点相连，
    其中
    在所述重置和充电阶段，所述第一晶体管、第二晶体管、第四晶体管和第五晶体管导通，并且所述第三晶体管关断。
  15. 权利要求14所述的方法，其中，在所述放电阶段，所述第二晶体管、第四晶体管、第五晶体管和驱动晶体管导通，并且所述第一晶体管和第三晶体管关断。
  16. 权利要求14所述的方法，其中，在所述补偿和发光阶段，所述第一晶体管、第三晶体管和驱动晶体管导通，并且所述第二晶体管、第四晶体管和第五晶体管关断。
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