WO2008075609A1 - 半導体装置製造用の接着シート、及びそれを用いた半導体装置の製造方法 - Google Patents

半導体装置製造用の接着シート、及びそれを用いた半導体装置の製造方法 Download PDF

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Publication number
WO2008075609A1
WO2008075609A1 PCT/JP2007/074009 JP2007074009W WO2008075609A1 WO 2008075609 A1 WO2008075609 A1 WO 2008075609A1 JP 2007074009 W JP2007074009 W JP 2007074009W WO 2008075609 A1 WO2008075609 A1 WO 2008075609A1
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Prior art keywords
adhesive sheet
semiconductor device
manufacturing
resin
semiconductor element
Prior art date
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PCT/JP2007/074009
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English (en)
French (fr)
Inventor
Yasuhiro Amano
Yoshio Terada
Naohide Takamoto
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Nitto Denko Corporation
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Publication date
Application filed by Nitto Denko Corporation filed Critical Nitto Denko Corporation
Priority to US12/519,510 priority Critical patent/US20100047968A1/en
Publication of WO2008075609A1 publication Critical patent/WO2008075609A1/ja

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Definitions

  • the present invention relates to an adhesive sheet for manufacturing a semiconductor device used when a semiconductor element is bonded to an adherend and wire bonded to the semiconductor element, and a method for manufacturing a semiconductor device using the same.
  • examples of what is used when a semiconductor element is fixed to a substrate or the like include an example using a thermosetting paste resin (see, for example, JP-A-2002-179769), or a thermoplastic resin.
  • examples of using an adhesive sheet using both a fat and a thermosetting resin for example, Japanese Patent Application Laid-Open Nos. 2002-261233 and 2000-104040 have been proposed.
  • an adhesive sheet or an adhesive is used for bonding a semiconductor element to a substrate, a lead frame or a semiconductor element. Adhesion is performed after the semiconductor element and the substrate are bonded (die attach), and then the adhesive sheet is cured by a heating process. Furthermore, wire bonding is performed to electrically connect the semiconductor element and the substrate, and thereafter, molding is performed with a sealing resin, followed by post-curing and sealing of the sealing resin (for example, Japanese Patent Laid-Open No. 2002-2002). No. 179769 and JP-A-2002-261233).
  • thermosetting paste resin and the thermosetting adhesive sheet When performing the wire bonding, a semiconductor on a substrate or the like by ultrasonic vibration or heating. Body element moves. For this reason, conventionally, it has been necessary to heat and cure the thermosetting paste resin and the thermosetting adhesive sheet before the wire bonding, and to fix the semiconductor element so that it moves.
  • the thickness of semiconductor devices has been reduced from the conventional 200 to less than that, and further to 100 m or less.
  • the semiconductor element may be warped. Therefore, a gap may be generated between the semiconductor element after die attachment and the adherend.
  • the heat history in the wire bonding process becomes longer due to the multi-layer stacking of chips and the increase in the number of pins, and the adhesive sheet hardens. It becomes easy to form voids. If a semiconductor device is manufactured while leaving a void, the reliability of the device will be reduced.
  • the present invention has been made in view of the above-described problems, and an object of the present invention is to manufacture a highly reliable semiconductor device without improving a conventional manufacturing process while improving heat resistance.
  • a semiconductor device manufacturing method, an adhesive sheet used in the method, and a semiconductor device obtained by the method are provided.
  • the inventors of the present application have studied an adhesive sheet for manufacturing a semiconductor device that can solve the above-described conventional problems, and a method for manufacturing a semiconductor device using the same. As a result, the inventors have found that the object can be achieved by adopting the following configuration, and have completed the present invention.
  • an adhesive sheet for manufacturing a semiconductor device is a semiconductor device used for bonding a semiconductor element to an adherend and wire bonding to the semiconductor element in order to solve the above-mentioned problems.
  • An adhesive sheet for production comprising an oleophilic layered clay mineral.
  • the adhesive sheet of the present invention is configured to include a layered clay mineral, and the layered clay mineral is dispersed so that the stacking direction thereof substantially coincides with the direction perpendicular to the in-plane direction of the adhesive sheet. Yes. Then, since the layered clay mineral reinforces the mechanical strength of the adhesive sheet in the in-plane direction, the adhesive sheet according to the present invention is bonded to the adhesive sheet, the semiconductor element, and the semiconductor element by ultrasonic vibration during wire bonding. Shear deformation does not occur on the adhesion surface with the adherend. Furthermore, since the heat resistance of the adhesive sheet itself can be improved by the inclusion of the layered clay mineral, the occurrence of shear deformation due to heating can be suppressed. As a result, an adhesive sheet excellent in wire bonding properties can be obtained.
  • the adhesive sheet according to the present invention has substantially the same elasticity in the direction perpendicular to the surface as compared with the conventional adhesive sheet, so that the cushioning property in that direction is impaired. Not. As a result, it is possible to prevent the formation of voids on the bonding surface between the adhesive sheet, the semiconductor element, and the adherend.
  • the reason why the layered clay mineral is oleophilic is that it is excellent in compatibility with the adhesive composition constituting the adhesive sheet, and as a result, good dispersibility can be obtained.
  • the content of the layered clay mineral is in the range of 0.;! To 40 parts by weight with respect to 100 parts by weight of the adhesive composition constituting the adhesive sheet. It is preferable that This makes it possible to improve the heat resistance without losing the adhesive properties of the adhesive sheet.
  • the adhesive sheet having the above-described configuration preferably has a shear adhesive force within a range of 0.2 to 2 MPa under the condition of 175 ° C with respect to the adherend. This allows for wire bonding Generation of shear deformation on the adhesive surface between the adhesive sheet and the adherend can be further suppressed by ultrasonic vibration and heating.
  • the tensile storage modulus at 120 ° C before curing is 1 X 104Pa or more, and the tensile storage modulus at 200 ° C after curing is 50 MPa or less. Preferably there is.
  • the adhesive sheet has a storage elastic modulus as described above, it can sufficiently withstand the conditions even when placed under high temperature conditions before and after curing. To suppress softening and flow of the adhesive sheet. As a result, stable wire bonding is possible, and the semiconductor device can be manufactured while further reducing the yield.
  • the adhesive composition contains a thermoplastic resin.
  • the adhesive composition contains both a thermosetting resin and a thermoplastic resin.
  • thermosetting resin It is preferable to use an epoxy resin and / or a phenol resin as the thermosetting resin. It is preferable to use an acrylic resin as the thermoplastic resin. Since these resins have few ionic impurities and high heat resistance, reliability of semiconductor elements can be ensured.
  • the layered clay mineral is preferably a layered silicate!
  • the layered silicate is excellent in practicality, and when it is contained in the adhesive sheet, the orientation in the in-plane direction of the layered silicate is improved, and the dispersibility in the adhesive sheet is also improved. Can be improved. As a result, the occurrence of shear deformation during wire bonding can be further reduced.
  • the heat resistance of the adhesive sheet can be further improved. For this reason, even if a long heat history is strong in the wire bonding process or the like, the adhesive sheet can be kept in a temporarily fixed state without being completely fixed.
  • a method for manufacturing a semiconductor device according to the present invention has an oleophilic property.
  • a temporary fixing step of temporarily fixing a semiconductor element on an adherend via an adhesive sheet for manufacturing a semiconductor device containing a layered clay mineral; a wire bonding step of wire bonding to the semiconductor element; and the semiconductor element A sealing step of sealing the resin with a sealing resin, and a cutting step of cutting the sealed structure into individual semiconductor devices.
  • the heating step of the adhesive sheet is omitted and wire bonding is performed. Even if the process shifts to the process, shear deformation does not occur on the bonding surface between the adhesive sheet, the semiconductor element and the adherend due to the ultrasonic vibration or heating in the process. For this reason, wire bonding is possible while suppressing a decrease in yield.
  • the adhesive sheet containing the layered clay mineral has excellent heat resistance! /, For example, even when a long thermal history is applied in the wire bonding process or the like, the curing of the adhesive sheet proceeds. Is suppressed. As a result, it is possible to suppress deterioration of fluidity and embedding property of the adhesive sheet, and to prevent a gap from being generated between the adhesive sheet, the semiconductor element, and the adherend.
  • the adhesive sheet is heated before the wire bonding process, and the heating may generate volatile gas from the adhesive sheet and contaminate the bonding notes. there were.
  • the bonding pad is not contaminated.
  • the yield can be improved by reducing the number of processes.
  • the substrate or the like is not warped and the semiconductor element is not cracked. As a result, the semiconductor element can be further reduced in thickness.
  • the adherend is preferably a substrate, a lead frame, or a semiconductor element.
  • the method includes a sealing step of sealing the semiconductor element with a sealing resin, and a post-curing step of post-curing the sealing resin.
  • a sealing step of sealing the semiconductor element with a sealing resin it is preferable to cure the sealing resin by heating and to fix the semiconductor element and the adherend through the adhesive sheet.
  • This The fixing by the adhesive sheet can be performed together with the curing of the sealing resin in at least one of the sealing process and the post-curing process, so that the manufacturing process can be simplified.
  • the wire bonding step is preferably performed within a range of 80 ° C to 250 ° C. By performing the wire bonding step within the temperature range, it is possible to prevent the semiconductor element and the adherend from being completely fixed by the adhesive sheet.
  • a layered silicate as the layered clay mineral.
  • the layered silicate is excellent in practicality, and when it is contained in the adhesive sheet, the orientation of the layered silicate in the in-plane direction is improved and the dispersibility in the adhesive sheet is also improved. Can be made. As a result, the occurrence of shear deformation during wire bonding can be further reduced.
  • the heat resistance of the adhesive sheet can be improved by using the layered silicate. For this reason, even if a long heat history is applied in the wire bonding process or the like, the adhesive sheet can be kept in a temporarily fixed state without being completely fixed. Further, even when the warpage of the semiconductor element occurs during wire bonding, the semiconductor element is temporarily fixed to the adherend, so that the warpage of the semiconductor element can be reduced by the pressure applied during the sealing process. Power S can be. As a result, finally, the semiconductor element can be attached and fixed on the adherend without any gap, and a highly reliable semiconductor device can be manufactured.
  • FIG. 1 is a cross-sectional view schematically showing an adhesive sheet for manufacturing a semiconductor device according to Embodiment 1 of the present invention.
  • FIG. 2 is a process diagram for explaining the manufacturing method of the semiconductor device according to the first embodiment of the invention. is there.
  • FIG. 3 is a process diagram for describing the manufacturing method of the semiconductor device according to the second embodiment of the present invention.
  • FIG. 4 is a process diagram for explaining the manufacturing method of the semiconductor device according to the third embodiment of the present invention.
  • FIG. 5 is a process diagram for explaining the manufacturing method of the semiconductor device according to the fourth embodiment of the present invention.
  • FIG. 6 A process diagram for explaining the method for manufacturing a semiconductor device according to the fifth embodiment of the present invention.
  • FIG. 7 is a process diagram for describing a method for manufacturing a semiconductor device according to a sixth embodiment of the present invention.
  • FIG. 8 is a cross sectional view schematically showing a semiconductor device obtained by the semiconductor device manufacturing method according to the sixth embodiment.
  • FIG. 9 A process diagram for explaining the method for manufacturing a semiconductor device according to the seventh embodiment of the present invention.
  • the configuration of the adhesive sheet according to the present invention is not particularly limited as long as it contains a layered clay mineral.
  • an adhesive sheet 12 consisting of only a single adhesive layer or an adhesive layer 10b laminated on one side of the core material 10a as shown in FIG. Examples thereof include an adhesive sheet 10, or an adhesive sheet having a multilayer structure in which an adhesive layer is formed on both sides thereof.
  • the core material examples include a film (for example, a polyimide film, a polyester film, a polyethylene terephthalate film, a polyethylene naphthalate film, a polycarbonate film, etc.), a resin substrate reinforced with glass fibers or plastic non-woven fibers, and silicon.
  • a substrate, a glass substrate, etc. are mentioned.
  • a force that depends on the combination with the constituent material of the adhesive layer for example, a cross-linked thermoplastic resin. This is because the fluidity of the core material is reduced by using a crosslinked material.
  • an integrated sheet of an adhesive sheet and a dicing sheet can be used.
  • the layered clay mineral is not particularly limited, and examples thereof include layered silicates and boron nitride. Of these layered clay minerals, a layered silicate is preferred from the viewpoint of orientation and dispersibility in the adhesive sheet.
  • the orientation of the layered silicate contained in the adhesive sheet can be made uniform, and the mechanical strength in a specific direction can be improved. Further, since the dispersibility of the layered silicate can be made uniform, the occurrence of shear deformation can be reduced uniformly in the plane of the adhesive sheet.
  • the layered silicate is not particularly limited, and examples thereof include saponite, sauconite, and steel. Bunsite, hectorite, margarite, talc, phlogopite, chrysotile, chlorite, vermiculite, kaolinite, muscovite, zansophyllite, dateskite, nacrite, neurofilite, montmorillonite, piderite, nontronite, tetrasillymy power Sodium theolite, antigolite, halloysite and the like. These can be used alone or in combination of two or more. Further, the layered silicate may be either a natural product or a synthetic product.
  • the average length of the major axis of the layered clay mineral is preferably in the range of 0.01 to 100 m, and more preferably in the range of 0.05 to 10 m. By making it within the above numerical range, it is possible to disperse the layered clay mineral so that the laminating direction of the layered clay mineral does not coincide with the in-plane direction of the adhesive sheet.
  • the aspect ratio (major axis / minor axis ratio) of the layered clay mineral is preferably in the range of 20 to 500, more preferably in the range of 50 to 200. Even within the above numerical range, the laminating direction of the layered clay mineral can be dispersed so as not to coincide with the in-plane direction of the adhesive sheet.
  • the average length of the layered clay mineral is a value measured with an atomic force microscope.
  • the aspect ratio of the layered clay mineral is a value measured with an atomic force microscope.
  • the content of the layered clay mineral is not particularly limited, but is set according to the adherend (described later) so as to obtain heat resistance and a release effect.
  • the force is within the range of 0.;! To 40 parts by weight, preferably S, and within the range of 10 to 30 parts by weight. Is more preferable.
  • the content exceeds 40 parts by weight, the cohesive force becomes too high, the peelability after caloric heat is lowered, and the pick-up property may be lowered due to the loss of the adhesive properties of the adhesive.
  • the content is less than 0.1 part by weight, the heat resistance becomes insufficient, the resistance to a long-time heat history is lowered, and the wire bonding property may be lowered. It is desirable to adjust the peel strength of the adhesive sheet based on the content of the layered clay mineral.
  • the shear adhesive strength is 0.2. To be ⁇ 2MPa More preferably, 0.4 MPa to 1.6 MPa. Even if the wire bonding step (described later) is performed by setting the shear adhesive strength of the adhesive sheet to 0.2 MPa or more, the ultrasonic wave and heating in the step cause the adhesive sheet, the semiconductor element, and the adherend. It is possible to further suppress the occurrence of shear deformation on the contact surface. That is, the movement of the semiconductor element due to ultrasonic vibration during wire bonding is suppressed, thereby preventing the success rate of wire bonding from decreasing.
  • the semiconductor element can be prevented from flowing under pressure during the sealing process. If the shear adhesive strength exceeds 2 MPa, the adhesive strength is too strong, and it may be difficult to pick up the semiconductor chip during the pickup process.
  • the shear adhesive force can be adjusted by appropriately adjusting the mixing amount of the epoxy resin and the phenol resin with respect to the organic resin composition in the adhesive sheet.
  • the adhesive sheet (adhesive layer in the case of being laminated with the core material) preferably has a certain degree of elasticity at least in the direction perpendicular to the in-plane direction from the viewpoint of the adhesive function.
  • the adhesive sheet as a whole is excessively elastic, even if it is going to connect the bonding wire during wire bonding, the adhesive frame's elastic force prevents the adhesive frame from being sufficiently fixed. Is done. As a result, bonding energy due to pressurization is relaxed and bonding failure occurs.
  • the wire bonding process is performed under high temperature conditions of about 150 ° C to 200 ° C. Therefore, it is preferable that the tensile storage elastic modulus at 120 ° C.
  • the tensile storage elastic modulus at 200 ° C. after curing of the adhesive sheet is preferably 50 MPa or less, more preferably 0.5 MPa to 40 MPa, more preferably from the force S. If it exceeds 50 MPa, the embedding property on the uneven surface of the adhesive sheet may deteriorate during molding after wire bonding.
  • the pressure By setting the pressure to 0.5 MPa or more, a stable connection is possible in a semiconductor device characterized by a leadless structure.
  • the tensile storage elastic modulus can be adjusted by appropriately adjusting the amount of added calories of the layered silicate or inorganic filler (described later). The method for measuring the tensile storage modulus will be described later.
  • the adhesive layer is a layer having an adhesive function, and examples of the constituent material thereof include a combination of a thermoplastic resin and a thermosetting resin. Also, a thermoplastic resin alone can be used.
  • thermoplastic resin examples include natural rubber, butyl rubber, isoprene rubber, chloroprene rubber, ethylene acetate butyl copolymer, ethylene acrylic acid copolymer, ethylene-acrylic acid ester copolymer, polybutadiene resin, polycarbonate resin,
  • thermoplastic polyimide resins examples include thermoplastic polyimide resins, polyamide resins such as 6-nylon and 6, 6-nylon, phenoxy resins, acrylic resins, saturated polyester resins such as PET and PBT, polyamideimide resins, and fluorine resins.
  • thermoplastic resins can be used alone or in combination of two or more.
  • an acrylic resin is particularly preferable because it has few ionic impurities, has high heat resistance, and can ensure the reliability of the semiconductor element.
  • the acrylic resin is not particularly limited, and may be one or two esters of acrylic acid or methacrylic acid having 30 or less carbon atoms, particularly 4 to 4 carbon atoms; 18 linear or branched alkyl groups. Examples thereof include a polymer containing a seed or more as a component.
  • alkyl group examples include a methyl group, an ethyl group, a propyl group, an isopropyl group, an n-butyl group, a t-butyl group, an isobutyl group, an amyl group, an isoamyl group, a hexyl group, a heptyl group, a cyclohexyl group, 2-Ethylhexyl group, octyl group, isooctyl group, nonyl group, isonoyl group, decyl group, isodecyl group, undecyl group, lauryl group, tridecyl group, tetradecyl group, stearyl group, octadecyl group, dodecyl group, etc. .
  • the other monomer forming the polymer is not particularly limited.
  • acrylic acid methacrylic acid, carboxyethyl acrylate, carboxypentyl acrylate, itaconic acid, maleic acid, fumaric acid.
  • a carboxyl group-containing monomer such as crotonic acid, an acid anhydride monomer such as maleic anhydride or itaconic anhydride, 2-hydroxyethyl (meth) acrylate, 2-hydroxypropyl (meth) acrylate , (Meth) acrylic acid 4-hydroxybutyl, (meth) acrylic acid 6-hydroxyhexyl, (meth) acrylic acid 8-hydroxyoctyl, (meth) acrylic acid 10-hydroxydecyl, (meth) acrylic acid 12 Hydroxylauryl or (4-hydroxymethylcyclohexyl) methyl Hydroxyl group-containing monomers such as Relate, styrene sulfonic acid, Arirusuruho Sulfones such as acid, 2- (meth) acrylamide-2-methylpropane sulfonic acid, (meth) acrylamide propane sulfonic acid, sulfopropyl (meth) acrylate or (meth) attaroyloxy naphthal
  • thermosetting resin examples include phenol resin, amino resin, unsaturated polyester resin, epoxy resin, polyurethane resin, silicone resin, thermosetting polyimide resin, and the like. These resins can be used alone or in combination of two or more. In particular, it contains less ionic impurities that corrode semiconductor elements! / Epoxy resins are preferred! / Also, a phenol resin is preferable as the curing agent for the epoxy resin.
  • the epoxy resin is not particularly limited as long as it is generally used as an adhesive composition, for example, bisphenol A type, bisphenol F type, bisphenol S type, brominated bisphenol A type, hydrogenated.
  • Bifunctional epoxy resins such as Bisphenol A, Bisphenol, AF, Biphenyl, Naphthalene, Fullonene, Phenolic Novolac, Orthocresol Novolac, Trishydroxyphenylmethane, Tetraphenol diethane, etc.
  • hydantoin type, trisglycidyl isocyanurate type or glycidylamine type epoxy resins are used. These can be used alone or in combination of two or more.
  • epoxy resins a nopolac type epoxy resin, a biphenyl type epoxy resin, a trishydroxyphenyl methane type resin, or a tetraphenylolethane type epoxy resin is particularly preferable. This is because these epoxy resins are rich in reactivity with a phenol resin as a hardener and are excellent in heat resistance and the like.
  • the phenol resin acts as a curing agent for the epoxy resin.
  • phenol nopolac resin phenol aralkyl resin, cresol nopolac resin, tert-butyl phenol nopolac resin, nour Examples thereof include nopolac-type phenol resins such as phenol nopolac resin, resol-type phenol resins, and polyoxystyrene such as polyparaxstyrene. These can be used alone or in combination of two or more.
  • phenol nopolac resins and phenol alcohol resins are particularly preferred. This is because the connection reliability of the semiconductor device can be improved.
  • the mixing ratio of the epoxy resin and the phenol resin may be, for example, such that the hydroxyl group in the phenol resin is 0.5 to 2.0 equivalents per equivalent of the epoxy group in the epoxy resin component. Is preferred. More preferred is 0.8 to 1.2 equivalents. That is, if the blending ratio of both is out of the numerical range, sufficient curing reaction does not proceed and the properties of the epoxy resin cured product are likely to deteriorate.
  • an adhesive sheet containing an epoxy resin, a phenol resin and an acrylic resin is particularly preferable. Since these resins have few ionic impurities and high heat resistance, the reliability of the semiconductor element can be ensured.
  • the mixing ratio of the epoxy resin and the phenol resin is 10 to 200 parts by weight with respect to 100 parts by weight of the acrylic resin component.
  • the adhesive sheet of the present invention is previously crosslinked to some extent, a polyfunctional compound that reacts with a functional group at the molecular chain end of the polymer, etc., may be added as a crosslinking agent. . Thereby, the adhesive property under high temperature is improved and heat resistance is improved.
  • crosslinking agent conventionally known crosslinking agents can be used.
  • polyisocyanate compounds such as tolylene diisocyanate, diphenylmethane diisocyanate, p-phenylene diisocyanate, 1,5 naphthalene diisocyanate, and adducts of polyhydric alcohol and diisocyanate are more preferred! /, .
  • the addition amount of the crosslinking agent is usually preferably 0.05 to 7 parts by weight with respect to 100 parts by weight of the acrylic resin. If the amount of the cross-linking agent is more than 7 parts by weight, the adhesive strength is lowered, which is not preferable. On the other hand, when the amount is less than 0.05 parts by weight, the cohesive force is insufficient, which is not preferable.
  • other polyfunctional compounds such as epoxy resins may be included together if necessary! /.
  • an inorganic filler can be appropriately blended in the adhesive sheet of the present invention depending on the application.
  • the blending of the inorganic filler makes it possible to impart conductivity, improve thermal conductivity, adjust the tensile storage modulus, and the like.
  • the inorganic filler include silica, clay, gypsum, calcium carbonate, barium sulfate, alumina oxide, beryllium oxide, silicon carbide, silicon nitride, and other ceramics, aluminum, copper, silver, gold, nickel, chromium, bell
  • Various inorganic powders made of metals such as tin, zinc, palladium, solder, or alloys, and other carbon It is done. These can be used alone or in combination of two or more. Among them, silica
  • fused silica is preferably used.
  • the average particle size of the inorganic filler is preferably in the range of 0.;! To 80 m.
  • the blending amount of the inorganic filler is preferably set to 0 to 80 parts by weight, more preferably 0 to 70 parts by weight, with respect to 100 parts by weight of the organic resin component.
  • additives may be appropriately blended in the adhesive sheet of the present invention as necessary.
  • additives include flame retardants, silane coupling agents, ion trapping agents, and the like.
  • Examples of the flame retardant include antimony trioxide, antimony pentoxide, brominated epoxy resin, and the like. These can be used alone or in combination of two or more.
  • silane coupling agent examples include ⁇ - (3,4-epoxycyclohexyl) cyclopropylmethyljetoxysilane. These compounds can be used alone or in combination of two or more.
  • Examples of the ion trapping agent include rhodium, id mouth talcite, and bismuth hydroxide. These can be used alone or in combination of two or more.
  • the method of manufacturing a semiconductor device includes a temporary fixing step of temporarily fixing a semiconductor element 13 on a substrate or a lead frame (adhered body, hereinafter simply referred to as a substrate) 11 with an adhesive sheet 12, and a semiconductor element.
  • 13 includes a wire bonding step of wire bonding to 13 and a sealing step of sealing the semiconductor element 13 with a sealing resin 15.
  • the temporary fixing step is a step of temporarily fixing the semiconductor element 13 to the substrate 11 or the like 11 via the adhesive sheet 12 as shown in FIG. 2 (a).
  • a method of temporarily fixing the semiconductor element 13 on the substrate 11 for example, after laminating the adhesive sheet 12 on the substrate 11 or the like 11, the semiconductor element 13 is arranged such that the wire bond surface is on the adhesive sheet 12.
  • the semiconductor element 13 to which the adhesive sheet 12 is temporarily fixed is attached to the substrate or the like. 11 can be temporarily fixed and laminated.
  • the thickness of the semiconductor element 13 is not particularly limited. In general, the present invention can be applied to a semiconductor element having a thickness of 100 m or less, and further having a thickness of 25 to 50 111, for example. If the thinned semiconductor element 13 is temporarily fixed to the substrate 11 or the like, the semiconductor element 13 may be warped in a concave or convex shape. As a result, a gap is formed between the substrate 11 and the like, resulting in a problem that a highly reliable semiconductor device cannot be obtained. However, in the present invention, it is possible to fix the semiconductor element 13 to the substrate 11 and the like and to close the gap by performing a sealing process described later. Details thereof will be described later.
  • a conventionally known substrate can be used as the substrate.
  • the lead frame it is possible to use an organic substrate made of a metal lead frame such as a Cu lead frame, 42 Alloy lead frame, glass epoxy, BT (bismaleimide-triazine), polyimide, or the like.
  • the present invention is not limited to this, and includes a circuit board that can be used by mounting a semiconductor element and electrically connecting the semiconductor element.
  • the wire bonding step is a step of electrically connecting the tip of the terminal portion (inner lead) of the substrate 11 or the like and an electrode pad (not shown) on the semiconductor element 13 with the bonding wire 16 ( (See Figure 2 (b)).
  • the bonding wire 16 for example, a gold wire, an aluminum wire, a copper wire or the like is used.
  • the temperature for wire bonding is 80 to 250 ° C, preferably 80 to 220 ° C.
  • the heating time is from a few seconds to a few minutes.
  • the connection is performed by a combination of vibration energy by ultrasonic waves and pressure energy by pressurization while being heated so as to be within the above temperature range.
  • This step is performed without fixing with the adhesive sheet 12. Further, the semiconductor element 13 and the substrate 11 are not fixed by the adhesive sheet 12 in the process of this step.
  • the shear adhesive strength of the adhesive sheet 12 is preferably 0.2 MPa or more even in the temperature range of 80 to 250 ° C. If the shear adhesive strength is less than 0.2 MPa within this temperature range, the semiconductor element may move due to ultrasonic vibration during wire bonding, and wire bonding may not be performed, resulting in a decrease in yield. is there.
  • the sealing step is a step of sealing the semiconductor element 13 with the sealing resin 15 (FIG. 2 (c )reference). This step is performed to protect the semiconductor element 13 and the bonding wire 16 mounted on the substrate 11 or the like. This step is performed, for example, by molding a sealing resin with a mold.
  • the sealing resin 15 for example, an epoxy resin is used.
  • the heating temperature at the time of resin sealing is usually a force that is performed at 175 ° C. for 60 to 90 seconds.
  • the present invention is not limited to this.
  • pressure may be applied during resin sealing. In this case, the pressure applied is preferably 1 to 15 MPa, more preferably 3 to OMPa.
  • the adhesion area between the substrate 11 and the semiconductor element 13 is preferably 90% or more, more preferably 95% or more. This is because if the adhesion area is less than 90%, a defect may occur in moisture resistance reliability.
  • the bonded area refers to a region where the semiconductor element 13 and the substrate 11 are in contact with each other via the adhesive sheet 12, and does not include a region where the adhesive sheet 12 is bonded to only one of them.
  • a post-curing step of after-curing the sealing resin 15 may be performed.
  • the sealing resin 15 that is insufficiently cured in the sealing step is completely cured.
  • the heating temperature in this step varies depending on the type of the sealing resin, but is in the range of 150 to 200 ° C., for example, and the heating time is about 0.5 to 8 hours.
  • FIG. 3 is a process diagram for explaining the manufacturing method of the semiconductor device according to the present embodiment.
  • the semiconductor device according to the present embodiment is different from the semiconductor device according to the first embodiment in that a plurality of semiconductor elements are stacked and three-dimensionally mounted. More specifically, it differs in that it includes a step of laminating another semiconductor element on the semiconductor element via the adhesive sheet.
  • a step of laminating another semiconductor element on the semiconductor element via the adhesive sheet First, as shown in FIG. 3 (a), at least one adhesive sheet 12 cut out to a predetermined size is attached to a substrate or the like 11 as an adherend.
  • the semiconductor element 13 is temporarily fixed on the adhesive sheet 12 so that the wire bond surface is on the upper side (see FIG. 3B).
  • an adhesive sheet 14 is affixed on the semiconductor element 13 while avoiding the electrode pad portion (see FIG. 3 (c)). Further, the semiconductor element 13 is temporarily fixed on the adhesive sheet 14 so that the wire bond surface is on the upper side (see FIG. 3 (d)).
  • a sealing step of sealing the semiconductor element 13 with the sealing resin is performed to harden the sealing resin, and between the substrate 11 and the semiconductor element 13 with the adhesive sheets 12 and 14, and Closes the gap between the semiconductor elements 13.
  • a post-curing process may be performed.
  • the gap between the substrate 11 and the semiconductor element 13 is filled, so that a highly reliable semiconductor device can be obtained with a high yield. Can be manufactured. Further, since the semiconductor element 13 and the like can be securely bonded and fixed to the substrate 11 and the like without any gap, the semiconductor element can be made thinner.
  • FIG. 4 is a process diagram for explaining the semiconductor device manufacturing method according to the present embodiment.
  • the semiconductor device according to the present embodiment is different from the semiconductor device according to the second embodiment in that a spacer is interposed between stacked semiconductor elements. More specifically, it differs in that it includes a step of laminating a spacer via an adhesive sheet between the semiconductor element and the semiconductor element.
  • the adhesive sheet 12, the semiconductor element 13 and the adhesive sheet 14 are sequentially laminated on the substrate or the like 1 1 as in the second embodiment. And temporarily fix.
  • the spacer 21, the adhesive sheet 14, and the semiconductor element 13 are sequentially laminated on the adhesive sheet 14. And temporarily fixed (see FIGS. 4 (d) to 4 (f)).
  • a sealing step of sealing the semiconductor element 13 with a sealing resin is performed to cure the sealing resin, and between the substrate 11 and the semiconductor element 13 and the semiconductor element by the adhesive sheet 14. Close the gap between the 13s. Further, a post-curing step may be performed after the sealing step.
  • the spacer 21 is not particularly limited, and for example, a conventionally known silicon chip, polyimide film, or the like can be used.
  • FIG. 5 is a process diagram for explaining the manufacturing method of the semiconductor device according to the present embodiment.
  • an adhesive sheet 12 ′ is attached to the back surface of the semiconductor wafer 13 ′ to produce a semiconductor wafer with an adhesive sheet.
  • the semiconductor wafer 13 ' is bonded to the dicing tape 33 (see FIG. 5 (b)).
  • a semiconductor wafer with an adhesive sheet is diced to a predetermined size to form a chip (see FIG. 5 (c)), and an adhesive is applied from the dicing tape 33, and the chip is peeled off.
  • the semiconductor element 13 with the adhesive sheet 12 is temporarily fixed on the substrate 11 such that the wire bond surface is on the upper side. Further, the semiconductor elements 32 having different sizes with the adhesive sheet 31 are temporarily fixed on the semiconductor element 13 so that the wire bond surface is on the upper side.
  • a sealing step of sealing the semiconductor elements 13 and 32 with a sealing resin is performed, and the sealing resin is removed.
  • the adhesive sheets 12 and 31 fix the substrate 11 and the semiconductor element 13 and the semiconductor element 13 and the semiconductor element 32 together.
  • a post-curing process may be performed after the sealing process.
  • FIG. 6 is a process diagram for explaining the method of manufacturing a semiconductor device according to the present embodiment.
  • the adhesive sheet 12 ' is laminated on the dicing tape 33, and then the adhesive sheet is further compared with the method for manufacturing the semiconductor device according to the fourth embodiment. 12 is different in that a semiconductor wafer 13 is laminated on top.
  • the adhesive sheet 12 ′ is laminated on the dicing tape 33.
  • the semiconductor wafer 13 ′ is temporarily fixed on the adhesive sheet 12 ′ (see FIG. 6B). Further, the semiconductor wafer with the adhesive sheet is diced to a predetermined size to form a chip (see FIG. 6 (c)), and the chip with the adhesive attached is removed from the dicing tape 33.
  • the semiconductor element 13 with the adhesive sheet 12 is temporarily fixed on the substrate 11 such that the wire bond surface is on the upper side. Further, the semiconductor elements 32 having different sizes with the adhesive sheet 31 are temporarily fixed on the semiconductor element 13 so that the wire bond surface is on the upper side. At this time, the semiconductor element 32 is fixed while avoiding the electrode pad portion of the lower semiconductor element 13.
  • a sealing step of sealing the semiconductor element with the sealing resin is performed to cure the sealing resin, and between the substrate 11 and the semiconductor element 13 and the semiconductor with the adhesive sheets 12 and 31.
  • the element 13 and the semiconductor element 32 are fixed to each other.
  • a post-curing process may be performed after the sealing process.
  • FIG. 7 is a process diagram for explaining the method of manufacturing a semiconductor device according to the present embodiment.
  • FIG. 8 is a cross-sectional view schematically showing a semiconductor device obtained by the method for manufacturing a semiconductor device according to the present embodiment.
  • the semiconductor device according to the present embodiment is different from the semiconductor device according to the third embodiment in that a core material is employed as a spacer.
  • an adhesive sheet 12 ′ is laminated on the dicing tape 33 in the same manner as in the fifth embodiment. Further, the semiconductor wafer 13 ′ is stuck on the adhesive sheet 12 ′. Further, the semiconductor wafer with the adhesive sheet is diced to a predetermined size to form a chip, and the chip with the adhesive is peeled from the dicing tape 33. Thereby, the semiconductor element 13 provided with the adhesive sheet 12 is obtained.
  • an adhesive sheet 41 is formed on the dicing tape 33 (see FIG. 7 (a)), and a core material 42 is pasted on the adhesive sheet 41 (see FIG. 7 (b)). Further, the chip is diced so as to have a predetermined size (see FIG. 7 (c)), and the chip to which the adhesive is applied is peeled off from the dicing tape 33. As a result, a chip-like core material 42 ′ having an adhesive sheet 41 ′ is obtained.
  • the semiconductor element 13 is temporarily fixed on the substrate 11 or the like 11 via the adhesive sheet 12 so that the wire bond surface is on the upper side. Further, the core material 42 ′ is fixed onto the semiconductor element 13 via the adhesive sheet 41 ′. Further, the semiconductor element 13 is temporarily fixed on the core material 42 ′ via the adhesive sheet 12 so that the wire bond surface is on the upper side.
  • a sealing step of sealing the semiconductor element with a sealing resin is performed to cure the sealing resin, and between the substrate 11 and the semiconductor element 13 with the adhesive sheet 12 ⁇ 41 ', and The semiconductor element 13 and the core material 42 ′ are fixed.
  • a post-curing process is performed. May be.
  • the core material is not particularly limited, and a conventionally known material can be used. Specifically, films (for example, polyimide films, polyester films, polyethylene terephthalate films, polyethylene naphthalate films, polycarbonate film, etc.), resin substrates reinforced with glass fibers or plastic non-woven fibers, mirror silicon wafers, silicon A substrate or a glass substrate can be used.
  • films for example, polyimide films, polyester films, polyethylene terephthalate films, polyethylene naphthalate films, polycarbonate film, etc.
  • resin substrates reinforced with glass fibers or plastic non-woven fibers, mirror silicon wafers, silicon A substrate or a glass substrate can be used.
  • FIG. 9 is a process diagram for explaining the manufacturing method of the semiconductor device according to the present embodiment.
  • the method of manufacturing a semiconductor device according to the present embodiment is characterized in that it is chipped by punching or the like instead of dicing the core material, as compared with the method of manufacturing a semiconductor device according to Embodiment 6. Different.
  • the semiconductor element 13 provided with the adhesive sheet 12 is obtained.
  • the core material 42 is pasted on the adhesive sheet 41. Further, it is formed into a chip shape by punching or the like so as to obtain a predetermined size, and a chip-shaped core material 42 ′ having an adhesive sheet 41 ′ is obtained.
  • the core material 42 ′ and the semiconductor element 13 are sequentially stacked and temporarily fixed via the adhesive sheets 12 and 41 ′.
  • a wire bonding step, a sealing step, and a post-curing step as necessary can be performed to obtain the semiconductor device according to the present embodiment.
  • a buffer coat film is formed on the surface side where the circuit of the semiconductor element is formed.
  • the buffer coat film include those made of a heat resistant resin such as a silicon nitride film or a polyimide resin.
  • the adhesive sheet used in each stage is not limited to the one having the same composition force, and can be appropriately changed according to the manufacturing conditions and the use.
  • the laminating method described in the above embodiment has been described by way of example, and can be appropriately changed as necessary.
  • the method of manufacturing a semiconductor device according to the second embodiment it is possible to stack the second and subsequent semiconductor elements by the stacking method described in the third embodiment.
  • the force described about the aspect in which the wire bonding step is collectively performed after laminating a plurality of semiconductor elements on the substrate or the like is not limited to this. Absent. For example, it is possible to perform a wire bonding process every time a semiconductor element is stacked on a substrate or the like.
  • This adhesive composition solution was applied onto a release film (core material) made of polyethylene terephthalate film (thickness 50 m) that had been subjected to a silicone release treatment, and then at 120 ° C for 3 minutes. Dried. As a result, an adhesive sheet according to Example 1 in which an adhesive layer having a thickness of 25 ⁇ was laminated on the release treatment film was produced.
  • an adhesive sheet was prepared by laminating an adhesive layer having a thickness of 25 m on the release treatment film.
  • the adhesive sheet according to this Comparative Example 1 was the same as Example 1 except that the layered silicate was not added during the preparation of the adhesive composition. Was made.
  • the thickness of the adhesive layer in the adhesive sheet was 25 11 m.
  • Comparative Example 2 instead of the butyl acrylate used in Comparative Example 1, a polymer based on an acrylate ester polymer (Negami Kogyo Co., Ltd., Paraclone SN-710) was used.
  • An adhesive sheet according to Comparative Example 2 was produced in the same manner as Comparative Example 1 except that it was used. The thickness of the adhesive layer in the adhesive sheet was 25 111.
  • Example 3 an acrylic pressure-sensitive adhesive having the same composition as in Example 1 except that 42 parts of layered silicate was added in preparation of the acrylic pressure-sensitive adhesive in Example 1. was prepared. However, the addition of 42 parts of layered silicate resulted in an unevenly dispersed adhesive sheet that was less compatible with the organic resin composition than the adhesive sheets of Examples 1 and 2. .
  • Example 4 when preparing the adhesive composition, Somasif MEE (manufactured by Co-op Chemical Co., Ltd., average length of major axis 3.2 m, average aspect ratio 84) was used as a layered silicate.
  • An adhesive sheet according to this example was produced in the same manner as in Example 1 except that 1 part was added. The thickness of the adhesive layer in the adhesive sheet was 25 / ⁇ 111.
  • Example 6 in place of the layered silicate used in Example 1, boron nitride (average particle size 5 m, manufactured by Tokuyama Co., Ltd., trade name: GSP) was added.
  • GSP boron nitride
  • the solution of the adhesive composition used in each example or each comparative example was applied and dried to form an adhesive layer having a thickness of 100.
  • This adhesive layer is left in an oven for 1 hour at 150 ° C., and then 200 ° C. after curing of each adhesive layer using a viscoelasticity measuring device (Rheometrics: Model: RSA-II).
  • the tensile storage modulus at More specifically, the sample size is set to length 30 0 X width 5.0 X thickness 0.1 mm, and the measurement sample is set in a film bow I tension measuring jig, and the temperature is between 50 ° C and 250 ° C. Measurement was performed under the conditions of a frequency of 1.0 Hz, a strain of 0.025%, and a heating rate of 10 ° C / min in the temperature range.
  • the shearing adhesive force during temporary fixing to the substrate was measured as follows. [0128] First, an aluminum vapor-deposited wafer was diced to produce a chip 2 mm long x 2 mm wide x 500 ⁇ m thick. This chip was die-attached on the substrate with the adhesive sheet obtained in each Example or Comparative Example to prepare each test piece. The adhesive sheet was peeled from the separator and then cut into a 2 mm opening. The die attach was performed using a dieponder (SPA-300 manufactured by Shinkawa Co., Ltd.) under the condition of applying a load (0.25 MPa) at a temperature of 120 ° C. and heating for 1 second.
  • SPA-300 manufactured by Shinkawa Co., Ltd.
  • TFBGA16 X 16 (2216-001A01) (trade name) manufactured by UniMicron Technology Corporation was used.
  • the adhesive sheet obtained in each example was treated with a force S to temporarily fix the adhesive sheet to the substrate and the chip without generating a gap on the adhesive surface.
  • each test piece was fixed to a temperature-controllable hot plate, and the semiconductor element to which the die was attached was pushed horizontally with a push-pull gauge at a speed of 0.1 mm / sec. The test was performed at 175 ° C.
  • Model-2252 trade name, manufactured by AIKO H Engineering Co., Ltd.
  • the heating process of each test piece was not performed after die attachment.
  • a dicing tape (NBD-5170K, manufactured by Nitto Denko Corporation) was attached to the adhesive sheets obtained in the examples and comparative examples at 50 ° C, and was attached to the back of the wafer (diameter 6 inches, thickness 150 m). Shells were seized at 50 ° C. Then, using a dicer, the presence or absence of chip fly was examined when dicing (cutting) into a semiconductor element size of 5 mm ⁇ 5 mm square at a spindle rotation speed of 40,000 rpm and a cutting speed of 50 mm / sec. When the chip skip was 10% or less, no chip skip was assumed.
  • the semiconductor element was die-bonded to a bismaleimide-triazine resin substrate at 120 ° C. ⁇ 500 gf ⁇ lsec. After that, the heat history of lhr was applied at 180 ° C, and these were molded with a molding machine (TOWA, Model-Y-serise) using epoxy-based sealing resin (Nitto Denko, trade name; HC-300B6). It was molded at 175 ° C with a preheat setting of 3 seconds, an injection time of 12 seconds, and a curing time of 120 seconds. Furthermore, the semiconductor package was obtained by heat curing under the condition of 175 ° C. ⁇ 5 hr.
  • This semiconductor package was subjected to moisture absorption treatment for 192 hours in an environment of a temperature of 30 ° C and a relative humidity of 60% RH using a constant temperature and humidity chamber. After that, it was repeatedly introduced three times into the IR reflow device SAI-2604M (manufactured by Senju Metal Industry). The package surface peak temperature at that time was adjusted to 260 ° C. Then, after cutting the center part of the package and polishing the cut surface, the cross section of the package was observed using a Keyence optical microscope. On the package cross-section, the force at which peeling of the adhesive sheet was not observed was marked with ⁇ , and the peeled surface was marked with X.
  • SAI-2604M manufactured by Senju Metal Industry
  • the adhesive sheets of Examples 1 2 4 7 of the present invention showed good shearing adhesion and dicing properties, which allowed laminating clay minerals such as layered silicates and boron nitride. It was confirmed that the decrease in adhesiveness can be suppressed by adding. In addition, the success rate of wire bonding was 100%, and it was found that the adhesive sheet of each example was excellent in wire bonding property without causing shear deformation. In addition, the adhesive sheet of Example 1 2 4 6 showed good peelability in the moisture absorption reliability test, and poor peelability. Also did not occur.

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Abstract

 本発明の半導体装置製造用の接着シートは、半導体素子を被着体に接着させ、該半導体素子にワイヤーボンディングをする際に用いる半導体装置製造用の接着シートであって、親油性の層状粘土鉱物を含有することを特徴とする。  

Description

明 細 書
半導体装置製造用の接着シート、及びそれを用いた半導体装置の製造 方法
技術分野
[0001] 本発明は、半導体素子を被着体に接着させ、該半導体素子にワイヤーボンディン グをする際に用いる半導体装置製造用の接着シート、及びそれを用いた半導体装置 の製造方法に関する。
背景技術
[0002] 半導体装置の微細化、高機能化の要求に対応すベぐ半導体チップ(半導体素子 )主面の全域に配置された電源ラインの配線幅や信号ライン間の間隔が狭くなつてき ている。
[0003] この為、インピーダンスの増加や、異種ノードの信号ライン間での信号の干渉が生 じ、半導体チップの動作速度、動作電圧余裕度、耐静電破壊強度等に於いて、十分 な性能の発揮を阻害する要因となっている。これらの問題を解決する為、半導体素 子を積層したパッケージ構造が提案されてレ、る(例えば、特開昭 55— 111151号公 報及び特開 2002— 261233号公報参照)。
[0004] 一方、半導体素子を基板等に固着する際に使用されるものとしては、熱硬化性ぺ 一スト樹脂を用いた例(例えば、特開 2002— 179769号公報参照)や、熱可塑性樹 脂及び熱硬化性樹脂を併用した接着シートを用レ、た例(例えば、特開 2002— 2612 33号公報及び特開 2000— 104040号公報)が提案されている。
[0005] 従来の半導体装置の製造方法に於いては、半導体素子と、基板、リードフレーム又 は半導体素子との接着に際し、接着シート又は接着剤を使用する。接着は、半導体 素子と基板等との圧着の後(ダイアタッチ)、接着シート等を加熱工程により硬化させ て行う。更に、半導体素子と基板とを電気的に接続する為にワイヤーボンディングを 行い、その後に封止樹脂でモールドし、後硬化して当該封止樹脂の封止を行う(例え ば、特開 2002— 179769号公報及び特開 2002— 261233号公報参照)。
[0006] 前記ワイヤーボンディングを行う際には、超音波振動や加熱により基板等上の半導 体素子が動く。この為従来は、ワイヤーボンディングの前に加熱工程を行って熱硬化 性ペースト樹脂や熱硬化性接着シートを加熱硬化し、半導体素子が動かなレ、様に固 着する必要があった。
[0007] 更に、熱可塑性樹脂からなる接着シートや、熱硬化性樹脂と熱可塑性樹脂を併用 した接着シートに於いては、ダイアタッチ後、ワイヤーボンディング前に接着対象物と の接着力確保や濡れ性向上の目的で、加熱工程を必要としていた。
[0008] しかしながら、ワイヤーボンディングの前に行う接着シート等の加熱により、接着シ ート等から揮発ガスが発生するという問題点がある。揮発ガスはボンディングパットを 汚染し、多くの場合、ワイヤーボンディングを行うことができなくなる。
[0009] また、接着シート等を加熱硬化することにより当該接着シート等の硬化収縮等が生 じる。これに伴い応力が発生し、リードフレーム又は基板に(同時に、半導体素子にも )反りが発生するという問題点を有している。加えて、ワイヤーボンディング工程に於 V、ては、応力に起因して半導体素子にクラックが発生するとレ、う問題点も有して!/、る。
[0010] 近年、半導体素子の薄型化 '小型化に伴い、半導体素子の厚さが従来の 200 からそれ以下へ、更には 100 m以下にまで薄層化している現状がある。 lOO ^ m 以下の半導体素子を用いてダイアタッチを行うと、該半導体素子に反りが発生するこ とがある。そのため、ダイアタッチ後の半導体素子と被着体との間に空隙が生じる場 合がある。また、チップの多段積層化、ピン数の増加によりワイヤーボンディング工程 での熱履歴が長くなり、接着シートの硬化が進むため、流動性や埋め込み性が低下 し、半導体素子と被着体との間に空隙ができやすくなる。空隙を残したまま半導体装 置を製造すると、その信頼性が低下するという問題がある。
発明の開示
発明が解決しょうとする課題
[0011] 本発明は前記問題点に鑑みなされたものであり、その目的は、耐熱性を向上させ つつ、従来の製造工程を変更することなぐ高信頼性の半導体装置を製造することが 可能な半導体装置の製造方法、当該方法に使用する接着シート及び当該方法によ り得られる半導体装置を提供することにある。
課題を解決するための手段 [0012] 本願発明者等は、前記従来の問題点を解決すベぐ半導体装置製造用の接着シ ート、及びそれを用いた半導体装置の製造方法について検討した。その結果、下記 構成を採用することにより前記目的を達成できることを見出して、本発明を完成させる に至った。
[0013] 即ち、本発明に係る半導体装置製造用の接着シートは、前記の課題を解決する為 に、半導体素子を被着体に接着させ、該半導体素子にワイヤーボンディングをする 際に用いる半導体装置製造用の接着シートであって、親油性の層状粘土鉱物を含 有することを特徴とする。
[0014] 本発明の接着シートは層状粘土鉱物を含んで構成されており、該層状粘土鉱物は 、その積層方向が接着シートの面内方向に対し垂直な方向とほぼ一致する様に分散 している。そして、層状粘土鉱物が面内方向に於ける接着シートの機械的強度を補 強する為、本発明に係る接着シートはワイヤーボンディングの際に於ける超音波振 動により、接着シートと半導体素子及び被着体との接着面でずり変形を生じることが ない。更に、層状粘土鉱物の含有により接着シート自体の耐熱性を向上させることが できるため、加熱に起因したずり変形の発生も抑制することができる。その結果、ワイ ヤーボンディング性に優れた接着シートが得られる。
[0015] その一方、本発明に係る接着シートは、従来の接着シートと比較して、その面内に 垂直な方向に対する弾性がほぼ同様である為、該方向に於けるクッション性は損な われていない。これにより、接着シートと半導体素子及び被着体との接着面に於いて 空隙が生じるのを防止することができる。
[0016] 尚、層状粘土鉱物として親油性のものを採用するのは、接着シートを構成する接着 剤組成物との相溶性に優れ、その結果、良好な分散性が得られるからである。
[0017] 前記構成に於!/、て、前記層状粘土鉱物の含有量は、前記接着シートを構成する接 着剤組成物 100重量部に対して、 0.;!〜 40重量部の範囲内であることが好ましい。 これにより、接着シートの接着特性を喪失させることなく耐熱性を向上させることが可 能となる。
[0018] 前記構成の接着シートは、前記被着体に対し、 175°Cの条件下で 0. 2〜2MPaの 範囲内の剪断接着力を有することが好ましい。これにより、ワイヤーボンディングの際 に於ける超音波振動や加熱により、接着シートと被着体との接着面でのずり変形の 発生を一層抑制することができる。
[0019] 前記構成の接着シートに於いて、硬化前の 120°Cに於ける引張貯蔵弾性率は 1 X 104Pa以上であり、硬化後の 200°Cに於ける引張貯蔵弾性率は 50MPa以下である ことが好ましい。
[0020] 接着シートが前記構成の様に貯蔵弾性率を有する構成であると、硬化前及び硬化 後のそれぞれに於いて、高温条件下に置かれた場合でも、その条件に十分耐え得る 耐熱性を発揮し、該接着シートが軟化'流動するのを抑制する。その結果、安定した ワイヤーボンディングが可能になり、歩留りの低下を一層抑制して半導体装置の製造 が可能になる。
[0021] 前記の構成に於!/、ては、前記接着剤組成物として熱可塑性樹脂が含有されてレ、る ことが好ましい。
[0022] 前記の構成に於!/、ては、前記接着剤組成物として、熱硬化性樹脂と熱可塑性樹脂 の双方が含有されてレ、ること力 S好ましレ、。
[0023] また、前記熱硬化性樹脂としてはエポキシ樹脂及び/又はフエノール樹脂を使用 するのが好ましぐ前記熱可塑性樹脂としてはアクリル樹脂を使用するのが好ましい。 これらの樹脂はイオン性不純物が少なく耐熱性が高!/、ので、半導体素子の信頼性を 確保できる。
[0024] また、前記接着シートとしては、架橋剤を添加したものを使用するのが好まし!/、。
[0025] 前記層状粘土鉱物は、層状ケィ酸塩であることが好まし!/、。層状ケィ酸塩は実用性 に優れており、これを接着シートに含有させると、該層状ケィ酸塩の面内方向に於け る配向性が良好となり、また接着シート内に於ける分散性も向上させることができる。 その結果、ワイヤーボンディングの際のずり変形の発生を一層低減することができる
[0026] また、層状ケィ酸塩を用いたことにより、接着シートの耐熱性を一層向上させること ができる。この為、ワイヤーボンディング工程等で長時間の熱履歴が力、かっても、接 着シートは完全に固着させずに仮固着の状態に留めておくことができる。
[0027] 本発明に係る半導体装置の製造方法は、前記の課題を解決する為に、親油性の 層状粘土鉱物を含有する半導体装置製造用の接着シートを介して、半導体素子を 被着体上に仮固着する仮固着工程と、前記半導体素子にワイヤーボンディングをす るワイヤーボンディング工程と、前記半導体素子を封止樹脂により樹脂封止する封止 工程と、封止された構造物を個別の半導体装置に切断する切断工程とを有すること を特徴とする。
[0028] 本発明の製造方法であると、半導体素子を被着体に固定する為の接着シートとし て層状粘土鉱物を含有したものを使用するので、接着シートの加熱工程を省略して ワイヤーボンディング工程に移行しても、当該工程に於ける超音波振動や加熱により 、接着シートと半導体素子及び被着体との接着面でずり変形を生じることがない。こ の為、歩留まりの低下を抑制してワイヤーボンディングが可能となる。
[0029] また、層状粘土鉱物を含有した接着シートは耐熱性にも優れて!/、るため、例えば、 ワイヤーボンディング工程等で長時間の熱履歴が加わった場合でも、接着シートの 硬化の進行が抑制される。その結果、接着シートの流動性や埋め込み性の劣化を抑 制し、接着シートと半導体素子及び被着体との間に空隙が生じるのを防止することが できる。
[0030] 更に、従来の製造方法に於いては、ワイヤーボンディング工程の前に接着シートの 加熱を行っており、当該加熱により接着シートから揮発ガスが発生してボンディング ノ ノトが汚染されることがあった。し力も本発明は、その様な工程を不要とするので、 ボンディングパットが汚染されることがない。また、工程数の低減により歩留まりの向 上も図れる。更に、接着シートを加熱する工程の省略により、基板等に反りが生じたり 、半導体素子にクラックが発生したりすることもない。この結果、半導体素子の一層の 薄型化も可能となる。
[0031] 前記の方法に於いて、前記被着体は、基板、リードフレーム又は半導体素子である ことが好ましい。
[0032] 前記の方法に於いて、前記半導体素子を封止樹脂により封止する封止工程と、前 記封止樹脂の後硬化を行う後硬化工程とを含み、前記封止工程又は後硬化工程の 少なくとも何れか一方の工程に於いて、加熱により封止樹脂を硬化させると共に、前 記接着シートを介して半導体素子と被着体とを固着させることが好ましレ、。これにより 、前記接着シートによる固着は、封止工程又は後硬化工程の少なくとも何れか一方 の工程に於いて、封止樹脂の硬化と共に行うことができるので、製造工程の簡素化 が図れる。
[0033] 前記の方法に於いて、前記ワイヤーボンディング工程は、 80°C〜250°Cの範囲内 で行われること力 S好ましい。前記温度範囲内でワイヤーボンディング工程を行うことに より、接着シートによって半導体素子と被着体等とが完全に固着するのを防止するこ と力 Sできる。
[0034] 前記の方法に於!/、ては、前記層状粘土鉱物として、層状ケィ酸塩を使用することが 好ましい。層状ケィ酸塩は実用性に優れており、これを接着シートに含有させると、該 層状ケィ酸塩の面内方向に於ける配向性が良好となり、また接着シート内に於ける 分散性も向上させることができる。その結果、ワイヤーボンディングの際のずり変形の 発生を一層低減することができる。
[0035] また、層状ケィ酸塩を用いることにより、接着シートの耐熱性も向上させることができ る。この為、ワイヤーボンディング工程等で長時間の熱履歴が加わっても、接着シー トを完全に固着させずに仮固着の状態に留めておくことができる。更に、ワイヤーボ ンデイングの際に半導体素子の反りが発生した場合でも、半導体素子を被着体に対 し仮固着の状態であるので、封止工程時に加わる圧力により半導体素子の反りを低 減させること力 Sできる。その結果、最終的には、半導体素子を被着体上に隙間無く接 着固定させることができ、高信頼性の半導体装置の製造が可能になる。
[0036] 以上に述べたことは、前記半導体素子の上に 1又は 2以上の半導体素子を、前記 接着シートを介して積層する場合や、必要に応じて、前記半導体素子と半導体素子 との間に前記接着シートを介してスぺーサを積層する場合にも同様の作用効果を奏 する。また、前記の製造工程の簡素化は、複数の半導体素子等の 3次元実装に於い て、製造効率の一層の向上を図ることができる。
図面の簡単な説明
[0037] [図 1]本発明の実施の形態 1に係る半導体装置製造用の接着シートを概略的に示す 断面図である。
[図 2]本発明の実施の形態 1に係る半導体装置の製造方法を説明する為の工程図で ある。
[図 3]本発明の実施の形態 2に係る半導体装置の製造方法を説明する為の工程図で ある。
[図 4]本発明の実施の形態 3に係る半導体装置の製造方法を説明する為の工程図で ある。
[図 5]本発明の実施の形態 4に係る半導体装置の製造方法を説明する為の工程図で ある。
園 6]本発明の実施の形態 5に係る半導体装置の製造方法を説明する為の工程図で ある。
[図 7]本発明の実施の形態 6に係る半導体装置の製造方法を説明する為の工程図で ある。
[図 8]前記実施の形態 6に係る半導体装置の製造方法により得られた半導体装置の 概略を示す断面図である。
園 9]本発明の実施の形態 7に係る半導体装置の製造方法を説明する為の工程図で ある。
符号の説明
10 接着シート
10a コア材料
10b 接着剤層
11 基板等 (被着体)
12 接着シート
13, 半導体ウエノ、
13 半導体素子
14 接着シート
15 封止樹脂
16 ボンディングワイ-
21 スぺーサ
31 接着シート 32 半導体素子
33 ダイシングテープ
41 接着シート
42 コア材料
発明を実施するための最良の形態
[0039] (実施の形態 1)
先ず、本発明に係る半導体装置製造用の接着シートについて、以下に説明する。 本発明に係る接着シートは層状粘土鉱物を含有するものであれば、その構成は特 に限定されない。例えば、図 1 ωに示す様に、接着剤層の単層のみからなる接着シ ート 12や、同図(b)に示すように、コア材料 10aの片面に接着剤層 10bが積層された 接着シート 10、又はその両面に接着剤層を形成した多層構造の接着シート等が挙 げられる。
[0040] 前記コア材料としては、フィルム(例えばポリイミドフィルム、ポリエステルフィルム、 ポリエチレンテレフタレートフィルム、ポリエチレンナフタレートフィルム、ポリカーボネ 一トフイルム等)、ガラス繊維やプラスチック製不織繊維で強化された樹脂基板、シリ コン基板又はガラス基板等が挙げられる。これらのコア材料のうち、接着剤層の構成 材料との組み合わせにもよる力、例えば架橋された熱可塑性樹脂等からなるものを 用いるのが好ましい。架橋したものを用いることにより、コア材料の流動性が低下する からである。また、接着シートとダイシングシートとの一体型のものを使用することもで きる。
[0041] 前記層状粘土鉱物としては特に限定されず、例えば、層状ケィ酸塩、窒化ホウ素等 が例示できる。これらの層状粘土鉱物のうち、接着シート内に於ける配向性、及び分 散性の観点から層状ケィ酸塩であることが好ましい。層状ケィ酸塩を使用することに より、接着シート内に含まれる層状ケィ酸塩の配向性を均一にすることでき、特定方 向に対する機械的強度を向上させることができる。また、層状ケィ酸塩の分散性も均 一にできるので、ずり変形の発生を接着シートの面内に於いて均一に低減することが できる。
[0042] 前記層状ケィ酸塩としては特に限定されず、例えば、サボナイト、ソーコナイト、スチ ブンサイト、ヘクトライト、マーガライト、タルク、金雲母、クリソタイル、緑泥石、バーミキ ユライト、カオリナイト、白雲母、ザンソフイライト、デイツカイト、ナクライト、ノイロフイラ イト、モンモリロナイト、パイデライト、ノントロナイト、テトラシリリックマイ力、ナトリウムテ 二オライト、アンチゴライト、ハロイサイト等を例示できる。これらは単独で、又は 2種以 上を併用して用いること力 Sできる。また、前記層状ケィ酸塩は、天然物又は合成物の 何れであってもよい。
[0043] 前記層状粘土鉱物の長径の平均長さは 0. 01〜; 100 mの範囲内であることが好 ましぐ 0. 05〜; 10 mの範囲内であることがより好ましい。前記数値範囲内にするこ とにより、層状粘土鉱物の積層方向が接着シートの面内方向に一致しない様に分散 させること力 Sできる。また、層状粘土鉱物のアスペクト比(長径/短径比)は 20〜500 の範囲内であることが好ましぐ 50〜200の範囲内であることがより好ましい。前記数 値範囲内にすることによつても、層状粘土鉱物の積層方向が接着シートの面内方向 に一致しない様に分散させることができる。尚、層状粘土鉱物の平均長さは、原子間 力顕微鏡により測定した値である。また、層状粘土鉱物のアスペクト比は、原子間力 顕微鏡により測定した値である。
[0044] 層状粘土鉱物の含有量は、特に限定されるものではないが、被着体(後述する)に 応じて、耐熱性及び離型効果が得られるように設定される。具体的には、接着シート を構成する接着剤組成物 100重量部に対して、 0.;!〜 40重量部の範囲内であるこ と力 S好ましく、 10〜30重量部の範囲内であることがより好ましい。前記数値範囲内に することにより、接着シートの接着特性を良好なものにすると共に、耐熱性も向上させ ること力 S可能となる。前記含有量が 40重量部を超えると、凝集力が高くなり過ぎ、カロ 熱後の剥離性が低下してしまい、接着剤の接着特性の喪失により、ピックアップ性が 低下する場合がある。その一方、含有量が 0. 1重量部未満であると、耐熱性が不十 分となり、長時間の熱履歴に対する耐性が低下して、ワイヤーボンディング性が低下 する場合がある。接着シートの剥離力は、層状粘土鉱物の含有量を基準にして、調 整をすることが望ましい。
[0045] 接着シート (コア材料上に接着剤層が積層されている場合は、接着剤層)を被着体 に接着し、 175°Cまで加熱した状態での剪断接着力は、 0. 2〜2MPaであることが 好ましぐより好ましくは 0. 4MPa〜; 1. 6MPaである。接着シートの剪断接着力を 0. 2MPa以上にすることにより、ワイヤーボンディング工程 (後述する)を行っても、当該 工程に於ける超音波振動や加熱により、接着シートと半導体素子及び被着体との接 着面でのずり変形の発生を一層抑制することができる。即ち、ワイヤーボンディングの 際の超音波振動により半導体素子が動くのを抑制し、これによりワイヤーボンディン グの成功率が低下するのを防止する。また、封止工程の際に、半導体素子が圧力で 流れるのを防ぐことができる。剪断接着力が 2MPaを超えると、接着力が強すぎる為 、ピックアップ工程の際に、半導体チップのピックアップが困難になる場合がある。尚 、剪断接着力の調整は、接着シートに於ける有機樹脂組成物に対して、エポキシ樹 脂及びフエノール樹脂の混合量を適宜調整することにより可能である。
また、接着シート(コア材料と積層されている場合は接着剤層)は、その接着機能の 面から、少なくとも面内方向に対し垂直な方向に於いてある程度の弾性を有するの が好ましい。一方、接着シート全体として過度に弾性を有する場合は、ワイヤーボン デイング時にボンディングワイヤーを接続しょうとしても、接着シートを貼りあわせたリ ードフレームを十分に固定しておくことが接着シートの弾性力によって阻害される。そ の結果、加圧による圧着エネルギーを緩和して、ボンディング不良が発生する。前記 のワイヤーボンディング工程に於いては、 150°C〜200°C程度の高温条件下で行わ れる。そのため、接着シートの硬化前 120°Cに於ける引張貯蔵弾性率が 1 X 104Pa 以上であることが好ましぐ 0. ;!〜 20Paであること力 Sより好ましい。前記引張貯蔵弾性 率が 1 X 104Pa未満であると、ダイシング時に溶融した接着シートが、例えば半導体 チップに固着し、ピックアップが困難になる場合がある。また、接着シートの硬化後 20 0°Cに於ける引張貯蔵弾性率は 50MPa以下であることが好ましぐ 0. 5MPa〜40 MPaであること力 Sより好ましい。 50MPaを超えると、ワイヤーボンディング後のモール ドの際に、接着シートの凹凸面に対する埋め込み性が低下する場合がある。尚、 0. 5MPa以上とすることにより、リードレス構造を特徴とした半導体装置では安定した結 線が可能になる。引張貯蔵弾性率は、層状珪酸塩や無機充填剤(後述する)の添カロ 量を適宜調整することにより調整することができる。引張貯蔵弾性率の測定方法は後 述する。 [0047] 前記接着剤層は接着機能を有する層であり、その構成材料としては、熱可塑性樹 脂と熱硬化性樹脂とを併用したものが挙げられる。又、熱可塑性樹脂単独でも使用 可能である。
[0048] 前記熱可塑性樹脂としては、天然ゴム、ブチルゴム、イソプレンゴム、クロロプレンゴ ム、エチレン 酢酸ビュル共重合体、エチレン アクリル酸共重合体、エチレンーァ クリル酸エステル共重合体、ポリブタジエン樹脂、ポリカーボネート樹脂、熱可塑性ポ リイミド樹脂、 6—ナイロンや 6, 6—ナイロン等のポリアミド樹脂、フエノキシ樹脂、ァク リル樹脂、 PETや PBT等の飽和ポリエステル樹脂、ポリアミドイミド樹脂又はフッ素樹 脂等が挙げられる。これらの熱可塑性樹脂は単独で、又は 2種以上を併用して用い ること力 Sできる。これらの熱可塑性樹脂のうち、イオン性不純物が少なく耐熱性が高く 、半導体素子の信頼性を確保できるアクリル樹脂が特に好ましい。
[0049] 前記アクリル樹脂としては、特に限定されるものではなぐ炭素数 30以下、特に炭 素数 4〜; 18の直鎖若しくは分岐のアルキル基を有するアクリル酸又はメタクリル酸の エステルの 1種又は 2種以上を成分とする重合体等が挙げられる。前記アルキル基と しては、例えばメチル基、ェチル基、プロピル基、イソプロピル基、 n ブチル基、 t ブチル基、イソブチル基、アミル基、イソアミル基、へキシル基、ヘプチル基、シクロへ キシル基、 2—ェチルへキシル基、ォクチル基、イソォクチル基、ノニル基、イソノエル 基、デシル基、イソデシル基、ゥンデシル基、ラウリル基、トリデシル基、テトラデシル 基、ステアリル基、ォクタデシル基、又はドデシル基等が挙げられる。
[0050] また、前記重合体を形成する他のモノマーとしては、特に限定されるものではなぐ 例えばアクリル酸、メタクリル酸、カルボキシェチルアタリレート、カルボキシペンチル アタリレート、ィタコン酸、マレイン酸、フマール酸若しくはクロトン酸等の様なカルボキ シル基含有モノマー、無水マレイン酸若しくは無水ィタコン酸等の様な酸無水物モノ マー、 (メタ)アクリル酸 2—ヒドロキシェチル、 (メタ)アクリル酸 2—ヒドロキシプロピル、 (メタ)アクリル酸 4ーヒドロキシブチル、 (メタ)アクリル酸 6—ヒドロキシへキシル、 (メタ) アクリル酸 8—ヒドロキシォクチル、 (メタ)アクリル酸 10—ヒドロキシデシル、 (メタ)ァク リル酸 12 ヒドロキシラウリル若しくは(4ーヒドロキシメチルシクロへキシル) メチル アタリレート等の様なヒドロキシル基含有モノマー、スチレンスルホン酸、ァリルスルホ ン酸、 2— (メタ)アクリルアミド— 2—メチルプロパンスルホン酸、 (メタ)アクリルアミドプ 口パンスルホン酸、スルホプロピル(メタ)アタリレート若しくは(メタ)アタリロイルォキシ ナフタレンスルホン酸等の様なスルホン酸基含有モノマー、又は 2—ヒドロキシェチル アタリロイルホスフェート等の様な燐酸基含有モノマーが挙げられる。
[0051] 前記熱硬化性樹脂としては、フエノール樹脂、ァミノ樹脂、不飽和ポリエステル樹脂 、エポキシ樹脂、ポリウレタン樹脂、シリコーン樹脂、又は熱硬化性ポリイミド樹脂等が 挙げられる。これらの樹脂は、単独で又は 2種以上併用して用いることができる。特に 、半導体素子を腐食させるイオン性不純物等含有が少な!/、エポキシ樹脂が好まし!/、 。また、エポキシ樹脂の硬化剤としてはフエノール樹脂が好ましい。
[0052] 前記エポキシ樹脂は、接着剤組成物として一般に用いられるものであれば特に限 定は無ぐ例えばビスフエノール A型、ビスフエノール F型、ビスフエノール S型、臭素 化ビスフエノーノレ A型、水添ビスフエノーノレ A型、ビスフエノーノレ AF型, ビフエニル型 、ナフタレン型、フルオンレン型、フエノールノボラック型、オルソクレゾールノボラック 型、トリスヒドロキシフエニルメタン型、テトラフエ二ロールエタン型等の二官能エポキシ 樹脂や多官能エポキシ樹脂、又はヒダントイン型、トリスグリシジルイソシァヌレート型 若しくはグリシジルァミン型等のエポキシ樹脂が用いられる。これらは単独で、又は 2 種以上を併用して用いることができる。これらのエポキシ樹脂のうちノポラック型ェポ キシ樹脂、ビフエニル型エポキシ樹脂、トリスヒドロキシフエニルメタン型樹脂又はテト ラフェニロールエタン型エポキシ樹脂が特に好ましい。これらのエポキシ樹脂は、硬 化剤としてのフエノール樹脂との反応性に富み、耐熱性等に優れるからである。
[0053] 更に前記フエノール樹脂は、前記エポキシ樹脂の硬化剤として作用するものであり 、例えば、フエノールノポラック樹脂、フエノールァラルキル樹脂、クレゾールノポラック 樹脂、 tert—ブチルフエノールノポラック樹脂、ノユルフェノールノポラック樹脂等のノ ポラック型フエノール樹脂、レゾール型フエノール樹脂、ポリパラォキシスチレン等の ポリオキシスチレン等が挙げられる。これらは単独で、又は 2種以上を併用して用いる こと力 Sできる。これらのフエノール樹脂のうちフエノールノポラック樹脂、フエノールァラ ルキル樹脂が特に好ましい。半導体装置の接続信頼性を向上させることができるから である。 [0054] 前記エポキシ樹脂とフエノール樹脂の配合割合は、例えば、前記エポキシ樹脂成 分中のエポキシ基 1当量当たりフエノール樹脂中の水酸基が 0. 5〜2. 0当量になる ように配合することが好適である。より好適なのは 0. 8〜; 1. 2当量である。即ち、両者 の配合割合が前記数値範囲を外れると、十分な硬化反応が進まず、エポキシ樹脂硬 化物の特性が劣化し易くなるからである。
[0055] 尚、本発明に於!/、ては、エポキシ樹脂、フエノール樹脂及びアクリル樹脂を含む接 着シートが特に好ましい。これらの樹脂は、イオン性不純物が少なく耐熱性が高いの で、半導体素子の信頼性を確保できる。この場合の配合比は、アクリル樹脂成分 10 0重量部に対して、エポキシ樹脂とフエノール樹脂の混合量が 10〜200重量部であ
[0056] 本発明の接着シートは、予めある程度架橋をさせておく為、作製に際し、重合体の 分子鎖末端の官能基等と反応する多官能性化合物を架橋剤として添加させておくの がよい。これにより、高温下での接着特性を向上させ、耐熱性の改善を図る。
[0057] 前記架橋剤としては、従来公知のものを採用することができる。特に、トリレンジイソ シァネート、ジフエニルメタンジイソシァネート、 p フエ二レンジイソシァネート、 1 , 5 ナフタレンジイソシァネート、多価アルコールとジイソシァネートの付加物等のポリ イソシァネート化合物がより好まし!/、。
[0058] 架橋剤の添加量としては、アクリル樹脂 100重量部に対し、通常 0. 05〜7重量部と するのが好ましい。架橋剤の量が 7重量部より多いと、接着力が低下するので好まし くない。その一方、 0. 05重量部より少ないと、凝集力が不足するので好ましくない。 また、この様なポリイソシァネート化合物と共に、必要に応じて、エポキシ樹脂等の他 の多官能性化合物を一緒に含ませるようにしてもよ!/、。
[0059] また、本発明の接着シートには、その用途に応じて無機充填剤を適宜配合すること 力できる。無機充填剤の配合は、導電性の付与や熱伝導性の向上、引張貯蔵弾性 率の調節等を可能とする。前記無機充填剤としては、例えば、シリカ、クレー、石膏、 炭酸カルシウム、硫酸バリウム、酸化アルミナ、酸化ベリリウム、炭化珪素、窒化珪素 等のセラミック類、アルミニウム、銅、銀、金、ニッケル、クロム、鈴、錫、亜鉛、パラジゥ ム、半田等の金属、又は合金類、その他カーボン等からなる種々の無機粉末が挙げ られる。これらは単独で又は 2種以上を併用して用いることができる。なかでも、シリカ
、特に溶融シリカが好適に用いられる。また、無機充填剤の平均粒径は 0.;!〜 80 mの範囲内であることが好ましい。
[0060] 前記無機充填剤の配合量は、有機樹脂成分 100重量部に対し 0〜80重量部に設 定すること力 S好ましく、 0〜70重量部に設定することがより好ましい。
[0061] 尚、本発明の接着シートには、前記無機充填剤以外に、必要に応じて他の添加剤 を適宜に配合することができる。他の添加剤としては、例えば難燃剤、シランカツプリ ング剤又はイオントラップ剤等が挙げられる。
[0062] 前記難燃剤としては、例えば、三酸化アンチモン、五酸化アンチモン、臭素化工ポ キシ樹脂等が挙げられる。これらは単独で、又は 2種以上を併用して用いることがで きる。
[0063] 前記シランカップリング剤としては、例えば、 β一(3, 4—エポキシシクロへキシル) シプロピルメチルジェトキシシラン等が挙げられる。これらの化合物は、単独で、又は 2種以上を併用して用いることができる。
[0064] 前記イオントラップ剤としては、例えばノ、イド口タルサイト類、水酸化ビスマス等が挙 げられる。これらは単独で、又は 2種以上を併用して用いることができる。
[0065] 次に、前記接着シート 12を用いた半導体装置の製造方法について、図 2を参照し ながら以下に説明する。
本実施の形態に係る半導体装置の製造方法は、半導体素子 13を基板又はリード フレーム (被着体、以下単に基板等と称する) 11上に接着シート 12で仮固着する仮 固着工程と、半導体素子 13にワイヤーボンディングをするワイヤーボンディング工程 と、半導体素子 13を封止樹脂 15で封止する封止工程とを含む。
[0066] 前記仮固着工程は、図 2 (a)に示すように、半導体素子 13を、接着シート 12を介し て基板等 11に仮固着する工程である。半導体素子 13を基板等 1 1上に仮固着する 方法としては、例えば基板等 11上に接着シート 12を積層した後、接着シート 12上に 、ワイヤーボンド面が上側となる様にして半導体素子 13を順次積層して仮固着する 方法が挙げられる。また、予め接着シート 12が仮固着された半導体素子 13を基板等 11に仮固着して積層してもょレ、。
[0067] 尚、本発明に於いて、半導体素子 13の厚さは特に限定されない。通常、その厚さ は 200 m以下である力 本発明に於いては、例えば厚さが 100 m以下、更には 厚さが 25〜50 111の半導体素子にも対応可能である。薄型化した半導体素子 13を 基板等 11に仮固着すると、半導体素子 13が凹状又は凸状に反った状態になること がある。その結果、基板等 11との間に隙間が生じ、高信頼性の半導体装置が得られ ないという不具合が生じる。しかし、本発明に於いては、後述の封止工程を行うことに より半導体素子 13を基板等 11に固着すると共に、当該隙間を塞ぐことが可能となる。 その詳細については後述する。
[0068] 前記基板としては、従来公知のものを使用することができる。また、前記リードフレー ムとしては、 Cuリードフレーム、 42Alloyリードフレーム等の金属リードフレームゃガラ スエポキシ、 BT (ビスマレイミド―トリアジン)、ポリイミド等からなる有機基板を使用す ること力 Sできる。しかし、本発明はこれに限定されるものではなぐ半導体素子をマウ ントし、半導体素子と電気的に接続して使用可能な回路基板も含まれる。
[0069] 前記ワイヤーボンディング工程は、基板等 11の端子部 (インナーリード)の先端と半 導体素子 13上の電極パッド(図示しない)とをボンディングワイヤー 16で電気的に接 続する工程である(図 2 (b)参照)。前記ボンディングワイヤー 16としては、例えば金 線、アルミニウム線又は銅線等が用いられる。ワイヤーボンディングを行う際の温度は 、 80〜250°C、好ましくは 80〜220°Cの範囲内で行われる。また、その加熱時間は 数秒〜数分間行われる。結線は、前記温度範囲内となる様に加熱された状態で、超 音波による振動エネルギーと印加加圧による圧着エネルギーの併用により行われる。
[0070] 本工程は、接着シート 12による固着を行うことなく実行される。また、本工程の過程 で接着シート 12により半導体素子 13と基板等 11とが固着することはない。ここで、接 着シート 12の剪断接着力は、 80〜250°Cの温度範囲内であっても、 0. 2MPa以上 であることが好ましい。当該温度範囲内で剪断接着力が 0. 2MPa未満であると、ワイ ヤーボンディングの際の超音波振動により半導体素子が動き、ワイヤーボンディング を行うことができず、歩留まりが低下する場合があるからである。
[0071] 前記封止工程は、封止樹脂 15により半導体素子 13を封止する工程である(図 2 (c )参照)。本工程は、基板等 11に搭載された半導体素子 13やボンディングワイヤー 1 6を保護する為に行われる。本工程は、例えば封止用の樹脂を金型で成型すること により行う。封止樹脂 15としては、例えばエポキシ系の樹脂を使用する。樹脂封止の 際の加熱温度は、通常 175°Cで 60〜90秒間行われる力 本発明はこれに限定され ず、例えば 150〜200°Cで数分間キュアすることができる。また本工程に於いては、 樹脂封止の際に加圧してもよい。この場合、加圧する圧力は 1〜; 15MPaであることが 好ましぐ 3〜; !OMPaであることがより好ましい。当該範囲内で圧力を加えると、接着 シート 12を介して半導体素子 13と基板等 11とを固着すると共に、両者の間に存在 する空隙を塞ぐこと力 Sできる。その結果、後述する後硬化工程が行われない場合に 於いても、本工程に於いて接着シート 12による固着が可能であり、製造工程数の減 少及び半導体装置の製造期間の短縮に寄与することができる。ここで、基板等 11と 半導体素子 13との接着面積は 90%以上であることが好ましぐ 95%以上であること 力はり好ましい。接着面積が 90%未満であると、耐湿信頼性に於いて不具合が生じ る場合があるからである。尚、接着面積とは、半導体素子 13と基板等 11とが接着シ ート 12を介して接している領域を言い、接着シート 12が何れか一方にのみ接着して いる領域は含まない。
[0072] 本発明に於いては、封止工程の後に、封止樹脂 15をアフターキュアする後硬化工 程を行ってもよい。本工程に於いては、前記封止工程で硬化不足の封止樹脂 15を 完全に硬化させる。本工程に於ける加熱温度は、封止樹脂の種類により異なるが、 例えば 150〜200°Cの範囲内であり、加熱時間は 0. 5〜8時間程度である。
[0073] (実施の形態 2)
本発明に形態 2に係る半導体装置の製造方法について、図 3を参照しながら説明 する。図 3は、本実施の形態に係る半導体装置の製造方法を説明する為の工程図で ある。
[0074] 本実施の形態に係る半導体装置は、前記実施の形態 1に係る半導体装置と比較し て、複数の半導体素子を積層して 3次元実装とした点が異なる。より詳細には、半導 体素子の上に他の半導体素子を、前記接着シートを介して積層する工程を含む点 が異なる。 [0075] 先ず、図 3 (a)に示すように、所定のサイズに切り出した少なくとも 1つ以上の接着シ ート 12を被着体である基板等 1 1に貼り付ける。次に、接着シート 12上に半導体素子 13を、ワイヤーボンド面が上側となる様にして仮固着する(図 3 (b)参照)。更に、半 導体素子 13上に、その電極パッド部分を避けて接着シート 14を貼り付ける(図 3 (c) 参照)。更に、接着シート 14上に、ワイヤーボンド面が上側となる様にして半導体素 子 13を仮固着する(図 3 (d)参照)。
[0076] 次に、図 3 (e)に示すように、加熱工程を行うことなぐワイヤーボンディング工程を 行う。これにより、半導体素子 13に於ける電極パッドと基板等 11とをボンディングワイ ヤー 16で電気的に接続する。
[0077] 続いて、封止樹脂により半導体素子 13を封止する封止工程を行い、封止樹脂を硬 化させると共に、接着シート 12 · 14により基板等 11と半導体素子 13との間、及び半 導体素子 13同士の間に生じている隙間を塞ぐ。当該封止工程の後には、後硬化工 程を fiつてもよい。
[0078] 本実施の形態によれば、半導体素子の 3次元実装の場合に於いても、基板等 11と 半導体素子 13等との間の隙間を埋めるので、高信頼性の半導体装置を歩留まり良く 製造できる。また、半導体素子 13等を基板等 11に隙間なく確実に接着固定できるの で、半導体素子の一層の薄型化も可能になる。
[0079] (実施の形態 3)
本実施の形態の 3に係る半導体装置の製造方法について、図 4を参照しながら説 明する。図 4は、本実施の形態に係る半導体装置の製造方法を説明する為の工程図 である。
[0080] 本実施の形態に係る半導体装置は、前記実施の形態 2に係る半導体装置と比較し て、積層した半導体素子間にスぺーサを介在させた点が異なる。より詳細には、半導 体素子と半導体素子との間に、接着シートを介してスぺーサを積層する工程を含む 点が異なる。
[0081] 先ず、図 4 (a)〜4 (c)に示すように、前記実施の形態 2と同様にして、基板等 1 1上 に接着シート 12、半導体素子 13及び接着シート 14を順次積層して仮固着する。更 に、接着シート 14上に、スぺーサ 21、接着シート 14及び半導体素子 13を順次積層 して仮固着する(図 4 (d)〜4 (f)参照)。
[0082] 次に、図 4 (g)に示すように、加熱工程を行うことなぐワイヤーボンディング工程を 行う。これにより、半導体素子 13に於ける電極パッドと基板等 11とをボンディングワイ ヤー 16で電気的に接続する。
[0083] 次に、封止樹脂により半導体素子 13を封止する封止工程を行い、封止樹脂を硬化 させると共に、接着シート 14により基板等 11と半導体素子 13との間、及び半導体素 子 13同士の間に生じている隙間を塞ぐ。また、封止工程の後、後硬化工程を行って もよい。以上の製造工程を行うことにより、本実施の形態に係る半導体装置を得ること ができる。
[0084] 尚、前記スぺーサ 21としては、特に限定されるものではなぐ例えば従来公知のシ リコンチップ、ポリイミドフィルム等を用いることができる。
[0085] (実施の形態 4)
本実施の形態 4に係る半導体装置の製造方法について、図 5を参照しながら説明 する。図 5は、本実施の形態に係る半導体装置の製造方法を説明する為の工程図で ある。
[0086] 先ず、図 5 (a)に示すように、接着シート 12 'を半導体ウェハ 13 'の裏面に貼り付け て接着シート付きの半導体ウェハを作製する。次に、半導体ウェハ 13 'にダイシング テープ 33に貼り合わせる(図 5 (b)参照)。更に、接着シート付きの半導体ウェハを所 定の大きさとなる様にダイシングしてチップ状にし(図 5 (c)参照)、ダイシングテープ 3 3から接着剤が付!/、たチップを剥離する。
[0087] 次に、図 5 (d)に示すように、接着シート 12が付いた半導体素子 13を、ワイヤーボ ンド面が上側となる様にして基板等 11上に仮固着する。更に、接着シート 31が付い た大きさの異なる半導体素子 32を、ワイヤーボンド面が上側となる様にして半導体素 子 13上に仮固着する。
[0088] 次に、図 5 (e)に示すように、ワイヤーボンディング工程を行う。これにより、半導体 素子 13 · 32に於ける電極パッドと基板等 11とをボンディングワイヤー 16で電気的に 接続する。
[0089] 次に、封止樹脂により半導体素子 13 · 32を封止する封止工程を行い、封止樹脂を 硬化させると共に、接着シート 12 · 31により基板等 11と半導体素子 13との間、及び 半導体素子 13と半導体素子 32との間を固着させる。また、封止工程の後、後硬化工 程を行ってもよい。以上の製造工程を行うことにより、本実施の形態に係る半導体装 置を得ること力 Sでさる。
[0090] (実施の形態 5)
本実施の形態 5に係る半導体装置の製造方法について、図 6を参照しながら説明 する。図 6は、本実施の形態に係る半導体装置の製造方法を説明する為の工程図で ある。
[0091] 本実施の形態に係る半導体装置の製造方法は、前記実施の形態 4に係る半導体 装置の製造方法と比較して、ダイシングテープ 33上に接着シート 12 'を積層した後、 更に接着シート 12,上に半導体ウェハ 13,を積層した点が異なる。
[0092] 先ず、図 6 (a)に示すように、ダイシングテープ 33上に接着シート 12 'を積層する。
更に、接着シート 12 '上に半導体ウェハ 13 'を仮固着する(図 6 (b)参照)。更に、接 着シート付きの半導体ウェハを所定の大きさとなる様にダイシングしてチップ状にし( 図 6 (c)参照)、ダイシングテープ 33から接着剤が付!/、たチップを剥離する。
[0093] 次に、図 6 (d)に示すように、接着シート 12が付いた半導体素子 13を、ワイヤーボ ンド面が上側となる様にして基板等 11上に仮固着する。更に、接着シート 31が付い た大きさの異なる半導体素子 32を、ワイヤーボンド面が上側となる様にして半導体素 子 13上に仮固着する。この際、半導体素子 32の固着は、下段の半導体素子 13の 電極パッド部分を避けて行われる。
[0094] 次に、図 6 (e)に示すように、加熱工程を行うことなぐワイヤーボンディング工程を 行う。これにより、半導体素子 13 · 32に於ける電極パッドと基板等 11に於ける内部接 続用ランドとをボンディングワイヤー 16で電気的に接続する。
[0095] 次に、封止樹脂により半導体素子を封止する封止工程を行い、封止樹脂を硬化さ せると共に、接着シート 12 · 31により基板等 11と半導体素子 13との間、及び半導体 素子 13と半導体素子 32との間を固着させる。また、封止工程の後、後硬化工程を行 つてもよい。以上の製造工程を行うことにより、本実施の形態に係る半導体装置を得 ること力 Sでさる。 [0096] (実施の形態 6)
本実施の形態 6に係る半導体装置の製造方法について、図 7及び図 8を参照しな がら説明する。図 7は、本実施の形態に係る半導体装置の製造方法を説明する為の 工程図である。図 8は、本実施の形態に係る半導体装置の製造方法により得られた 半導体装置の概略を示す断面図である。
[0097] 本実施の形態に係る半導体装置は、前記実施の形態 3に係る半導体装置と比較し て、スぺーサとしてコア材料を採用した点が異なる。
[0098] 先ず、前記実施の形態 5と同様にして、ダイシングテープ 33上に接着シート 12 'を 積層する。更に、接着シート 12 '上に半導体ウェハ 13 'を貼り付ける。更に、接着シー ト付きの半導体ウェハを所定の大きさとなる様にダイシングしてチップ状にし、ダイシ ングテープ 33から接着剤が付いたチップを剥離する。これにより、接着シート 12を備 えた半導体素子 13を得る。
[0099] 他方、ダイシングテープ 33の上に接着シート 41を形成し(図 7 (a)参照)、該接着シ ート 41上にコア材料 42を貼り付ける(図 7 (b)参照)。更に、所定のサイズとなる様に ダイシングしてチップ状にし(図 7 (c)参照)、ダイシングテープ 33から接着剤が付!/ヽ たチップを剥離する。これにより、接着シート 41 'を備えたチップ状のコア材料 42 'を 得る。
[0100] 次に、前記半導体素子 13を、ワイヤーボンド面が上側となる様に、基板等 11上に 接着シート 12を介して仮固着する。更に、半導体素子 13上に接着シート 41 'を介し てコア材料 42 'を固着する。更に、コア材料 42 '上に接着シート 12を介して半導体素 子 13を、ワイヤーボンド面が上側となる様に仮固着する。以上の製造工程を行うこと により、本実施の形態に係る半導体装置を得ることができる。
[0101] 次に、加熱工程を行うことなぐワイヤーボンディング工程を行う。これにより、半導 体素子 13に於ける電極パッドと基板等 11に於ける内部接続用ランドとをボンディン グワイヤー 16で電気的に接続する(図 8参照)。
[0102] 次に、封止樹脂により半導体素子を封止する封止工程を行い、封止樹脂を硬化さ せると共に、接着シート 12 · 41 'により基板等 11と半導体素子 13との間、及び半導体 素子 13とコア材料 42 'との間を固着させる。また、封止工程の後、後硬化工程を行つ てもよい。以上の製造工程を行うことにより、本実施の形態に係る半導体装置を得る こと力 Sでさる。
[0103] 尚、前記コア材料としては特に限定されるものではなぐ従来公知のものを用いるこ とカできる。具体的には、フィルム(例えばポリイミドフィルム、ポリエステルフィルム、 ポリエチレンテレフタレートフィルム、ポリエチレンナフタレートフィルム、ポリカーボネ 一トフイルム等)、ガラス繊維やプラスチック製不織繊維で強化された樹脂基板、ミラ 一シリコンウェハ、シリコン基板又はガラス基板等を使用できる。
[0104] (実施の形態 7)
本実施の形態 7に係る半導体装置の製造方法について、図 9を参照しながら説明 する。図 9は、本実施の形態に係る半導体装置の製造方法を説明する為の工程図で ある。
[0105] 本実施の形態に係る半導体装置の製造方法は、前記実施の形態 6に係る半導体 装置の製造方法と比較して、コア材料のダイシングに替えて、打ち抜き等によりチッ プ化した点が異なる。
[0106] 先ず、前記実施の形態 6と同様にして、接着シート 12を備えた半導体素子 13を得 る。他方、接着シート 41上にコア材料 42を貼り付ける。更に、所定のサイズとなる様 に打ち抜き等によりチップ状にし,接着シート 41 'を備えたチップ状のコア材料 42'を 得る。
[0107] 次に、前記実施の形態 6と同様にして、接着シート 12 ·41 'を介してコア材料 42'及 び半導体素子 13を順次積層して仮固着する。
[0108] 更に、ワイヤーボンディング工程、封止工程、必要に応じて後硬化工程を行い、本 実施の形態に係る半導体装置を得ることができる。
[0109] (その他の事項)
前記基板等上に半導体素子を 3次元実装する場合、半導体素子の回路が形成さ れる面側には、バッファーコート膜が形成されている。当該バッファーコート膜として は、例えば窒化珪素膜やポリイミド樹脂等の耐熱樹脂からなるものが挙げられる。
[0110] また、半導体素子の 3次元実装の際に、各段で使用される接着シートは同一組成 力 なるものに限定されず、製造条件や用途等に応じて適宜変更可能である。 [0111] また、前記実施の形態に於いて述べた積層方法は例示的に述べたものであって、 必要に応じて適宜変更が可能である。例えば、前記実施の形態 2に係る半導体装置 の製造方法に於いては、 2段目以降の半導体素子を前記実施の形態 3に於いて述 ベた積層方法で積層することも可能である。
[0112] また、前記実施の形態に於いては、基板等に複数の半導体素子を積層させた後に 、一括してワイヤーボンディング工程を行う態様について述べた力 本発明はこれに 限定されるものではない。例えば、半導体素子を基板等の上に積層する度にワイヤ 一ボンディング工程を行うことも可能である。
実施例
[0113] 以下に、この発明の好適な実施例を例示的に詳しく説明する。但し、この実施例に 記載されている材料や配合量等は、特に限定的な記載がない限りは、この発明の範 囲をそれらのみに限定する趣旨のものではなぐ単なる説明例に過ぎない。尚、各例 中、部は特記がな!、限りいずれも重量基準である。
[0114] (実施例 1)
先ず、ブチルアタリレートを主成分としたポリマー(根上工業 (株)製、パラクロン SN 710) 40部、エポキシ樹脂(ジャパンエポキシレジン(株)製、ェピコート 1003) 37 部、フエノール樹脂 (荒川化学 (株)製、 P— 180) 23部、イソシァネート系架橋剤(商 品名:コロネート HX、 日本ポリウレタン (株)製) 3部、層状珪酸塩としてソマシフ MEE (商品名、コープケミカル社製、長径の平均長さ 3· 2 111、平均アスペクト比 84) 10 部を混合し、メチルェチルケトンに溶解させて撹拌し、濃度 20重量%のアクリル系の 接着剤組成物の溶液を調製した。
[0115] この接着剤組成物の溶液を、シリコーン離型処理したポリエチレンテレフタレートフ イルム(厚さ 50 m)からなる離型処理フィルム(コア材料)上に塗布し、その後、 120 °Cで 3分間乾燥させた。これにより、離型処理フィルム上に厚さ 25 πιの接着剤層を 積層した本実施例 1に係る接着シートを作製した。
[0116] (実施例 2)
アタリノレ酸 2 ェチノレへキシノレ 70部、アクリル酸 η ブチル 25部及びアクリル酸 5部 を構成モノマーとするアクリル系共重合体、イソシァネート系架橋剤(商品名:コロネ ート HX、 日本ポリウレタン (株)製) 3部、層状珪酸塩としてソマシフ MEE (商品名、コ ープケミカル社製、長径の平均長さ 3. 2 111、平均アスペクト比 84) 20部を混合し、 メチルェチルケトンに溶解させて、濃度 20重量%のアクリル系の接着剤組成物の溶 液を調製した。
[0117] 更に、前記実施例 1と同様にして、離型処理フィルム上に厚さ 25 mの接着剤層を 積層した接着シートを作製した。
[0118] (比較例 1)
本比較例 1に於!/、ては、接着剤組成物の調製の際に層状ケィ酸塩を添加しなかつ たこと以外は、実施例 1と同様にして、本比較例 1に係る接着シートを作製した。尚、 接着シートに於ける接着剤層の厚さは、 25 11 mとした。
[0119] (比較例 2)
本比較例 2に於いては、前記比較例 1で使用したブチルアタリレートに代えて、ァク リル酸エステル系ポリマーを主成分としたポリマー(根上工業 (株)製、パラクロン SN — 710)を用いたこと以外は、前記比較例 1と同様にして、本比較例 2に係る接着シ ートを作製した。尚、接着シートに於ける接着剤層の厚さは、 25 111とした。
[0120] (実施例 3)
本実施例 3に於いては、前記実施例 1に於いて、アクリル系粘着剤の調製にあたつ て、層状珪酸塩を 42部添加した以外は実施例と 1と同じ組成のアクリル系粘着剤を 調製した。しかし、層状珪酸塩を 42部添加したことにより、実施例 1及び 2の接着シー トと比較して、有機樹脂組成物との相溶性が低ぐ不均一に分散された接着シートが 得られた。
[0121] (実施例 4)
本実施例 4に於いては、接着剤組成物の調製の際に、層状珪酸塩としてソマシフ MEE (コープケミカル(株)製、長径の平均長さ 3· 2 m、平均アスペクト比 84) 0· 1 部を添加した以外は実施例 1と同様にして、本実施例に係る接着シートを作製した。 尚、接着シートに於ける接着剤層の厚さは、 25 /^ 111とした。
[0122] (実施例 5)
本実施例 5に於いては、接着剤組成物の調製の際に、層状珪酸塩としてソマシフ MEE (コープケミカル(株)製、長径の平均長さ 3· 2 ^ 111,平均アスペクト比 84) 40部 を添加した以外は実施例 1と同様にして、本実施例に係る接着シートを作製した。尚 、接着シートに於ける接着剤層の厚さは、 25 /^ 111とした。
[0123] (実施例 6)
本実施例 6に於いては、前記実施例 1で使用した層状珪酸塩に代えて、窒化ホウ 素(平均粒径 5 m、トクャマ (株)製、商品名; GSP)を 5部添加した以外は実施例と 1と同様にして、本実施例に係る接着シートを作製した。尚、接着シートに於ける接着 剤層の厚さは、 25 H mとした。
[0124] (実施例 7)
本実施例 7に於いては、接着剤組成物の調製の際に、層状珪酸塩としてソマシフ MEE (コープケミカル(株)製、長径の平均長さ 3· 2 m、平均アスペクト比 84) 0· 0 9部を添加した以外は実施例 1と同様にして、本実施例に係る接着シートを作製した 。尚、接着シートに於ける接着剤層の厚さは、 25 111とした。
[0125] (結果)
前記の実施例 1、 2、 4〜7、及び比較例 1、 2の接着シートについて、以下の方法に より、引張貯蔵弾性率、剪断接着力、ダイシング性、吸湿信頼性の各評価を行った。 これらの結果は表 1に示される通りであった。
[0126] [引張貯蔵弾性率]
離型処理を施した剥離ライナ上に、各実施例又は各比較例で使用した接着剤組成 物の溶液を塗布して乾燥し、厚さ 100 の接着剤層を形成した。この接着剤層を 1 50°Cで lhrオーブン中に放置した後、粘弾性測定装置(レオメトリックス社製:形式: RSA— II)を用いて、各接着剤層の硬化後に於ける 200°Cでの引張貯蔵弾性率を 測定した。より詳細にはサンプルサイズを長さ 30· 0 X幅 5. 0 X厚さ 0. 1mmとし、測 定試料をフィルム弓 Iつ張り測定用治具にセットし、 50°C〜 250°Cの温度域で周波数 1. 0Hz、歪み 0. 025%、昇温速度 10°C/分の条件下で測定した。
[0127] [剪断接着力の測定]
前記実施例及び比較例に於!/、て作製した接着シートにつ!/、て、基板に対する仮固 着時の剪断接着力を以下の通り測定した。 [0128] 先ず、アルミ蒸着ウェハをダイシングして、縦 2mm X横 2mm X厚さ 500 μ mのチッ プを作製した。このチップを、各実施例又は比較例で得られた接着シートにより、基 板上にダイアタッチをして、各試験片を作製した。接着シートは、セパレーターから剥 離した後、 2mm口に切断したものを用いた。ダイアタッチは、 120°Cの温度下で荷重 (0. 25MPa)をかけ、 1秒間加熱するという条件下で、ダイポンダー((株)新川製 SP A— 300)を用いて行った。また、基板としては、 UniMicron Technology Corpo ration製の TFBGA16 X 16 (2216— 001A01) (商品名)を用いた。このとき、各実 施例で得られた接着シートにつ!/、ては、基板及びチップに対して接着面に空隙を生 じることなく仮固着すること力 Sでさた。
[0129] 剪断接着力の測定は、温度制御可能な熱板に各試験片を固定し、ダイアタッチさ れた半導体素子をプッシュプルゲージにて速度 0. 1mm/秒の速度で水平に押して 、 175°C加温下にて行った。また、測定装置として、 Model— 2252 (商品名、 AIKO Hエンジニアリング (株)製)を使用した。尚、ダイアタッチ後に各試験片の加熱工程 は行わなかった。
[0130] [ダイシング十生評価]
実施例及び比較例で得られた接着シートにダイシングテープ (NBD— 5170K、 日 東電工 (株)製)を 50°Cで貼り付けし、ウェハー(直径 6インチ、厚さ 150 m)の裏面 に 50°Cで貝占り付けした。その後ダイサーを用いて、スピンドル回転数 40, 000rpm、 切断速度 50mm/secで 5mm X 5mm角の半導体素子のサイズにダイシング(切断 )したときのチップ飛びの有無を調べた。前記チップ飛びが 10%以下のときをチップ 飛びなしとした。
[0131] [ワイヤーボンディング性]
前記半導体素子をリードフレームのダイパッド部分に 120°C X 500gf X lsecの条 件でダイボンディングした後、 115KHzワイヤポンダー(新 11製: UTC— 300BIsupe r)を用いて φ 25 mの金線(田中貴金属製 GMG— 25)にて下記の条件でワイヤー ボンディングを行った。尚、すべてのボンディングを完了するのに約 1時間を要した。 当該工程の終了後に、接着シート、半導体素子及びリードフレームの接着状態につ いて確認したところ、各実施例の接着シートについては、 1時間の熱履歴が加わった にも関わらず完全に固着されておらず、仮固着の状態を維持していた。
[0132] ファーストボンディング加圧: 80g
ファーストボンディング超音波強度: 550mW
ファーストボンディング印加時間: 10msec
セカンドボンディング加圧: 80g
セカンドボンディング超音波強度: 500mW
Figure imgf000028_0001
[0133] [吸湿信頼性の評価]
前記半導体素子をビスマレイミド―トリアジン樹脂基板に、 120°C X 500gf X lsec の条件でダイボンディングした。その後、 180°Cで lhrの熱履歴を力、け、エポキシ系 封止樹脂(日東電工製、商品名; HC— 300B6)により、これらをモールドマシン (TO WA製, Model—Y— serise)を用いて、 175°Cで、プレヒート設定 3秒、インジェクシ ヨン時間 12秒、キュア時間 120秒にてモールドした。更に、 175°C X 5hrの条件で加 熱硬化して半導体パッケージを得た。
[0134] この半導体パッケージを、恒温恒湿器を用いて、温度 30°C、相対湿度 60%RHの 環境下で、 192時間吸湿処理した。その後、 IRリフロー装置 SAI— 2604M (千住金 属工業製)に 3回繰り返し投入した。そのときのパッケージ表面ピーク温度は、 260°C になるように調整した。その後、パッケージの中心部を切断し、切断面を研磨した後、 キーエンス製光学顕微鏡を用いて、パッケージの断面を観察した。パッケージの断 面に於いて、接着シートの剥離が認められな力、つたものを〇とし、剥離があったもの を Xとした。
[0135] [表 1]
Figure imgf000029_0001
表 1から明らかなように、本発明の実施例 1 2 4 7の接着シートは良好な剪断接 着力、及びダイシング性を示しており、これにより層状ケィ酸塩、窒化ホウ素等の層状 粘土鉱物を添加することにより、接着性の低下を抑制できることが確認された。また、 ワイヤーボンディングの成功率も 100%であり、各実施例の接着シートがずり変形を 生じずワイヤーボンディング性に優れていることが分かった。また、実施例 1 2 4 6の接着シートにおいては吸湿信頼性試験において良好な剥離性を示し、剥離不良 も生じなかった。即ち、各実施例の接着シートから、層状珪酸塩及び窒化ホウ素を使 用することで、これまでにない耐熱性を有しながら高信頼性の半導体パッケージの提 供が可能となることを確認した。これに対して、比較例 1、 2に示す従来のアクリル樹 脂からなる接着剤の剪断接着力は加温下で十分な接着力を得られず、ワイヤーボン デイング時にチップずれ等のボンディング不良が発生した。尚、比較例 1、 2の接着シ ートを使用した場合、吸湿信頼性試験において剥離不良が発生した。

Claims

請求の範囲
[I] 半導体素子を被着体に接着させ、該半導体素子にワイヤーボンディングをする際 に用いる半導体装置製造用の接着シートであって、親油性の層状粘土鉱物を含有 することを特徴とする半導体装置製造用の接着シート。
[2] 前記層状粘土鉱物の含有量は、前記接着シートを構成する接着剤組成物 100重 量部に対して、 0.;!〜 40重量部の範囲内であることを特徴とする請求項 1に記載の 半導体装置製造用の接着シート。
[3] 前記被着体に対し、 175°Cの条件下で 0. 2〜2MPaの範囲内の剪断接着力を有 することを特徴とする請求項 1に記載の半導体装置製造用の接着シート。
[4] 硬化前の 120°Cに於ける引張貯蔵弾性率は 1 X 104Pa以上であり、硬化後の 200
°Cに於ける引張貯蔵弾性率は 50MPa以下であることを特徴とする請求項 1に記載 の半導体装置製造用の接着シート。
[5] 前記接着剤組成物として熱可塑性樹脂が含有されていることを特徴とする請求項 2 に記載の半導体装置製造用の接着シート。
[6] 前記接着剤組成物として、熱硬化性樹脂と熱可塑性樹脂の双方が含有されてレ、る ことを特徴とする請求項 2に記載の半導体装置製造用の接着シート。
[7] 前記熱可塑性樹脂がアクリル樹脂であることを特徴とする請求項 5に記載の半導体 装置製造用の接着シート。
[8] 前記熱可塑性樹脂がアクリル樹脂であることを特徴とする請求項 6に記載の半導体 装置製造用の接着シート。
[9] 前記熱硬化性樹脂がエポキシ樹脂又はフエノール樹脂の少なくとも何れか一方で あることを特徴とする請求項 6に記載の半導体装置製造用の接着シート。
[10] 前記接着剤組成物がエポキシ樹脂、フエノール樹脂及びアクリル樹脂であり、アタリ ル樹脂成分 100重量部に対しエポキシ樹脂及びフエノール樹脂の混合量が 10〜20
0重量部であることを特徴とする請求項 2に記載の半導体装置製造用の接着シート。
[I I] 架橋剤が添加されていることを特徴とする請求項 10に記載の半導体装置製造用の 接着シート。
[12] 前記架橋剤の添加量は、前記アクリル樹脂 100重量部に対し、 0. 05〜7重量部で あることを特徴とする請求項 11に記載の半導体装置製造用の接着シート。
[13] 前記層状粘土鉱物の長径の平均長さは 0. 01〜; 100 mの範囲内であることを特 徴とする請求項 1に記載の半導体装置製造用の接着シート。
[14] 前記層状粘土鉱物のアスペクト比は 20〜500の範囲内であることを特徴とする請 求項 1に記載の半導体装置製造用の接着シート。
[15] 前記層状粘土鉱物は、層状ケィ酸塩であることを特徴とする請求項 1に記載の半導 体装置製造用の接着シート。
[16] 親油性の層状粘土鉱物を含有する半導体装置製造用の接着シートを介して、半導 体素子を被着体上に仮固着する仮固着工程と、
前記半導体素子にワイヤーボンディングをするワイヤーボンディング工程と、 前記半導体素子を封止樹脂により樹脂封止する封止工程と、
封止された構造物を個別の半導体装置に切断する切断工程とを有することを特徴 とする半導体装置の製造方法。
[17] 前記被着体は、基板、リードフレーム又は半導体素子であることを特徴とする請求 項 16に記載の半導体装置の製造方法。
[18] 前記半導体素子を封止樹脂により封止する封止工程と、前記封止樹脂の後硬化を 行う後硬化工程とを含み、
前記封止工程又は後硬化工程の少なくとも何れか一方の工程に於いて、加熱によ り封止樹脂を硬化させると共に、前記接着シートを介して半導体素子と被着体とを固 着させることを特徴とする請求項 16に記載の半導体装置の製造方法。
[19] 前記ワイヤーボンディング工程は、 80°C〜250°Cの範囲内で行われることを特徴と する請求項 16に記載の半導体装置の製造方法。
[20] 前記層状粘土鉱物として、層状ケィ酸塩を使用することを特徴とする請求項 16に 記載の半導体装置の製造方法。
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