WO2005072032A1 - Carte de circuit, structure de montage de carte de circuit et procede de montage de carte de circuit - Google Patents

Carte de circuit, structure de montage de carte de circuit et procede de montage de carte de circuit Download PDF

Info

Publication number
WO2005072032A1
WO2005072032A1 PCT/JP2005/000887 JP2005000887W WO2005072032A1 WO 2005072032 A1 WO2005072032 A1 WO 2005072032A1 JP 2005000887 W JP2005000887 W JP 2005000887W WO 2005072032 A1 WO2005072032 A1 WO 2005072032A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit board
component
land
mounting
lead
Prior art date
Application number
PCT/JP2005/000887
Other languages
English (en)
Japanese (ja)
Inventor
Naomi Ishizuka
Yoshifumi Kanetaka
Original Assignee
Nec Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corporation filed Critical Nec Corporation
Priority to JP2005517301A priority Critical patent/JPWO2005072032A1/ja
Publication of WO2005072032A1 publication Critical patent/WO2005072032A1/fr

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/306Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09909Special local insulating pattern, e.g. as dam around component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036Permanent spacer or stand-off in a printed circuit or printed circuit assembly
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447Lead-in-hole components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452Solder masks

Definitions

  • Circuit board mounting structure of circuit board, and mounting method of circuit board
  • the present invention relates to a circuit board for soldering a plug-in type electronic component with lead-free solder, and
  • a plug-in type electronic component is mounted on a circuit board having lands on the front and back surfaces, and the front and back lands are connected by plated through holes.
  • the present invention relates to a circuit board to be mounted, a mounting structure using the same, and a mounting method.
  • FIG. 1 is a cross-sectional view of a soldered portion showing a conventional mounting structure of an insertion-type electronic component on a circuit board.
  • a circuit board used for mounting electronic components is manufactured as follows, taking the most common subtractive method as an example.
  • a copper-clad laminate made by applying pressure and heat treatment to a copper foil on a laminate of a pre-predator impregnated with a thermosetting resin such as epoxy resin on a base material obtained by folding glass or the like into a fibrous form.
  • a copper foil is patterned to produce a wiring board having a predetermined number of inner layer patterns, and the wiring board and the copper-clad laminate are laminated via a pre-preder so that the copper-clad laminate becomes the outermost layer.
  • the substrates are integrated by pressurizing and heating to produce a substrate having the inner layer wiring 3 in the resin laminate 2.
  • an opening 5 is formed by drilling, an activation process, electroless plating, and electrolytic plating are performed to form a through hole 8.
  • patterning of the outermost copper layer is performed to form the outer layer wiring 4 and, at the same time, the substrate surface side (in this specification, the mounting surface of the insertion type electronic component is the front surface side, and The front surface land 6 is formed on the back surface, and the back surface land 7 is formed on the back surface side.
  • a photosensitive solder resist material is applied to a region excluding a soldered portion on the front and back surfaces of the substrate.
  • a white display paint is applied by a screen printing method or the like to form a display symbol such as a mounting position of the electronic component, a component number, a board number, and the like, thereby manufacturing the circuit board 1. The process is completed.
  • the process of soldering electronic components using the circuit board 1 manufactured as described above generally involves mounting a chip component or a surface mount type component such as a QFP (Quad Flat Package). After performing the reflow step, a flow step of mounting the import-type electronic component is performed. In the reflow process, solder is supplied to the land for mounting surface-mounted components on the circuit board, and a thermosetting adhesive for temporary fixing is applied to prevent falling and component displacement, and then surface mounting is performed. Soldering is performed by mounting the mold parts and heating them in a reflow oven.
  • QFP Quad Flat Package
  • the electronic component is mounted by inserting the lead 12 of the insertable electronic component 13 into the through hole 8, and in that state, the solder is brought into contact with the molten solder using a wave solder bath or the like. Then, soldering is performed. As a result, a solder fillet 14 is formed, and the lead 12 is electrically and mechanically coupled to the lands 6, 7 and the through hole 8. If surface-mounted components are also mounted on the back side of the circuit board, the surface-mounted components are soldered together with the insert-type electronic components in this flow step. In this case, a thermosetting adhesive for temporary fixing is applied, surface-mounted components such as chip components are mainly mounted, the adhesive is cured by heating, and then the insertion-type electronic components 13 are mounted. And perform flow soldering.
  • solder used in the reflow step and the flow step is tin-lead eutectic solder.
  • environmental pollution due to lead has led to an increase in environmental consciousness, and a shift to lead-free solder that does not contain lead is in progress.
  • This lead-free solder contains tin as a main component and is made of silver, copper, zinc, bismuth, indium, antimony, nickel, germanium, or the like.
  • the main lead-free solders are tin-zinc-based solders (tin-9, Owt% Zn, which is a eutectic composition of tin-zinc, and the amount of zinc is changed or other elements are added.
  • the solders with improved characteristics are collectively referred to as tin-zinc-based solders, such as Sn-8.OZn-3.OBi) or tin-copper-based solder (Sn-0, a eutectic composition of tin-copper).
  • Sn-8.OZn-3.OBi tin-copper-based solder
  • Sn-0 a eutectic composition of tin-copper
  • the amount of silver can be changed or other elements can be added, centered on Sn-0.7Cu-0.3Ag) or tin-silver solder (Sn-3.5wt% Ag, which is the eutectic composition of tin-silver). Those with improved characteristics are collectively referred to as “tin-silver based solders.” Typical columns are Sn-3.OAg-0. 5Cu, Sn_3.5Ag-0.
  • solders have higher tensile strength and creep strength and elongation of metal than the tin-lead eutectic solder (Sn 63wt%, remaining Pb), which has been used most frequently for soldering of electronic equipment. It has the metal characteristic that there is little. For this reason, stress relaxation is less likely to occur in the soldered part than in lead solder.
  • the melting temperature of tin-lead eutectic solder is 183 ° C, whereas that of lead-free solder is 190 ° C-230 ° C. Because of the increase, residual stress due to the difference in thermal expansion after solder solidification tends to increase.
  • FIGS. 2, 3, and 4 are cross-sectional views showing states of leads and solder fillets after soldering an electronic component having a housing made of a polyamide resin using a lead-free solder on a conventional circuit board. It is. 2, the right side of the figure shows the center of the electronic component 13, and the left side of the figure shows the end of the electronic component 13.
  • Table 1 shows the coefficient of thermal expansion between the glass epoxy resin laminate as the substrate material of the circuit board 1 and the polyamide resin as the housing material of the electronic component 13. As can be seen from Table 1, there is a large difference in the coefficient of thermal expansion between the board material and the electronic component housing in the horizontal direction of the circuit board.
  • the lead 12 fixed with lead-free solder is greatly inclined from the center of the electronic component 13 to the end.
  • the inclination of the lead is exaggerated.
  • the lead 12 located at the end is inclined by about half the radius of the lead with respect to the center of the through hole 8. Therefore, the thermal expansion coefficient of the housing of the electronic component 13 and
  • a large stress is applied particularly to the lead 12 at the end. Accordingly, a great deal of stress is generated in the through hole into which the lead 12 at the end is inserted and the solder fillet formed therein.
  • the tin-lead eutectic solder is very susceptible to creep deformation, even if such stress is generated, the stress has been absorbed by the creep deformation of the solder itself.
  • the lead-free solder 6 in which the creep resistance of the solder itself is several tens to several hundred times that of the tin-lead eutectic, the effect of reducing the stress as much as the tin-lead eutectic solder cannot be expected.
  • FIG. 3 shows the state where through-hole peeling 15 has occurred.
  • the through-hole peeling 15 tends to occur mainly when the mismatch between the thermal expansion coefficient of the housing of the electronic component 13 and the thermal expansion coefficient of the circuit board 1 is large.
  • the X-Y direction the direction of the board surface
  • land peeling a phenomenon that the surface land 6 peels off from the substrate surface (hereinafter referred to as land peeling) as shown in FIG. 4 is also confirmed. Due to the higher melting point of the lead-free solder, the land peeling 16 solidifies earlier at a higher temperature than the solder fillet 14 of lead-free solder formed on the surface land 6 and the eutectic tin-tin solder. Therefore, the amount of shrinkage of the circuit board 1 in the Z direction after the solder fillet 14 is formed on the surface increases, and the stress is concentrated on the end of the solder fillet 14.
  • the front surface land 6 and the rear surface land 7 are provided on the front and rear surfaces so as to sandwich the resin laminate 2, and the front surface land 6 and the rear surface
  • solder fillets are formed on both of the lands 7, residual stress and the resulting through-hole peeling and land peeling have a serious effect on reliability.
  • high densification and high performance have been accelerated, and multilayer circuit boards have become essential.
  • the present invention has been made to solve the above problems, and an object of the present invention is to prevent through-hole peeling even when soldering with lead-free solder.
  • An object of the present invention is to provide a circuit board having high performance and a mounting structure and a mounting method thereof.
  • a conductive through hole into which a lead of a leaded component is inserted and soldered, and a surface land is mounted on a mounting surface of the leaded component, and vice versa.
  • a circuit board having a back surface land electrically connected to the front land via the conductive through hole on a side surface, a component for restricting a mounting height of the lead component on a mounting surface of the lead component.
  • a circuit board characterized by having a plurality of receivers is provided.
  • a land coating is formed on the mounting surface of the component with leads to cover the peripheral edge of the surface land.
  • the surface land is mounted on the mounting surface of the leaded component, and the surface land is electrically connected to the surface land via the conductive through hole on the opposite surface.
  • the circuit is mounted in such a manner that the lead is inserted into the conductive through hole and soldered to the mounting surface of the leaded component of the circuit board having the back surface land connected to the lead.
  • a circuit board mounting structure is provided, wherein a plurality of component receivers for regulating the mounting height of the leaded component are provided on the circuit board below the leaded component. Is done.
  • a surface on a mounting surface of a component with leads is provided.
  • the mounting height of the leaded component is mounted on the mounting surface of the leaded component of the circuit board having the back surface land electrically connected to the surface land via a conductive through hole on the opposite surface.
  • a method for mounting a circuit board is provided.
  • a constant distance can be secured between the circuit board and the bottom surface of the plug-in electronic component.
  • FIG. 5 illustrates two leads of the plug-in type electronic component.It is assumed that the lead 12a on the left side is fixed and the lead 12b on the right side is deformed due to a thermal change between the leads 12a and 12b. Model is shown.
  • the electronic component 13 having the leads 12a and the leads 12b When the electronic component 13 having the leads 12a and the leads 12b is mounted on the circuit board 1 and flow soldering is performed with lead-free solder, the electronic component 13 and the circuit board 1 are heated and then returned to room temperature. These cause thermal deformation at the ratio of the coefficient of thermal expansion ay (82 ppm / ° C) of the 13 case and the coefficient of thermal expansion (XY direction) ax (16 ppm / ° C) of the circuit board 1.
  • the displacement of the lead 12b will be a large displacement as shown by the width W ', and a large stress will be applied to the soldered part and the through hole. . Therefore, by increasing the standoff L, the displacement of the lead 12b can be suppressed to a small value, and the force S for suppressing an increase in stress generated in the through hole can be suppressed.
  • Table 2 shows electronic components having different thermal expansion coefficients y, pin diameters in the longitudinal direction of the housing, and standoffs L, respectively, at -40 ° C (30 minutes) and 25. This is a table showing the relationship between the number of disconnection cycles until disconnection when a temperature cycle test was performed with one cycle of C (5 minutes) and 125 ° C (30 minutes).
  • the thermal expansion coefficient ay of the housing is 80 ppm / ° C or more
  • the pin diameter in the longitudinal direction of the housing is 0.5 mm or more
  • the standoff is: !.
  • the component receiver is provided between the circuit board and the electronic component, it is possible to secure a certain or more standoff between the circuit board and the electronic component. Therefore, the occurrence of peeling of through holes can be suppressed, and the reliability of the mounting structure using the circuit board can be improved.
  • the peripheral edge of the surface land is covered with the insulating film, it is possible to prevent the solder from spreading to the edge of the surface land and to spread the solder to the edge of the surface land. Fillet stress is no longer applied, and it is easy to follow the thermal expansion and contraction of the circuit board, so that the concentration of stress on the peripheral portion can be reduced and land separation can be prevented.
  • FIG. 1 is a cross-sectional view showing a conventional mounting structure.
  • FIG. 2 is a cross-sectional view for explaining a problem of a conventional example.
  • FIG. 3 is a cross-sectional view showing a problem of a conventional example.
  • FIG. 4 is a cross-sectional view showing a problem of a conventional example.
  • FIG. 5 is a cross-sectional view showing a mounting structure for explaining advantages of the present invention.
  • FIG. 6A is a sectional view showing a circuit board according to the first exemplary embodiment of the present invention.
  • FIG. 6B is a sectional view showing a mounting structure according to the first embodiment of the present invention.
  • FIG. 7A is a sectional view showing a circuit board according to a second exemplary embodiment of the present invention.
  • FIG. 7B is a sectional view showing a mounting structure according to the second embodiment of the present invention.
  • FIG. 8A is a cross-sectional view showing a mounting structure according to Example 1 of the present invention.
  • FIG. 8B is a plan view showing a mounting structure according to Example 1 of the present invention.
  • FIG. 9A is a cross-sectional view showing a mounting structure according to Example 2 of the present invention.
  • FIG. 9B is a plan view showing a mounting structure according to Example 2 of the present invention.
  • FIG. 10A is a cross-sectional view showing a mounting structure according to Example 3 of the present invention.
  • FIG. 10B is a plan view showing a mounting structure of Embodiment 3 of the present invention.
  • FIG. 11A is a sectional view showing a mounting structure according to Example 4 of the present invention.
  • FIG. 11B is a plan view showing a mounting structure according to Example 4 of the present invention.
  • FIGS. 6A and 6B are cross-sectional views showing the first embodiment of the present invention.
  • the circuit board 1 has a resin laminate 2 made of glass epoxy or the like as a substrate material, and has an inner wiring 3 therein and an outer wiring 4 on its outer surface.
  • An opening 5 is formed in the lead insertion portion of the circuit board, and a front land 6 and a back land 7 are formed around the opening on the front and rear surfaces of the substrate.
  • Front land 6 and rear land 7 are through holes (Plated through holes) 8 electrically connected.
  • FIGS. 6A and 6B show examples having two layers of inner layer wirings 3, but the number of layers is not limited. Further, a double-sided circuit board having no inner layer wiring may be used. Areas other than the soldering locations on the front and back surfaces of the substrate are covered with solder resist 9.
  • the peripheral edge of the surface land 6 on the substrate surface is covered with a solder dam 10 for preventing the solder from spreading.
  • the solder dam can be formed by printing a heat-resistant resin using a screen printing method or the like. Also, when the component mounting position, part number, board number, etc. are printed on the board surface using a white display paint, the same paint may be used. Accordingly, it is possible to prevent the man-hour for forming the solder dam 10 from increasing. Although not shown, a solder dam covering the peripheral edge may be formed on the back surface land 7. Thereby, the reliability can be further improved.
  • a component receiver 11 for regulating the mounting height of the plug-in electronic component.
  • the location of the component receiver 11 may be just below the electronic components to be mounted, and the location is not particularly limited. Also, the number of installations is not limited as long as it is several or more.
  • the component receiver 11 can be formed by printing and applying a heat-resistant resin once or a plurality of times. Also, when printing and applying a thermosetting adhesive for temporarily fixing the surface mount type component, the component receiver 11 may be formed simultaneously using the same material. This can prevent an increase in man-hours for forming the component receiver 11.
  • 6A and 6B show an example in which the component receiver 11 is provided at a position different from that of the solder dam 10, but the component receiver 11 may be provided on the solder dam 10. This makes it possible to efficiently form the component receiver 11 having a required altitude.
  • the component receiver 11 can be formed by bonding a spacer made of resin, metal or ceramic instead of a method of printing and applying a resin composition or the like by a printing method.
  • the adhesive used in this case may be simultaneously applied using the same material when printing and applying an adhesive for temporarily fixing the surface-mounted electronic component.
  • the component receiver 11 may be formed of a material that can be soldered at least partially, and may be soldered on the board in a reflow soldering process. In this case, it is desirable to perform the reflow soldering with the component receiver 11 temporarily fixed with an adhesive.
  • FIG. 6B is a cross-sectional view showing a state where electronic components are mounted on the circuit board according to the first embodiment of the present invention shown in FIG. 6A.
  • the mounting of the surface-mounted electronic component has been completed.
  • the electronic component 13 is mounted on the circuit board 1 by inserting the lead 12 into the through hole 8 of the circuit board.
  • the bottom surface of the electronic component 13 contacts the top surface of the component receiver 11, a certain level of standoff can be secured.
  • the back surface of the substrate is immersed in a wave solder bath or the like to perform flow soldering.
  • the leads 12 of the electronic component 13 and the through holes 8, the front lands 6, and the rear lands 7 of the circuit board 1 are electrically and mechanically coupled by the solder fillets 14.
  • the electronic component 13 After completion of the flow soldering, the electronic component 13 is often fixed with its bottom surface in contact with the component receiver 11 as shown in FIG. 6B, but is floated and fixed from the component receiver 11. There are things.
  • FIGS. 7A and 7B are a cross-sectional view of a circuit board according to the second embodiment of the present invention and a cross-sectional view showing a state where electronic components are mounted on the circuit board.
  • FIGS. 7A and 7B parts that are the same as the parts of the first embodiment shown in FIGS. 6A and 6B are given the same reference numerals, and overlapping descriptions are omitted.
  • the difference from the first embodiment shown in FIGS. 6A and 6B of the present embodiment is that no solder dam is formed, and solder-resist 9 replaces front surface land 6 and rear surface land 7. The point extending to the peripheral edge and the point where the component receiver 11 is formed into a spherical body.
  • the component receiver 11 is formed of resin, metal, or ceramics, and is bonded by an adhesive previously applied to a substrate.
  • a spherical body having a surface coated with an adhesive may be arranged on the substrate.
  • Example 1 of the present invention will be described with reference to FIGS. 8A and 8B.
  • 8A is a cross-sectional view illustrating a structure in which electronic components are mounted on the circuit board according to the first embodiment of the present invention
  • FIG. 8B is a perspective plan view when FIG. 8A is viewed from the upper side of the electronic components. is there. 8A and 8B, parts that are the same as the parts in the embodiment shown in FIGS. 6A and 6B, and FIGS. Omitted as appropriate To do. The same applies to the other embodiments shown in FIGS. 9A to 11B.
  • the solder dam 10 is formed by using a display paint used for marking and printing of electronic components, component numbers, board numbers, and the like. Then, in the process of forming the display portion, a solder dam is also formed at the same time. In addition, display paints have demonstrated heat resistance to heat applied during soldering.
  • the component receiver 11 is formed on the solder dam 10 by using a thermosetting adhesive used for temporarily fixing the surface mount type electronic component. . And since the component receiver 11 is formed in the adhesive layer forming step for temporarily fixing the surface mount type component, the number of steps is not increased.
  • FIG. 9A is a cross-sectional view showing a structure in which an electronic component is mounted on a circuit board according to the second embodiment of the present invention.
  • FIG. 9B is a perspective plan view when FIG. 9A is viewed from the upper surface on the electronic component side.
  • FIG. 9A is a cross-sectional view showing a structure in which an electronic component is mounted on a circuit board according to the second embodiment of the present invention.
  • FIG. 9B is a perspective plan view when FIG. 9A is viewed from the upper surface on the electronic component side.
  • the solder resist 9 used to protect the outer layer wiring 4 on the substrate surface is applied so as to extend to the peripheral edge of the surface land 6.
  • the component receiver 11 is formed at a position away from the surface land 6 by using a thermosetting adhesive that is a temporary fixing adhesive.
  • FIG. 10A is a cross-sectional view showing a structure in which electronic components are mounted on a circuit board according to Embodiment 3 of the present invention.
  • FIG. 10B is a perspective view when FIG. 10A is viewed from the upper surface on the electronic component side. It is a top view.
  • the solder dam 10 is formed using a thermosetting adhesive for temporarily fixing the surface mount electronic component. Then, a component receiver 11 which is a spacer made of resin is adhered to the substrate by an adhesive constituting the solder dam 10.
  • FIG. 11A is a cross-sectional view showing a structure in which electronic components are mounted on a circuit board according to Embodiment 4 of the present invention.
  • FIG. 11B is a perspective view when FIG. 11A is viewed from the upper surface on the electronic component side. It is a top view. In this embodiment, no solder dam is formed, and the solder resist 9 is extended to the peripheral edge of the surface land 6 as in the second embodiment.
  • the component receiver 11 has a configuration in which the surface of a resin ball 1 la, which is a resin sphere, is covered with 1 lb of an adhesive.
  • the component receiver 11 is provided by arranging a resin ball on which a thermosetting adhesive is applied in advance on a substrate and performing heat treatment to cure the adhesive.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

Un barrage à soudure (10) est formé autour d'un îlot de surface (6) sur une carte de circuits (1). Un récepteur (11) de pièce permet que la hauteur d'installation d'une pièce électronique de type de à insérer soit conforme à une hauteur prédéterminée. Une pièce électronique (13) est soudée par fusion, surélevée sur la carte.
PCT/JP2005/000887 2004-01-26 2005-01-25 Carte de circuit, structure de montage de carte de circuit et procede de montage de carte de circuit WO2005072032A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005517301A JPWO2005072032A1 (ja) 2004-01-26 2005-01-25 回路基板、回路基板の実装構造および回路基板の実装方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004-016723 2004-01-26
JP2004016723 2004-01-26

Publications (1)

Publication Number Publication Date
WO2005072032A1 true WO2005072032A1 (fr) 2005-08-04

Family

ID=34805500

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2005/000887 WO2005072032A1 (fr) 2004-01-26 2005-01-25 Carte de circuit, structure de montage de carte de circuit et procede de montage de carte de circuit

Country Status (2)

Country Link
JP (1) JPWO2005072032A1 (fr)
WO (1) WO2005072032A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017028215A (ja) * 2015-07-28 2017-02-02 住友電装株式会社 コネクタ実装基板
WO2020133238A1 (fr) * 2018-12-28 2020-07-02 华为技术有限公司 Carte de circuit imprimé et son procédé de fabrication et dispositif électronique
CN113795077A (zh) * 2021-07-09 2021-12-14 荣耀终端有限公司 一种电路板组件及电子设备
JP2023045269A (ja) * 2021-09-21 2023-04-03 株式会社平和 遊技機

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6427830U (fr) * 1987-08-05 1989-02-17
JP2000059002A (ja) * 1998-08-06 2000-02-25 Daishinku Corp 電子部品
JP2003318524A (ja) * 2002-04-22 2003-11-07 Nec Corp 配線板、電子機器および電子部品の実装方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6427830U (fr) * 1987-08-05 1989-02-17
JP2000059002A (ja) * 1998-08-06 2000-02-25 Daishinku Corp 電子部品
JP2003318524A (ja) * 2002-04-22 2003-11-07 Nec Corp 配線板、電子機器および電子部品の実装方法

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017028215A (ja) * 2015-07-28 2017-02-02 住友電装株式会社 コネクタ実装基板
WO2020133238A1 (fr) * 2018-12-28 2020-07-02 华为技术有限公司 Carte de circuit imprimé et son procédé de fabrication et dispositif électronique
CN112673716A (zh) * 2018-12-28 2021-04-16 华为技术有限公司 印制电路板及其制造方法、电子设备
US11882665B2 (en) 2018-12-28 2024-01-23 Huawei Technologies Co., Ltd. Printed circuit board and manufacturing method thereof, and electronic device
CN113795077A (zh) * 2021-07-09 2021-12-14 荣耀终端有限公司 一种电路板组件及电子设备
JP2023045269A (ja) * 2021-09-21 2023-04-03 株式会社平和 遊技機
JP7418380B2 (ja) 2021-09-21 2024-01-19 株式会社平和 遊技機

Also Published As

Publication number Publication date
JPWO2005072032A1 (ja) 2007-09-06

Similar Documents

Publication Publication Date Title
JP5105042B2 (ja) 多層プリント配線板
JP4923336B2 (ja) 回路基板及び該回路基板を用いた電子機器
EP1109430A2 (fr) Panneau à circuit double-face et panneau à circuit multicouche le comprenant et procédé de fabrication d'un panneau à circuit double-face
JP2003318524A (ja) 配線板、電子機器および電子部品の実装方法
KR100887894B1 (ko) 프린트 배선판의 랜드부, 프린트 배선판의 제조 방법, 및프린트 배선판 실장 방법
EP1565047A1 (fr) Empaquetage du type montage en surface d'un panneau à circuit
EP0966868A1 (fr) Ensemble circuit imprime
JP4479848B2 (ja) 回路基板
JP5382057B2 (ja) 回路基板に実装される表面実装部品及び該回路基板の実装方法並びに該回路基板を用いた電子機器
JP4181759B2 (ja) 電子部品の実装方法および実装構造体の製造方法
WO2005072032A1 (fr) Carte de circuit, structure de montage de carte de circuit et procede de montage de carte de circuit
WO2010016522A1 (fr) Carte de circuit imprimé, procédé de fabrication de carte de circuit imprimé, et dispositif électronique
JP4547817B2 (ja) プリント配線板のランド部、部品実装されたプリント配線板、プリント配線板の製造方法、及び、プリント配線板実装方法
JP6083130B2 (ja) 補強板付きフレキシブル配線板
JP2005044990A (ja) 多層プリント配線板のランド部、多層プリント配線板の製造方法、及び、多層プリント配線板実装方法
JP3726046B2 (ja) 回路基板及びそれを用いた電子機器
KR101172174B1 (ko) 인쇄회로기판 및 그의 제조 방법
KR101154626B1 (ko) 인쇄회로기판 및 그의 제조 방법
JP4735538B2 (ja) 電子機器
JP4747644B2 (ja) 電子部品およびその実装構造
US20060037192A1 (en) Printed wiring board without traces on surface layers enabling PWB's without solder resist
JP2016171123A (ja) 層間接続基板およびその製造方法
JP4527617B2 (ja) 回路基板及びそれを用いた電子機器
JP2012015397A (ja) 電子モジュール
JP2005354096A (ja) 電子部品の実装方法および実装構造体の製造方法

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2005517301

Country of ref document: JP

122 Ep: pct application non-entry in european phase