WO2004066697A1 - 多層配線板およびその製造方法 - Google Patents
多層配線板およびその製造方法 Download PDFInfo
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- WO2004066697A1 WO2004066697A1 PCT/JP2003/016377 JP0316377W WO2004066697A1 WO 2004066697 A1 WO2004066697 A1 WO 2004066697A1 JP 0316377 W JP0316377 W JP 0316377W WO 2004066697 A1 WO2004066697 A1 WO 2004066697A1
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- substrate
- wiring board
- layer
- circuit
- board
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5385—Assembly of a plurality of insulating substrates
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
- H05K3/4691—Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/1627—Disposition stacked type assemblies, e.g. stacked multi-cavities
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09972—Partitioned, e.g. portions of a PCB dedicated to different functions; Boundary lines therefore; Portions of a PCB being processed separately or differently
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
- H05K3/4694—Partitioned multilayer circuits having adjacent regions with different properties, e.g. by adding or inserting locally circuit layers having a higher circuit density
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49158—Manufacturing circuit on or in base with molding of insulated base
- Y10T29/4916—Simultaneous circuit manufacturing
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
Definitions
- the present invention relates to a multilayer wiring board and a method for manufacturing the same.
- FIGS. 1A to 1D are process diagrams showing a manufacturing process of a rigid flex printed wiring board.
- FIG. 2A is a perspective view of the substrate and the like shown in FIGS. 1A and 1B
- FIG. 2B is a perspective view of the rigid flex wiring board shown in FIG. 1D.
- wiring circuits 104 are formed by a subtractive method on both sides of a flex board 101 made of a polyimide film or the like, on both sides of an inner rigid board 102 and one side of an outer rigid board 103 made of a pre-predator or the like. Is done.
- a flex portion exposure hole 109 is provided in the adhesive sheet 105, the inner rigid substrate 102, and the outer rigid substrate 103 by press punching or the like.
- the cover layer 106 for the flex board, the inner rigid board 102, the adhesive sheet 105, and the outer rigid board 103 are arranged on the front and back of the flex board 101, and the laminated body 100 shown in FIG. Is formed. At this time, as shown in FIG.
- the periphery of the part to be a wiring board (for example, 103a) is punched out at the completion of the process, so that the part to be the wiring board (for example, 103a) is framed by a micro joint (for example, 103c). Bonded to the material (eg 103b).
- the laminate 100 is subjected to drilling, plating, etching, and the like to form a through-hole 107, an outer wiring circuit 108, and the like.
- the rigid joint B and the flex part A are connected to the frame material (for example, 103b) and the micro-joint (for example, 103c) is simultaneously pulled out with a mold so that the rigid-flex printed wiring board shown in Fig. 1D and Fig. 2B can be obtained.
- substrate 10 The frame material of 1, 102, and 103 (for example, 103b) and the parts punched out to form the flex hole exposure holes are discarded.
- the conventional rigid flex printed wiring board requires the rigid portion to be laminated at a predetermined position on the flex board, so that the rigid portion is positioned at a predetermined position on the flex substrate when laminated.
- the imposition of the rigid portions of the inner and outer rigid boards is restricted by the outer shape position of the flex board. That is, even if it is desired to laminate only a part of the flex substrate, an imposition member having a size similar to that of the flex substrate is required.
- the present invention has been made to solve the above-mentioned problems, and a first object is to provide a multi-layer wiring board which can achieve higher wiring flexibility, achieve a reduction in material cost, and a reduction in substrate capacity. It is an object of the present invention to provide a manufacturing method thereof.
- a multilayer wiring board comprises a motherboard printed wiring board having at least one board with a wiring circuit, which has been formed into a predetermined shape in advance.
- the gist is that the materials are bonded and they are electrically connected in at least one place by an inner via hole.
- a second object of the present invention is to provide a multilayer wiring board having a higher flexural strength (peeling resistance) than in the past and a method for manufacturing the same.
- the multilayer wiring board according to the second aspect of the present invention includes: Two or more substrates with single-sided wiring circuits, which have been processed into a predetermined shape in advance, are laminated and bonded to the motherboard printed wiring board, and at least one location between those layers is electrically connected by inner via.
- the two or more base materials with a single-sided wiring circuit connected and laminated are bonded on the first base material inside the outer shape of the first base material on the mother board printed wiring board side.
- the gist is that positioning is performed so that the outer shape of the base material is positioned.
- a third object of the present invention is to provide a single-sided circuit board as a core board (main circuit board), in other words, a single-sided circuit board so that electronic components can be mounted on both front and back sides. It is to realize a circuit board.
- a multilayer wiring board includes a multi-layer wiring board comprising: a main single-sided circuit board having a conductive pattern on one surface of an insulating base; Is partially removed, the back surface of the conductive pattern is exposed at the removed portion of the insulating base material, and the electronic component is removed from the other side of the insulating base material of the main single-sided circuit board.
- the conductive pattern is mounted in a form of being electrically connected to the exposed back surface of the conductive pattern, or the single-sided circuit board for a multilayer wiring board having an interlayer conductive part and a conductive pattern on one surface of an insulating base material is formed of the conductive material.
- the gist of the present invention is that the pattern is laminated in a form of being electrically connected to the exposed back surface of the pattern.
- double-sided printed wiring boards use double-sided copper-clad laminates (double-sided CCL) as starting materials for relay boards.
- double-sided CCL double-sided copper-clad laminates
- the use of plated through holes requires troublesome metal plating, and the thickness of the copper foil on both sides of the CCL increases. There was a problem that it became difficult.
- a fourth object of the present invention is to provide a double-sided mountable multi-layer wiring board that uses a base material with a single-sided wiring circuit as a starting material for a relay board, and that can mount electronic components on both front and back surfaces. It is to provide a manufacturing method.
- a multilayer wiring board includes a single-sided wiring circuit having a conductive layer on one side of an insulating base material also serving as an interlayer adhesive layer.
- the relay substrate has an insulating resin layer formed on a conductive layer surface side and is formed on the insulating substrate. It has an interlayer conductive portion made of a conductive material filled in the via hole and an interlayer conductive portion made of the conductive material filled in the via hole formed in the insulating resin layer, and is opposed to the conductive layer surface of the insulating base material.
- the gist is that the partial multi-layer substrate is laminated in a conductive relationship with the relay substrate in a specific region on each of the side surface and the surface of the insulating resin layer.
- FIGS. 1A to 1D are process diagrams showing a manufacturing process of a conventional rigid flex printed wiring board.
- FIG. 2A is a perspective view of FIGS. 1A and 1B.
- FIG. 2B is a perspective view of the rigid flex wiring board shown in FIG. 1D.
- FIG. 3 is a cross-sectional view showing a first embodiment of the multilayer wiring board according to the present invention.
- FIG. 4 is a plan view showing a first embodiment of the multilayer wiring board according to the present invention.
- FIG. 5 is a sectional view showing a modification of the first embodiment of the multilayer wiring board according to the present invention.
- FIG. 6 is a cross-sectional view showing a modification of the first embodiment of the multilayer wiring board according to the present invention.
- FIG. 7 is a cross-sectional view showing a modification of the first embodiment of the multilayer wiring board according to the present invention.
- FIG. 8 is a sectional view showing a modification of the first embodiment of the multilayer wiring board according to the present invention.
- FIG. 9 is a cross-sectional view showing a modification of the first embodiment of the multilayer wiring board according to the present invention.
- FIG. 10 is a cross-sectional view showing a modification of the first embodiment of the multilayer wiring board according to the present invention.
- FIGS. 11A to 11F are process diagrams showing a method for manufacturing a resin base material with a single-sided wiring circuit used in the multilayer wiring board according to the first embodiment of the present invention.
- 12A to 12G are process diagrams showing a method for manufacturing a multilayer wiring board according to the first embodiment of the present invention.
- FIGS. 13A and 13B are process diagrams showing a method for manufacturing a multilayer wiring board according to a modification of the first embodiment.
- FIG. 14A to 14E are process diagrams showing a method for manufacturing a multilayer wiring board according to another modification of the first embodiment.
- FIG. 15 is a sectional view showing a multilayer wiring board according to the second embodiment of the present invention.
- FIG. 16 is a plan view of the multilayer wiring board according to the second embodiment of the present invention.
- FIG. 17 is an explanatory view schematically showing a state in which the multilayer wiring board according to the second embodiment of the present invention is bent.
- FIGS. 18A to 18F are process diagrams showing a method for manufacturing a resin base material with a single-sided wiring circuit used in the multilayer wiring board according to the second embodiment of the present invention.
- FIGS. 19A to 19C are process diagrams illustrating a method for manufacturing a multilayer wiring board according to the second embodiment of the present invention.
- FIG. 20 is a sectional view showing a multilayer wiring board according to the third embodiment of the present invention.
- FIG. 21 is a plan view of the multilayer wiring board according to the third embodiment of the present invention.
- 22A to 22E are process diagrams showing a manufacturing process of a motherboard substrate used for the multilayer wiring board according to the third embodiment of the present invention.
- FIG. 23 is a schematic plan view of a motherboard used in the multilayer wiring board according to the third embodiment of the present invention.
- 24A to 24F are process diagrams showing a process for manufacturing a single-sided circuit board for a multilayer wiring board used in a multilayer wiring board according to the third embodiment of the present invention.
- 25A to 25C are process diagrams showing a lamination process of the single-sided circuit board for a multilayer wiring board according to the third embodiment of the present invention.
- FIG. 26 is a cross-sectional view showing a modification of the multilayer wiring board according to the third embodiment of the present invention.
- FIG. 27 is a sectional view showing a multilayer wiring board according to the fourth embodiment of the present invention.
- FIG. 28 is a schematic plan view of the multilayer wiring board according to the fourth embodiment of the present invention.
- 29A to 29E are process diagrams showing a process of manufacturing a relay board used for a multilayer wiring board according to the fourth embodiment of the present invention.
- FIG. 30 is a cross-sectional view of a substrate for partial multilayering used for a multilayer wiring board according to the fourth embodiment of the present invention.
- FIGS. 31A to 31C are process diagrams showing a multilayer wiring board laminating process according to the fourth embodiment of the present invention.
- FIG. 32 is a sectional view showing an embodiment of a circuit-forming transfer tape used for a multilayer wiring board according to a fourth embodiment of the present invention.
- FIG. 33A to 33C are process diagrams showing a step of laminating a multilayer wiring board using a transfer tape for circuit formation used for a multilayer wiring board according to the fourth embodiment of the present invention.
- FIG. 34 is a cross-sectional view showing a substrate for partial multilayering for an outer layer used in the fourth embodiment of the present invention.
- 35A to 35G are step diagrams showing a step of laminating a multilayer wiring board using a substrate for partial multilayering for an outer layer according to the fourth embodiment of the present invention.
- FIG. 36 is a sectional view showing a modification of the multilayer wiring board according to the fourth embodiment of the present invention.
- 37A to 37E are process diagrams showing a process for manufacturing a relay board used in a modified example of the multilayer wiring board according to the fourth embodiment of the present invention.
- FIG. 38 is a sectional view of a substrate for partial multilayering used in a modification of the multilayer wiring board according to the fourth embodiment of the present invention.
- FIGS. 39A to 39C are process diagrams showing a laminating process of a modified example of the multilayer wiring board according to the fourth embodiment of the present invention.
- the multilayer wiring board according to the present embodiment includes a partial wiring board (multilayered portion) to be described later, which has been formed into a predetermined shape in advance at a plurality of locations on the front and back of a mother board printed wiring board (base board) 10. 20 are laminated in an island shape.
- the island shape means that the outer edge of the partial wiring board 20 does not match the outer edge of the motherboard printed wiring board 10 and the partial wiring board 20 is defined by the outer edge of the motherboard printed wiring board 10. It is defined as being placed inside the area where The predetermined shape is determined according to the mother board design requirements.
- the partial wiring board 20 is formed by bonding a plurality of resin substrates 21 each having a single-sided wiring circuit, which have been processed into a predetermined shape smaller than the outer shape of the mother board printed wiring board 10, in advance. After positioning on the front and back of, they are stacked together. Note that the partial wiring board 20 can be formed into a multilayer including a resin base material with a double-sided wiring circuit.
- the motherboard printed wiring board 10 has an insulating base 11 and conductor layers (wiring circuits) 12 formed on both front and back surfaces of the insulating base 11.
- the insulating base material 11 of the motherboard printed wiring board 10 is made of a flexible resin such as polyimide.
- the flexible resins include liquid crystal polymer (LCP), polyetherimide (PEI), polyetheretherketone (PEEK), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), and polyethersulfur. Phone (PES).
- LCP liquid crystal polymer
- PEI polyetherimide
- PEEK polyetheretherketone
- PEN polyethylene naphthalate
- PET polyethylene terephthalate
- PES polyethersulfur. Phone
- the conductor layers 23 of the multilayered resin substrate 21 with a single-sided wiring circuit, the conductor layers 23 of the resin substrate 21 with a single-sided wiring circuit, and the conductor layers 12 of the motherboard printed wiring board 10 are Each of them is electrically connected by a conductor 25 made of a conductive paste or the like of an inner via hole (via hole) 24 formed in a resin substrate 21 with a single-sided wiring circuit.
- This multilayer wiring board is manufactured by laminating a resin substrate 21 with a single-sided wiring circuit, which is processed into an external shape into a predetermined shape, on a part of the front surface or Z and the back surface of the mother board printed wiring board 10.
- a build-up method in which the resin base material 21 with a single-sided wiring circuit is bonded one by one may be used, but a wiring circuit is formed on a part of the front or rear surface of the mother board printed wiring board 10.
- the batch laminating method which consists of laminating a plurality of resin substrates 21 with single-sided wiring circuits that have been formed into via holes and processed into an external shape into a predetermined shape, and then applying heat and pressure at the same time, realizes simpler and lower cost Possible and preferred.
- the adhesion between the resin base material 21 with the single-sided wiring circuit and the bonding between the resin base material 21 with the single-sided wiring circuit and the motherboard printed wiring board 10 are based on the conductor of the insulating base material 22 of the resin base material 21 with the single-sided wiring circuit.
- An adhesive layer (not shown) is formed on the surface opposite to the layer 23, and this can be performed by this adhesive layer.
- the insulating substrate 22 of the resin substrate 21 with a single-sided wiring circuit 21 is a thermoplastic polyimide, a thermoplastic polyimide provided with a thermosetting function, or a liquid crystal polymer or the like, which itself has an adhesive property, The above-mentioned adhesive layer can be omitted.
- a multilayer part (partial wiring board 20) for mounting electronic parts can be freely arranged at a free position on the surface of the motherboard printed wiring board 10, and an extra multilayer part is provided. And material costs can be greatly reduced.
- the electronic component mounting portion is made of an expensive material such as polyimide due to requirements such as dielectric characteristics and lightness, this effect can be said to be extremely large.
- the insulating layer (insulating base material 22) of the partial wiring board 20 which is an electronic component mounting portion and the insulating layer (insulating base material) of the flex portion (mother board printed wiring board 10) are provided. High thermal and mechanical reliability can be obtained by using the same material for 11) and matching the thermal and mechanical properties of both.
- the mother board printed wiring board 10 is generally provided with a cover layer such as a cover layer solder resist for the purpose of protecting the conductive layer.
- Motherpo The cover layer of the printed wiring board 10 is provided with an opening in advance in a portion to be multilayered by the resin substrate 21 with a single-sided wiring circuit, and the resin substrate 21 with a single-sided wiring circuit is provided in the opening. May be bonded together.
- a gap g is formed between the multilayered portion (the portion where the partial wiring board 20 is disposed) and the cover layer 13 at the opening 13A. In the gap g, the conductive layer 12 is exposed (exposed outside).
- the exposed portion is covered with a noble metal 15 such as gold as shown in FIG. 6 to prevent oxidation, or as shown in FIG. It is preferable to cover with a cover layer 16 of a solder resist or the like.
- the cover layer 16 is formed so as to cover a part of the multi-layered portion with the motherboard printed wiring board 10 after bonding the multi-layered portion. This can prevent a problem such as peeling at the interface between the multilayered portion and the bent portion, for example, at the time of bending when the mother-port wiring board 10 is a flex.
- the motherboard printed wiring board 10 and the motherboard printed wiring board 10 are brought into contact with and directly attached to the motherboard printed wiring board 10 as shown in FIG.
- the problem is solved by adopting a structure in which the combined insulating layer of the resin substrate 21 with the single-sided wiring circuit is formed as a body. More specifically, the insulating layer of the resin base material 21 with the single-sided wiring circuit and the cover layer of the motherboard printed wiring board 20 are formed from the same insulating layer 17, and this is formed on the motherboard printed wiring board. Paste to 10
- the inner via holes 24 having these structures are used as conductive paste inner holes, and the conductive layer 23 portion of the resin substrate 21 with the single-sided wiring circuit is larger than the diameter of the resin substrate portion.
- the small air vent small holes 27 therethrough, it is possible to prevent voids from remaining when the conductive paste is filled.
- the conductive paste is also filled in the small holes 27 so that the small holes 27 do not become hollow.
- reference numeral 26 indicates an interlayer adhesive layer.
- the resin substrate with one-sided wiring circuit according to the present embodiment is different from the conventional one-sided wiring circuit of the same shape or a different shape, which is not restricted by the outer shape of the mother-board printed wiring board (positioning position of the partial multilayer board). It is possible to maximally attach the resin substrate with the base material.
- the polyimide base material 51 has a copper foil 52 on one side thereof.
- a circuit-formed substrate 53 as shown in FIG. 11B is formed. This can of course be obtained by an additive method or a semi-additive method using a polyimide base material without copper foil as a starting material.
- an interlayer adhesive layer 54 is formed on the surface of the circuit-formed substrate 53 opposite to the copper foil 52.
- a material obtained by adding a thermosetting function to a thermoplastic polyimide was used as the interlayer adhesive layer 54.
- a thermosetting resin represented by epoxy or a thermoplastic resin such as a thermoplastic polyimide. Resin may be used.
- the three-layer structure of the copper foil 52, the polyimide base material 51, and the interlayer adhesive layer 54 is asymmetrical on both sides, and warpage that may cause a problem in a later process with the adhesive layer formed occurs.
- the interlayer adhesive layer 54 preferably has a glass transition temperature of 110 ° C. or less and a room temperature elastic modulus of 1300 MPa or less.
- a hole is formed by a UV-YAG laser so as to penetrate the interlayer adhesive layer 54 and the polyimide substrate 51 (via hole addition), and then plasma irradiation is performed. Desmearing is performed by performing soft etching, and IVH is formed by filling holes 55 with silver paste 56 for filling holes.
- various metal pastes such as a copper paste, a carbon paste, and a nickel paste can be used in addition to the silver paste.
- the outer shape is formed into a predetermined shape by pressing with a die along a dotted line L.
- the outer shape is formed into a predetermined shape, and the resin substrate 57 with a single-sided wiring circuit shown in FIG. 11F is formed.
- the conductive paste 56 is preferably hardened by pencil hardness of 2 B or more.
- FIGS. 12A to 12C various methods for manufacturing a multilayer wiring board using the resin substrate 57 with a single-sided wiring circuit and the motherboard produced in the above manufacturing process will be described with reference to FIGS. 12A to 12C.
- a motherboard in which the wiring circuit 61 has been formed and a cover layer 62 having an opening (opening 62A) formed in a portion to be laminated is formed on the surface.
- the conductive paste 56 formed on the single-sided circuit board resin substrate 57 previously processed into a predetermined shape on one board FPC 60 is applied to the conductive layer of the mother board printed circuit board or the single-sided circuit board resin substrate 57. After two layers are aligned at a position where they can be electrically connected to the conductor layer, they are superposed.
- the substrate is heated and pressed under a vacuum of I kPa or less by a vacuum heat press machine to form a substrate 63 including a multilayered portion 64 as shown in FIG. 12B.
- the resin substrate 57 with a single-sided wiring circuit which has been processed into a predetermined shape, may be laminated one by one on a mother board printed wiring board. It may be carried out after laminating a plurality of members 57 and laminating them on a motherboard printed wiring board.
- a pin alignment method or an image recognition method can be adopted. Since the pin alignment method requires a space for drilling holes for pins, positioning by image recognition is desirable.
- a multi-layer wiring board 66 is formed by applying and curing a solder resist 65 by a printing method so as to cover a part of the wiring board.
- FIGS. 13A and 13B portions corresponding to those in FIG. 12 are denoted by the same reference numerals as those in FIG. 12, and description thereof will be omitted.
- the wiring circuit 61 was formed on the mother board FP C60 on which the wiring substrate 61 had been formed, and on the resin substrates 57 and 70 with single-sided wiring circuit manufactured in the same manner as in FIG. Two layers are aligned at a position where the conductive paste 56 can be electrically connected to the conductor layer of the motherboard printed wiring board or the conductor layer of the resin substrate 57 with a single-sided wiring circuit, and then superposed. .
- the resin substrate 70 with a single-sided wiring circuit that comes into contact with the circuit surface of the motherboard FP C60 is the part to be covered by the cover layer, such as the copper foil part of the motherboard FPC60 by its insulating layer (polyimide substrate 51). And the insulating layer of the resin substrate 70 also functions as a cover layer.
- the alignment by image recognition is also preferable.
- FIGS. 14 parts corresponding to those in FIG. 12 are denoted by the same reference numerals as those in FIG. 12, and the description thereof will be omitted.
- a motherboard in which a wiring circuit 61 has been formed and a cover layer 62 having openings (openings 62A and 62B) formed in portions to be laminated is formed on the surface.
- Two layers of resin substrate 57 with single-sided wiring circuit, externally processed into the prescribed shape manufactured in Fig. 9, are superimposed on FPC60, and then superposed.Then, they are superimposed by a vacuum hot press machine to a degree of vacuum of 1 kPa or less. Heating and pressing under the pressure, a first multilayered portion 64 is formed as shown in FIG. 14B.
- FIG.14C three layers of a resin base material 57 with a single-sided wiring circuit, which has been processed into a predetermined shape, are applied to the other opening 62B of the motherboard FPC 60 in three layers. After that, they are superimposed and heated and pressed by a vacuum heat press machine at a degree of vacuum of 1 kPa or less to form a second multilayered part 67 as shown in FIG. 14D.
- a multi-layer wiring board 68 is formed by applying a solder resist 65 by a printing method so as to cover the part and curing the resist.
- the resin substrate with a single-sided wiring circuit generally has a conductor layer thickness of about 8 to 18 / m and an insulating substrate thickness of 25 to 100 m.
- FIGS. 15 and 16 show a second embodiment of the multilayer wiring board according to the present invention.
- a partial wiring board (multilayered part) 220 that has been processed into a predetermined shape in advance is provided at a plurality of locations on the front and back of a mother board printed wiring board (base substrate) 210. They are attached in an island shape.
- the island shape means that the outer edge of the partial wiring board 220 and the outer edge of the motherboard printed wiring board 210 do not match, and the partial wiring board 220 is the outer edge of the motherboard printed wiring board 210. Is defined as being located inside the area to be partitioned.
- the predetermined shape is determined by the requirements of the motherboard design.
- the partial wiring board 220 includes a plurality of resin bases 221 A, 221 B, and 221 C each having a single-sided wiring circuit that has been processed into a predetermined shape smaller than the outer shape of the motherboard printed wiring board 210. It is a lamination of the I song on the front and back of the board-printed tori-ki board 210.
- the laminated resin base materials 221 A, 221 B, and 221 C are externally processed into a predetermined shape so that the area of each of the resin base materials 221 A, 221 B, and 221 C is reduced.
- the cross section becomes roughly a pyramid shape.
- the relationship (area of resin base material 221A)> (area of resin base material 221B)> (area of resin base material 221C) is established. More specifically, as shown in FIG. 16, when viewed from the normal direction of the plane of the motherboard printed circuit board 220, the outer shape of the resin base material 221A or the outer shape of the resin base material 221B Alternatively, the outer contour or the outer contour of the resin base material 21C is located inside the outer contour or the outer contour of the resin base material 221B. That is, when the center of gravity of each of the resin substrates 222A, 221B, and 221C is overlapped, the outer sides 229 do not overlap with each other. Similarly, as shown in FIG.
- the outer periphery 229 of the resin base material 221 A is outside the mother-port printed wiring board 10. It is formed in a shape that does not match side 219.
- the motherboard printed wiring board 210 has conductor layers (wiring circuits) 212 on both front and back surfaces of an insulating base material 211.
- the insulating base 211 of the motherboard printed wiring board 210 can be made of a flexible resin such as polyimide.
- the flexible resins include liquid crystal polymer (LCP), polyether imide (PEI), polyether ether ketone (PEEK), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), and polyether sulfone (PES).
- LCP liquid crystal polymer
- PEI polyether imide
- PEEK polyether ether ketone
- PEN polyethylene naphthalate
- PET polyethylene terephthalate
- PES polyether sulfone
- Each of the base materials 221 A, 221 B, and 221 C with a single-sided wiring circuit has a conductor layer (Rotary wire circuit) 223 on one surface of an insulating base material 222.
- the insulating base 222 of the resin base 221 with the single-sided wiring circuit can also be made of a flexible resin such as polyimide.
- the insulating base material 211 of the motherboard printed wiring board 210 and the resin base material 221 A, 221 B, and 221 C having a single-sided wiring circuit are made of polyimide or the like from the viewpoint of thermal and mechanical effects. It is preferable that they are made of the same material.
- the conductor layers 223 of the multilayered resin base materials 221A, 221B, and 221C, the conductor layer 223 of the resin base material 221 with a single-sided wiring circuit, and the conductor layer 212 of the motherboard printed wiring board 210 are each one side.
- a conductive paste 225 filled in an inner via hole (via hole) 224 formed in a resin base material 221 with a wiring circuit And are electrically connected.
- the multilayer wiring board according to the second embodiment includes a resin base material 221A, 221B with a single-sided wiring circuit, which has been processed into a predetermined shape on a part of the surface and / or the back surface of the motherboard printed wiring board 210. It is manufactured by bonding 221C. Specifically, it is manufactured by a build-up method or a batch laminating method in which a resin substrate 221 with a single-sided wiring circuit is bonded one by one.
- the resin bases 221 A, 221 B, and 221 C each having a single-sided wiring circuit formed on a front surface or a part of the back surface of the motherboard printed wiring board 210 are formed with wiring circuits, formed vias, and processed into a predetermined shape.
- a batch lamination method in which the substrates are laminated and then heated and pressurized together is preferable because it can be manufactured at low cost.
- the batch lamination may be performed after laminating the resin substrates with single-sided wiring circuits one by one on the motherboard printed wiring board, or may be performed by laminating a plurality of resin substrates with single-sided wiring in advance. It may be performed after lamination on the one-board printed wiring board.
- Adhesion between the resin substrates 221 A, 221 B, and 221 C with a single-sided wiring circuit and adhesion between the resin substrates 221 A, 221 B, 221 C with a single-sided wiring circuit and the motherboard printed wiring board 210 are performed on one side.
- An adhesive layer (not shown) is formed on the surface opposite to the conductor layer 223 of the insulating substrate 222 of the lunar base material 221 A, 221 B, and 221 C with the Itoizumi circuit. Can be.
- Insulating base material 222 has adhesiveness itself, such as thermoplastic polyimide or thermoplastic polyimide with thermosetting function or liquid crystal polymer If this is the case, the above-mentioned adhesive layer can be omitted.
- the multilayer part for mounting electronic parts (partial wiring board 220) can be freely arranged at a free position on the surface of the mother-board printed wiring board 210, further reducing unnecessary multilayer parts. And material costs can be greatly reduced.
- the electronic component mounting portion is made of an expensive material such as polyimide due to requirements such as dielectric characteristics and lightness, this effect can be said to be extremely large.
- the insulating layer (insulating base material 222) of the partial wiring board 220 which is an electronic component mounting portion
- the insulating layer (insulating base material) of the flex portion (mother board printed wiring board 210) High thermal and mechanical reliability can be obtained by using the same material for 211) and matching both thermal and mechanical characteristics.
- the resin substrates 221 A, 221 B, and 221 C with a single-sided wiring circuit laminated on the motherboard printed wiring board 10 are laminated in a vilamite shape, they are schematically shown in FIG. So that the mother board printed wiring board 210 is bent When attaching, the mother one-port printed wiring board 2 10 and the resin substrate 22 1 A with a single-sided wiring circuit, between the laminated resin substrates 22 1 A, 22 1 B, and 221 C with a single-sided wiring circuit Such stress sites S are dispersed.
- the resin substrate with a one-sided wiring circuit according to the present embodiment is different from the conventional one-sided wiring having the same shape or a different shape without being restricted by the outer shape of the mother-port printed wiring board (positioning position of the partial multilayer board).
- the resin base with circuit can be imposed on the base material as much as possible.
- a polyimide substrate 250 with a single-sided copper foil having a copper foil 252 on one side of a polyimide substrate 251 as a starting material is used as a starting material.
- a circuit-formed substrate 260 having a circuit portion 253 as shown in FIG. 18B is formed.
- it can also be obtained by an additive method or a semi-additive method using a polyimide base material without copper foil as a starting material.
- an interlayer adhesive layer 254 is formed on the surface of the circuit-formed substrate 260 opposite to the circuit portion 253.
- a thermoplastic polyimide having a thermosetting function a thermosetting resin represented by epoxy, or a thermoplastic resin such as a thermoplastic polyimide can be used.
- the three-layer structure of the circuit part (copper foil) 253, the polyimide base material 251, and the interlayer adhesive layer 254 is asymmetrical on the front and back sides, so that the adhesive layer is formed in a later step so that it will not be satisfactory. Preferably, no warpage occurs.
- the interlayer adhesive layer 254 preferably has a glass transition temperature of 110 ° C. or lower and a room temperature elastic modulus of 1300 MPa or lower.
- a hole is formed by a UV-YAG laser so as to penetrate the interlayer adhesive layer 254 and the polyimide substrate 251 (via hole processing). Desmearing is performed by etching, and IVH is formed by filling the holes (via holes) 55 with silver paste 56 for filling holes.
- a carbon dioxide gas laser or an excimer laser I can do it.
- a wet desmear using permanganate is also very common.
- various metal pastes such as copper paste, carbon paste, and nickel paste can be used as well as silver paste.
- the conductive paste 256 is temporarily cured at 60 ° C. to 140 ° C. for 0.5 to 2 hours. Thereby, the conductive paste 256 is hardened to a hardness of 2B or more in pencil hardness, and it is possible to prevent the base from falling off or deforming in a die cutting step or a mounting step described later.
- each resin base material 261 A, 261 B, 261 C is provided on the inner side of the outer shape of the first base material 261 A (or 261 B) on the motherboard printed wiring board side.
- the outer shape of the second base material 261B (or 261C) bonded thereon can be located.
- a wiring layer 272 has been formed on both sides of the flexible insulating base material 271 and a cover layer 273 having an opening (opening 273A) formed in a portion to be laminated is formed on the surface.
- the resin bases 261 A, 261 B, and 261 C each having a single-sided wiring circuit and processed into a predetermined shape are sequentially positioned on the formed mother board FPC 270, and are superposed in a pinmit shape.
- the mother board FPC270 and the resin base materials 261A, 261B, and 261C are pressed together under a vacuum of 1 kPa or less by a vacuum heat press machine, and the multilayered portion as shown in Figure 19B is pressed.
- a substrate including 280 is formed.
- the mother paste FPC70 and the resin base materials 261 A, 261 B, and 261 C are heated at 150 ° C. to 190 ° C. for about 1 hour to completely harden the conductive paste. This makes it possible to improve work efficiency and prevent the lower layer from deteriorating due to repeated heating.
- a multi-layer wiring board 290 is formed by applying a solder resist 274 by a printing method so as to cover the W
- the multilayer wiring board according to the second embodiment has at least the following features.
- a mother board printed wiring board 210 having a first surface, a first base plate 221 A having a single-sided wiring circuit, which is bonded to the first surface and has an external shape processed into a predetermined shape, A second base plate 221B having a single-sided wiring circuit, which is externally processed into a predetermined shape, which is bonded to a surface of the first base plate, and wherein the first base plate has a mother board.
- the second base plate has a second inner via 225 for electrically connecting the wiring on the first base plate and the wiring on the second base plate, and
- the first base plate 221 When viewed from the normal direction of the mother board printed wiring board, the first base plate 221 is bonded to the first surface of the first base plate inside the outer shape 229 of the first base plate 221 A bonded to the first surface of the wiring board.
- the outer shape 229 of the combined second base plate 221B is located.
- a first base plate peripheral line 229 that defines the periphery of the back surface of the first base plate bonded to the first surface of the mother board printed wiring board defines the periphery of the mother board printed wiring board. It is located inside Maza-Pod Blind Line 229 without touching it.
- FIG. 20 and FIG. 21 show a multilayer wiring board according to the third embodiment.
- This multilayer wiring board is composed of a mother board substrate 310, and island-like partial multilayer wiring boards (multilayered portions) 320A, 320B which are respectively laminated at a plurality of positions on the front and back of the mother board substrate 310. , 320C and 320D.
- the island shape means that the outer edges of the partial wiring boards 320A to 320D do not match the outer edges of the motherboard printed wiring board 310, and the partial wiring boards 320A to 320D are It is defined as a state in which the outer edge of 10 is located inside the area defined by it. Further, the predetermined shape is determined according to the design requirements of the motherboard.
- the partial multilayer wiring boards 320A, 320B, 320C, and 320D have a single-sided circuit board 330 for a multilayer wiring board that has been processed in advance into a predetermined shape smaller than the external shape of the motherboard board 310. It is a single board substrate 310 that is laminated on the front and back of the board.
- the partial multilayer wiring boards 320A, 320B, 320 All of C and 320D have two layers.
- the single-sided circuit board 330 for the multilayer wiring board is bonded to the insulating substrate 331, the conductive pattern 332 formed on one surface of the insulating substrate 331, and the other surface of the insulating substrate 331. And an interlayer conductive portion 334 formed of an inner via hole formed through the insulating base material 331 and the adhesive layer 333.
- the single-sided circuit board 330 for the multilayer wiring board can be formed of either a rigid printed wiring board based on a phenol resin or an epoxy resin, or a flexible wiring board based on a polyester resin or a polyimide resin. If the insulating substrate 331 of the single-sided circuit board 330 for a multilayer wiring board has interlayer adhesiveness, the adhesive layer 333 can be omitted.
- the surface of the insulating substrate 331 of the outermost single-sided circuit board 330 for the multilayer wiring board of the partial multilayer wiring board 320A, 320B, 320C, 320D is formed by the solder resist 335. Coated.
- the electronic component 350 is mounted on the outermost single-sided circuit board 330 for the multilayer wiring board of each of the partial multilayer wiring boards 320A, 320B, 320C, and 320D by the bump 351.
- the mother board 310 is a main single-sided circuit board having a conductive pattern 312 on one surface of an insulating base 311.
- the mother board substrate 310 has at least one portion (two portions in this embodiment) of the insulating substrate 311 partially removed, and has a conductive portion at the removed portion 319 of the insulating substrate 311. The back of the characteristic pattern 3 1 2 is exposed.
- the single-sided circuit boards 330 for the multilayer wiring boards of the multilayer wiring boards 320 C and 320 D are exposed to the back surface exposed portions 3 1 2 of the conductive pattern 3 12.
- the layers are stacked in a state of being conductively connected to B to form partial multilayer wiring boards 320C and 320D.
- the single-sided circuit boards 330 for the multilayer wiring boards of the partial multilayer wiring boards 320A and 320B are provided on one surface (surface) of the insulating base material 3 1 1 with the exposed surface 3 1 of the conductive pattern 3 1 2.
- the partial multilayer wiring boards 320A and 320B are formed in a state where they are electrically connected to 2A and stacked.
- the mother board 310 can also be formed of a rigid printed wiring board made of a phenol resin or epoxy resin, or a flexible printed wiring board made of a polyester resin or a polyimide resin.
- the surface of the motherboard substrate 310 is covered with a cover layer 318. Further, a gap between the cover layer 318 and the partial multilayer wiring boards 320A and 320B is coated with a solder resist 317 by application.
- a general-purpose single-sided copper-clad polyimide substrate (single-sided conductor-clad laminate) 360 is used as a starting material.
- the single-sided copper-clad polyimide substrate 360 is a single-sided copper-clad laminate (CCL) having a copper foil 316 as a conductive layer on only one surface of an insulating substrate 311 made of a polyimide film.
- polyimide is selected as the insulating substrate in consideration of the heat resistance and dielectric properties of the substrate.
- a steel-clad phenolic substrate made of a substrate such as glass cloth, glass mat, and synthetic fiber and a thermosetting resin
- a copper-clad paper epoxy substrate, a steel-clad paper polyester substrate, a copper-clad glass epoxy substrate, a copper-stretched lath polyimide substrate, or the like may be used.
- a copper-clad polyester substrate, a copper-clad polyetherimide substrate, a copper-clad liquid crystal polymer substrate, or the like may be used as a form in which no base material is combined.
- An etching resist is laminated on 316, and the wiring pattern is exposed and developed. Then, the exposed copper is etched by a cupric chloride bath, and the conductive pattern is etched.
- the portion where the single-sided circuit board 330 for a multilayer wiring board is laminated (the front-side multilayer board).
- Cover layer 318 in which 314 is previously opened As the cover layer 318, a solder resist or the like may be used.
- an etching resist 362 is laminated on both sides of the single-sided circuit board 361 as shown in FIG. 22D, and the copper foil side (surface side) is entirely exposed, and polyimide is removed.
- the opening pattern is exposed and developed on the front side (back side).
- the insulating base material 311 made of polyimide is etched using oxygen plasma or a strong aqueous solution.
- the etching resist 362 is removed.
- the insulating base material 311 of the single-sided circuit board 361 is partially removed by a predetermined area, and the removed portion of the insulating base material 311 (backside-side multilayered portion) 319 is removed.
- a mother board substrate 310 with the back surface 312B of the conductive pattern 312 exposed is formed.
- FIG. 23 is a schematic plan view of the motherboard substrate 310
- FIG. 22E is a cross-sectional view taken along the line XX ⁇ -XX ⁇ of FIG.
- a general-purpose single-sided copper-clad polyimide base material (single-sided conductor-clad laminate) 370 is considered as a starting material.
- the single-sided copper-clad polyimide substrate 370 is the same as the single-sided copper-clad polyimide substrate 360 for the mother board 310, and has a conductive layer on only one surface of the insulating substrate 33 1 made of polyimide film. Is a single-sided copper-clad laminate (CCL) having a copper foil 336 as an example.
- CCL copper-clad laminate
- the insulating base material 311 of the motherboard substrate 310 and the edge base material 331 of the single-sided circuit board 330 for a multilayer wiring board are made of the same material from a thermal and mechanical viewpoint. Is desirable.
- the copper foil 336 of the single-sided copper-clad polyimide base material 370 is etched in the same manner as in the preparation of the mother-board board to form the conductive pattern 332.
- thermoplastic polyimide is bonded to the surface of the insulating base material 331 on the side opposite to the conductive pattern 332 by a hot press machine, so that an adhesive layer 333 is formed.
- an adhesive layer 333 a phenol resin, a phenoxy resin, a polyimide resin, a xylene resin, a mixed resin of two or more of these, a polyetherimide resin, a liquid crystal polymer, a polyamide resin, or the like can be used.
- a laser is irradiated from the side of the adhesive layer 333 to an arbitrary position to be connected between layers, and penetrates the insulating base material 331 and the adhesive layer 333 to form a copper foil (conductive layer).
- a hole (via hole) 337 in contact with the pattern 332) is formed.
- the hole 337 is filled with a thermosetting silver paste by a printing method or the like to complete the interlayer conductive portion 334.
- the conductive paste that fills the hole 37 is a mixture of gold, copper, nickel, carbon powder, or an alloy powder or mixture of these powders and a binder component such as phenol resin, polyester resin, epoxy resin, or polyimide resin.
- a conductive composition adjusted in advance may be used.
- a printing method using a metal mask, a printing method using a masking film, and a filling method using a dispenser can be applied.
- the laminated base material 371 on which the silver paste is printed is heated in an oven, and the silver paste is dried.
- the laminated base material 371 is pressed with a die to form an outer shape smaller than the outer shape of the motherboard substrate 310, as shown in FIG. 24F.
- a single-sided circuit board 330 for a multilayer wiring board having a desired size is formed.
- This external processing is performed so that the single-sided circuit board 30 for the multilayer wiring board can enter the surface-side multilayered portion (opening) 314 of the cover layer 318 and the removed portion 319 of the insulating base material (opening) 311 so as to be able to enter.
- the size is set to be approximately the same as or slightly smaller than these openings.
- a step of laminating the motherboard substrate 310 and the single-sided circuit board 330 for a multilayer wiring board, which are created through the above manufacturing steps, will be described with reference to FIGS. 25A to 25G.
- a plurality of single-sided circuit boards 330 for a multilayer wiring board manufactured in the above process are prepared, and as shown in FIG. 25A, the front side of the conductive pattern 312 side (front side) of the mother board 310 is prepared.
- a predetermined number of single-sided circuit boards 330 for multilayer wiring boards are respectively aligned with the multilayered portion 314 and the removed portion 319 on the back surface side of the insulating base material 311. After the alignment is completed, the respective members are superimposed, and heated and pressed by a vacuum press machine to form a double-sided circuit board 380 as shown in FIG. 25B.
- the alignment is preferably performed by image recognition rather than the pin alignment method that requires a space for the guide hole.
- the solder resist 317 is printed by a printing method so as to cover the gap between the cover layer 318 and the multilayered portion of the motherboard substrate 310 and a part of the surface of the multilayered portion. 335 was applied and cured.
- the exposed conductive pattern 332 for mounting the electronic component is covered with a noble metal 338 such as gold to form a multilayer wiring board that can be mounted on both sides.
- a noble metal 338 such as gold
- a single-sided wiring board is used as a mother-board board, the double-sided multi-layering and double-sided mounting cannot be solved, and the single-sided wiring board is used as the mother-board board 310, that is, the main single-sided circuit board Therefore, unlike the case of using a double-sided circuit board, almost no removal of the conductive layer on one side occurs in the formation of the conductive pattern, and waste of materials and resources can be reduced. In addition, complicated manufacturing processes such as formation of through holes are not required.
- the single-sided wiring board is used as the motherboard board 310, when the motherboard board 310 is a flexible board, the flexibility of the non-multilayered portion is improved, and the high-density double-sided partial multilayer wiring having excellent flexibility is provided. You can get a board.
- the partial multi-layer wiring board that is, the single-sided circuit board 330 for the multi-layer wiring board, which has been processed to the size of the partial multi-layer wiring part, is used.
- the part of the board is also the same size as the motherboard board 310, and when punching out the same outer shape as the motherboard board 310 when processing the motherboard board 310 Compared with this, the amount of material of the single-sided circuit board 330 for a multilayer wiring board can be reduced, and material waste can be reduced.
- the circuit board according to the present invention is not limited to the double-sided circuit board as described above.
- the conductive pattern 312 of the mother board 310 and the insulating board The electronic component 350 may be directly mounted on the removed portion 319 of the material 311 in a flip-chip manner.
- the mounting of the electronic component 350 on the removed portion 319 of the insulating base material 311 is performed in a form in which the electronic component 350 is conductively connected to the back surface exposed portion 312B of the conductive pattern 312.
- FIGS. 27 and 28 show a fourth embodiment of the multilayer wiring board according to the present invention.
- This multi-layer wiring board was formed by laminating a relay board 410 such as a mother board wiring board, and a partial multilayer board 430 at specific locations on each of the front and back surfaces of the relay board 410. It has partial multilayer portions 420A and 420B.
- the relay substrate 410 is made of a single-sided substrate with a wiring circuit having a conductive layer (including a conductive land portion) 41 2 forming a wiring pattern on one surface (upper surface 41 OA) of the insulating substrate 41 1 also serving as an interlayer adhesive layer. It is configured.
- Examples of the material of the insulating base material 411 also serving as an interlayer adhesive layer include thermosetting polyimide, thermoplastic polyimide, thermoplastic polyimide having a thermosetting function, liquid crystal polymer, and epoxy resin.
- An insulating resin layer 413 that also functions as an interlayer adhesive layer is formed on a conductive layer surface (upper surface 41 OA) forming a wiring pattern of the insulating base material 411.
- the insulating resin layer 413 may be made of a material equivalent to the material of the insulating base material 411.
- the interlayer conductive portions 415 and 417 by the via holes 414 and 416 are formed on the insulating base material 411 and the insulating resin layer 413, respectively.
- the interlayer conductive portions 415 and 417 can be formed by filling via holes 414 and 416 with conductive paste.
- Partial multi-layers that have been formed into a predetermined shape in advance on the surface opposite to the conductive layer surface of the insulating base material 41 1, that is, the back surface 410 B and the front surface (upper surface 413 A) of the insulating resin layer 413.
- Substrate 430 is laminated in a conductive relationship with the conductive layer 412 forming the wiring pattern of the relay substrate 410 by the interlayer conductive portion 415 or 417. Similar to the relay board 410, the partial multilayering board 430 also has a single-sided wiring circuit having a conductive layer (including a conductive land portion) 432 forming a wiring pattern on one side of an insulating base material 431 also serving as an interlayer adhesive layer. It is composed of a base material.
- an interlayer conductive portion 434 is formed by a via hole 433 in an insulating base material 431.
- the interlayer conductive portion 434 can also be formed by filling the via hole 433 with a conductive paste.
- the partial multilayer substrate 430 is stacked on the upper surface 41 OA side of the relay substrate 410, that is, on the partial multilayer portion 420 A, with the conductive layer 432 forming the wiring pattern facing downward, and the back surface 4 On the 10B side, that is, on the partial multilayer portion 420B, a plurality of layers are laminated with the conductive layer 432 forming a wiring pattern facing upward, and an insulating base material 411 or an insulating substrate also serving as an interlayer adhesive layer between the respective layers.
- the resin layer 413 and the insulating base material 431 are bonded together. That is, the partial multilayering substrate 430 is stacked on each of the upper side and the lower side of the relay substrate 410 so that the conductive layer 432 forming the wiring pattern faces the relay substrate 410 side.
- a conductive layer 435 forming a wiring pattern and a conductor land portion 436 for component mounting are formed on the surface 430A of the insulating base material 431 of the partial multilayer substrate 430, which is the outermost layer of each of the partial multilayer portions 420A and 420B. ing.
- any part of the front and back surfaces of the relay board 410 is partially removed. It can be multi-layered and can be mounted on both sides.
- the partial multilayering substrate 430 that has been processed into a predetermined shape in advance an unnecessary multilayered portion is not provided, and the number of steps and material cost can be reduced.
- FIG. 29A a method of manufacturing a substrate with a circuit used for the multilayer wiring board according to the present embodiment will be described with reference to FIGS. 29A to 31.
- FIG. 29A a method of manufacturing a substrate with a circuit used for the multilayer wiring board according to the present embodiment will be described with reference to FIGS. 29A to 31.
- 29A to 29E show a manufacturing process of the relay board 410.
- a general-purpose single-sided copper-clad polyimide substrate (single-sided conductor-clad laminate) 450 is used as a starting material.
- the single-sided copper-clad polyimide substrate 450 is a single-sided copper-clad laminate (CCL) having a copper foil 45 1 as a conductive layer on only one side of an insulating substrate 41 1 made of a polyimide film that exhibits adhesiveness when heated. .
- CTL copper-clad laminate
- a laminate having a conductive layer formed by an additive method or a semi-additive method using a polyimide substrate without copper foil as a starting material can also be used.
- an etching resist is laminated on a copper foil 451 of a single-sided copper-clad polyimide substrate 450, and a wiring pattern is exposed and developed. Thereafter, the exposed copper is etched by a cupric chloride bath to form a conductive layer (conductive pattern) 412. Next, the etching resist is removed, and a substrate 452 with a single-sided wiring circuit as shown in FIG. 29B is formed.
- an insulating resin layer 413 also serving as an interlayer adhesive layer is formed on the conductive layer surface (upper surface 410A) forming the wiring pattern of the insulating base material 411.
- the insulating resin layer 413 may be made of a polyimide film equivalent to the material of the insulating base material 4 11, and by using a film-like material, pressure bonding, lamination, By vacuum lamination, the upper surface 41 OA of the insulating substrate 411 can be bonded.
- the insulating resin layer 413 can be formed by coating using curtain coating or spin coating.
- a UV-YAG laser, a carbon dioxide laser or the like is irradiated from the insulating base material 41 1 side to an arbitrary position where interlayer connection is to be performed, and the insulating base material 11 penetrates. Then, a via hole 414 is formed in contact with the back surface of the copper foil (conductive layer 412 forming a wiring pattern).
- An arbitrary position where interlayer connection is to be performed is irradiated with a UV-YAG laser, a carbon dioxide laser, or the like from the insulating resin layer 413 side to penetrate the insulating resin layer 413 and form a copper foil (a conductive layer forming a wiring pattern).
- a via hole 416 in contact with the upper surface of 412) is formed.
- This drilling is performed by forming an etching resist patterned on the insulating base material 41 1 and the insulating resin layer 41 3 and etching the insulating base material 41 1 and the insulating resin layer 413 in addition to laser processing.
- via holes 414 and 416 may be formed.
- the via holes 414, 416 are filled with a thermosetting silver paste 418, 419 as a conductive base by printing or the like to fill the via holes.
- Conducting portions 415 and 417 are formed.
- the relay board 410 is formed.
- the conductive paste used to fill the via holes 414 and 416 may be a copper paste, a conductive paste including a conductive filler having a copper powder surface coated with silver, or the like, in addition to the silver paste.
- the relay board 410 Since the relay board 410 has the conductive layer 412 forming the wiring pattern other than the interlayer conductive portions 415 and 417 covered with the insulating resin layer 413, the cover protecting the conductive layer 412 forming the wiring pattern is provided.
- the step of providing a layer can be omitted.
- FIG. 30 shows a substrate 430 for partial multilayering.
- the substrate for partial multilayering 430 is formed using a general-purpose single-sided copper-clad polyimide base material equivalent to the starting material of the relay substrate 410, forming a conductive layer 432 forming a wiring pattern by etching, a via hole by laser processing, or the like. It is manufactured by forming the 433 and forming the interlayer conductive portion 434 by filling and filling the via hole 433 with the silver paste 437.
- the substrate 430 for partial multilayering is processed into an external shape (press punching) into a predetermined shape corresponding to the planar shape of the partial multilayer portions 420A and 420B before lamination on the relay substrate 410. ) Has been.
- FIG. 31 shows a step of laminating the substrate 430 for partial multilayering manufactured in the above steps.
- the upper surface 41 3A of the insulating resin layer 4 13 of the relay board 410 and the rear surface 41 1 OB of the insulating base material 41 1 each have a predetermined number of predetermined shapes in each specific region.
- the substrates are superimposed, and a copper foil 437 for the outermost layer on the front and back sides is further removed. It is arranged on the front surface 430A of each of the upper (front side) and lower (back side) insulating substrates 431.
- the substrate for partial multilayering 430 is laminated with the conductive layer 432 forming a wiring pattern facing the relay substrate 410 on each of the upper and lower sides of the relay substrate 410.
- the conductive layer 435 forming the outermost wiring pattern and the conductor land portion 436 for component mounting can also be formed using a transfer tape 460 for circuit formation as shown in FIG.
- the circuit forming transfer tape 460 is formed on one side of a carrier film 461 so that a conductive layer 435 forming a wiring pattern and a conductive land portion 436 for component mounting can be peeled off by etching or the like.
- the transfer tape 460 for circuit formation is replaced with a copper foil 437, and a wiring pattern is formed on the surface 430A of each of the upper (front side) and lower (back side) insulating substrates 431.
- the conductive layer 435 and the conductive land portion 436 for component mounting are positioned and arranged with the surface 430A of the insulating base material 431 being positioned.
- the carrier film 461 is removed as shown in FIG. 33G.
- the insulating layer 43 of the partial multi-layer substrate 430 is formed by curing, as shown in FIG. Since it is pushed into 1, there is an advantage that the surface layer of the partial multilayer portions 420A and 420B becomes smooth.
- FIG. 34 and FIG. 35 show another multi-layering process according to the present embodiment.
- a conductive layer forming an outermost wiring pattern and a conductor land portion 472 for component mounting are etched on one surface of an insulating base material 471, as an outermost layer member on the front and back sides.
- a substrate 470 for partial multilayering for the outermost layer formed by the above method is used.
- the substrate for partial multilayering 470 for the outermost layer is the substrate 430 for multilayering.
- the outer shape is processed into a predetermined shape, but there is no interlayer conductive portion.
- a wiring board 470 for the outer layer is provided on the surface 430A of each of the upper (front side) and lower (back side) insulating base materials 431 by wiring.
- the conductive layer forming the pattern and the conductor land portion 472 for component mounting are positioned and arranged with the insulating substrate 431 facing the surface 430A, and are collectively laminated as shown in FIG. 35B.
- the formation of the contact hole 473 can be performed by etching with an etchant that protects portions other than the desired contact hole opening with a chemical-resistant resist and melts only the insulating base material 471. Further, the contact hole 473 can be formed by laser processing using a UV-YAG laser, a carbon dioxide laser, or the like.
- the conductive layer forming the surface wiring pattern of the partial multilayer portions 420A and 420B is covered with the insulating base material 471, the conductive layer forming the surface wiring pattern of the partial multilayer portions 420A and 42OB is formed. There is an advantage that it is not necessary to separately provide a cover layer for protecting the layer. Also, as shown in FIG. 33C, the conductor land portion 472 for component mounting is pressed into the insulating base material 431 of the partial multilayer substrate 430, so that the surface layers of the partial multilayer portions 420A and 420B are smoothed. Some advantages are also obtained. Modification of the fourth embodiment
- FIG. 36 shows another embodiment of the multilayer wiring board according to the present invention.
- This multilayer wiring board is formed by laminating a relay board 4110 such as a motherboard wiring board, and a partial multilayer board 4130 at specific positions on each of the front and back surfaces of the relay board 4110. Partial multilayer portions 4120A and 4120B.
- the relay substrate 41 10 is a base with a single-sided wiring circuit having a conductive layer (including a conductive land portion) 41 12 forming a wiring pattern on one surface (upper surface 41 1 OA) of an insulating base material 41 11 made of polyimide or the like. It is composed of materials.
- An interlayer adhesive layer 4141 is formed on the other surface of the insulating base 411, and the insulating layer has a two-layer structure including the insulating base 4111 and the interlayer adhesive layer 4141.
- Examples of the material of the interlayer adhesive layer 41 include thermosetting polyimide, thermoplastic polyimide, thermoplastic polyimide having a thermosetting function, liquid crystal polymer, and epoxy resin.
- An insulating resin layer 41 13 also serving as an inter-layer adhesive layer is formed on the conductive layer surface (upper surface 4 11 OA) forming the wiring pattern of the insulating base material 4111.
- Insulating resin layer 41 1 3 May be made of a material equivalent to the material of the interlayer adhesive layer 4141.
- the interlayer conductive portions 4115 and 4117 formed by the via holes 4114 and 4116 are formed in the insulating base material 4111 and the interlayer adhesive layer 4141 and the insulating layer 4113, respectively.
- the interlayer conductive portions 4115 and 4117 can be formed by filling via holes 4114 and 4116 with a conductive paste.
- the surface of the interlayer adhesive layer 4141 on the side opposite to the insulating substrate 4111, that is, the back surface 4110B and the surface (upper surface 4113A) of the insulating resin layer 4113, respectively, are partially multi-layered substrates that have been externally processed in a predetermined shape in advance.
- 4130 is laminated in a conductive relationship with the conductive layer 4112 forming the wiring pattern of the relay board 4110 by the interlayer conductive portion 4115 or 4117.
- the partial multilayering substrate 4130 is also formed of a substrate with a single-sided wiring circuit having a conductive layer (including a conductive land portion) 4132 forming a wiring pattern on one surface of an insulating substrate 413 1.
- a conductive layer including a conductive land portion
- an interlayer adhesive layer 4142 is formed on the other surface of the insulating base material 4131.
- an interlayer conductive portion 4134 formed by a via hole 4133 is formed in the insulating base material 4131 and the interlayer adhesive layer 4142.
- the interlayer conductive portion 4134 can also be formed by filling the via hole 4133 with a conductive paste.
- the partial multilayering substrate 4130 is stacked on the upper surface 4113A side of the relay substrate 4110, that is, in the partial multilayer portion 4120A, with the conductive layer 4132 forming a wiring pattern facing downward, and the rear surface 4110B side of the relay substrate 4110, In the partial multilayer portion 4120B, a plurality of conductive layers 4132 forming a wiring pattern are stacked upward, and are bonded by interlayer adhesive layers 4141 and 4142 or an insulating resin layer 4113, respectively. That is, the substrate for partial multilayering 4130 is stacked on each of the upper and lower sides of the relay substrate 4110 with the conductive layer 4132 forming the wiring pattern facing the relay substrate 4110 side.
- a conductive layer 41 35 forming a wiring pattern and a conductor land 4136 for component mounting are formed on the surface 4130A of the interlayer adhesive layer 4142 of the partial multilayer substrate 4130 forming the outermost layer of each of the partial multilayers 4120A and 4120B. ing.
- FIGS. 37A to 37E show a manufacturing process of the relay board 4110.
- a general-purpose single-sided copper-clad polyimide base material (single-sided conductor-clad laminate) 4150 is prepared as a starting material.
- the single-sided copper-clad polyimide substrate 4150 is a single-sided copper-clad laminate (CCL) having a copper foil 4151 as a conductive layer only on one side of an insulating substrate 4111 made of a polyimide film.
- an etching resist is laminated on the copper foil 4151 of the single-sided copper-clad polyimide base material 4150, and the wiring pattern is exposed and developed. Thereafter, the exposed copper is etched by a cupric chloride bath to form a conductive layer (conductive pattern) 4112. Next, the etching resist is removed to obtain a base material 4152 with a single-sided wiring circuit as shown in FIG. 37B.
- an interlayer adhesive layer 4141 is formed on the surface opposite to the conductive layer surface (upper surface 411 OA) forming the wiring pattern of the edge base material 4111, and the wiring pattern of the insulating base material 4111 is formed.
- An insulating resin layer 4113 also serving as an interlayer adhesive layer is formed on the conductive layer surface (upper surface 411 OA).
- the insulating resin layer 4113 may be formed of a thermoplastic polyimide film or the like.
- the upper surface of the insulating base material 4111 can be formed by pressing with a heating press or vacuum heating press, laminating, or vacuum laminating. OA can be attached.
- the insulating resin layer 4113 can be formed by coating using curtain coating or spin coating.
- an arbitrary position to be connected between layers is irradiated with a UV-YAG laser, a carbon dioxide laser, or the like from the side of the interlayer bonding layer 4141 to penetrate the interlayer bonding layer 4141 and the insulating base material 4111.
- a via hole 4114 is formed in contact with the back surface of the copper foil (conductive layer 4112 forming a wiring pattern).
- a UV-YAG laser, a carbon dioxide gas laser, or the like is irradiated from the insulating resin layer 4113 side to an arbitrary position where the interlayer connection is desired, and penetrates the insulating resin layer 4113 to form an upper surface of the copper foil (conductive layer 4112 forming a wiring pattern).
- Via hole 4116 is formed in contact with.
- the via holes 4114 and 4116 are filled with thermosetting silver paste 4118 and 4119 by a printing method or the like to complete the interlayer conductive portions 4115 and 4117. Thereby, the relay board 4110 is completed.
- the relay substrate 4110 has the conductive layer 4112 forming the wiring pattern other than the interlayer conductive portions 4115 and 4117 covered with the insulating resin layer 4113, so that the cover layer protecting the conductive layer 4112 forming the wiring pattern is provided.
- the step of providing the information can be omitted.
- FIG. 38 shows a substrate 4130 for partial multilayering.
- the substrate for partial multilayering 4130 starts from a general-purpose single-sided copper-clad polyimide base material equivalent to the starting material of the relay substrate 4110 As a material, an interlayer adhesive layer 41 42 is formed, a conductive layer 41 32 forming a wiring pattern is formed by etching, a via hole 41 33 is formed by laser processing, etc., and an interlayer conduction is performed by filling the via hole 41 33 with a silver paste 41 37. Manufactured by formation of parts 41 34.
- the board 4130 for partial multilayering is formed into a predetermined shape according to the planar shape of the partial multilayer sections 4120A and 4120B before lamination on the relay board 4110. Processed (press punched).
- FIG. 39 shows a step of laminating the substrate 4130 for partial multilayering described above.
- a plurality of substrates for partial multilayering 4130 each having a predetermined number of external shapes processed into a predetermined shape are aligned using alignment marks, reference holes, circuit patterns, and the like (not shown) and then superposed.
- copper foil 4137 for the outermost layer on the front and back sides is disposed on the surface 4130A of the interlayer adhesive layer 4142 on the upper side (front side) and the lower side (back side).
- the partial multilayering substrate 4130 is laminated so that the conductive layer 4132 forming the wiring pattern faces the relay substrate 4110 on each of the upper and lower sides of the relay substrate 4110. . Then, as shown in FIG. 39B, heat and pressure are applied at a high temperature and a high pressure using a vacuum cure press machine or a cure press machine to form a multilayer at once.
- the conductive layer 4135 forming the outermost wiring pattern and the conductive land portion 4136 for component mounting have the same circuit forming transfer tape 460 as the circuit forming transfer tape 460 shown in FIGS. It can also be formed using a transfer tape for use.
- a substrate for external layer partial multilayering equivalent to the external layer partial multilayer substrate 470 as shown in FIGS. 34 and 35 is used, and a contact hole for component mounting is provided on the external layer partial multilayer substrate. It is also possible to adopt a structure that is open. Industrial applicability
- At least one substrate with a wiring circuit which has been subjected to an outer shape in a predetermined shape in advance, is bonded to a motherboard printed wiring board, and these are electrically connected at least at one position by an inner via hole. It is connected.
- the outer shape of the substrate with the wiring circuit is smaller than the outer shape of the motherboard printed wiring board, and the substrate with the wiring circuit has an island shape on the motherboard printed wiring board.
- At least one base material with a single-sided wiring circuit which has been formed into a predetermined shape in advance, is bonded to the motherboard printed wiring board, and the base material is electrically connected to the motherboard printed wiring board at at least one position by an inner via hole.
- the outer shape of the substrate with single-sided wiring circuit is smaller than the outer shape of the mother-board printed wiring board.Since the substrate with single-sided wiring circuit has an island shape on the mother-board printed wiring board, higher flexibility in wiring is achieved. As a result, material costs and substrate capacity can be reduced.
- the substrate with a single-sided wiring circuit laminated on the motherboard printed wiring board is attached to the inside of the outer shape of the first substrate on the motherboard printed wiring board side, and is bonded onto the first substrate. Is positioned so that the outer shape of the second base material is located and is laminated in a viramid shape, so that when the mother-board printed wiring board is bent, the mother-board printed wiring board and the single-sided wiring board are connected. It is capable of dispersing and relaxing the stress applied between the layers and between the layers of the laminated substrates with single-sided wiring circuits, provides high flexural strength (peeling resistance), and is a feature of multilayer flexible printed wiring boards (FPC). Good flexibility is utilized.
- the insulating base material of the main single-sided circuit board is partially removed, and in the removed portion, the back surface of the conductive pattern is exposed, and the insulating base material of the main single-sided circuit board is removed.
- the electronic component is mounted on the exposed back surface of the conductive pattern from the other side of the conductive pattern, or a multilayer having a conductive pattern on one side of the interlayer conductive part and the insulating base material.
- the single-sided circuit board for a wiring board can be laminated in a form in which it is electrically connected to the exposed back surface of the conductive pattern. Then, also on one side of the insulating base material of the main single-sided circuit board, electronic components are mounted, or a single-sided circuit board for a multilayer wiring board is laminated, whereby a double-sided circuit board can be obtained.
- an insulating resin layer also serving as an interlayer adhesive layer is formed on the conductive layer surface side of the relay substrate, and an interlayer conductive portion made of a conductive material filled in a via hole formed in the insulating base material is provided. It has an interlayer conduction part made of a conductive substance filled in the via hole formed in the layer, so that even if a laminated material having a conductive layer such as copper foil on only one side of the insulating base material is used as a starting material, Arbitrary parts on both sides can be partially multilayered, and both sides can be mounted.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
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US10/542,649 US20060180344A1 (en) | 2003-01-20 | 2003-12-19 | Multilayer printed wiring board and process for producing the same |
CN200380109013.2A CN1739323B (zh) | 2003-01-20 | 2003-12-19 | 多层布线板及其制造方法 |
FI20050767A FI122414B (fi) | 2003-01-20 | 2005-07-19 | Monikerrospiirilevy ja menetelmä sen valmistamiseksi |
US12/463,708 US7886438B2 (en) | 2003-01-20 | 2009-05-11 | Process for producing multilayer printed wiring board |
Applications Claiming Priority (8)
Application Number | Priority Date | Filing Date | Title |
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JP2003011635A JP4195619B2 (ja) | 2003-01-20 | 2003-01-20 | 多層配線板およびその製造方法 |
JP2003-11635 | 2003-01-20 | ||
JP2003-294994 | 2003-08-19 | ||
JP2003294994A JP2005064357A (ja) | 2003-08-19 | 2003-08-19 | 多層配線板およびその製造方法 |
JP2003309254A JP2005079402A (ja) | 2003-09-01 | 2003-09-01 | 回路基板およびその製造方法 |
JP2003-309254 | 2003-09-01 | ||
JP2003-342907 | 2003-10-01 | ||
JP2003342907A JP2005109299A (ja) | 2003-10-01 | 2003-10-01 | 多層配線板およびその製造方法 |
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US10542649 A-371-Of-International | 2003-12-19 | ||
US12/463,708 Division US7886438B2 (en) | 2003-01-20 | 2009-05-11 | Process for producing multilayer printed wiring board |
Publications (1)
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WO2004066697A1 true WO2004066697A1 (ja) | 2004-08-05 |
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PCT/JP2003/016377 WO2004066697A1 (ja) | 2003-01-20 | 2003-12-19 | 多層配線板およびその製造方法 |
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US (2) | US20060180344A1 (ja) |
FI (1) | FI122414B (ja) |
WO (1) | WO2004066697A1 (ja) |
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2005
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2009
- 2009-05-11 US US12/463,708 patent/US7886438B2/en not_active Expired - Fee Related
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Also Published As
Publication number | Publication date |
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FI122414B (fi) | 2012-01-13 |
US20060180344A1 (en) | 2006-08-17 |
US7886438B2 (en) | 2011-02-15 |
US20090217522A1 (en) | 2009-09-03 |
FI20050767A (fi) | 2005-09-16 |
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