US20140182897A1 - Circuit board and method of manufacturing the same - Google Patents
Circuit board and method of manufacturing the same Download PDFInfo
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- US20140182897A1 US20140182897A1 US14/143,682 US201314143682A US2014182897A1 US 20140182897 A1 US20140182897 A1 US 20140182897A1 US 201314143682 A US201314143682 A US 201314143682A US 2014182897 A1 US2014182897 A1 US 2014182897A1
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- insulating layer
- build
- inorganic material
- circuit board
- layer
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/002—Etching of the substrate by chemical or physical means by liquid chemical etching
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- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
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- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
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- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
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- H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
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- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
Definitions
- Embodiments of the present invention relate to a circuit board and a method of manufacturing the same.
- multi-layered substrate techniques in which a plurality of interconnection layers are formed on a printed circuit board (PCB) are developed, and further, a technique of mounting electronic components such as an active device or a passive device into a multi-layered substrate is also developed.
- PCB printed circuit board
- one of important tasks in a multi-layered substrate field may be that built-in electronic components effectively transmit and receive a signal including a voltage or current to/from an external circuit or other devices.
- a bending phenomenon of the substrate becomes a serious problem.
- Such a bending phenomenon may be referred to as warpage, which becomes serious as the electronic components-built-in substrate is formed of various materials having different thermal expansion coefficients.
- Document 1 cited below discloses a multi-layered substrate constituted by an insulating layer formed on a glass ceramic material only
- Document 2 cited below discloses a conventional multi-layered substrate in which a core substrate is formed by coating or impregnating a glass core or a glass fiber with resin.
- the insulating layer is implemented by the glass ceramic material only like in Document 1, since a process of processing a via and a circuit pattern is very difficult, it is difficult to implement a fine and highly integrated circuit pattern, and it is difficult to secure adhesion reliability between layers.
- an aspect of the present invention is to provide a circuit board and a method of manufacturing the same that are capable of reducing warpage of the circuit board and improving manufacturing efficiency thereof.
- a circuit board including: an inorganic material insulating layer; a first circuit pattern layer formed on a surface of the inorganic material insulating layer; a first build-up insulating layer formed on the inorganic material insulating layer and formed of an organic material; and a second circuit pattern layer formed on a surface of the first build-up insulating layer.
- the inorganic material insulating layer may be a glass sheet or a plate glass.
- the circuit board may further include a recess section formed at one region of the inorganic material insulating layer, and an electronic component at least partially inserted into the recess section and having an external electrode at at least one surface thereof, wherein the first build-up insulating layer covers the electronic components.
- the first build-up insulating layer may include a first upper build-up insulating layer formed on the inorganic material insulating layer and a first lower build-up insulating layer formed under the inorganic material insulating layer.
- the number of build-up layers formed on the first upper build-up insulating layer may be different from the number of build-up layers formed on the first lower build-up insulating layer.
- the external electrode may be disposed in a direction of the first upper build-up insulating layer, and the number of build-up layers formed on the first upper build-up insulating layer may be larger than that of the build-up layers formed on the first lower build-up insulating layer.
- the first circuit pattern layers may be formed on both surfaces of the inorganic material insulating layer, and may be electrically connected to each other by a via passing through the inorganic material insulating layer.
- circuit board may further include at least one build-up layer on the first build-up insulating layer.
- the inorganic material insulating layer may include a first inorganic material insulating layer having a cavity; an adhesive layer adhered to a lower surface of the first inorganic material insulating layer; and a second inorganic material insulating layer adhered to a lower surface of the adhesive layer.
- the circuit board may further include a cavity passing through the inorganic material insulating layer and formed in one region of the inorganic material insulating layer, and an electronic component at least partially inserted into the cavity and having an external electrode formed at at least one surface thereof, wherein the first build-up insulating layer covers the electronic component.
- the electronic component may be a capacitor.
- a circuit board includes an inorganic material insulating layer having a cavity or a recess section; an identification mark formed on a surface of the inorganic material insulating layer; an electronic component partially inserted into the cavity or the recess section and having an external electrode at at least one surface thereof; a first build-up insulating layer formed on the inorganic material insulating layer and formed of an organic material; and a second circuit pattern layer formed on a surface of the first build-up insulating layer.
- the inorganic material insulating layer may be a glass sheet or plate glass.
- the first build-up insulating layer may include a first upper build-up insulating layer formed on the inorganic material insulating layer and a first lower build-up insulating layer formed on the inorganic material insulating layer
- the second circuit pattern layer may include a second upper circuit pattern layer formed on an upper surface of the first upper build-up insulating layer and a second lower circuit pattern layer formed on an upper surface of the first lower build-up insulating layer
- the second upper circuit pattern layer and the second lower circuit pattern layer may be electrically connected by a via passing through the first build-up insulating layer and the inorganic material insulating layer.
- the via may pass through the identification mark.
- the external electrode may be electrically connected to any one of the second upper circuit pattern layer and the second lower circuit pattern layer by the via.
- the external electrode may be disposed in a direction of the first upper build-up insulating layer, and the number of build-up layers formed on the first upper build-up insulating layer may be larger than that of build-up layers formed on the first lower build-up insulating layer.
- the electronic component may be a capacitor.
- a method of manufacturing a circuit board includes: forming a first circuit pattern layer on a surface of an inorganic material insulating layer; forming a recess section or a cavity in the inorganic material insulating layer; inserting at least a portion of an electronic component having an external electrode into the recess section or the cavity; forming a first build-up insulating layer formed of an organic material on the inorganic material insulating layer; forming a via-hole passing the first build-up insulating layer and configured to expose a surface of at least one of the first circuit pattern layer and the external electrode; and forming a conductive material in the via-hole and forming a second circuit pattern layer on a surface of the first build-up insulating layer.
- forming a recess section or a cavity in the inorganic material insulating layer may include forming a resist pattern configured to expose a region at which the recess section or the cavity is to be formed on the inorganic material insulating layer; and wet-etching the exposed region to form the recess section or the cavity and then removing the resist pattern.
- the first build-up insulating layer may include a first upper build-up insulating layer formed on the inorganic material insulating layer and a first lower build-up insulating layer formed under the inorganic material insulating layer
- the method may further include forming at least one build-up layer on the first upper build-up insulating layer and the first lower build-up insulating layer, and wherein the number of build-up layers formed on the first upper build-up insulating layer is different from the number of build-up layers formed on the first lower build-up insulating layer.
- inserting at least the portion of the electronic component having the external electrode into the recess section or the cavity may be performed by making the lower surface of the electronic components in contact with the adhesive layer and adhering an added inorganic material insulating layer to the adhesive layer lower surface in a state in which an adhesive layer is adhered to the lower surface of the inorganic material insulating layer having the cavity.
- the method may further include performing at least one pre-treatment process selected from surface etching, hardening and opaque processing to the inorganic material insulating layer.
- a method of manufacturing a circuit board includes forming an identification mark on a surface of an inorganic material insulating layer; forming a recess section or a cavity in the inorganic material insulating layer; inserting at least a portion of an electronic component having an external electrode into the recess section or the cavity; forming a first build-up insulating layer formed of an organic material on the inorganic material insulating layer; forming a via-hole passing through the first build-up insulating layer and configured to expose a surface of the external electrode; and forming a conductive material in the via-hole and forming a second circuit pattern layer on a surface of the first build-up insulating layer.
- forming the recess section or the cavity in the inorganic material insulating layer may include patterning a predetermined region with respect to the identification mark.
- inserting at least the portion of the electronic component having the external electrode into the recess section or the cavity may be performed by mounting the electronic component on a predetermined position with respect to the identification mark.
- forming the via-hole passing through the first build-up insulating layer and configured to expose a surface of the external electrode may include forming a via-hole passing through the first build-up insulating layer, the identification mark and the inorganic material insulating layer.
- the first build-up insulating layer may include a first upper build-up insulating layer formed on the inorganic material insulating layer and a first lower build-up insulating layer formed under the inorganic material insulating layer
- the method may further include forming at least one build-up layer on the first upper build-up insulating layer and the first lower build-up insulating layer, wherein the number of build-up layers formed on the first upper build-up insulating layer is different from the number of build-up layers formed on the first lower build-up insulating layer.
- a circuit board in another aspect of the invention, includes: a core substrate comprised of a glass sheet or a plate glass; and, on the core substrate, at least one build-up insulating layer formed of organic material and through which a via connecting circuit patterns at opposite respective ends of the via is disposed
- FIG. 1 is a cross-sectional view schematically showing a circuit board according to an embodiment of the present invention
- FIG. 2 is a cross-sectional view schematically showing a circuit board according to another embodiment of the present invention.
- FIGS. 3A to 3D are cross-sectional process views schematically showing a method of manufacturing the circuit board according to the embodiment also illustrated in FIG. 2 , FIG. 3A showing a process of forming a first circuit pattern layer on an inorganic material insulating layer, FIG. 3B showing a process of forming a recess section in the inorganic material insulating layer, FIG. 3C showing a process of mounting electronic components and forming a first build-up insulating layer, and FIG. 3D showing a process of further forming a build-up layer;
- FIG. 4 is a cross-sectional view schematically showing a circuit board according to another embodiment of the present invention.
- FIG. 5 is a cross-sectional view schematically showing a circuit board according to another embodiment of the present invention.
- FIG. 6 is a cross-sectional view schematically showing a circuit board according to a another embodiment of the present invention.
- FIG. 7 is a cross-sectional view schematically showing a circuit board according to another embodiment of the present invention.
- FIG. 8 is a cross-sectional view schematically showing a circuit board according to another embodiment of the present invention.
- FIGS. 9A to 9D are cross-sectional process views schematically showing the circuit board according to the embodiment also illustrated in FIG. 8 , FIG. 9A showing a process of forming an identification mark on an inorganic material insulating layer, FIG. 9B showing a process of forming a recess section in the inorganic material insulating layer, FIG. 9C showing a process of mounting electronic components and forming a first build-up insulating layer, and FIG. 9D showing a process of further forming a build-up layer.
- FIG. 1 is a cross-sectional view schematically showing a circuit board 100 according to an embodiment of the present invention.
- the circuit board 100 may include an inorganic material insulating layer 110 , a first circuit pattern layer P 1 , a first build-up insulating layer 120 and a second circuit pattern layer P 2 .
- the inorganic material insulating layer 110 may be formed of glass.
- the glass may be a glass plate such as a glass sheet or a plate glass produced by a glass manufacturer.
- the glass may be formed of various kinds of glass materials such as a willow, Gorilla (which are trademarks, manufactured by Corning Corporation), Lime Soda, a plate glass used in a liquid crystal display (LCD), or the like.
- impurities or additives may be partially mixed with the glass to improve properties.
- the inorganic material insulating layer 110 may function as a core substrate.
- the core substrate since good stiffness, modulus, and tensile strength can be secured in comparison with the case in which a conventional resin or a resin impregnated with glass fiber is used as the core substrate, a warpage phenomenon of the circuit board can be basically solved.
- glass materials such as willow, LCD, Gorilla, Lime Soda, or the like, may be applied as the glass.
- the first circuit pattern layer P 1 may be directly formed on a surface of the inorganic material insulating layer 110 .
- the first circuit pattern layer P 1 , P 1 ′ may be formed at both surfaces of the inorganic material insulating layer 110 , and the first circuit pattern layer P 1 formed on one surface of the inorganic material insulating layer 110 may be electrically connected to the first circuit pattern layer P 1 ′ formed on the other surface of the inorganic material insulating layer 110 through a through-via Vt passing through the inorganic material insulating layer 110 .
- the first build-up insulating layer 120 may be formed of an organic material.
- the first build-up insulating layer 120 may be formed of epoxy resin.
- the first build-up insulating layer 120 may include ABF.
- the organic material does not exclude that an additive such as filler is included in an organic composition such as resin.
- a second circuit pattern layer P 2 may be directly formed on a surface of the first build-up insulating layer 120 .
- the warpage of the circuit board 100 is basically blocked by the inorganic material insulating layer 110 , even when an insulating material including a core material such as prepreg is not used as a build-up insulating layer, sufficient mechanical and physical characteristics of the circuit board can be secured. Accordingly, as the organic material is used as the build-up insulating layer, a circuit pattern having a finer pitch or line width can be formed.
- the first build-up insulating layer 120 , 120 ′ may also be formed on and under the inorganic material insulating layer 110 , a layer formed on the inorganic material insulating layer 110 may be referred to as a first upper build-up insulating layer 120 , and a layer formed under the inorganic material insulating layer 110 may be referred to as a first lower build-up insulating layer 120 ′.
- the circuit board 100 includes the inorganic material insulating layer 110 to enable reduction in warpage in comparison with the conventional art and effective implement of a via and circuit pattern on the first build-up insulating layer 120 formed of an organic material.
- the circuit board 100 according to the embodiment of the present invention can solve the problem.
- FIG. 2 is a cross-sectional view schematically showing a circuit board 200 according to another embodiment of the present invention.
- the circuit board 200 includes an electronic component 10 mounted therein.
- a recess section 211 recessed in a groove shape is formed in one region of an inorganic material insulating layer 210 such that the electronic component 10 is seated in the recess section 211 .
- the entire electronic component 10 should not be inserted into the recess section 211 .
- the electronic component 10 may be an active device such as a semiconductor chip or a passive device such as a capacitor, and an external electrode 11 is installed at the outside thereof.
- a surface the electrode 10 at which the external electrode 11 is formed may be disposed in a direction opposite to a bottom surface of the recess section 211 such that the external electrode 11 of the electronic component 10 forms electrical connection to the outside of the circuit board 200 .
- the first build-up insulating layer 220 formed of the organic material may be provided on the inorganic material insulating layer 210 to cover the inorganic material insulating layer 210 , the first circuit pattern layer P 1 and the electronic component 10 .
- the first build-up insulating layer 220 may be formed only on the inorganic material insulating layer 210 or only under the inorganic material insulating layer 210 .
- the second circuit pattern layer P 2 may be formed on the surface of the first build-up insulating layer 220 , and the second circuit pattern layer P 2 may be electrically connected to the first circuit pattern layer P 1 and the external electrode 11 via a first via V 1 .
- the process of implementing the circuit pattern on the first build-up insulating layer 220 formed of the organic material has high process efficiency and a fine circuit pattern in comparison with the process of implementing the circuit pattern on the inorganic material insulating layer 210 .
- fine vias can be relatively easily and precisely formed.
- At least one build-up layer may be further formed on the first build-up insulating layer 220 .
- the build-up layer may include a build-up insulating layer and a circuit pattern layer formed on a surface of the build-up insulating layer.
- a second build-up insulating layer 230 may be further provided in an upward direction of the inorganic material insulating layer 210 , and build-up layers may be further provided in a downward direction of the inorganic material insulating layer 210 in a similar manner.
- solder resist SR and a solder ball SB may be further provided at the outermost side of the circuit board 100 .
- the circuit board 200 can effectively implement the fine circuit pattern on the first build-up insulating layer 220 formed of the organic material while sufficiently reducing the warpage using the inorganic material insulating layer 210 .
- FIGS. 3A to 3D are process cross-sectional views schematically showing a method of manufacturing the circuit board 200 according to the aforementioned embodiment of the present invention.
- an inorganic material 210 ′ formed of glass is pre-treated to prepare the inorganic material insulating layer 210 .
- the pre-treatment may be a process of treating surface through a process such as surface etching, or the like, or a process of hardening the surface to further improve strength thereof.
- the inorganic material insulating layer 210 may be transparently treated, and the opaque treatment may also be included in the pre-treatment process.
- the first circuit pattern layers P 1 may be formed on the surface of the inorganic material insulating layer 210 .
- the first circuit pattern layer P 1 may be formed at both surfaces of the inorganic material insulating layer 210 , and a through-via Vt may be formed to electrically connect the first circuit pattern layers P 1 , P 1 ′ formed on both surfaces thereof.
- a conductive material may be provided in the via-hole to form the through-via Vt, and the first circuit pattern layers P 1 , P 1 ′ can be electrically connected by the through-via Vt.
- the recess section 211 may be formed on the inorganic material insulating layer 210 .
- a resist pattern PR configured to expose a region in which the recess section 211 is to be formed is formed on the inorganic material insulating layer 210 .
- the resist pattern PR may be a photo resist pattern, but not limited thereto.
- the wet etching is performed using etchant, and as a result, the recess section, which is partially recessed, may be formed in the inorganic material insulating layer 210 .
- the resist pattern PR may be formed such that the resist pattern PR covers both of the first circuit pattern layers P 1 to prevent damage to the first circuit pattern layers P 1 due to the etchant.
- the electronic component 10 is inserted into the recess section 211 .
- the electronic component 10 can be relatively securely fixed by applying an adhesive agent 12 to a lower surface of the electronic component 10 or applying the adhesive agent 12 to the upper surface of the recess section 211 and then mounting the electronic component 10 .
- a first build-up insulating layer 220 is formed, and a via-hole VH passing through the first build-up insulating layer 220 is formed at a place requiring via connection, for example, an upper region of the external electrode 11 of the electronic component 10 or the first circuit pattern layer P 1 , by laser or wet etching.
- the via-hole VH may be filled with a conductive material, and the second circuit pattern layer P 2 may be formed on a surface of the first build-up insulating layer 220 .
- the plurality of build-up layers, the solder resist SR and the solder ball SB may be formed on the first build-up insulating layer 220 to manufacture the circuit board 200 .
- FIG. 4 is a cross-sectional view schematically showing a circuit board 300 according to another embodiment of the present invention.
- the number of build-up layers provided on the inorganic material insulating layer 210 is larger than that of the build-up layers provided under the inorganic material insulating layer 210 .
- the inorganic material insulating layer 210 is symmetrically formed at upper and lower sides thereof to reduce the warpage in the conventional multi-layered substrate, the interconnection cannot be sufficiently formed on the electronic component 10 to increase an area of the substrate or add unnecessary layers under the electronic component 10 , increasing a thickness of the substrate.
- the circuit board 300 according to the present invention can efficiently implement the fine circuit pattern on the first build-up insulating layer 220 formed of the organic material while sufficiently reducing the warpage using the inorganic material insulating layer 210 , the number of build-up layers may be different on and under the inorganic material insulating layer 210 from each other, and thus, the problems of the conventional art can be solved.
- FIG. 5 is a cross-sectional view schematically showing a circuit board 400 according to another embodiment of the present invention.
- the circuit board 400 may include a cavity 412 instead of the recess section so that the electronic component 10 is inserted into the cavity 412 .
- FIG. 6 is a cross-sectional view schematically showing a circuit board 500 according to a another embodiment of the present invention.
- the circuit board 500 may include an inorganic material insulating layer constituted by a first inorganic material insulating layer 510 , an adhesive layer 515 and a second inorganic material insulating layer 513 .
- the adhesive layer 515 can be adhered to a lower surface of the first inorganic material insulating layer 510 , and in a state in which the electronic component 10 is inserted into the cavity 512 of the first inorganic material insulating layer 510 , the lower surface of the electronic component 10 can be securely adhered to the upper surface of the adhesive layer 515 .
- the second inorganic material insulating layer 513 is further adhered to the lower surface of the adhesive layer 515 , strength of the inorganic material insulating layer can be further improved to more stably support the electronic component 10 .
- the first inorganic material insulating layer 510 and the second inorganic material insulating layer 513 are entitled merely for the convenience of description, the first inorganic material insulating layer 510 may be referred to as an inorganic material insulating layer, and the second inorganic material insulating layer 513 may be referred to as an added inorganic material insulating layer.
- FIG. 7 is a cross-sectional view schematically showing a circuit board 600 according to another embodiment of the present invention.
- an electronic component 20 inserted into a cavity 612 is a capacitor such as MLCC or the like.
- vias may be formed at the lower surface of an external electrode 21 as well as the upper surface of the external electrode 21 to be electrically connected to the build-up layers
- FIG. 8 is a cross-sectional view schematically showing a circuit board 700 according to another embodiment of the present invention.
- the circuit board 700 may include an inorganic material insulating layer 210 , an identification mark F, an electronic component 10 , a first build-up insulating layer 220 and a second circuit pattern layer P 2 .
- the inorganic material insulating layer 210 may be glass.
- the second circuit pattern layer P 2 on the inorganic material insulating layer 210 may be needed to be connected to the second circuit pattern layer P 2 under the inorganic material insulating layer 210 .
- the through-via Vt passing through the first build-up insulating layer 220 may be formed to electrically connect the second circuit pattern layers P 2 .
- the through-via Vt formed at this time can pass through the identification mark F. That is, in forming the through-via Vt, in order to process the via-hole at a precise position, the identification mark F can be used as a kind of reference index.
- the identification mark F may be used as a reference index in a process of forming the recess section 211 or the cavity in the inorganic material insulating layer 210 , and may be used as a reference index in a process of mounting the electronic component 10 .
- the first circuit pattern layer P 1 is not formed on the surface of the inorganic material insulating layer 210 .
- the process of forming the circuit pattern or the via on the surface of the inorganic material insulating layer 210 formed of glass has a relatively low yield or process efficiency.
- the thickness for forming at least two layers can be reduced by forming the first circuit pattern layer P 1 on the surface of the inorganic material insulating layer 210 , an effect according to formation of the first circuit pattern layer P 1 could be diluted in consideration of the process efficiency and yield.
- an appropriate one of the above-mentioned embodiment and the present embodiment may be applied to manufacture the circuit board.
- FIGS. 9A to 9D are cross-sectional process views schematically showing a method of manufacturing the circuit board 700 according to the embodiment illustrated in FIG. 8 .
- the inorganic material 210 ′ formed of glass is pre-treated to prepare the inorganic material insulating layer 210 .
- the pre-treatment may mean that the surface is treated through surface etching, hardened to improve strength thereof, or the inorganic material insulating layer 210 is opaquely treated.
- the identification mark F is provided at the circuit board 700 according to the embodiment of the present invention.
- the identification mark F may be used as a reference index in the process of forming the recess section 211 or the cavity in the inorganic material insulating layer 210 , and it has been described that the identification mark F can be used s a reference index in the process of mounting the electronic component 10 .
- the identification mark F may have a groove shape or a protrusion shape, and in the specification, a method of forming the identification mark F in the protrusion shape will be described.
- a film F′ is formed on one surface of the inorganic material insulating layer 210 through sputtering or plating.
- the resist pattern PR configured to cover a portion at which the identification mark F is to be formed and expose the other portion is formed.
- the resist pattern PR may be a photo resist pattern.
- the resist pattern PR may be removed to form the identification mark F having the protrusion shape.
- the recess section 211 may be formed on the inorganic material insulating layer 210 .
- the resist pattern PR configured to expose a region at which the recess section 211 is to be formed is formed on the inorganic material insulating layer 210 .
- the resist pattern PR may be the photo resist pattern PR, but not limited thereto.
- the recess section 211 which is partially recessed, may be formed in the inorganic material insulating layer 210 .
- all of the resist pattern PR may be removed to form the recess section 211 in the inorganic material insulating layer 210 .
- a cavity instead of the recess section 211 may be formed in the inorganic material insulating layer 210 , and as described above, the recess section 211 and the cavity may be formed through wet etching or laser drilling.
- a laser is irradiated to a predetermined region with respect to the identification mark F to form the recess section 211 or the cavity, more precisely processing the recess section 211 or the cavity.
- the electronic component 10 is inserted into the recess section 211 .
- the electronic component 10 may be mounted to relatively securely fix the electronic component 10 .
- the first build-up insulating layer 220 is formed, and the via-hole VH passing through the first build-up insulating layer 220 is formed in a place that requires via connection, for example, an upper region of the external electrode 11 of the electronic component 10 , through laser or wet etching.
- a via-hole passing through the first build-up insulating layer 220 and the inorganic material insulating layer 210 may be formed, and in order to precisely process the via-hole, the via-hole may pass through the identification mark F also.
- the identification mark F may be used as a reference index for processing the via-hole to form the through-via Vt.
- the via-hole may be filled with a conductive material, and the second circuit pattern layer P 2 may be formed on a surface of the first build-up insulating layer 220 .
- a plurality of build-up layer, a solder resist SR and a solder ball SB may be formed on the first build-up insulating layer 220 to manufacture the circuit board 700 .
- the present invention includes the inorganic material insulating layer to provide useful effects of reducing the warpage in comparison with the conventional art, and effectively implementing the via and circuit pattern on the first build-up insulating layer formed of the organic material.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
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- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
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- Production Of Multi-Layered Print Wiring Board (AREA)
Priority Applications (1)
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Also Published As
Publication number | Publication date |
---|---|
JP2014131037A (ja) | 2014-07-10 |
US20160205773A1 (en) | 2016-07-14 |
TW201429353A (zh) | 2014-07-16 |
JP6373574B2 (ja) | 2018-08-15 |
US9788433B2 (en) | 2017-10-10 |
KR20140087745A (ko) | 2014-07-09 |
KR101472640B1 (ko) | 2014-12-15 |
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