TWI587527B - Two-dimensional device array - Google Patents

Two-dimensional device array Download PDF

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Publication number
TWI587527B
TWI587527B TW103117812A TW103117812A TWI587527B TW I587527 B TWI587527 B TW I587527B TW 103117812 A TW103117812 A TW 103117812A TW 103117812 A TW103117812 A TW 103117812A TW I587527 B TWI587527 B TW I587527B
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Taiwan
Prior art keywords
array
substrate
dimensional
strain
extendable
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TW103117812A
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Chinese (zh)
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TW201434163A (en
Inventor
約翰Ａ 羅傑斯
馬修 梅特
孫玉剛
高興助
安卓 卡森
崔元文
馬克 史托科維奇
簡寒坤
黃永剛
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美國伊利諾大學理事會
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    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
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    • H01L27/0688—Integrated circuits having a three-dimensional layout
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Description

二維設備陣列 Two-dimensional device array

自1994年對印刷全聚合物電晶體之首次論證以來，將大量關注針對於包含處於塑膠基板上之可撓性整合式電子設備的潛在之新類別的電子系統。[Garnier,F.，Hajlaoui,R.，Yassar,A.及Srivastava,P.,Science，第265卷，第1684至1686頁]近來，大量研究已針對開發用於用於可撓性塑膠電子設備之導體、介電質及半導體元件之新的溶液可處理材料。然而，可撓性電子元件領域之進步不僅係由新的溶液可處理材料之開發所驅動，而且亦由可應用於可撓性電子系統之新的設備組件幾何形狀、有效之設備及設備組件處理方法及高解析度圖案化技術所驅動。預期該等材料、設備組態及製造方法將在快速新興之新類別的可撓性整合式電子設備、系統及電路中起根本作用。 Since the first demonstration of printing all-polymer transistors in 1994, there has been a great deal of interest in electronic systems that are potentially new to the category of flexible integrated electronic devices on plastic substrates. [Garnier, F., Hajlaoui, R., Yassar, A. and Srivastava, P., Science, Vol. 265, pp. 1684 to 1686] Recently, a large number of studies have been developed for use in flexible plastic electronic devices. New solutions for conductors, dielectrics, and semiconductor components can process materials. However, advances in the field of flexible electronic components are not only driven by the development of new solution-processable materials, but also by the processing of new device component geometries, effective equipment and equipment components that can be applied to flexible electronic systems. Driven by methods and high-resolution patterning techniques. It is expected that these materials, equipment configurations and manufacturing methods will play a fundamental role in the rapidly emerging new category of flexible integrated electronic devices, systems and circuits.

對可撓性電子元件領域之關注起因於此技術所提供之若干重要優勢。舉例而言，此等基板材料之固有可撓性允許將其整合為許多形狀，從而提供對於脆性習知矽基電子設備而言為不可能之大量有用設備組態。另外，溶液可處理組份材料與可撓性基板之組合致能藉由連續高速印刷技術進行之製造，該等技術能夠以較低成本於較大基板區上產生電子設備。 The focus on the field of flexible electronic components is due to several important advantages offered by this technology. For example, the inherent flexibility of such substrate materials allows for their integration into many shapes, providing a large number of useful device configurations that are not possible with fragile conventional 矽-based electronic devices. In addition, the combination of solution processable component materials and flexible substrates enables fabrication by continuous high speed printing techniques that enable the production of electronic devices over larger substrate areas at lower cost.

然而，顯示出良好電子效能的可撓性電子設備之設計及製造提出許多重大挑戰。第一，製造習知矽基電子設備之成熟方法與多數可撓性材料不相容。舉例而言，諸如單晶矽或鍺半導體之傳統高品質無機半導體組件通常藉由在大大超過多數塑膠基板之熔融或分解溫度的溫度(>攝氏1000度)下使薄膜生長而加以處理。另外，多數無機半導體本質上不可溶於將允許基於溶液之處理及輸送之習知溶劑中。第二，雖然許多非晶矽、有機或混合有機-無機半導體適於併入可撓性基板中且可以相對較低之溫度加以處理，但此等材料不具有能夠提供具有良好電子效能之整合式電子設備的電子特性。舉例而言，具有由此等材料製成之半導體元件之薄膜電晶體顯示出比基於互補單晶矽之設備小約三個數量級之場效遷移率。由於此等限制，可撓性電子設備目前限於不需要高效能之特定應用，諸如用於開關元件(用於具有非發射性像素之主動式矩陣平板顯示器)中及用於發光二極體中。 However, the design and manufacture of flexible electronic devices that exhibit good electronic performance presents a number of significant challenges. First, the mature methods of fabricating conventional electronic devices are incompatible with most flexible materials. For example, conventional high quality inorganic semiconductor components such as single crystal germanium or germanium semiconductors are typically processed by growing the film at temperatures that greatly exceed the melting or decomposition temperatures of most plastic substrates (> 1000 degrees Celsius). In addition, most inorganic semiconductors are inherently insoluble in conventional solvents that will allow for solution based processing and delivery. Second, although many amorphous germanium, organic or hybrid organic-inorganic semiconductors are suitable for incorporation into flexible substrates and can be processed at relatively low temperatures, such materials do not have an integrated design that provides good electronic performance. Electronic characteristics of electronic equipment. For example, a thin film transistor having a semiconductor element made of such a material exhibits a field effect mobility of about three orders of magnitude smaller than that of a device based on a complementary single crystal germanium. Because of these limitations, flexible electronic devices are currently limited to specific applications that do not require high performance, such as in switching elements (for active matrix flat panel displays with non-emissive pixels) and in light emitting diodes.

可撓性電子電路為包括可撓性顯示器、具有任意形狀之電活性表面(諸如電子織物及電子皮膚)的許多領域中之研究之活躍區。此等電路經常由於傳導組件不能夠回應於構形改變而延伸而不能夠充分與其環境相一致。因此，彼等可撓性電路易於受損、電子降級，且在嚴苛及/或重複之構形改變下可能不可靠。可撓性電路需要在經由延伸及鬆弛而循環時仍保持完好之可延伸且可撓曲之互連。 Flexible electronic circuits are active areas of research in many fields including flexible displays, electroactive surfaces of any shape, such as electronic fabrics and electronic skin. Such circuits often do not extend sufficiently to conform to their environment due to the inability of the conductive components to extend in response to configuration changes. As such, their flexible circuits are susceptible to damage, electronic degradation, and may be unreliable under severe and/or repeated configuration changes. Flexible circuits require an extendable and flexible interconnect that remains intact while cycling through extension and relaxation.

能夠撓曲且具有彈性之導體一般藉由在諸如聚矽氧之彈性體中嵌入金屬粒子而製成。彼等傳導橡膠為具有機械彈性且導電的。傳導橡膠之缺點包括高電阻率及在延伸時之顯著電阻變化，由此導致整體較差之互連效能及可靠性。 A flexible and resilient conductor is typically made by embedding metal particles in an elastomer such as polyoxymethylene. These conductive rubbers are mechanically elastic and electrically conductive. Disadvantages of conductive rubber include high resistivity and significant resistance changes during extension, resulting in poor overall interconnect performance and reliability.

Gray等人論述了藉由使用封閉於能夠進行高達54%之線性應變同時保持傳導性之聚矽氧彈性體中的微製造曲折導線來建構彈性體電子元件。在彼研究中，將導線形成為螺旋彈簧形狀。與在較低應變(例如，2.4%)下斷裂之直線導線相比，曲折導線在顯著較高之應變(例如，27.2%)下仍保持傳導。該導線幾何形狀依賴於導線藉由撓曲而非延伸而伸長之能力。彼系統在以不同形狀及在額外平面中進行可控及精確圖案化之能力上受到限制，由此限制使系統適應於不同應變及撓曲狀態之能力。 Gray et al. discuss the construction of elastomeric electronic components by using microfabricated tortuous wires enclosed in a poly-xylene elastomer capable of performing linear strains up to 54% while maintaining conductivity. In the study, the wires were formed into a coil spring shape. The tortuous wire remains conductive at significantly higher strain (eg, 27.2%) than a straight wire that breaks at a lower strain (eg, 2.4%). The wire geometry depends on the ability of the wire to elongate by flexing rather than extending. The system is limited in its ability to control and precisely pattern in different shapes and in additional planes, thereby limiting the ability of the system to adapt to different strain and deflection conditions.

研究提示，彈性可延伸金屬互連經歷電阻隨機械應變之增加。(Mandlik等人，2006年)。Mandlik等人嘗試藉由於錐形奈米圖案化表面上沈積金屬膜而最小化此電阻改變。然而，彼研究依賴於產生賦予薄金屬線延伸能力之微裂縫之起伏特徵。微裂縫藉由平面外扭曲及變形而促進金屬彈性變形。然而，彼等金屬裂縫與厚金屬膜不相容，而替代地與沈積於圖案化彈性體之頂部的相當窄範圍之薄金屬膜(例如，約小於30nm)相容。 Research suggests that elastically extensible metal interconnects experience an increase in electrical resistance with mechanical strain. (Mandlik et al., 2006). Mandlik et al. attempted to minimize this resistance change by depositing a metal film on the tapered nanopatterned surface. However, his research relies on the undulation of microcracks that impart the ability to extend thin metal wires. The microcrack promotes elastic deformation of the metal by out-of-plane distortion and deformation. However, their metal cracks are incompatible with thick metal films, but are instead compatible with a relatively narrow range of thin metal films deposited on top of the patterned elastomer (e.g., less than about 30 nm).

向金屬互連賦予可延伸性之一方式為在導體(例如，金屬)應用期間對基板預加應變(例如，15%至25%)，繼之以對預應變之自發解除，由此誘發金屬導體互連之波狀起伏(見(例如)Lacour等人(2003)；(2005)；(2004)，Jones等人(2004)；Huck等人(2000)；Bowden等人(1998))。Lacour等人(2003)報告藉由最初壓縮金條帶來產生自發起皺之金條帶，電連續性在高達22%之應變(與彈性基板上之金膜之數個百分比的斷裂應變相比)下得以保持。然而，彼研究使用相當薄之金屬膜之層(例如，約105nm)且相對有限，因為系統可潛在地製造可延伸約10%之電導體。 One way to impart extensibility to a metal interconnect is to pre-strain the substrate (eg, 15% to 25%) during conductor (eg, metal) application, followed by spontaneous release of the pre-strain, thereby inducing metal The undulations of the conductor interconnections (see, for example, Lacour et al. (2003); (2005); (2004), Jones et al. (2004); Huck et al. (2000); Bowden et al. (1998)). Lacour et al. (2003) report the generation of self-initiating wrinkle gold strips by initially compressing gold bars with electrical continuity at strains up to 22% (compared to several percent of the fracture strain of the gold film on the elastic substrate) ) can be maintained. However, he studied using a relatively thin layer of metal film (e.g., about 105 nm) and is relatively limited because the system can potentially fabricate electrical conductors that can extend about 10%.

自前述內容顯而易見，存在對於具有改良之可延伸性、電 特性之互連及設備組件及用於快速且可靠地製造多種不同組態之可延伸互連的相關製程之需要。預期可撓性電子元件領域中之進步在許多重要的新興及既定之技術中起關鍵作用。然而，可撓性電子技術之此等應用的成功在很大程度上取決於對用於製造在折曲、變形及撓曲構形下顯示出良好電子、機械及光學特性之積體電子電路及設備的新型材料、設備組態及商業可行之製造途徑之持續開發。特定言之，需要高效能、機械可延展材料及設備組態在延伸或收縮構形下顯示出有用的電子及機械特性。 It is obvious from the foregoing that there is an improved extensibility, electricity The interconnection of features and equipment components and the need for processes to quickly and reliably manufacture a wide variety of different configurations of extendable interconnects. Advances in the field of flexible electronic components are expected to play a key role in many important emerging and established technologies. However, the success of such applications of flexible electronic technology is highly dependent on the use of integrated electronic circuits for producing good electrical, mechanical, and optical properties in flexed, deformed, and flexed configurations. Continuous development of new materials, equipment configurations and commercially viable manufacturing routes for the equipment. In particular, high performance, mechanically malleable materials and equipment configurations are required to exhibit useful electronic and mechanical properties in an extended or collapsed configuration.

本發明提供可延伸半導體及可延伸電子設備、設備組件及電路。需要可延伸、可撓曲且適型之電子設備及設備組件來製造適於印刷於多種彎曲表面上的電子元件。形狀符合之設備具有在自可撓性顯示器及電子織物至適型生物及物理感應器之範圍內的多種應用。因此，本發明之一實施例為具可撓性且可撓曲之電子設備、設備組件及用於製造具可撓性且可撓曲之設備的相關方法。藉由提供具有波狀或彎曲幾何形狀之互連或半導體薄膜而實現該可撓性及可撓曲性。該幾何形狀提供用於確保系統可延伸且可撓曲而不會有害地影響效能(即使在猛烈且重複之延伸及/或撓曲循環下)之手段。此外，該等方法提供精確且準確之幾何建構之能力，以使得可使設備及/或設備組件之物理特徵(例如，可延伸性、可撓曲性)適應於系統之操作條件。 The present invention provides extensible semiconductor and extensible electronic devices, device components and circuits. There is a need for an extendable, flexible, and versatile electronic device and device assembly to make electronic components suitable for printing on a variety of curved surfaces. Shape-compliant devices have a variety of applications ranging from flexible displays and electronic fabrics to suitable biological and physical sensors. Accordingly, one embodiment of the present invention is a flexible and flexible electronic device, device assembly, and related method for making a flexible and flexible device. This flexibility and flexibility is achieved by providing an interconnect or semiconductor film having a wavy or curved geometry. This geometry provides a means to ensure that the system is extensible and flexible without adversely affecting performance, even under violent and repeated extensions and/or flex cycles. Moreover, the methods provide the ability to accurately and accurately geometrically construct such that the physical characteristics of the device and/or device components (e.g., extensibility, flexibility) can be adapted to the operating conditions of the system.

舉例而言，可藉由彎曲互連而使一陣列設備組件彼此連接，以促進設備組件相對於彼此之獨立移動。然而，陣列內之局部區域可能具有與其他區域不同的撓曲或延伸要求。本發明之設備及方法促進可具有彎曲互連幾何形狀(包括(例如)互連尺 寸、週期性、振幅、定向及一區中互連之總數目)之局部變化之可撓性系統的建構。產生具有可控制定向之多個互連促進使互連適應於設備之操作條件。 For example, an array of device components can be connected to one another by bending the interconnect to facilitate independent movement of the device components relative to one another. However, localized regions within the array may have different flexing or extension requirements than other regions. Apparatus and methods of the present invention can have curved interconnect geometry (including, for example, interconnecting rulers) The construction of a flexible system with local variations in inch, periodicity, amplitude, orientation, and total number of interconnects in a zone. Producing multiple interconnects with controllable orientation facilitates adapting the interconnect to the operating conditions of the device.

在一實施例中，本發明提供用於建立與設備組件之電接觸之可延伸互連。互連具有第一末端、第二末端及安置於第一末端與第二末端之間的中央部分。該等末端結合至基板，諸如可撓性(例如，可延伸)基板、彈性體基板、剛性基板、不為彈性體之基板或者希望向其印刷電子設備、設備組件或其陣列之基板。互連之每一末端可附接至自身由基板支撐的不同設備組件。互連之中央部分處於撓曲組態且不與基板實體接觸(例如，不結合)。在一態樣中，此撓曲組態為中央部分處於應變之結果。在此態樣中，撓曲組態一般為彎曲的，以使得若以隔開設備組件之方式向一或多個設備組件(或下伏基板)施加力，則互連彎曲部分可至少部分地變直以適應設備組件之間的相對運動，同時保持設備組件之間的電接觸。 In one embodiment, the present invention provides an extendable interconnect for establishing electrical contact with device components. The interconnect has a first end, a second end, and a central portion disposed between the first end and the second end. The ends are bonded to a substrate, such as a flexible (eg, extendable) substrate, an elastomeric substrate, a rigid substrate, a substrate that is not an elastomer, or a substrate to which an electronic device, device component, or array thereof is desired to be printed. Each end of the interconnect can be attached to a different device component that is itself supported by the substrate. The central portion of the interconnect is in a flex configuration and is not in physical contact with the substrate (eg, not bonded). In one aspect, this deflection is configured as a result of the central portion being strained. In this aspect, the flexing configuration is generally curved such that if a force is applied to one or more of the device components (or the underlying substrate) in a manner that separates the device components, the interconnecting curved portion can be at least partially Straightening to accommodate relative motion between device components while maintaining electrical contact between device components.

在一實施例中，互連中央部分為弧形，其具有一振幅，諸如在約100nm與約1mm之間的振幅。在一態樣中，不同互連結合區域之數目可大於二，諸如三、四或五。在此態樣中，在第一互連末端與第二互連末端之間的中央部分實際上經再分為許多撓曲組態區域，以使得形成不與基板實體接觸之複數個不同彎曲部分區域。在該組態中，振幅及/或週期性可為恆定或者可在互連之整個縱向長度上變化。互連自身可為任何形狀，諸如薄膜、線或織帶。在互連為織帶之態樣中，織帶可具有在約300nm與1mm之間的厚度。 In an embodiment, the central portion of the interconnect is curved having an amplitude, such as an amplitude between about 100 nm and about 1 mm. In one aspect, the number of different interconnect bonding regions can be greater than two, such as three, four, or five. In this aspect, the central portion between the first interconnect end and the second interconnect end is actually subdivided into a plurality of flex configuration regions such that a plurality of different curved portions are formed that are not in physical contact with the substrate. region. In this configuration, the amplitude and/or periodicity may be constant or may vary over the entire longitudinal length of the interconnect. The interconnect itself can be of any shape, such as a film, wire or webbing. In the case where the interconnect is a webbing, the webbing may have a thickness of between about 300 nm and 1 mm.

為了促進額外設備組件之置放，互連末端電連接至之設備組件可為接觸焊墊。在一態樣中，額外設備組件與接觸焊墊電 接觸。 To facilitate placement of additional device components, the device components to which the interconnect terminals are electrically connected may be contact pads. In one aspect, additional equipment components and contact pads are electrically contact.

如所指出，支撐互連之基板可視互連所併入之設備而具有任何所要材料。在一實施例中，基板包含諸如聚二甲基矽氧烷(PDMS)之彈性體材料。基板可可逆地變形(例如，PDMS)或不可逆地變形(例如，塑膠)。 As indicated, the substrate supporting the interconnect can have any desired material depending on the device to which the interconnect is incorporated. In an embodiment, the substrate comprises an elastomeric material such as polydimethyl siloxane (PDMS). The substrate can be reversibly deformed (eg, PDMS) or irreversibly deformed (eg, plastic).

在一實施例中，設備可基於其物理特徵來進一步加以描述。舉例而言，本文中提供能夠經受高達25%之應變同時保持電導率及與設備組件之電接觸的互連。此情況下的"保持"指代在應變適應期間電導率的小於20%、10%或5%之降低。 In an embodiment, the device may be further described based on its physical characteristics. For example, an interconnect capable of withstanding strain up to 25% while maintaining electrical conductivity and electrical contact with device components is provided herein. "Retention" in this case refers to a decrease in electrical conductivity of less than 20%, 10% or 5% during strain adaptation.

在一實施例中，藉由將本文揭示之互連中之任一者併入具有複數個互連及兩個以上設備組件的設備陣列中來提供多軸延伸及撓曲。在此實施例中，每一互連提供一對設備組件之間的電接觸。視所要延伸、撓曲及/或壓縮操作條件而定，設備陣列可具有為柵格、花形、橋接或其任一組合(例如，一區域處於柵格組態中，另一區域處於橋接組態中)之幾何組態。另外，藉由將鄰近設備組件連接至一個以上之互連(諸如兩個、三個或四個互連)之能力而提供進一步的延伸及可撓曲性控制。舉例而言，係正方形或矩形之設備組件可鄰近於四個其他設備組件。若每一鄰近對藉由兩個互連而連接，則設備組件將具有自其延伸之八個互連。 In one embodiment, multi-axis extension and flexing is provided by incorporating any of the interconnects disclosed herein into an array of devices having a plurality of interconnects and more than two device components. In this embodiment, each interconnect provides electrical contact between a pair of device components. The device array can have a grid, a flower shape, a bridge, or any combination thereof depending on the conditions to be extended, flexed, and/or compressed (eg, one region is in a raster configuration and the other region is in a bridge configuration) Geometric configuration of). In addition, further extension and flexibility control is provided by the ability to connect adjacent device components to more than one interconnect, such as two, three, or four interconnects. For example, a square or rectangular device component can be adjacent to four other device components. If each adjacent pair is connected by two interconnects, the device component will have eight interconnects extending therefrom.

在一實施例中，設備陣列具有定向於至少兩個不同方向上之互連之集合。舉例而言，在柵格組態中，互連可具有彼此垂直或正交之兩個定向以提供在兩個方向上延伸之能力。在另一實施例中，設備陣列可包含所有皆相對於彼此對準之互連。彼實施例在延伸或撓曲被限制於單一方向時(例如，將電子設備織物撓曲限制於圓柱形表面)可為有用的。藉由將互連定向於三個 或三個以上方向(例如，三個方向或四個方向)上而提供額外撓曲及/或延伸能力。在一實施例中，藉由將設備陣列之互連置放於任一數目之不同層(諸如彼此鄰近之兩層)中而提供額外控制及穩定性。 In an embodiment, the array of devices has a set of interconnects oriented in at least two different directions. For example, in a grid configuration, the interconnects can have two orientations that are perpendicular or orthogonal to one another to provide the ability to extend in both directions. In another embodiment, the array of devices may include interconnects that are all aligned with respect to each other. This embodiment may be useful when the extension or flexing is limited to a single direction (e.g., flexing the electronic device fabric to a cylindrical surface). By directing the interconnect to three Additional flexing and/or extension capabilities are provided in more than three directions (eg, three directions or four directions). In one embodiment, additional control and stability is provided by placing the interconnects of the device array in any number of different layers, such as two layers adjacent to each other.

在一實施例中，設備陣列能夠經受高達約150%之應變而不斷裂。藉由使互連幾何形狀、定向、振幅、週期性、數目適應於操作條件(例如，單軸對多軸延伸及/或撓曲)而最大化達到斷裂之應變。 In an embodiment, the array of devices is capable of withstanding strain up to about 150% without breaking. The strain at which fracture is achieved is maximized by adapting the interconnect geometry, orientation, amplitude, periodicity, number to operating conditions (eg, uniaxial to multiaxial extension and/or deflection).

支撐互連或設備陣列之基板可具有為彎曲(諸如，為凹入、凸起、半球形或其組合)之至少一部分。在一實施例中，互連所併入之設備為可延伸之光偵測器、顯示器、發光器、光伏打裝置、薄片掃描器、LED顯示器、半導體雷射、光學系統、大面積電子元件、電晶體或積體電路中之一或多者。 The substrate supporting the interconnect or array of devices can have at least a portion that is curved, such as concave, convex, hemispherical, or a combination thereof. In one embodiment, the device incorporated by the interconnect is an extendable photodetector, display, illuminator, photovoltaic device, sheet scanner, LED display, semiconductor laser, optical system, large area electronic component, One or more of a transistor or integrated circuit.

在另一實施例中，本發明係關於用於製造能夠建立與設備組件之電接觸之彎曲互連之各種方法。在一態樣中，向彈性體基板表面、互連或兩者上施加結合位點之圖案。施加一力以使基板及與基板接觸之互連應變。結合位點之圖案提供特定互連位置與基板之間的結合。在使基板鬆弛之後(藉由移除力)，即產生彎曲互連。改變預加應變之量值、結合位點圖案化、幾何形狀及間距中之一或多者產生具有不同彎曲或波狀幾何形狀之互連。舉例而言，使結合位點之位置交錯以使得鄰近互連於不同位置處結合至基板提供"反相"之互連幾何形狀。結合位點圖案化係藉由此項技術中已知的任何手段而進行，諸如藉由向彈性體基板表面塗覆可固化光聚合物。視情況可藉由將互連之至少一部分囊封於諸如彈性體材料之囊封材料中來保護互連。彎曲互連可具有適於應用之任何形狀。在一實施例中，圖案為柵 格組態、花形組態、橋接組態或其任一組合。 In another embodiment, the present invention is directed to various methods for fabricating a curved interconnect capable of establishing electrical contact with a device component. In one aspect, a pattern of binding sites is applied to the surface of the elastomeric substrate, the interconnect, or both. A force is applied to strain the substrate and the interconnect in contact with the substrate. The pattern of bonding sites provides a bond between a particular interconnect location and the substrate. After the substrate is relaxed (by removing the force), a curved interconnect is created. Changing one or more of the magnitude of the pre-strain, the patterning of the binding sites, the geometry, and the spacing produces interconnects having different curved or wavy geometries. For example, the locations of the binding sites are staggered such that adjacent interconnects are bonded to the substrate at different locations to provide an "inverted" interconnect geometry. Binding site patterning is performed by any means known in the art, such as by coating a surface of an elastomeric substrate with a curable photopolymer. The interconnection may be protected by encapsulating at least a portion of the interconnect in an encapsulating material such as an elastomeric material, as appropriate. The curved interconnect can have any shape suitable for the application. In an embodiment, the pattern is a grid Grid configuration, flower configuration, bridge configuration or any combination thereof.

方法及設備可具有具任何尺寸之互連，諸如具有在數十奈米至約一毫米之範圍內的厚度或大於約300nm之厚度。在一態樣中，彎曲互連具有對應於互連自基板之最大豎直移位的振幅，且該振幅係選自100nm與1mm之間的範圍。對於具有長度及寬度之互連織帶，寬度、振幅或者寬度及振幅視情況可沿互連之長度而變化。影響振幅之一因素為在互連結合之前施加至彈性體基板之預加應變。一般而言，應變愈高，振幅愈大。在一實施例中，施加之力在彈性體基板中產生一應變，其中該應變選自在20%與100%之間的範圍。 The method and apparatus can have interconnects of any size, such as having a thickness in the range of tens of nanometers to about one millimeter or a thickness of greater than about 300 nm. In one aspect, the curved interconnect has an amplitude corresponding to a maximum vertical displacement interconnected from the substrate, and the amplitude is selected from a range between 100 nm and 1 mm. For interconnected webbing having lengths and widths, the width, amplitude or width and amplitude may vary from length to length depending on the length of the interconnect. One of the factors affecting the amplitude is the pre-stress applied to the elastomeric substrate prior to the interconnection bonding. In general, the higher the strain, the greater the amplitude. In one embodiment, the applied force creates a strain in the elastomeric substrate, wherein the strain is selected from the range between 20% and 100%.

在一實施例中，互連之一末端電連接至設備組件，且基板能夠延伸高達約100%，壓縮高達約50%或以低達5mm之曲率半徑而撓曲而無互連斷裂。互連由任何合適材料製成，諸如金屬或半導體，包括GaAs或Si。在一實施例中，該等方法提供彎曲互連自彈性體基板至諸如彎曲設備基板之設備基板的轉印。 In one embodiment, one end of the interconnect is electrically connected to the device component and the substrate is capable of extending up to about 100%, compressing up to about 50% or flexing with a radius of curvature as low as 5 mm without interconnect breakage. The interconnect is made of any suitable material, such as a metal or semiconductor, including GaAs or Si. In an embodiment, the methods provide for the transfer of a curved interconnect from an elastomeric substrate to a device substrate such as a curved device substrate.

替代經由對彈性體基板預加應變而產生上推或彎曲互連，可藉由向具有波狀表面之聚合印模施加互連材料而製成可延伸且可撓曲之互連。 Instead of creating a push-up or bend interconnect by pre-straining the elastomeric substrate, an extendable and flexible interconnect can be made by applying an interconnect material to a polymeric stamp having a wavy surface.

在一實施例中，為了製造可延伸且可撓曲之互連，使在表面上具有波狀特徵之基板平滑(諸如旋塗聚合物以部分填充凹入特徵)。該部分填充產生平滑波狀基板。接著視需要將金屬特徵沈積至平滑波狀基板上且對該等金屬特徵進行圖案化。平滑波狀基板上之金屬特徵可用於聚合印模抵靠平滑波狀金屬化基板之後續澆鑄。藉由自基板移除聚合印模而將金屬化基板(具有金屬特徵)轉移至聚合物基板來製造可延伸且可撓曲之互連。在一實施例中，金屬與基板之間的界面為Au/Su-8環氧樹脂光阻劑。 金屬可為層化之(例如)Au/Al。基板可經類似地層化，例如玻璃層支撐Su-8層，金屬與基板之間的實際界面為Au/Su-8。 In one embodiment, to create an extendable and flexible interconnect, the substrate having wavy features on the surface is smoothed (such as a spin-on polymer to partially fill the recessed features). This partial filling produces a smooth wavy substrate. Metal features are then deposited onto the smooth wavy substrate as desired and patterned for the metal features. The metal features on the smooth undulating substrate can be used for subsequent casting of the polymeric stamp against the smooth wavy metallized substrate. An extensible and flexible interconnect is fabricated by transferring a metallized substrate (having metal features) to the polymer substrate by removing the polymeric stamp from the substrate. In one embodiment, the interface between the metal and the substrate is an Au/Su-8 epoxy photoresist. The metal can be stratified (for example) Au/Al. The substrate can be similarly layered, for example, the glass layer supports the Su-8 layer, and the actual interface between the metal and the substrate is Au/Su-8.

在印模表面上製造上推互連之替代方法依賴於使彎曲基板表面變平，使互連與變平之表面接觸且允許基板表面鬆弛回至其彎曲幾何形狀。如本文所揭示，在一實施例中，該方法進一步提供在接觸之前對結合位點進行空間圖案化。在此實施例中，該方法尤為適於將互連及設備組件轉移至第二相應彎曲基板表面。在一態樣中，諸如黏著劑或黏著前驅物之結合手段在第二彎曲基板與第一彎曲基板上之互連系統之間產生結合，其即使在移除彈性體印模之後亦足以允許互連系統向第二基板之轉移。 An alternative method of fabricating the push-up interconnect on the surface of the stamp relies on flattening the surface of the curved substrate, bringing the interconnect into contact with the flattened surface and allowing the substrate surface to relax back to its curved geometry. As disclosed herein, in one embodiment, the method further provides for spatial patterning of the binding sites prior to contacting. In this embodiment, the method is particularly adapted to transfer interconnects and equipment components to a second corresponding curved substrate surface. In one aspect, a bonding means such as an adhesive or an adhesive precursor creates a bond between the second curved substrate and the interconnecting system on the first curved substrate, which is sufficient to allow mutual interaction even after removal of the elastomeric impression Transfer the system to the second substrate.

在一態樣中，本發明之方法及設備中之任一者具有為PDMS之印模或彈性體基板，其具有對於高達約40%之應變的線性及彈性回應。本發明之互連視情況可為可延伸電極、可延伸被動式矩陣LED顯示器或光偵測器陣列之部分。在一實施例中，本發明為具有藉由本發明之方法而製成之任何一或多個互連之可延伸電子設備，其中該電子設備為可延伸或可撓曲之電極、被動式矩陣LED、太陽能電池、集光器陣列、生物感應器、化學感應器、光電二極體陣列或半導體陣列。在一態樣中，電連接至彎曲互連之設備組件為薄膜、感應器、電路元件、控制元件、微處理器、傳感器或其組合。在一態樣中，藉由使互連之一末端電連接至設備組件而接取互連。 In one aspect, any of the methods and apparatus of the present invention has a PDMS stamp or elastomeric substrate with a linear and elastic response to strains up to about 40%. The interconnect of the present invention may optionally be part of an extendable electrode, an extendable passive matrix LED display, or a photodetector array. In one embodiment, the invention is any one or more interconnected extendable electronic devices made by the method of the invention, wherein the electronic device is an extendable or deflectable electrode, a passive matrix LED, Solar cells, concentrator arrays, biosensors, chemical sensors, photodiode arrays or semiconductor arrays. In one aspect, the device components that are electrically connected to the curved interconnect are a film, an inductor, a circuit component, a control component, a microprocessor, a sensor, or a combination thereof. In one aspect, the interconnect is accessed by electrically connecting one of the ends of the interconnect to the device component.

在一實施例中，本發明係關於具有諸如波狀半導體奈米薄膜之波狀奈米薄膜之方法及結構。該波狀奈米薄膜促進可撓性在設備組件自身中之併入(與連接設備組件之互連之可撓性相比)。在一態樣中，本發明為製造將半導體奈米薄膜材料自第一 基板轉移至第二變形基板之雙軸可延伸半導體薄膜之方法，其中在轉移之後，允許變形基板鬆弛回至其靜止組態。在一態樣中，半導體材料之厚度在約40nm與600nm之間。二維變形力之解除產生具有二維波狀結構之奈米薄膜。在一態樣中，藉由改變可撓性基板之溫度而產生變形力。 In one embodiment, the invention relates to a method and structure having a wavy nanofilm such as a wavy semiconductor nanofilm. The corrugated nanofilm promotes the incorporation of flexibility in the device assembly itself (compared to the flexibility of the interconnection of the connected device components). In one aspect, the invention is to manufacture a semiconductor nanofilm material from the first A method of transferring a substrate to a biaxially extensible semiconductor film of a second deformed substrate, wherein after the transfer, the deformed substrate is allowed to relax back to its static configuration. In one aspect, the thickness of the semiconductor material is between about 40 nm and 600 nm. The release of the two-dimensional deformation force produces a nano film having a two-dimensional wavy structure. In one aspect, the deformation force is generated by changing the temperature of the flexible substrate.

10‧‧‧金屬特徵/SU-8/互連 10‧‧‧Metal Features/SU-8/Interconnect

20‧‧‧基板 20‧‧‧Substrate

22‧‧‧波狀特徵 22‧‧‧ wavy features

24‧‧‧銳緣/銳緣谷 24‧‧‧ sharp edge / sharp edge valley

25‧‧‧分隔物(裂縫) 25‧‧‧Separator (crack)

26‧‧‧PR/光可固化環氧樹脂 26‧‧‧PR/Photocurable Epoxy Resin

30‧‧‧彈性體印模/基板/彈性體基板 30‧‧‧ Elastomer stamp / substrate / elastomer substrate

32‧‧‧波狀表面/波狀彈性體基板表面 32‧‧‧Wave surface/wavy elastomer substrate surface

34‧‧‧彈性體印模/銳緣基板 34‧‧‧ Elastomer stamp / sharp edge substrate

36‧‧‧第二彈性體印模 36‧‧‧Second elastomer impression

40‧‧‧波狀或彎曲幾何形狀/電互連 40‧‧‧Wave or curved geometry/electrical interconnection

50‧‧‧Su-8 50‧‧‧Su-8

60‧‧‧設備組件 60‧‧‧Device components

70‧‧‧接觸焊墊/設備組件 70‧‧‧Contact pads/equipment components

90‧‧‧中央部分 90‧‧‧Central Part

92‧‧‧未結合區域 92‧‧‧Unbound area

100‧‧‧第一末端 100‧‧‧ first end

102‧‧‧結合區域 102‧‧‧Combined area

110‧‧‧第二末端 110‧‧‧second end

112‧‧‧界面 112‧‧‧ interface

120‧‧‧橋接中央部分高峰 120‧‧‧Bridge the central part of the peak

130‧‧‧橋接組態 130‧‧‧Bridge configuration

140‧‧‧單一柵格組態 140‧‧‧Single Grid Configuration

150‧‧‧花形組態 150‧‧‧Flower configuration

160‧‧‧互連 160‧‧‧Interconnection

200‧‧‧凸起 200‧‧‧ bumps

210‧‧‧凹入表面 210‧‧‧ concave surface

250‧‧‧電極 250‧‧‧electrode

300‧‧‧外殼腔室 300‧‧‧Shell chamber

310‧‧‧腔室容積/外殼容積/腔室 310‧‧‧Case volume/case volume/chamber

圖1概述用於製造波狀或彎曲可延伸金屬互連之一方法。A為流程圖概述且B說明流程圖步驟。 Figure 1 outlines one method for fabricating a corrugated or curved extensible metal interconnect. A is an overview of the flowchart and B illustrates the steps of the flowchart.

圖2為可延伸波狀/彎曲電互連之相片，該電互連係藉由自剛性基板取至經預加應變之可延伸PDMS橡膠基板上，隨後解除應變以誘發彎曲而形成。 2 is a photograph of an extendable wavy/curved electrical interconnect formed by taking a self-rigid substrate onto a pre-strained extensible PDMS rubber substrate and subsequently relieving strain to induce bending.

圖3概述藉由在波狀結構之彈性體基板上沈積而製造波狀可延伸電極之一方法。 Figure 3 outlines one method of making a wavy extensible electrode by deposition on an elastomeric substrate of a wavy structure.

圖4提供關於用於製造平滑波狀彈性體基板之一方法的細節。A為流程圖概述且B說明流程圖步驟。 Figure 4 provides details regarding a method for fabricating a smooth wavy elastomeric substrate. A is an overview of the flowchart and B illustrates the steps of the flowchart.

圖5提供藉由圖3至圖4中所概括之方法而產生之平滑波狀PDMS基板的影像。A中所展示之互連具有22.6%之可延伸性且具有約900nm厚(700nm Al/200nm Au)之金屬互連、約38微米之波長及約15.6微米之振幅(自峰至谷之距離)。B展示互連之一用於與設備組件建立電接觸之末端。可將設備組件定位於基板之平坦部分中。 Figure 5 provides an image of a smooth wavy PDMS substrate produced by the method outlined in Figures 3-4. The interconnect shown in A has a 26.6% extensibility and has a metal interconnect of about 900 nm thick (700 nm Al/200 nm Au), a wavelength of about 38 microns, and an amplitude of about 15.6 microns (ranging from peak to valley) . B shows one of the interconnects for establishing electrical contact with the device components. The device component can be positioned in a flat portion of the substrate.

圖6A具有尖點之市售雙凸透鏡陣列(購自Edmund Optics)。B旋塗光可固化環氧樹脂以製造平滑波狀基板。C抵靠得自B之基板而澆鑄PDMS印模以產生具有平滑特徵之波狀彈性體印模。 Figure 6A shows a commercially available lenticular lens array (available from Edmund Optics) with a sharp point. B spin-coating a photocurable epoxy resin to produce a smooth corrugated substrate. C. The PDMS stamp was cast against the substrate from B to produce a wavy elastomer stamp with smooth features.

圖7藉由經由蔽蔭遮罩而蒸鍍至平滑波狀彈性體基板上而沈積之可延伸電極。電極在受張力而延伸至高達~10%期間保持傳 導性及連接性。定標線條為約0.1mm。A為彈性體基板上之波狀起伏之橫截面圖。B為蒸鍍至波狀彈性體基板上之電極之俯視顯微相片。焦平面處於波狀起伏之峰上。C為蒸鍍至波狀彈性體基板上之電極之俯視顯微相片。焦平面處於波狀起伏之谷上。 Figure 7 shows an extendable electrode deposited by evaporation onto a smooth, wavy elastomeric substrate via a shadow mask. The electrode is kept under tension until it extends up to ~10% Conductivity and connectivity. The calibration line is approximately 0.1 mm. A is a cross-sectional view of the undulations on the elastomeric substrate. B is a top photomicrograph of an electrode deposited on a corrugated elastomer substrate. The focal plane is on a undulating peak. C is a top photomicrograph of an electrode deposited on a corrugated elastomer substrate. The focal plane is on the undulating valley.

圖8為對用於使用可延伸電極製造可延伸被動式矩陣LED顯示器之製程之示意性說明。 Figure 8 is a schematic illustration of a process for making an extensible passive matrix LED display using an extendable electrode.

圖9說明具有波狀電極之被動式矩陣LED顯示器之機械可延伸性。 Figure 9 illustrates the mechanical extensibility of a passive matrix LED display with a wavy electrode.

圖10說明分布於具有球形彎曲之透鏡上的無機光電二極體陣列。所展示的為各種透鏡形狀及角度 Figure 10 illustrates an array of inorganic photodiodes distributed over a lens having a spherical curvature. Shown in various lens shapes and angles

圖11說明當圍繞球形表面而包繞平坦薄片時對於可延伸性之需要。 Figure 11 illustrates the need for extensibility when wrapping a flat sheet around a spherical surface.

圖12概述用於製造能夠與球面彎曲之表面相符的可延伸彎曲半導體陣列之一機制。 Figure 12 outlines one mechanism for fabricating an extendable curved semiconductor array that is conformable to a spherically curved surface.

圖13具有單一連接柵格組態(A及B)、多個(例如，兩個)連接柵格組態(C)及花形連接組態(D)之彎曲可延伸矽陣列之光學顯微影像。可延伸互連能夠於(例如)接觸焊墊區域處電連接光電二極體、光收集/偵測設備及其他設備組件。此等系統能夠與彎曲表面相符。圖13中描繪之組態處於PDMS基板上。 Figure 13 Optical microscopy image of a bendable extensible array with a single connection grid configuration (A and B), multiple (for example, two) connection grid configurations (C), and a flower connection configuration (D) . The extendable interconnect is capable of electrically connecting the photodiode, the light collecting/detecting device, and other device components, for example, at the contact pad area. These systems are compatible with curved surfaces. The configuration depicted in Figure 13 is on a PDMS substrate.

圖14採取柵格組態的能夠支撐設備組件且與彎曲表面相符之彎曲可延伸矽陣列之電子顯微影像。定標線條在A中為200μm且在B中為50μm。 Figure 14 is an electron microscopic image of a curved, extendable array of arrays that can support the device components and conform to the curved surface in a grid configuration. The calibration line is 200 μm in A and 50 μm in B.

圖15採取柵格組態之彎曲可延伸矽陣列之電子顯微影像，該等陣列具有藉由複數個(例如，兩個)互連彼此連接之鄰近接觸焊墊且能夠支撐設備組件且與彎曲表面相符。定標線條在A中 為200μm且在B中為50μm。 Figure 15 is an electron micrograph of a bendable extensible array of grid configurations having adjacent contact pads connected to each other by a plurality (e.g., two) of interconnects and capable of supporting device components and bending The surface matches. Calibration line in A It is 200 μm and 50 μm in B.

圖16採取花形組態的能夠支撐設備組件且與彎曲表面相符之彎曲可延伸矽陣列之電子顯微影像。定標線條在A中為200μm且在B中為50μm。 Figure 16 is an electron micrograph of a curved, extendable array of images that are configured in a flower configuration to support the device assembly and conform to the curved surface. The calibration line is 200 μm in A and 50 μm in B.

圖17採取橋接組態的能夠支撐設備組件且與彎曲表面相符之彎曲可延伸矽陣列之電子顯微影像。定標線條在A中為200μm且在B中為50μm。 Figure 17 takes an electron micrograph of a bridged configuration of a bendable extensible array capable of supporting the device components and conforming to the curved surface. The calibration line is 200 μm in A and 50 μm in B.

圖18PDMS上之可延伸彎曲矽陣列上的採取柵格陣列組態之光電二極體之相片。 Figure 18 is a photograph of a photodiode in a grid array configuration on an extensible curved 矽 array on a PDMS.

圖19論證可延伸互連在延伸與鬆弛期間的可逆行為。在畫面1中使系統鬆弛。如藉由延伸箭頭所指示而在畫面2、3及4中使系統延伸。畫面4中之最大延伸為約10%且導致大體上平坦之互連(對於在延伸力之方向上對準之互連)。在畫面5至8中釋放系統，且畫面8具有與畫面1中所示之幾何形狀及組態等效的幾何形狀及組態。定標線條為0.2mm。 Figure 19 demonstrates the reversible behavior of an extendable interconnect during extension and relaxation. The system is slackened in screen 1. The system is extended in screens 2, 3 and 4 as indicated by the extended arrows. The maximum extension in picture 4 is about 10% and results in a substantially flat interconnect (for interconnections aligned in the direction of the extension force). The system is released in pictures 5 to 8, and picture 8 has the same geometry and configuration as the geometry and configuration shown in picture 1. The calibration line is 0.2mm.

圖20能夠與彎曲基板以及平坦基板保形接觸之"氣泡印模"或"氣球印模"設備。 Figure 20 is a "bubble impression" or "balloon impression" device capable of conformally contacting a curved substrate and a flat substrate.

圖21能夠與球面彎曲及平坦表面相符之另一設備為可延伸球面模製之印模。抵靠彎曲表面(在此實例中為凹入透鏡)澆鑄印模且將其移除。使印模延伸以使其表面大體上變平，可將互連轉移至該表面。 Another device capable of conforming to a spherically curved and flat surface in Fig. 21 is an extendable spherically molded stamp. The stamp is cast against a curved surface (in this example a concave lens) and removed. The die is extended to flatten its surface substantially to transfer the interconnect to the surface.

圖22在"氣泡"或"氣球"印模上之延伸循環期間之可延伸彎曲矽陣列。在此實例中，鄰近接觸焊墊之間的互連包含兩個波狀互連(厚度為290nm之Si)。延伸測試使用氣泡擴展來提供多向延伸。最右側畫面處於最大延伸中，且底部兩幅畫面展示當移除 延伸力時，互連鬆弛回至左上部畫面所示的其延伸之前的組態。 Figure 22 is an array of extendable bends during an extended cycle on a "bubble" or "balloon" stamp. In this example, the interconnect between adjacent contact pads includes two wavy interconnects (Si with a thickness of 290 nm). The extension test uses bubble extension to provide multi-directional extension. The far right picture is in the maximum stretch, and the bottom two pictures are displayed when removed When the force is extended, the interconnection relaxes back to the configuration before its extension shown in the upper left picture.

圖23經由氣球印模而印刷至塗佈有黏著劑(PDMS或SU-8)之玻璃透鏡上之矽。 Figure 23 is printed on a glass lens coated with an adhesive (PDMS or SU-8) via a balloon stamp.

圖24概括用於設計半導體奈米織帶中之3維彎曲形狀之處理步驟。A製造UVO遮罩且使用其在PDMS基板上圖案化表面化學。B形成彎曲GaAs織帶且將其嵌入於PDMS中。C彎曲GaAs織帶對延伸及壓縮之回應。D使用a及b中之程序而形成之樣本的SEM影像。用於產生此樣本之預加應變為60%，其中Wact=10μm且Win=400μm。 Figure 24 summarizes the processing steps for designing a 3-dimensional curved shape in a semiconductor nanoweb. A. A UVO mask was fabricated and used to pattern surface chemistry on a PDMS substrate. B forms a curved GaAs webbing and embeds it in the PDMS. C-bend GaAs webbing responds to extension and compression. D SEM image of a sample formed using the procedures in a and b. The pre-strain used to produce this sample was 60%, where W act = 10 μm and W in = 400 μm.

圖25藉由使用33.7%之預加應變且以(A)Wact=10μm及Win=190μm；及(B)Wact=100μm及Win=100μm而形成於PDMS基板上的彎曲之側視輪廓。兩個樣本均由於織帶自PDMS之分離而在非活性區域中顯示彎曲。具有較小峰之正弦波僅形成於活性區域中，其中Wact=100μm。此等兩個樣本之比較指示將Wact選擇為小於一臨界值避免較小波狀結構之形成。 Figure 25 is a side view of the bend formed on the PDMS substrate by using 33.7% pre-strain and with (A) W act = 10 μm and W in = 190 μm; and (B) W act = 100 μm and W in = 100 μm. profile. Both samples showed bending in the inactive area due to the separation of the webbing from PDMS. A sine wave with a smaller peak is formed only in the active region, where W act = 100 μm. Comparison of these two samples indicates that Wact is chosen to be less than a threshold to avoid the formation of smaller undulations.

圖26嵌入於PDMS中之彎曲GaAs織帶在顯微切片之後的側視影像。此影像展示PDMS完全填充織帶與下伏基板之間的間隙。在此情況下之彎曲以60%之預加應變且以Wact=10μm及Win=300μm而形成。在此等彎曲織帶之表面上澆鑄之PDMS預聚物在烘箱中於65℃下固化4小時。 Figure 26 is a side view image of a curved GaAs webbing embedded in PDMS after microsection. This image shows that the PDMS completely fills the gap between the webbing and the underlying substrate. The bending in this case was formed with a pre-stress of 60% and Wact = 10 μm and W in = 300 μm. The PDMS prepolymer cast on the surface of these curved webbings was cured in an oven at 65 °C for 4 hours.

圖27彎曲(A及D)GaAs及(B、C)Si織帶之側視輪廓的光學顯微相片。A形成於以Wact=10μm及Win=190μm，以不同預加應變：11.3%、25.5%、33.7%及56.0%(自頂部至底部)而經圖案化之PDMS上的GaAs織帶結構。對於εpre=33.7%及56.0%之虛線為以數學方法預測之互連幾何形狀。B形成於經預加應變至50%且 以Wact=15μm及Win為350、300、250、250、300及350μm(自左向右)而經圖案化之PDMS基板上的Si織帶結構。藉由使樣本以45之角度傾斜而獲得影像。C形成於經預加應變至50%且以黏著位點之平行線(Wact=15μm且Win=250μm)而經圖案化之PDMS基板上的Si織帶結構，該等平行線以相對於織帶之長度成30之角度而定向。藉由使樣本以75之角度傾斜而獲得影像。D形成於經預加應變至60%，具有Wact=10μm及不同Win(100、200、300及400μm(自頂部至底部))之基板上的GaAs織帶結構。 Figure 27 is an optical micrograph of a side profile of a curved (A and D) GaAs and (B, C) Si webbing. A was formed on a GaAs web structure on PDMS patterned with W act = 10 μm and W in = 190 μm with different pre-strain: 11.3%, 25.5%, 33.7%, and 56.0% (from top to bottom). The dashed lines for ε pre = 33.7% and 56.0% are mathematically predicted interconnect geometries. Forming a strained to 50% B and at W act = 15μm and W in as 350,300,250,250,300 and 350 m (from left to right) the web structure on the Si substrate patterning of the PDMS was added to a pre. The image is obtained by tilting the sample at an angle of 45. C is formed on a Si webbing structure on a PDMS substrate that has been pre-strained to 50% and patterned with parallel lines of adhesion sites ( Wact = 15 μm and W in = 250 μm), the parallel lines being relative to the webbing The length is oriented at an angle of 30. The image was obtained by tilting the sample at an angle of 75. D is formed on a GaAs web structure on a substrate having a pre-strain to 60%, W act = 10 μm and different W in (100, 200, 300, and 400 μm (from top to bottom)).

圖28嵌入於PDMS中之彎曲GaAs織帶的延伸及壓縮。A延伸至拉伸應變之不同水準(正%)的單一彎曲織帶之影像。斷裂在接近50%時發生。B壓縮至壓縮應變之不同水準(負%)的單一彎曲織帶之影像。對於大於~-15%之壓縮應變，小、短週期波狀幾何形狀出現於彎曲之高峰處。C壓縮至壓縮應變之不同水準的單一彎曲織帶之影像。此等情況下之彎曲係以60%之預加應變，以Wact=10μm且Win=400μm(A、B)及以Wact=10μm且Win=300μm(C)而形成。每一畫面中之紅線及箭頭指示同一織帶上之相同位置以突出顯示機械變形。插圖提供標有白框之區段的放大影像，其清楚展示在高壓縮應變下裂縫之形成。根據下式而計算 對應於延伸或壓縮程度之數字： Figure 28 shows the extension and compression of a curved GaAs webbing embedded in a PDMS. A image of a single curved webbing that extends to different levels (positive %) of tensile strain. The break occurs at nearly 50%. B. Image of a single curved webbing compressed to different levels (negative %) of compressive strain. For compressive strains greater than ~-15%, small, short-period wavy geometries occur at the peak of the bend. C is compressed to an image of a single curved webbing of different levels of compressive strain. The bending in these cases was formed with 60% pre-strain, Wact = 10 μm and W in = 400 μm (A, B) and W act = 10 μm and W in = 300 μm (C). The red lines and arrows in each frame indicate the same position on the same webbing to highlight mechanical deformation. The inset provides an enlarged image of the section marked with a white frame that clearly shows the formation of cracks under high compressive strain. Calculate the number corresponding to the degree of extension or compression according to the following formula:

圖29具有兩個彎曲GaAs織帶陣列之層之樣本的相片。以逐層機制來製造該結構。第一個GaAs織帶之層(以60%之預加應變且以Wact=10μm及Win=400μm而界定之彎曲幾何形狀)嵌入於PDMS中。第二個彎曲織帶之層藉由使用50%之預加應變且以Wact=10μm及Win=300μm而形成於此基板之表面上。 Figure 29 is a photograph of a sample of two layers of a curved GaAs webbing array. The structure is fabricated in a layer-by-layer mechanism. The first GaAs webbing layer (curved geometry defined by 60% pre-strain and defined by W act = 10 μm and W in = 400 μm) is embedded in the PDMS. The second layer of curved webbing was formed on the surface of the substrate by using 50% pre-strain and Wact = 10 μm and W in = 300 μm.

圖30 PDMS之表面上及PDMS之基質中的彎曲織帶之撓曲。 A-C為採用較低放大率之光學顯微影像(左上部圖框)及較高放大率之光學顯微影像(右側圖框)及對PDMS上之具有(A)凹入，(B)平坦及(C)凸起表面之彎曲GaAs織帶的示意性說明(左下部圖框)。c中之定標線條適用於a及b。d為嵌入於PDMS中之彎曲織帶在撓曲之前(左側)及之後(右側)的影像。頂部及底部圖框分別展示頂部及底部表面之彎曲。右側影像中之定標線條亦適用於左側影像。彎曲織帶以60%之預加應變且以Wact=10μm及Win=400μm而形成。 Figure 30 Flexure of the curved webbing on the surface of the PDMS and in the matrix of the PDMS. AC is an optical microscopy image with lower magnification (upper left frame) and a higher magnification optical microscopy image (right frame) and (A) concave on the PDMS, (B) flat and (C) Schematic description of the curved GaAs webbing of the raised surface (lower left frame). The calibration lines in c apply to a and b. d is an image of the curved webbing embedded in the PDMS before (left) and after (right) flexing. The top and bottom frames show the curvature of the top and bottom surfaces, respectively. The calibration line in the right image also applies to the left image. The curved webbing was formed with a pre-strain of 60% and Wact = 10 μm and W in = 400 μm.

圖31可延伸金屬-半導體-金屬光偵測器(metal-semiconductor-metal photodetector,MSM PD)之表徵。A對彎曲PD之幾何形狀(頂部)、等效電路(中部)及彎曲PD在延伸之前及期間的光學影像(底部)之示意性說明。B自藉由IR燈以不同輸出強度而輻射之彎曲PD記錄的電流(I)-電壓(V)曲線。以恆定之亮度及不同程度的延伸(C)或壓縮(D)而說明PD之I-V特徵。 Figure 31 is an illustration of an extendable metal-semiconductor-metal photodetector (MSM PD). A schematic illustration of the geometry (top) of the curved PD, the equivalent circuit (middle), and the optical image (bottom) of the curved PD before and during extension. B is the current (I)-voltage (V) curve recorded by the curved PD radiated by the IR lamp at different output intensities. The I-V characteristics of the PD are illustrated with constant brightness and varying degrees of extension (C) or compression (D).

圖32半球彈性體轉移"印模"可將互連之Si CMOS"小晶片"自習知晶圓起離，且接著將其幾何形狀變換為半球形。小晶片之間的"上推"互連適應與此平面至彎曲表面之變換相關聯的應變。 The hemispherical elastomer transfer "die" of Figure 32 can separate the interconnected Si CMOS "small wafer" from the conventional wafer and then transform its geometry into a hemisphere. The "push up" interconnect between the small wafers accommodates the strain associated with this plane to the transformation of the curved surface.

圖33互連之CMOS小晶片自半球印模向匹配的半球設備基板之轉移。光可固化黏著劑層使CMOS結合至設備基板且亦使表面平面化。 Figure 33 shows the transfer of interconnected CMOS small wafers from a hemispherical impression to a matching hemispherical device substrate. The photocurable adhesive layer bonds the CMOS to the device substrate and also planarizes the surface.

圖34具有夾具、致動器及視覺系統，與半球印模相容之印刷器裝置。 Figure 34 has a fixture, actuator and vision system, a printer device compatible with the hemispherical impression.

圖35半球印模上藉由"上推"織帶互連而電連接之單晶矽島狀物的可壓縮陣列。 Figure 35 is a compressible array of single crystal islands electrically connected by a "push up" webbing bond on a hemispherical stamp.

圖36經"塗墨"至具有~2cm之曲率半徑之半球印模之表面上 的互連之單晶矽島狀物之陣列之光學影像。 Figure 36 is "painted" onto the surface of a hemispherical impression having a radius of curvature of ~2 cm. An optical image of an array of interconnected single crystal islands.

圖37可用於半球印模之各種聚矽氧彈性體之應力/應變曲線。對小於20%之應變的線性、純彈性回應係重要的。 Figure 37 can be used for the stress/strain curves of various polyoxyxene elastomers for hemispherical impressions. A linear, purely elastic response to strains less than 20% is important.

圖38對具有0.57mm之最初均勻厚度之半球印模中的球形至平面之變換之有限元模型化。 Figure 38 is a finite element modeling of a spherical to planar transformation in a hemispherical impression having an initial uniform thickness of 0.57 mm.

圖39對用於製造彈性體支撐物上之二維"波狀"半導體奈米薄膜之步驟的示意性說明。 Figure 39 is a schematic illustration of the steps used to make a two dimensional "wavy" semiconductor nanofilm on an elastomeric support.

圖40(a-f)矽奈米薄膜中之2維波狀結構在其形成期間之各個階段之光學顯微相片。插圖展示二維功率譜，(g)低放大率的完全形成之結構之影像。對於此樣本，矽之厚度為100nm，其具有約4×4mm2之橫向尺寸，基板為PDMS且熱誘發之預加應變為3.8%。(h)對應於圖框(a-f)之短波長之曲線，及(i)於得自圖框(g)之各個點處估計的長波長之直方圖。 Figure 40 is an optical micrograph of the various stages of the 2-dimensional wavy structure in the (af) nanofilm during its formation. The inset shows a two-dimensional power spectrum, (g) an image of a fully formed structure with low magnification. For this sample, the thickness of the crucible was 100 nm, which had a lateral dimension of about 4 x 4 mm2 , the substrate was PDMS and the heat induced pre-strain was 3.8%. (h) a curve corresponding to the short wavelength of the frame (af), and (i) a histogram of the long wavelengths estimated at various points from the frame (g).

圖41 PDMS上之2維波狀Si奈米薄膜之AFM(a)及SEM(b-d)影像(傾斜角60)。矽之厚度為100nm，且熱預加應變為3.8%。此等影像突出顯示波狀圖案之高度週期性性質、如由在Si與PDMS之接近於Si中蝕刻之孔洞之邊緣處可見的密切接觸而顯見之Si與PDMS之間良好結合，及波紋結構與此等孔洞之位置之間相關性的缺失。 Figure 41 AFM (a) and SEM (b-d) images (tilt angle 60) of a 2-dimensional wavy Si nanofilm on PDMS. The thickness of the crucible was 100 nm, and the thermal pre-stress was 3.8%. These images highlight the highly periodic nature of the wavy pattern, such as the good bonding between Si and PDMS, as well as the corrugated structure, as seen by the close contact between the Si and the PDMS close to the edge of the hole etched in Si. The lack of correlation between the positions of these holes.

圖42(a)PDMS上之以3.8%之熱預加應變形成、具有各種厚度(55nm、100nm、260nm、320nm)之2維波狀Si奈米薄膜之光學顯微相片，及(b)短波長及振幅對Si厚度之依賴性。 Figure 42 (a) Optical micrograph of a 2-dimensional corrugated Si nanofilm having various thicknesses (55 nm, 100 nm, 260 nm, 320 nm) formed on a PDMS with 3.8% thermal pre-strain, and (b) short The dependence of wavelength and amplitude on Si thickness.

圖43(a)在於三個不同定向上施加之不同單軸應變下的2維波狀Si奈米薄膜之光學顯微相片。此等樣本由PDMS上之以3.8%之熱預加應變形成、具有100nm之厚度的Si薄膜組成。於延伸前之鬆弛狀態(頂部圖框)、延伸後之鬆弛狀態(底部圖框)及在1.8% 之單軸施加的拉伸應變下(頂部中部圖框)及3.8%之單軸施加之拉伸應變下(底部中部圖框)收集該等影像，(b)短波長對在三個不同方向上施加之應變之依賴性。 Figure 43 (a) is an optical micrograph of a 2-dimensional wavy Si nanofilm under different uniaxial strains applied in three different orientations. These samples consisted of a Si film formed on a PDMS with a thermal pre-strain of 3.8% and a thickness of 100 nm. The relaxed state before the extension (top frame), the relaxed state after the extension (bottom frame), and at 1.8% The uniaxially applied tensile strain (top middle frame) and 3.8% of the uniaxially applied tensile strain (bottom middle frame) collect the images, (b) short wavelength pairs in three different directions The dependence of the strain applied.

圖44 2維波狀Si奈米薄膜之不同區域之AFM影像，其展示接近薄膜之邊緣處的區域(頂部圖框)、稍稍遠離此邊緣區域之區域(中部圖框)及接近薄膜的中央之區域(底部圖框)之一維波狀幾何特徵。此等樣本由PDMS上之以3.8%之熱預加應變形成、具有100nm之厚度的Si薄膜組成。 Figure 44 AFM image of different regions of a 2-dimensional corrugated Si nanofilm showing the area near the edge of the film (top frame), the area slightly away from the edge area (middle frame), and the center of the film. One of the regions (bottom frame) is a wavy geometric feature. These samples consisted of a Si film formed on a PDMS with a thermal pre-strain of 3.8% and a thickness of 100 nm.

圖45具有1000μm之長度且具有100μm、200μm、500μm及1000μm之寬度的2維波狀Si奈米薄膜之光學顯微相片。此等薄膜均具有100nm之厚度且以(a)2.3%及(b)4.8%之熱預加應變而形成於同一PDMS基板上。(c)對於類似薄膜，邊緣效應長度對預加應變之依賴性。 Figure 45 is an optical micrograph of a 2-dimensional wavy Si nanofilm having a length of 1000 μm and having a width of 100 μm, 200 μm, 500 μm and 1000 μm. These films each have a thickness of 100 nm and are formed on the same PDMS substrate with (a) 2.3% and (b) 4.8% thermal pre-strain. (c) For similar films, the effect of edge effect length on pre-strain.

圖46具有不同形狀之2維波狀Si奈米薄膜之光學顯微相片：(a)圓形、(b)橢圓形、(c)六邊形及(d)三角形。此等薄膜均具有100nm之厚度且以4.8%之熱預加應變而形成於PDMS上。 Figure 46 is an optical micrograph of a 2-dimensional wavy Si nanofilm of different shapes: (a) circular, (b) elliptical, (c) hexagonal, and (d) triangular. These films each had a thickness of 100 nm and were formed on PDMS with a 4.8% heat pre-strain.

圖47具有經設計以利用邊緣效應來在平坦島狀物之互連陣列中提供2維可延伸性之形狀的Si奈米薄膜之波狀結構之光學顯微相片。在此處說明之兩種情況中，Si為100nm厚，方塊為100μm×100μm且織帶連接為30μm×150μm之線。預加應變為2.3%(a、e)及15%(c、g)。展示(a、c、e、g)之織帶及方塊之選定區域的SEM影像(75之傾斜角)分別展示於(b、d、f、h)中。高放大率SEM影像之插圖展示b及d中之具有波紋的凸起區域。 Figure 47 has an optical micrograph of a wavy structure of a Si nanofilm designed to provide edge-effects in a two-dimensional extensibility shape in an interconnected array of flat islands. In the two cases described here, Si is 100 nm thick, the square is 100 μm × 100 μm, and the webbing is connected to a line of 30 μm × 150 μm. The pre-added strain was 2.3% (a, e) and 15% (c, g). The SEM images (angles of inclinations 75) of the selected areas of the webbing and the squares (a, c, e, g) are shown in (b, d, f, h), respectively. The illustration of the high magnification SEM image shows the raised regions of the b and d with ripples.

圖48為PDMS基板波紋上之2維波狀Si奈米薄膜之樣本(100nm厚，4×5mm2及3.8%之熱預加應變)的相片(頂部圖框)，且(i)為邊緣處之1維波紋，(ii)為內部區域處之魚骨狀波紋且(iii)為中 央處之無序魚骨狀波紋。定標線條為50μm。 Figure 48 is a photograph (top frame) of a sample of a 2-dimensional corrugated Si nanofilm on a PDMS substrate corrugation (100 nm thick, 4 x 5 mm 2 and 3.8% thermal pre-strain), and (i) is the edge The 1D corrugation, (ii) is the fishbone corrugation at the inner region and (iii) is the disordered fishbone corrugation at the center. The calibration line is 50 μm.

圖49對魚骨狀波紋結構中之特徵性長度之示意性說明。 Figure 49 is a schematic illustration of the characteristic lengths in a fishbone corrugated structure.

圖50魚骨狀波紋及1維波紋處作為所施加之熱預加應變之函數的Si應變。在實驗中藉由εSi=(L-λ)/λ來量測Si應變，其中L及λ為AFM表面輪廓中之表面及水平距離。 Figure 50 is a Si strain of a fishbone corrugation and a 1D corrugation as a function of the applied thermal pre-strain. The Si strain was measured in the experiment by ε Si = (L - λ) / λ, where L and λ are the surface and horizontal distances in the AFM surface profile.

圖51延伸測試(~εSt=4.0%)之循環後的魚骨狀波紋之光學顯微影像。以100nm厚之Si薄膜及3.8%之雙軸熱預加應變來製備測試樣本。魚骨狀波紋在高達15次的延伸測試之循環之後恢復為具有與最初相當類似的結構，除了源自薄膜裂縫之一些缺陷。 Figure 51 shows an optical microscopy image of the fishbone corrugation after the cycle of the test (~ε St = 4.0%). Test samples were prepared with a 100 nm thick Si film and a 3.8% biaxial thermal pre-strain. The fishbone corrugations recovered to a structure quite similar to the original after up to 15 cycles of the extension test, except for some defects originating from the cracks in the film.

圖52對藉由應用單軸拉伸應變而進行的魚骨狀波紋之"展開"之示意性說明。壓縮應變εcp係歸因於在拉伸應變為εst之情況下的柏松效應(Poisson effect)。 Figure 52 is a schematic illustration of the "expansion" of a fishbone corrugation by applying a uniaxial tensile strain. The compressive strain ε cp is attributed to the Poisson effect in the case where the tensile strain is ε st .

圖53魚骨狀波紋在作為雙軸延伸測試之加熱及冷卻過程期間的形態改變之光學顯微影像。以100nm厚之Si薄膜及2.9%之雙軸熱預加應變來製備測試樣本。 Figure 53 is an optical microscopy image of the morphological change of the fishbone corrugations during the heating and cooling process as a biaxial extension test. Test samples were prepared with a 100 nm thick Si film and a 2.9% biaxial thermal pre-strain.

圖54概述製造波狀可延伸電極之一方法，該方法係藉由於結構化波狀母體上沈積，隨後在彼母體上澆鑄一印模，使印模固化，且藉此在釋放後即將電極轉移至母體。 Figure 54 outlines a method of making a wavy extensible electrode by depositing on a structured wavy precursor followed by casting a stamp on the parent to cure the stamp and thereby transferring the electrode after release. To the mother.

圖55提供藉由圖4中之方法結合圖54中之方法而製備的在波狀PDMS上之可延伸金屬電極(Au，300nm厚)之影像。底部畫面為可延伸波狀金屬電極的作為所施加之拉伸應變(高達30%)之函數的量測得之電阻資料之圖。 Figure 55 provides an image of an extensible metal electrode (Au, 300 nm thick) on a wavy PDMS prepared by the method of Figure 4 in conjunction with the method of Figure 54. The bottom panel is a plot of the resistance data measured as a function of the applied tensile strain (up to 30%) of the extensible wavy metal electrode.

圖56為本發明之方法用於製造可撓性可延伸iLED條帶照明燈之應用之實例。A為說明設備能夠大程度地撓曲之設備的顯微相片，且在此實例中撓曲半徑為0.85cm。B提供波狀PDMS基板 上之可延伸金屬之橫截面圖(頂部畫面，定標線條為40μm)及俯視圖(底部畫面，定標線條為3mm)。金屬能夠延伸約30%而無物理特性之顯著降級。C為局部應變對PDMS上之正弦波狀金屬互連(展示於B中)之波長(方塊，左側軸)及振幅(圓形，右側軸)的影響之圖。隨著應變增大，存在金屬之波長之相應增大及金屬之振幅的相應減小。 Figure 56 is an illustration of an application of the method of the present invention for fabricating a flexible extendable iLED strip illumination. A is a photomicrograph illustrating the apparatus in which the apparatus is capable of flexing to a large extent, and in this example the deflection radius is 0.85 cm. B provides a corrugated PDMS substrate The cross-section of the extendable metal (top screen, scaled line is 40μm) and top view (bottom screen, scaled line is 3mm). Metals can extend about 30% without significant degradation of physical properties. C is a plot of the effect of local strain on the wavelength (square, left axis) and amplitude (circular, right axis) of a sinusoidal metal interconnect (shown in B) on PDMS. As the strain increases, there is a corresponding increase in the wavelength of the metal and a corresponding decrease in the amplitude of the metal.

圖57對用以得到異質三維電子元件之基於印刷半導體奈米材料之方法的示意性說明。該製程涉及獨立地形成於源基板上之奈米管、奈米線、奈米織帶或其他活性奈米材料之集合向共用設備基板的重複轉印以產生超薄多層堆疊幾何形狀的互連電子元件。 Figure 57 is a schematic illustration of a method for producing a semiconductor-based nanomaterial based on a heterogeneous three-dimensional electronic component. The process involves repeated transfer of a collection of nanotubes, nanowires, nanowebs or other active nanomaterials independently formed on a source substrate to a common device substrate to produce interconnected electrons of ultra-thin multilayer stack geometry element.

圖58(A)對於半導體使用印刷矽奈米織帶之單晶矽金屬氧化物場效電晶體(MOSFET)之陣列之三維多層堆疊的光學顯微相片。此影像之底部(標有第一)、中部(標有第二)及頂部(標有第三)部分分別對應於設備之具有一個、二個及三個層之區域。(B)示意性橫截面圖(頂部)及傾斜圖(底部)。S、D及G分別指代源極、汲極及閘極電極(均以金色而展示)。亮藍及暗藍區域對應於矽織帶之摻雜及未摻雜區域；紫色層為SiO2閘極介電質。(C)於如(A)及(B)中所示之設備基板的設備基板上藉由共焦顯微法而收集之三維影像(左側圖框：俯視圖；右側圖框：傾斜圖)。對層進行著色(金色：頂層；紅色：中部層；藍色：底層；矽：灰色)以易於觀察。(D)該等層中之每一者中的Si MOSFET之電流-電壓特徵，其展示極佳效能(470±30cm2/Vs之遷移率)及特性之良好均勻性。通道長度及寬度分別為19及200μm。 Figure 58 (A) is an optical micrograph of a three-dimensional multilayer stack of an array of single crystal germanium metal oxide field effect transistors (MOSFETs) printed on a semiconductor tape for a semiconductor. The bottom (labeled first), middle (labeled second), and top (labeled third) portions of the image correspond to regions of the device having one, two, and three layers, respectively. (B) Schematic cross-sectional view (top) and oblique view (bottom). S, D, and G refer to the source, drain, and gate electrodes, respectively (both in gold). The bright blue and dark blue regions correspond to the doped and undoped regions of the ruthenium ribbon; the violet layer is the SiO 2 gate dielectric. (C) A three-dimensional image collected by confocal microscopy on the device substrate of the device substrate as shown in (A) and (B) (left frame: top view; right frame: oblique view). The layer is colored (gold: top layer; red: middle layer; blue: bottom layer; 矽: gray) for easy viewing. (D) The current-voltage characteristics of the Si MOSFET in each of the layers, which exhibits excellent performance (mobility of 470 ± 30 cm 2 /Vs) and good uniformity of characteristics. The channel length and width are 19 and 200 μm, respectively.

圖59(A)三層堆疊之三維異質式電子設備的光學顯微相片， 該等電子設備包括GaN奈米織帶HEMT、Si奈米織帶MOSFET及SWNT網路TFT。(B)藉由共焦顯微法而收集之三維影像。對層進行著色(金色：頂層，Si MOSFET；紅色：中部層，SWNT TFT；藍色：底層)以易於觀察。(C)第一層上之GaN設備(通道長度、寬度及閘極寬度分別為20μm、170μm及5μm)、第二層上之SWNT設備(通道長度及寬度分別為50μm及200μm)及第三層上之Si設備(通道長度及寬度分別為19μm及200μm)的電特徵。(D)每一層中之設備的作為塑膠基板之撓曲半徑之函數的正規化轉導(gm/g0m)(黑色方塊：Si MOSFET；紅色圓形：SWNT TFT；綠色三角：GaN HEMT)(左側)。撓曲系統及探測裝置之影像(右側)。 Figure 59 (A) Optical micrographs of a three-layer stacked three-dimensional heterogeneous electronic device including a GaN nanowebbing HEMT, a Si nanowebbing MOSFET, and a SWNT network TFT. (B) Three-dimensional images collected by confocal microscopy. The layers were colored (gold: top layer, Si MOSFET; red: middle layer, SWNT TFT; blue: bottom layer) for easy viewing. (C) GaN devices on the first layer (channel length, width, and gate width are 20μm, 170μm, and 5μm, respectively), SWNT devices on the second layer (channel length and width are 50μm and 200μm, respectively) and third layer The electrical characteristics of the upper Si device (channel length and width are 19 μm and 200 μm, respectively). (D) Normalized transduction ( gm/g0m ) as a function of the flexural radius of the plastic substrate in each layer (black square: Si MOSFET; red circle: SWNT TFT; green triangle: GaN HEMT) (left side ). Image of the flexure system and the detector (right side).

圖60(A)聚醯亞胺基板上之3維矽NMOS反相器之印刷陣列之影像。反相器由藉由電通道結構互連之兩個不同級上之MOSFET(通道長度為4μm，負載與驅動器寬度比為6.7且驅動器寬度為200μm)組成。右上部之影像提供藉由左側圖框中之紅色框指示之區域的放大視圖。右下部之曲線圖展示典型反相器之轉移特徵。(B)使用p通道SWNT TFT(通道長度及寬度分別為30μm及200μm)及n通道Si MOSFET(通道長度及寬度分別為75μm及50μm)之印刷互補反相器之轉移特徵。插圖提供反相器之光學顯微相片(左側)及電路示意圖(右側)。(C)與Si MOSFET(通道長度及寬度分別為9μm及200μm)整合之GaAs MSM(通道長度及寬度分別為10μm及100μm)在藉由紅外光源以850nm而照射的自黑暗至11μW之不同位準處之電流-電壓回應。插圖展示光學影像及電路圖。 Figure 60 (A) Image of a printed array of a 3-dimensional NMOS inverter on a polyimide substrate. The inverter consists of two different stages of MOSFETs interconnected by an electrical path structure (channel length 4 μm, load to driver width ratio of 6.7 and driver width 200 μm). The image on the upper right provides an enlarged view of the area indicated by the red box in the left frame. The graph at the bottom right shows the transfer characteristics of a typical inverter. (B) Transfer characteristics of a printed complementary inverter using a p-channel SWNT TFT (channel length and width of 30 μm and 200 μm, respectively) and an n-channel Si MOSFET (channel length and width of 75 μm and 50 μm, respectively). The illustration provides an optical micrograph of the inverter (left side) and a schematic of the circuit (right side). (C) GaAs MSM (channel length and width of 10 μm and 100 μm, respectively) integrated with Si MOSFET (channel length and width are 9 μm and 200 μm, respectively) at different levels from dark to 11 μW illuminated by an infrared source at 850 nm The current-voltage response. The illustration shows the optical image and circuit diagram.

圖61用於轉印、能夠重合至~1μm內的自動台之影像。 Figure 61 is an image of an automatic table that can be transferred and can be overlapped to ~1 μm.

圖62(A)聚醯亞胺基板上之Si MOSFET及GaN HEMT之三維 異質整合陣列的光學顯微相片。右側插圖展示橫截面示意圖。電極(金色)、SiO2(PEO；紫色)、Si(亮藍：未摻雜；暗藍：摻雜)、GaN(暗綠：歐姆接觸點；亮綠：通道)、聚醯亞胺(PI；褐色)及聚胺基甲酸酯(PU；淺棕色)均得以展示。(B)典型Si MOSFET(通道長度及寬度分別為19μm及200μm)及GaN HEMT(通道長度、寬度及閘極寬度分別為20μm、170μm及5μm)之電流-電壓特徵。分別在Vdd=0.1V及Vdd=2V下量測左側圖框中關於Si及GaN之資料。 Figure 62 (A) Optical micrograph of a three-dimensional heterogeneous array of Si MOSFETs and GaN HEMTs on a polyimide substrate. The illustration on the right shows a cross-sectional view. Electrode (gold), SiO 2 (PEO; purple), Si (bright blue: undoped; dark blue: doped), GaN (dark green: ohmic contact; bright green: channel), polyimine (PI) ; brown) and polyurethane (PU; light brown) are shown. (B) Current-voltage characteristics of a typical Si MOSFET (channel length and width 19 μm and 200 μm, respectively) and GaN HEMT (channel length, width, and gate width are 20 μm, 170 μm, and 5 μm, respectively). The data on Si and GaN in the left frame are measured at V dd = 0.1 V and V dd = 2 V, respectively.

圖63(A)聚醯亞胺基板上之Si MOSFET及SWNT TFT之三維異質整合陣列的光學顯微相片。右側插圖展示橫截面示意圖。電極(金色)、環氧樹脂(青色)、SiO2(PEO；紫色)、Si(亮藍：未摻雜；暗藍：摻雜)、SWNT(灰色)、聚醯亞胺(PI；褐色)及固化聚醯亞胺(淺棕色)均得以展示。(B)典型SWNT TFT(通道長度及寬度分別為75μm及200μm)及典型Si MOSFET(閘極長度及通道寬度分別為19μm及200μm)之電流-電壓特徵。分別在Vdd=-0.5V及Vdd=0.1V下量測左側圖框中關於SWNT及Si之資料。 Figure 63 (A) Optical micrograph of a three-dimensional heterogeneous array of Si MOSFETs and SWNT TFTs on a polyimide substrate. The illustration on the right shows a cross-sectional view. Electrode (gold), epoxy (cyan), SiO 2 (PEO; purple), Si (bright blue: undoped; dark blue: doped), SWNT (gray), polyimine (PI; brown) And cured polyimine (light brown) were displayed. (B) Current-voltage characteristics of a typical SWNT TFT (channel length and width are 75 μm and 200 μm, respectively) and a typical Si MOSFET (gate length and channel width are 19 μm and 200 μm, respectively). The data on SWNT and Si in the left frame are measured at V dd = -0.5V and V dd = 0.1V, respectively.

圖64(A)聚醯亞胺基板上之Si MOSFET、SWNT TFT及GaN HEMT之三維異質整合陣列的橫截面示意性說明。(B)Si MOSFET(通道寬度=200μm，黑線：通道長度=9μm，紅色：14μm，綠色：19μm，藍色：24μm)中之若干者的轉移特徵、有效遷移率及開關比，(C)SWNT TFT(通道寬度=200μm，黑線：通道長度=25μm，紅色：50μm，綠色：75μm，藍色：100μm)之轉移特徵、有效遷移率及開關比及(D)GaN HEMT(通道長度、寬度及閘極寬度分別為20μm、170μm及5μm)之轉移特徵、轉導及開關比。 Figure 64 (A) is a cross-sectional schematic illustration of a three-dimensional hetero-homogeneous array of Si MOSFETs, SWNT TFTs, and GaN HEMTs on a polyimide substrate. (B) Transfer characteristics, effective mobility, and switching ratio of several of Si MOSFET (channel width = 200 μm, black line: channel length = 9 μm, red: 14 μm, green: 19 μm, blue: 24 μm), (C) Transfer characteristics, effective mobility and switching ratio of SWNT TFT (channel width = 200 μm, black line: channel length = 25 μm, red: 50 μm, green: 75 μm, blue: 100 μm) and (D) GaN HEMT (channel length, width) And the transfer characteristics, transduction and switching ratio of gate widths of 20μm, 170μm and 5μm, respectively.

圖65(A)建立於矽晶圓基板上之SWNT-Si CMOS反相器的橫 截面之示意結構。(B)形成CMOS反相器之n通道Si MOSFET及p通道SWNT TFT之轉移特徵及I-V特徵。(C)反相器之計算而得之轉移特徵及Si與SWNT電晶體之I-V特徵。 Figure 65(A) shows the cross-section of a SWNT-Si CMOS inverter built on a germanium wafer substrate. Schematic structure of the section. (B) Transfer characteristics and I-V characteristics of an n-channel Si MOSFET and a p-channel SWNT TFT forming a CMOS inverter. (C) The transfer characteristics of the inverter and the I-V characteristics of the Si and SWNT transistors.

圖66(A)建立於聚醯亞胺基板上之GaAs MSM-Si MOSFET IR偵測器的橫截面之示意結構及電路示意圖。(B)GaAs MSM IR偵測器(L=10μm，W=100μm)之電流-電壓特徵及Si MOSFET(L=9μm，W=200μm)在3V電源的情況下之轉移特徵及I-V特徵。(C)GaAs MSM之計算而得之IV特徵及與Si MOSFET整合之GaAs MSM在3V電源的情況下之I-V回應。 Fig. 66(A) is a schematic view showing the schematic structure and circuit of a cross section of a GaAs MSM-Si MOSFET IR detector built on a polyimide substrate. (B) Current-voltage characteristics of a GaAs MSM IR detector (L = 10 μm, W = 100 μm) and transfer characteristics and I-V characteristics of a Si MOSFET (L = 9 μm, W = 200 μm) in the case of a 3V power supply. (C) The IV characteristics of the GaAs MSM calculation and the I-V response of the GaAs MSM integrated with the Si MOSFET in the case of a 3V power supply.

"互連"指代能夠與組件建立電連接或在組件之間建立電連接之導電材料。特定言之，互連可在分離及/或可相對於彼此移動之組件之間建立電接觸。視所要設備規格、操作及應用而定，互連由合適材料製成。對於需要高傳導性之應用而言，可使用典型互連金屬，包括(但不限於)銅、銀、金、鋁及其類似物、合金。合適傳導材料可包括如矽、氧化銦錫或GaAs之半導體。"半導體"指代於非常低之溫度下為絕緣體，但在約300克耳文之溫度下具有明顯電導率之任何材料。在本描述中，對術語半導體之使用意欲與在微電子及電子設備之技術中對此術語之使用相一致。在本發明中有用之半導體可包含元素半導體，諸如矽、鍺及金剛石，以及化合物半導體，諸如：諸如SiC及SiGe之第IV族化合物半導體、諸如AlSb、AlAs、Aln、AlP、BN、GaSb、GaAs、GaN、GaP、InSb、InAs、InN及InP之第III-V族半導體、諸如AlxGa1-xAs之第III-V族三元化合物半導體合金、諸如CsSe、CdS、CdTe、ZnO、ZnSe、ZnS及ZnTe之第II-VI族半導體、第I-VII族半導體CuCl、諸如PbS、PbTe及SnS之第IV-VI 族半導體、諸如Pbl2、MoS2及GaSe之層狀半導體及諸如CuO及Cu2O之氧化物半導體。術語半導體包括本徵半導體及非本徵半導體，該等非本徵半導體摻有一或多種選定材料(包括具有p型摻雜材料及n型摻雜材料之半導體)以提供對給定應用或設備有用之有益電子特性。術語半導體包括包含半導體及/或摻雜劑之混合物的複合材料。在本發明之一些應用中有用之特定半導體材料包括(但不限於)Si、Ge、SiC、AlP、AlAs、AlSb、GaN、GaP、GaAs、GaSb、InP、InAs、GaSb、InP、InAs、InSb、ZnO、ZnSe、ZnTe、CdS、CdSe、ZnSe、ZnTe、CdS、CdSe、CdTe、HgS、PbS、PbSe、PbTe、AlGaAs、AlInAs、AlInP、GaAsP、GaInAs、GaInP、AlGaAsSb、AlGaInP及GaInAsP。多孔矽半導體材料對於本發明在感應器及發光材料(諸如發光二極體(LED)及固態雷射)之領域中的應用為有用的。半導體材料之雜質為除半導體材料自身或提供至半導體材料之任何摻雜劑以外之原子、元素、離子及/或分子。雜質為存在於半導體材料中的可能消極地影響半導體材料之電子特性之不合需要的材料，且包括(但不限於)氧、碳及包括重金屬之金屬。重金屬雜質包括(但不限於)週期表上處於銅與鉛之間的族之元素、鈣、鈉及其所有離子、化合物及/或錯合物。 "Interconnect" refers to a conductive material that is capable of establishing an electrical connection with a component or establishing an electrical connection between components. In particular, the interconnects can establish electrical contact between components that are separate and/or moveable relative to one another. Depending on the equipment specifications, operation and application, the interconnections are made of suitable materials. For applications requiring high conductivity, typical interconnect metals can be used including, but not limited to, copper, silver, gold, aluminum, and the like, alloys. Suitable conductive materials can include semiconductors such as germanium, indium tin oxide or GaAs. "Semiconductor" refers to any material that is an insulator at very low temperatures but has significant electrical conductivity at a temperature of about 300 grams of ear. In this description, the use of the term semiconductor is intended to be consistent with the use of this term in the art of microelectronics and electronic devices. Semiconductors useful in the present invention may include elemental semiconductors such as germanium, germanium, and diamond, and compound semiconductors such as Group IV compound semiconductors such as SiC and SiGe, such as AlSb, AlAs, Aln, AlP, BN, GaSb, GaAs. a Group III-V semiconductor of GaN, GaP, InSb, InAs, InN, and InP, a Group III-V ternary compound semiconductor alloy such as Al x Ga 1-x As, such as CsSe, CdS, CdTe, ZnO, ZnSe a Group II-VI semiconductor of ZnS and ZnTe, a Group I-VII semiconductor CuCl, a Group IV-VI semiconductor such as PbS, PbTe and SnS, a layered semiconductor such as Pbl 2 , MoS 2 and GaSe and such as CuO and Cu 2 O of an oxide semiconductor. The term semiconductor includes intrinsic semiconductors and extrinsic semiconductors that incorporate one or more selected materials (including semiconductors having p-type dopant materials and n-type dopant materials) to provide usefulness for a given application or device. Useful electronic properties. The term semiconductor includes composite materials comprising a mixture of semiconductors and/or dopants. Specific semiconductor materials useful in some applications of the invention include, but are not limited to, Si, Ge, SiC, AlP, AlAs, AlSb, GaN, GaP, GaAs, GaSb, InP, InAs, GaSb, InP, InAs, InSb, ZnO, ZnSe, ZnTe, CdS, CdSe, ZnSe, ZnTe, CdS, CdSe, CdTe, HgS, PbS, PbSe, PbTe, AlGaAs, AlInAs, AlInP, GaAsP, GaInAs, GaInP, AlGaAsSb, AlGaInP, and GaInAsP. Porous germanium semiconductor materials are useful for the application of the invention in the field of inductors and luminescent materials such as light emitting diodes (LEDs) and solid state lasers. Impurities of the semiconductor material are atoms, elements, ions and/or molecules other than the semiconductor material itself or any dopant provided to the semiconductor material. Impurities are undesirable materials present in the semiconductor material that may negatively affect the electronic properties of the semiconductor material, and include, but are not limited to, oxygen, carbon, and metals including heavy metals. Heavy metal impurities include, but are not limited to, elements of the family between copper and lead on the periodic table, calcium, sodium, and all of their ions, compounds, and/or complexes.

"可延伸"之互連在本文中用以廣泛地指代能夠經受在一或多個方向上的諸如延伸、撓曲及/或壓縮之多種力及應變而不會有害地影響至設備組件之電連接或自設備組件之電導的互連。因此，可延伸互連可由諸如GaAs之相對脆性之材料形成，然而歸因於互連之幾何組態而即使在曝露於顯著變形力(例如，延伸、撓曲、壓縮)下時仍能夠持續起作用。在一例示性實施例中，可延伸互連可經受大於約1%、10%或約30%之應變而不斷 裂。在一實例中，藉由使互連之至少一部分所結合至之下伏彈性體基板延伸而產生應變。 "Extensible" interconnects are used herein to broadly refer to a variety of forces and strains, such as extension, flexing, and/or compression, that can withstand one or more directions without adversely affecting device components. Electrical connection or interconnection of conductance from device components. Thus, the extendable interconnect can be formed from a relatively brittle material such as GaAs, but due to the geometric configuration of the interconnect, it can continue to be sustained even when exposed to significant deformation forces (eg, extension, flex, compression) effect. In an exemplary embodiment, the extendable interconnect can withstand strains greater than about 1%, 10%, or about 30% crack. In one example, strain is created by bonding at least a portion of the interconnect to the underlying elastomeric substrate.

使用"設備組件"以廣泛地指代電氣設備內之個別組件。組件可為光電二極體、LED、TFT、電極、半導體、其他光收集/偵測組件、電晶體、積體電路、能夠收納設備組件之接觸焊墊、薄膜設備、電路元件、控制元件、微處理器、傳感器及其組合中之一或多者。如諸如金屬蒸鍍、導線結合、固體或導電膏之施加的技術中所已知，設備組件可連接至一或多個接觸焊墊。電氣設備一般指代併有複數個設備組件之設備，且包括較大面積之電子元件、印刷線路板、積體電路、設備組件陣列、生物及/或化學感應器、物理感應器(例如，溫度、光、輻射等等)、太陽能電池或光伏打陣列、顯示器陣列、集光器、系統及顯示器。 "Device components" are used to refer broadly to individual components within an electrical device. The components can be photodiodes, LEDs, TFTs, electrodes, semiconductors, other light collecting/detecting components, transistors, integrated circuits, contact pads capable of housing device components, thin film devices, circuit components, control components, micro One or more of a processor, a sensor, and a combination thereof. The device component can be connected to one or more contact pads as is known in the art of metal evaporation, wire bonding, solid or conductive paste application. Electrical equipment generally refers to equipment that has a plurality of equipment components, and includes a large area of electronic components, printed wiring boards, integrated circuits, arrays of equipment components, biological and/or chemical sensors, physical sensors (eg, temperature) , light, radiation, etc.), solar cells or photovoltaic arrays, display arrays, concentrators, systems and displays.

"基板"指代具有能夠支撐包括設備組件或互連之組件之表面的材料。"結合"至基板之互連指代互連之與基板處於實體接觸且實質上不能夠相對於所結合至之基板表面移動的部分。相反，未結合之部分能夠相對於基板作顯著移動。互連之未結合部分一般對應於(諸如)藉由應變誘發之互連撓曲而具有"撓曲組態"之部分。 "Substrate" refers to a material that has a surface that is capable of supporting a component that includes device components or interconnects. The "bonded" to substrate interconnect refers to the portion of the interconnect that is in physical contact with the substrate and that is substantially incapable of moving relative to the substrate surface to which it is bonded. Instead, the unbound portion can move significantly relative to the substrate. The unbonded portions of the interconnect generally correspond to portions of the "flex configuration", such as by strain-induced interconnect deflection.

在此描述之上下文中，"撓曲組態"指代具有由力之施加所導致之彎曲構形之結構。在本發明中，撓曲結構可具有一或多個摺疊區域、凸起區域、凹入區域及其任何組合。舉例而言，可以捲曲構形、起皺構形、彎曲構形及/或波狀(亦即，波紋狀)組態而提供在本發明中有用之撓曲結構。 In the context of this description, "flex configuration" refers to a structure having a curved configuration resulting from the application of force. In the present invention, the flex structure may have one or more folded regions, raised regions, recessed regions, and any combination thereof. For example, a flex configuration, a creping configuration, a curved configuration, and/or a wavy (ie, corrugated) configuration can be provided to provide a flex structure useful in the present invention.

諸如可延伸撓曲互連之撓曲結構可以撓曲結構處於應變下之構形而結合至諸如聚合物及/或彈性基板之可撓性基板。在一 些實施例中，諸如撓曲織帶結構之撓曲結構處於等於或小於約30%之應變下、等於或小於約10%之應變下、等於或小於約5%之應變下，且在對於一些應用為較佳之實施例中，處於等於或小於約1%之應變下。在一些實施例中，諸如撓曲織帶結構之撓曲結構處於自約0.5%至約30%之範圍中選擇之應變下、自約0.5%至約10%之範圍中選擇的應變下、自約0.5%至約5%之範圍中選擇之應變下。或者，可延伸撓曲互連可結合至係設備組件之基板的基板，該基板包括自身非可撓性之基板。基板自身可為平坦、大體上平坦、彎曲、具有銳緣或其任何組合。可延伸撓曲互連可用於轉移至此等複雜基板表面形狀中之任何一或多者。 A flexure structure, such as an extendable flexure interconnect, can be bonded to a flexible substrate such as a polymer and/or an elastic substrate in a configuration in which the flexure structure is in strain. In a In some embodiments, the flexural structure, such as a flexural webbing structure, is at a strain equal to or less than about 30%, a strain equal to or less than about 10%, a strain equal to or less than about 5%, and for some applications In the preferred embodiment, it is at a strain equal to or less than about 1%. In some embodiments, the flexural structure, such as a flexural webbing structure, is at a strain selected from a range of from about 0.5% to about 30%, from a strain selected from the range of from about 0.5% to about 10%, from about The strain selected from the range of 0.5% to about 5%. Alternatively, the extendable flexure interconnect can be bonded to a substrate of a substrate of a system component that includes a substrate that is itself non-flexible. The substrate itself can be flat, substantially flat, curved, have a sharp edge, or any combination thereof. The extendable flex interconnect can be used to transfer to any one or more of the complex substrate surface shapes.

互連可具有任何數目之幾何形狀或形狀，只要該幾何形狀或形狀促進互連在不破裂之情況下的撓曲或延伸即可。可將一般互連幾何形狀描述為"彎曲"或"波狀"。在一態樣中，可由藉由對下伏可變形基板施加力以使得下伏基板之尺寸的改變在互連中產生彎曲或波紋(因為互連之部分結合至基板，且結合部分之間的區域未結合)而對互連施加力(例如，應變)來獲得彼幾何形狀。因此，可藉由結合至基板之末端及末端之間未與基板結合之彎曲中央部分來界定個別互連。"彎曲"指代相對複雜之形狀，諸如對於在中央部分具有一或多個額外結合區域之互連之情況。"弧狀"指代具有振幅之一般呈正弦之形狀，其中振幅對應於互連與基板表面之間的最大分離距離。 The interconnect can have any number of geometries or shapes as long as the geometry or shape facilitates flexing or extension of the interconnect without breaking. The general interconnect geometry can be described as "bending" or "wavy". In one aspect, bending or corrugation can be created in the interconnect by applying a force to the underlying deformable substrate such that a change in the size of the underlying substrate (because the interconnected portion is bonded to the substrate and between the bonded portions) The regions are unbonded and a force (eg, strain) is applied to the interconnect to obtain the geometry. Thus, individual interconnections can be defined by bonding to the curved central portion of the substrate that is not bonded to the substrate between the ends and ends. "Bending" refers to a relatively complex shape, such as for an interconnection with one or more additional bonding regions in the central portion. "Arc" refers to a generally sinusoidal shape having an amplitude corresponding to the maximum separation distance between the interconnect and the surface of the substrate.

互連可具有任何橫截面形狀。一形狀之互連為織帶狀互連。"織帶"指代具有厚度及寬度的大體上呈矩形形狀之橫截面。特定尺寸視經由互連之所要傳導性、互連之組成及使鄰近設備組件電連接之互連的數目而定。舉例而言，使鄰近組件連 接之橋接組態的互連可具有與使鄰近組件連接之單一互連不同之尺寸。因此，只要產生合適電導率，尺寸可具有任何合適值，諸如在約10μm與1cm之間的寬度及在約50nm與1nm之間的厚度，或者在約0.001與0.1之間的範圍內之寬度厚度比，或約為0.01之比。 The interconnect can have any cross-sectional shape. A shape interconnect is a ribbon interconnect. "Webbing" refers to a generally rectangular cross section having a thickness and a width. The particular size depends on the desired conductivity of the interconnect, the composition of the interconnect, and the number of interconnects that electrically connect adjacent device components. For example, to connect adjacent components The interconnects of the bridged configuration may have different dimensions than the single interconnect that connects adjacent components. Thus, as long as a suitable conductivity is produced, the dimensions can have any suitable value, such as a width between about 10 μm and 1 cm and a thickness between about 50 nm and 1 nm, or a width thickness in the range between about 0.001 and 0.1. Ratio, or about 0.01 ratio.

"彈性體"指代可延伸或變形且至少部分地返回其原始形狀而無顯著永久變形之聚合材料。彈性體基板通常經受實質上之彈性變形。在本發明中有用之例示性彈性體基板包括(但不限於)彈性體及彈性體之複合材料或混合物，以及顯示出彈性之聚合物及共聚物。在一些方法中，經由沿一或多個主軸提供彈性基板之擴展之機構來對彈性體基板預加應變。舉例而言，可藉由使彈性基板沿第一軸擴展(包括用以將半球形表面變換為平坦表面的在徑向方向上之擴展)而提供預加應變。或者，可沿複數個軸來擴展彈性基板(例如經由沿相對於彼此正交定位之第一與第二軸的擴展)。經由提供彈性基板之擴展之機構而對彈性基板預加應變的手段包括撓曲、捲繞、折曲、平整、擴展彈性基板或以其他方式使彈性基板變形。預加應變之手段亦包括藉由升高彈性基板之溫度，藉此提供彈性基板之熱膨脹而提供之預加應變。在本發明中有用之彈性體可包括(但不限於)熱塑性彈性體、苯乙烯類材料、烯烴材料、聚烯烴、聚胺基甲酸酯熱塑性彈性體、聚醯胺、合成橡膠、PDMS、聚丁二烯、聚異丁烯、聚(苯乙烯-丁二烯-苯乙烯)、聚胺基甲酸酯、聚氯丁烯及聚矽氧。 "Elastomer" refers to a polymeric material that can be stretched or deformed and at least partially returns to its original shape without significant permanent deformation. Elastomeric substrates are typically subjected to substantial elastic deformation. Exemplary elastomeric substrates useful in the present invention include, but are not limited to, composites or mixtures of elastomers and elastomers, as well as polymers and copolymers that exhibit elasticity. In some methods, the elastomeric substrate is pre-stressed via a mechanism that provides expansion of the elastic substrate along one or more spindles. For example, the pre-strain can be provided by expanding the elastic substrate along the first axis, including the expansion in the radial direction to transform the hemispherical surface into a flat surface. Alternatively, the elastic substrate can be expanded along a plurality of axes (e.g., via expansion along first and second axes that are orthogonally positioned relative to each other). The means for pre-straining the elastic substrate via a mechanism that provides expansion of the elastic substrate includes flexing, winding, flexing, flattening, expanding the elastic substrate, or otherwise deforming the elastic substrate. The pre-straining means also includes providing a pre-strain by providing a thermal expansion of the elastic substrate by raising the temperature of the elastic substrate. Elastomers useful in the present invention may include, but are not limited to, thermoplastic elastomers, styrenic materials, olefin materials, polyolefins, polyurethane thermoplastic elastomers, polyamines, synthetic rubbers, PDMS, poly Butadiene, polyisobutylene, poly(styrene-butadiene-styrene), polyurethane, polychloroprene and polyfluorene.

將對於長度自L(處於靜止)變為L+△L(在所施加之力下)之應變界定為：ε=△L/L，其中△L為自靜止之移位距離。軸向應變指代施加至基板之軸以產生移位△L之力。亦藉由在其他方向上施加之力來產生應變，諸如撓曲力、壓縮力、剪切力及其任何組 合。亦可藉由將彎曲表面延伸為平坦表面或是相反過程來產生應變或壓縮。 The strain for the length from L (at rest) to L + ΔL (under the applied force) is defined as: ε = ΔL / L, where ΔL is the displacement distance from rest. Axial strain refers to the force applied to the axis of the substrate to produce a displacement ΔL. Strain is also generated by forces applied in other directions, such as flexing force, compressive force, shear force, and any group thereof. Hehe. Strain or compression can also be produced by extending the curved surface to a flat surface or vice versa.

"楊氏模數(Young's modulus)"為材料、設備或層之機械特性，其指代對於給定物質，應力與應變之比。楊氏模數可由以下表達式提供； 其中E為楊氏模數，L0為平衡長度，△L為在所施加之應力下的長度改變，F為所施加之力且A為力所施加於之面積。亦可經由下式而以拉梅常數(Lame constant)來表達楊氏模數： 其中λ及μ為拉梅彈性常數。高楊氏模數(或"高模數")及低楊氏模數(或"低模數")為對於給定材料、層或設備中之楊氏模數之量值的相對描述符。在本發明中，高楊氏模數大於低楊氏模數，對於一些應用較佳地大約10倍，對於其他應用更佳大約100倍且對於其他應用甚至更佳大約1000倍。藉由使具有空間變化之楊氏模數之彈性體聚合及/或藉由以在各個位置處具有不同彈性之多個層而使彈性體層化來獲得複雜表面形狀。 "Young's modulus" is the mechanical property of a material, device, or layer that refers to the ratio of stress to strain for a given substance. Young's modulus can be provided by the following expression; Where E is the Young's modulus, L 0 is the equilibrium length, ΔL is the length change under the applied stress, F is the applied force and A is the area to which the force is applied. The Young's modulus can also be expressed by the Lame constant by the following formula: Where λ and μ are the Lame elastic constants. High Young's modulus (or "high modulus") and low Young's modulus (or "low modulus") are relative descriptors for the magnitude of Young's modulus in a given material, layer or device. In the present invention, the high Young's modulus is greater than the low Young's modulus, preferably about 10 times for some applications, about 100 times better for other applications, and even about 1000 times for other applications. Complex surface shapes are obtained by polymerizing elastomers having spatially varying Young's modulus and/or by laminating elastomers with multiple layers having different resilience at various locations.

壓縮在本文中以與應變類似之方式而使用，但特別指代用以減小基板之特徵性長度或體積之力，從而△L<0。 Compression is used herein in a manner similar to strain, but particularly refers to the force used to reduce the characteristic length or volume of the substrate, such that ΔL < 0.

"斷裂"指代互連中之實體破裂，其使得互連實質上不能夠導電。 "Fracture" refers to the rupture of a solid in an interconnect that makes the interconnect substantially incapable of conducting electricity.

"結合位點之圖案"指代結合手段對支撐基板表面及/或對互連之空間應用，其使得所支撐之互連具有與基板之結合區域及未結合區域。舉例而言，於末端結合至基板且在中央部分未結 合之互連。進一步之形狀控制藉由在中央部分中提供額外結合位點以使得未結合之區域被劃分為兩個不同的中央部分而為可能的。結合手段可包括黏著劑、黏著前驅物、熔接、光微影、光可固化聚合物。一般而言，結合位點可藉由多種技術而加以圖案化，且可在能夠提供基板與特徵(例如，互連)之間的強黏著力之表面活性(Wact)區域及黏著力相對較弱之表面非活性(Win)的方面加以描述。可在Wact與Win之尺寸方面描述以黏著方式圖案化成直線之基板。彼等變數連同預加應變之量值εpre影響互連幾何形狀。 "Pattern of binding sites" refers to the application of bonding means to the surface of the support substrate and/or to the interconnect, such that the supported interconnects have bonded regions and unbonded regions with the substrate. For example, an interconnect that is bonded to the substrate at the end and not bonded at the central portion. Further shape control is possible by providing additional binding sites in the central portion such that unbound regions are divided into two distinct central portions. Bonding means may include an adhesive, an adhesive precursor, a weld, a photolithography, a photocurable polymer. In general, the binding sites may be patterned by a variety of techniques, and may be a surfactant in the strong adhesion of the substrate can be provided with features (e.g., interconnect) between (W act), and the adhesion of the region is relatively The aspect of weak surface inactivity (W in ) is described. Substrate adhesion may be described in a linear manner into the pattern of the dimensions of W in the W act. These variables, along with the pre-stressed magnitude ε pre, affect the interconnect geometry.

藉由以下非限制性實例可進一步瞭解本發明。本文引用之所有參考文獻在不與隨附揭示內容不一致的程度上以引用方式併入本文中。雖然本文之描述含有許多特定細節，但此等特定細節不應解釋為限制本發明之範疇，而應解釋為僅僅提供對本發明之目前較佳的實施例中之一些之說明。因此，本發明之範疇應由所附申請專利範圍及其等效物判定而非由給出之實例所判定。 The invention will be further understood by the following non-limiting examples. All references cited herein are incorporated herein by reference to the extent that they are not inconsistent with the accompanying disclosure. Although the description herein contains many specific details, the specific details are not to be construed as limiting the scope of the invention, but are to be construed as merely providing a description of some of the presently preferred embodiments of the invention. Therefore, the scope of the invention should be determined by the scope of the appended claims and their equivalents.

圖1大體概述用於製造彎曲或波狀互連之一方法。在基板20上提供金屬特徵10(諸如將為互連之金屬特徵)。視情況可(諸如)藉由光微影或以蔽蔭遮罩而處理接觸金屬特徵及/或基板表面以減小黏著。諸如藉由微機械加工、蝕刻及/或機械雕合而在特徵10與基板20之間引入分隔物(裂縫)25。藉由柔性彈性體印模30取得金屬特徵10。印模30之後續變形在金屬特徵10中產生波狀或彎曲幾何形狀40。由在取得金屬特徵時處於應變下且隨後解除所施加之張力的印模30提供彎曲之產生，或藉由在取得金屬特徵之後壓縮印模30而提供彎曲之產生。 Figure 1 generally outlines one method for making a curved or wavy interconnect. Metal features 10 (such as metal features that will be interconnected) are provided on substrate 20. Contact metal features and/or substrate surfaces may be treated to reduce adhesion, such as by photolithography or by masking, as appropriate. A separator (crack) 25 is introduced between the feature 10 and the substrate 20, such as by micromachining, etching, and/or mechanical engraving. The metal feature 10 is taken by the flexible elastomer stamp 30. Subsequent deformation of the stamp 30 produces a wavy or curved geometry 40 in the metal feature 10. The creation of a bend is provided by the stamp 30 which is under strain when the metal feature is taken and then relieves the applied tension, or by compressing the stamp 30 after taking the metal feature.

圖2展示藉由圖1中所概述之方法而產生之彎曲或波狀金屬 特徵之一實例。圖2為可延伸波狀/彎曲電互連40之相片，該電互連40係藉由自剛性基板取至經預加應變之可延伸PDMS橡膠基板30上，隨後解除應變，藉此誘發彎曲而形成。 Figure 2 shows a curved or wavy metal produced by the method outlined in Figure 1. An example of a feature. 2 is a photograph of an extendable wavy/curved electrical interconnect 40 that is drawn from a rigid substrate onto a pre-strained extensible PDMS rubber substrate 30, followed by strain relief, thereby inducing bending And formed.

圖3中提供用於產生波狀可延伸電極及/或互連之方法。如圖3A所示，藉由(例如)微機械加工製程而在基板20上製備波狀特徵22。一表面具有波狀特徵22之基板20充當用於模製具有相應波狀表面32之彈性體印模30的母體。藉由(諸如)經由蔽蔭遮罩之蒸鍍及/或電鍍而在波狀表面32上沈積金屬特徵10。 A method for producing a wavy extensible electrode and/or interconnect is provided in FIG. As shown in FIG. 3A, undulating features 22 are fabricated on substrate 20 by, for example, a micromachining process. The substrate 20 having a wavy feature 22 on its surface serves as a precursor for molding the elastomeric stamp 30 having the corresponding undulating surface 32. The metal features 10 are deposited on the undulating surface 32 by, for example, evaporation and/or electroplating through a shadow mask.

圖4提供用於製造平滑波狀彈性體基板之一方法。各向異性Si(100)蝕刻提供具有銳緣24之基板20(圖4B-頂部畫面)。旋塗PR藉由在基板20之銳緣谷24中沈積PR 26而使銳緣谷平滑。抵靠基板20而澆鑄彈性體印模34。印模34具有銳緣凹入特徵。在印模34上澆鑄第二彈性體印模36以產生具有銳緣峰之印模。以Su-850壓印印模36且在適當時使其固化。旋塗PR 26使50之銳緣谷平滑。抵靠具有平滑谷之50而澆鑄彈性體基板30。移除基板30以顯露波狀且平滑之表面32。 Figure 4 provides a method for making a smooth corrugated elastomeric substrate. An anisotropic Si (100) etch provides a substrate 20 having a sharp edge 24 (Fig. 4B - top screen). Spin coating PR smoothes the sharp edge valley by depositing PR 26 in the sharp edge valley 24 of the substrate 20. The elastomer stamp 34 is cast against the substrate 20. The stamp 34 has a sharp edge recessed feature. A second elastomeric stamp 36 is cast over the stamp 34 to produce an impression having a sharp peak. The stamp 36 is stamped with Su-850 and cured as appropriate. Spin coating PR 26 smoothes the sharp edge valley of 50. The elastomer substrate 30 is cast against the 50 having a smooth valley. Substrate 30 is removed to reveal a wavy and smooth surface 32.

圖54概述製造波狀可延伸電極之一方法：於波狀母體上沈積，隨後在彼母體上澆鑄一印模，使印模固化，且藉此在釋放後即將電極轉移至母體。圖55展示藉由圖4中之方法結合圖54中之方法而製備的在波狀PDMS上之可延伸金屬電極(Au，300nm厚)之影像。於金屬特徵10與基板20之間展示界面112。界面112可包含促進底部畫面中所說明的藉由印模30而進行的金屬特徵10之移除之材料。簡言之，一方法使用：於預清潔之2"×3"玻璃載片上旋塗SU-8 10之薄塗層以使得玻璃表面被完全覆蓋。使載片/SU-8與具有所要波狀表面特徵(平滑谷及陡峰)之PDMS印模接觸且輕柔施加壓力以使得所有氣穴經移除。在正面於UV燈下 閃蒸固化印模/模結構歷時30秒，翻轉，且在背面固化額外之40秒。在固化之後，在熱板上於65℃下烘焙5分鐘。在烘焙之後，允許樣本冷卻至室溫，並將SU-8模自PDMS母體剝離。SU-8現將具有具有銳緣谷之波狀表面起伏。為了使此等谷趨於平滑，將一份SU-8 2與一份較薄之SU-8混合，且以高RPM而旋塗歷時90秒。曝露於UV燈下歷時20秒來固化且於65℃進行後烘焙歷時3分鐘。一旦冷卻，即經由電鍍、光微影及蝕刻/起離及/或經由蔽蔭遮罩之蒸鍍而沈積金屬線或接觸點。以MPTMS對SU-8上之金屬處理1小時，且接著抵靠其而澆鑄彈性體基板。在移除後，PDMS具有波狀表面起伏(其具有平滑之峰及谷)連同轉移之金屬結構。圖55為藉由圖54中概述之製程而製造之波狀可延伸電極之相片，且亦提供可延伸波狀金屬電極的作為所施加之拉伸應變(高達30%)之函數的量測而得之電阻資料。 Figure 54 outlines one method of making a wavy extensible electrode: deposition on a wavy precursor followed by casting a stamp on the parent to cure the stamp and thereby transferring the electrode to the precursor after release. Figure 55 shows an image of an extensible metal electrode (Au, 300 nm thick) on a wavy PDMS prepared by the method of Figure 4 in combination with the method of Figure 54. An interface 112 is shown between the metal feature 10 and the substrate 20. Interface 112 may include material that facilitates removal of metal features 10 by stamp 30 as illustrated in the bottom panel. Briefly, one method uses: a thin coating of SU-8 10 is spin coated onto a pre-cleaned 2" x 3" glass slide such that the glass surface is completely covered. The slide/SU-8 was brought into contact with a PDMS stamp having the desired wavy surface features (smooth valleys and steep peaks) and pressure was applied gently to remove all air pockets. On the front under the UV light The flash cure stamp/die structure lasted 30 seconds, flipped, and cured on the back for an additional 40 seconds. After curing, it was baked on a hot plate at 65 ° C for 5 minutes. After baking, the samples were allowed to cool to room temperature and the SU-8 mold was peeled from the PDMS matrix. SU-8 will now have undulating surface undulations with sharp valleys. To smooth these grains, a portion of SU-8 2 was mixed with a thinner SU-8 and spin coated at high RPM for 90 seconds. It was cured by exposure to a UV lamp for 20 seconds and post-baked at 65 ° C for 3 minutes. Once cooled, the metal lines or contact points are deposited via electroplating, photolithography and etching/disengagement and/or evaporation through a shadow mask. The metal on SU-8 was treated with MPTMS for 1 hour and then the elastomeric substrate was cast against it. After removal, the PDMS has undulating surface undulations (which have smooth peaks and valleys) along with the transferred metal structure. Figure 55 is a photograph of a corrugated extensible electrode fabricated by the process outlined in Figure 54 and also providing measurement of the stretchable corrugated metal electrode as a function of applied tensile strain (up to 30%). Get the resistance data.

圖5提供藉由圖4中概述之方法而製造之平滑波狀PDMS基板30之一實例。設備組件60可於非波狀區域(例如，大體上平坦之部分)中支撐於波狀基板30且在需要時連接至互連10。 FIG. 5 provides an example of a smooth wavy PDMS substrate 30 fabricated by the method outlined in FIG. The device assembly 60 can be supported on the corrugated substrate 30 in a non-wavy region (eg, a substantially flat portion) and connected to the interconnect 10 as needed.

圖6展示向銳緣谷或凹入特徵中旋塗平滑層之一實例。藉由旋塗光可固化環氧樹脂26而使銳緣基板34(圖6A)平滑來產生平滑波狀基板。藉由抵靠圖6B之基板澆鑄PDMS印模且隨後自基板34移除印模30而獲得具有平滑波狀表面32之彈性體(例如，PDMS)印模30。 Figure 6 shows an example of spin-coating a smoothing layer into a sharp valley or recessed feature. The smooth edge substrate 34 (Fig. 6A) is smoothed by spin coating the photocurable epoxy resin 26 to produce a smooth corrugated substrate. An elastomeric (e.g., PDMS) stamp 30 having a smooth undulating surface 32 is obtained by casting a PDMS stamp against the substrate of Figure 6B and subsequently removing the stamp 30 from the substrate 34.

圖7為可延伸電極之相片。圖7A為具有波狀表面32之彈性體基板30的橫截面之相片。圖7B為藉由在波狀彈性體基板表面32上蒸鍍金屬10而製成之電極的俯視顯微相片。影像之焦平面處於波狀起伏之峰上。在圖7C中，焦平面處於波狀起伏之谷上且金屬互連10處於與電極250之電接觸中。藉由經由蔽蔭遮罩而蒸 鍍至平滑波狀彈性體基板上來沈積可延伸電極。在此實例中，電極250在受張力而延伸至高達約10%的期間保持經由互連10之傳導性及連接性。 Figure 7 is a photograph of an extendable electrode. FIG. 7A is a photograph of a cross section of an elastomeric substrate 30 having a wavy surface 32. FIG. 7B is a top photomicrograph of an electrode made by vapor-depositing metal 10 on wave-like elastomer substrate surface 32. The focal plane of the image is on a undulating peak. In FIG. 7C, the focal plane is on the undulating valley and the metal interconnect 10 is in electrical contact with the electrode 250. Steamed by a shadow mask Plated onto a smooth, wavy elastomeric substrate to deposit an extendable electrode. In this example, electrode 250 maintains conductivity and connectivity via interconnect 10 during tensions extending up to about 10%.

本文揭示之方法及設備可用以製造多種電子設備，包括(例如)可延伸被動式矩陣LED顯示器(見圖8)。將波狀電極(例如，互連10及接觸焊墊70)圖案化於兩個彈性體基板30上。藉由轉印而將設備組件60(在此情況中為ILED像素)於接觸焊墊70處圖案化波狀電極上。相應地組裝兩個基板30以使得互連10以不同定向(在此實例中為垂直)而延行。圖9說明該被動式矩陣LED顯示器之2D機械可延伸性。除了能夠單軸及雙軸延伸以外，顯示器能夠顯著撓曲而不破裂。該多軸撓曲向彎曲表面提供模製電子設備之能力以製造彎曲電子設備且併入智慧電子織物或顯示器中。 The methods and apparatus disclosed herein can be used to fabricate a variety of electronic devices including, for example, extendable passive matrix LED displays (see Figure 8). Wave electrodes (eg, interconnect 10 and contact pads 70) are patterned on the two elastomer substrates 30. Device component 60 (in this case, an ILED pixel) is patterned on the wavy electrode at contact pad 70 by transfer. The two substrates 30 are assembled accordingly such that the interconnects 10 are extended in different orientations (vertical in this example). Figure 9 illustrates the 2D mechanical extensibility of the passive matrix LED display. In addition to being able to uniaxially and biaxially extend, the display can flex significantly without breaking. The multi-axis flexing provides the curved surface with the ability to mold electronic devices to make curved electronic devices and incorporate them into smart electronic fabrics or displays.

彎曲電子設備之一該實例提供於圖10中。圖10說明包含分布於球面彎曲透鏡上之無機光電二極體陣列之"人造眼"。展示人造陣列之四個不同視圖。圖11示意性地說明對於可延伸平坦電子設備之要求。為了圍繞球形表面而包繞平坦薄片，薄片必須在一個以上的方向上延伸。 One example of a curved electronic device is provided in FIG. Figure 10 illustrates an "artificial eye" comprising an array of inorganic photodiodes distributed over a spherically curved lens. Show four different views of the artificial array. Figure 11 schematically illustrates the requirements for an extendable flat electronic device. In order to wrap the flat sheet around the spherical surface, the sheet must extend in more than one direction.

圖12為用於製造能夠與彎曲表面相符之可延伸彎曲半導體陣列之製造機制。藉由在基板(諸如畫面(i)中所說明之"母晶圓")上之選擇性Au或Ti/Au沈積來製造薄Si元件。使Si結合至經預加應變(指示為L+△L)及UVO處理之PDMS(畫面(ii))。如所說明，在兩個方向上提供預加應變。該結合係藉由此項技術中已知之任何手段而進行，諸如(例如)塗覆至Si元件、基板或兩者之黏著劑。以選定圖案應用結合手段以使得Si具有將保持與基板之實體接觸(在變形之後)之結合區域及不與基板實體接觸之處於撓 曲組態的其他區域(例如，相對於結合區域中之黏著力不結合或弱結合之區域)。自晶圓基板移除經預加應變之基板以顯露半導體陣列之平坦柵格(畫面(iii))。在將基板自L+△L鬆弛至L後，互連10即在弱結合之區域中彎曲(見畫面(iv))為撓曲組態，而設備組件60(例如，半導體Si接觸焊墊)仍保持結合至基板30。因此，彎曲互連10向整個陣列賦予可延伸性，且特定言之相對於其他組件60移動組件60之能力。不破壞組件60之間的電接觸而藉此向彎曲表面或可撓曲表面提供保形能力。 Figure 12 is a fabrication mechanism for fabricating an extensible curved semiconductor array that is conformable to a curved surface. Thin Si elements are fabricated by selective Au or Ti/Au deposition on a substrate such as the "parent wafer" illustrated in picture (i). Si was bonded to PDMS (picture (ii)) subjected to pre-strain (indicated as L + ΔL) and UVO treatment. As explained, pre-stress is provided in both directions. The bonding is performed by any means known in the art, such as, for example, an adhesive applied to the Si component, the substrate, or both. Applying bonding means in a selected pattern such that Si has a bonding area that will remain in physical contact with the substrate (after deformation) and is not in contact with the substrate entity Other areas of the curved configuration (eg, areas where the adhesion in the bonded area does not bond or weakly bond). The pre-strained substrate is removed from the wafer substrate to reveal a flat grid of the semiconductor array (picture (iii)). After the substrate is relaxed from L+ΔL to L, the interconnect 10 is bent in the weakly bonded region (see picture (iv)) for the flex configuration, while the device component 60 (eg, the semiconductor Si contact pad) remains The bonding to the substrate 30 is maintained. Thus, the curved interconnect 10 imparts extensibility to the entire array, and in particular the ability to move the assembly 60 relative to other components 60. The electrical contact between the components 60 is not compromised thereby providing conformal capability to the curved or deflectable surface.

圖13提供採取單一柵格組態140(頂部兩幅畫面)、具有複數個連接之互連160的柵格組態(左下部畫面)及花形組態150(右下部畫面)之彎曲可延伸矽陣列之光學顯微影像。在此等實例中之每一者中，互連10在中央部分中彎曲，互連末端附接至接觸焊墊70。互連及接觸焊墊70支撐於PDMS基板30上。圖14至圖17進一步提供許多不同互連幾何形狀之特寫視圖。圖14提供電子顯微影像以展示具有中央部分90連同第一末端100及第二末端110之基本彎曲或波狀互連10。中央部分採取撓曲組態。末端100及110連接至設備組件(在此情況下為接觸焊墊70)，從而能夠建立與設備組件之電接觸。互連10及接觸焊墊70支撐於諸如彈性體PDMS基板之基板30上。 Figure 13 provides a grid configuration (lower left picture) with a single grid configuration 140 (top two frames), interconnect 160 with multiple connections, and a curved configuration of the flower configuration 150 (bottom right frame). Optical microscopic images of the array. In each of these examples, the interconnect 10 is bent in a central portion that is attached to the contact pad 70. Interconnect and contact pads 70 are supported on PDMS substrate 30. Figures 14 through 17 further provide close-up views of a number of different interconnect geometries. FIG. 14 provides an electron micrograph to show a substantially curved or wavy interconnect 10 having a central portion 90 along with a first end 100 and a second end 110. The central part takes the flex configuration. The ends 100 and 110 are connected to a device component (in this case, a contact pad 70) to enable electrical contact with the device components. The interconnect 10 and contact pads 70 are supported on a substrate 30 such as an elastomeric PDMS substrate.

圖15為藉由複數個(兩個)互連160彼此連接之鄰近設備組件(例如，接觸焊墊70)之電子顯微影像。圖15與圖14比較論證了可藉由一或多個互連10來使設備組件70彼此連接以向電子設備提供額外可撓性。舉例而言，具有相對較大之佔據面積之設備組件或接觸焊墊70視情況可藉由多個互連而連接至另一設備組件。 Figure 15 is an electron micrograph of a neighboring device component (e.g., contact pad 70) that is connected to each other by a plurality (two) of interconnects 160. 15 and FIG. 14 demonstrate that device components 70 can be connected to one another by one or more interconnects 10 to provide additional flexibility to the electronic device. For example, a device component or contact pad 70 having a relatively large footprint may optionally be connected to another device component by a plurality of interconnects.

圖16為採取花形組態150之互連之電子顯微影像。與柵格組 態相比，花形組態具有在兩個以上之縱向方向上定向之互連。在此實例中，存在四個不同定向以使得諸如接觸焊墊70之設備組件能夠接觸對角鄰近之設備組件。在此實例中，互連10具有電連接至設備組件(未圖示)之互連末端100與110之間的可選結合區域102，藉此將中央部分90劃分為各具有撓曲組態之兩個未結合區域92。 Figure 16 is an electron micrograph of the interconnection of the flower configuration 150. With raster group In contrast to the state, the flower configuration has interconnections oriented in more than two longitudinal directions. In this example, there are four different orientations to enable device components such as contact pads 70 to contact diagonally adjacent device components. In this example, interconnect 10 has an optional bond area 102 electrically connected between interconnect ends 100 and 110 of a device component (not shown), thereby dividing central portion 90 into a flex configuration. Two unbound regions 92.

圖17為以橋接組態130配置之互連的電子顯微影像。在橋接組態中，存在橋接中央部分高峰120，三個或三個以上互連末端自其延伸。舉例而言，於未結合區域中相交之兩個互連導致高峰120，其具有自其延伸之四個互連末端。對於設備組件為交錯配置之情形，高峰120可具有自其延伸之三個末端。在設備組件之間存在多個互連連接之情況下，四個以上之末端可自高峰120延伸。 17 is an electron micrograph of an interconnect configured in a bridging configuration 130. In a bridge configuration, there is a bridging central portion peak 120 from which three or more interconnected ends extend. For example, the two interconnects that intersect in the unbonded region result in a peak 120 having four interconnected ends extending therefrom. For the case where the device components are in a staggered configuration, the peaks 120 can have three ends extending therefrom. Where there are multiple interconnect connections between device components, more than four ends may extend from peak 120.

雖然本文提供之圖式中之許多者展示係接觸焊墊70之設備組件，但本文主張的方法及設備能夠連接至大量設備組件以提供可延伸且因此形狀符合之電子設備。舉例而言，圖18展示設備組件60，其為藉由支撐於彈性體基板30上之彎曲互連10而連接至採取陣列組態之其他光電二極體的光電二極體。 While many of the figures provided herein show device components that are in contact with solder pads 70, the methods and devices claimed herein are capable of being coupled to a wide variety of device components to provide an electronic device that is extensible and thus conformal in shape. For example, FIG. 18 shows an apparatus assembly 60 that is connected to a photodiode of other photodiodes that take an array configuration by a curved interconnect 10 supported on an elastomeric substrate 30.

圖19描繪彎曲矽陣列之一維延伸行為。畫面(i)為在未施加任何應變力之情況下的彎曲矽陣列之圖像。施加延伸力(如藉由畫面(i)上方之箭頭所指示)以使陣列在一方向上延伸。如畫面(2)至(4)所展示，彎曲互連變平。當於畫面(5)中解除延伸力時，陣列返回至其彎曲組態(見畫面(6)至(8))。畫面(1)與(8)之間的比較展示在延伸之前與延伸之後的彎曲組態相同，此指示該過程可逆。 Figure 19 depicts one dimensional extension behavior of a curved tantalum array. Picture (i) is an image of a curved 矽 array without applying any strain force. An extension force is applied (as indicated by the arrow above the screen (i)) to extend the array in one direction. As shown in pictures (2) to (4), the curved interconnect is flattened. When the extension force is released in the picture (5), the array returns to its curved configuration (see pictures (6) to (8)). A comparison between pictures (1) and (8) shows the same bending configuration as before stretching, which indicates that the process is reversible.

設備組件之彎曲陣列可易於轉移至彎曲表面，包括剛性或 非彈性彎曲表面。藉由圖20之氣泡或氣球印模400來提供用於促進對彎曲表面之保形接觸的一設備及製程之實例。彈性體基板30(在此實例中為約20μm厚之PDMS薄膜)固定於外殼腔室300中以提供由面向內部之基板壁及外殼腔室所界定之腔室容積310。施加正壓力(例如，腔室300中之壓力大於外部壓力)產生能夠與凹入狀收納基板保形接觸之凸起200基板表面。相反，負壓力產生能夠與凸起狀收納基板保形接觸之凹入表面210。對基板之局部彈性(例如，楊氏模數)之空間控制允許產生複雜彎曲幾何形狀。圖20之左下部畫面說明用於藉由引入氣體至腔室310或自腔室310移除氣體之注射器而控制外殼容積310中的壓力之一構件。圖式右側之影像為PDMS薄膜回應於正壓力之增加水準的不同彎曲。用於在彈性體基板上提供彎曲互連之方法及設備中之任一者可與用於轉印至彎曲基板的該等設備一起使用。 Curved arrays of equipment components can be easily transferred to curved surfaces, including rigid or Inelastic curved surface. An example of an apparatus and process for facilitating conformal contact to a curved surface is provided by the bubble or balloon impression 400 of FIG. An elastomeric substrate 30 (a PDMS film of about 20 [mu]m thickness in this example) is secured in the housing chamber 300 to provide a chamber volume 310 defined by the interior facing substrate wall and housing chamber. Applying a positive pressure (e.g., the pressure in the chamber 300 is greater than the external pressure) creates a raised 200 substrate surface that can conformally contact the recessed receiving substrate. Conversely, the negative pressure creates a concave surface 210 that can conformally contact the raised receiving substrate. Spatial control of the local elasticity of the substrate (eg, Young's modulus) allows for the creation of complex curved geometries. The lower left panel of Figure 20 illustrates one of the components for controlling the pressure in the housing volume 310 by introducing a gas into the chamber 310 or a syringe that removes gas from the chamber 310. The image on the right side of the figure is the different bending of the PDMS film in response to the increase in positive pressure. Any of the methods and apparatus for providing a curved interconnect on an elastomeric substrate can be used with such devices for transfer to a curved substrate.

圖21中概述用於在彎曲表面上產生彎曲或上推互連之另一構件。抵靠成形之表面澆鑄薄彈性體膜以產生具有至少一彎曲部分之彈性體基板。基板能夠延伸以使表面變平，從而使得基板能夠與彎曲及平坦表面相符。將互連施加至平坦印模，且在解除延伸力之後，基板表面即鬆弛回至彎曲幾何形狀，從而在互連中產生應變，藉由互連中央部分之上推而適應該應變。 Another component for creating a curved or push-up interconnect on a curved surface is outlined in FIG. A thin elastomeric film is cast against the shaped surface to create an elastomeric substrate having at least one curved portion. The substrate can be extended to flatten the surface so that the substrate can conform to curved and flat surfaces. The interconnect is applied to the flat stamp, and after the extension force is released, the substrate surface is relaxed back to the curved geometry, creating strain in the interconnect, which is accommodated by pushing the central portion over the interconnect.

圖22中提供由圖20所示之設備造成的彎曲矽陣列之"二維"延伸之實例。在此實例中，互連包含採取柵格組態之複數個彎曲互連連接，其中互連由290nm厚之Si製成。將最初為平坦之彎曲矽陣列(左上部影像)置放入外殼中，且施加正壓力以使陣列擴展為氣泡或氣球組態(例如，彎曲表面)。最右側影像中展示最大擴展，且隨後移除正壓力。類似於對於平坦基板之單軸延伸的結果，此"彎曲"延伸為可逆的。在最大化與彎曲表面之 保形接觸的擴展之任一階段，可藉由此項技術中已知之任何手段來將陣列轉移至彎曲表面。圖23展示藉由氣球印模而進行的至塗佈有黏著劑(彈性體基板或SU-8)之玻璃透鏡上之矽印刷之實例。透鏡可為凹入或凸起的。在此實例中，R分別等於19.62mm及9.33mm。 An example of a "two-dimensional" extension of an array of curved turns caused by the apparatus shown in Figure 20 is provided in Figure 22. In this example, the interconnect comprises a plurality of curved interconnect connections in a grid configuration, wherein the interconnects are made of 290 nm thick Si. An array of initially curved ridges (upper left image) is placed into the housing and a positive pressure is applied to expand the array into a bubble or balloon configuration (eg, a curved surface). The maximum expansion is shown in the far right image and the positive pressure is subsequently removed. This "bend" extends to be reversible similar to the result of uniaxial stretching of a flat substrate. In maximizing and curved surfaces At any stage of the expansion of the conformal contact, the array can be transferred to a curved surface by any means known in the art. Figure 23 shows an example of ruthenium printing onto a glass lens coated with an adhesive (elastomer substrate or SU-8) by a balloon impression. The lens can be concave or convex. In this example, R is equal to 19.62 mm and 9.33 mm, respectively.

實例1：半導體奈米織帶中之受控彎曲結構連同在可延伸電子元件中之應用實例 Example 1: Controlled Bending Structure in Semiconductor Nanowebs Together with Application Examples in Extensible Electronic Components

對半導體奈米結構之組成、形狀、空間位置及/或幾何組態之控制對於此等材料之幾乎所有應用均為重要的。雖然存在用於界定奈米線及奈米織帶之材料組成、直徑、長度及位置之方法，但存在相對較少用於控制其二維及三維(2D及3D)組態的方法。本文提供用於在奈米織帶中形成原本難以產生的特定類別之3D形狀之機械策略。此實例涉及對用以提供對黏著位點之空間控制之微影圖案化表面化學反應與用以誘發受到良好控制的局部移位之支撐基板之彈性變形的組合使用。可藉由力學分析模型而定量地描述以此方式及此等組態而產生於GaAs與Si之奈米織帶中的經精確設計之彎曲幾何形狀。作為一應用實例，特定結構提供至具有極高可延伸性水準(高達~100%)、可壓縮性水準(高達~25%)及可撓曲性水準(具有低至~5mm之曲率半徑)之電子元件的途徑。 Control of the composition, shape, spatial location, and/or geometric configuration of the semiconductor nanostructure is important for almost all applications of such materials. While there are methods for defining the material composition, diameter, length, and location of the nanowires and nanowebbing, there are relatively few methods for controlling their 2D and 3D (2D and 3D) configurations. This paper provides a mechanical strategy for forming a 3D shape of a particular class that would otherwise be difficult to produce in a nanoweb. This example relates to the combined use of a lithographic patterned surface chemical reaction to provide spatial control of the adhesion sites and an elastic deformation of the support substrate to induce a locally controlled local displacement. The precisely designed bending geometry resulting from the GaAs and Si nanotextiles in this manner and in these configurations can be quantitatively described by a mechanical analysis model. As an application example, specific structures are provided to have extremely high extensibility levels (up to ~100%), compressibility levels (up to ~25%), and flexibility levels (with curvature radii as low as ~5 mm). The path of electronic components.

對奈米織帶及奈米線之2維及3維組態在其生長期間加以控制以避免諸如捲曲、環狀及分支布局之特定幾何形狀，或在其生長之後加以控制以(作為實例)藉由將此等元件耦接至受到應變之彈性體支撐物而產生正弦波狀結構或藉由使用成層系統中的內建殘餘應力而產生管狀(或螺旋)結構。具有波狀幾何形狀之半導體奈米織帶受到關注，此部分因為其使得高效能可延伸 電子元件系統能夠用於潛在應用，諸如球面彎曲焦平面陣列、智慧型橡膠外科手套及適型結構保健監視器。電子設備自身可延伸之此方法與達成使用剛性設備島狀物連同可延伸金屬互連之此等相同應用之替代方法不同且可能為對其之補充。先前描述之波狀奈米織帶具有兩個主要劣勢：(i)其以由材料之模數及織帶之厚度所界定之固定週期及振幅以幾乎不提供對波紋的幾何形狀或相位之控制之方式而自發形成，及(ii)受到由此製程所導致的非最佳波狀幾何形狀之限制，其可適應之最大應變在20%至30%之範圍內。此處引入之程序使用微影界定之表面黏著位點連同支撐基板之彈性變形來達成彎曲組態(藉由對其幾何形狀之確定性控制)。週期性或非週期性設計對於該等結構之大規模、有組織陣列中的個別奈米織帶之任一選定集合為可能的。經設計以用於可延伸電子元件之專用幾何形狀致能高達接近150%之應變範圍(即使在諸如GaAs之脆性材料中)，此與力學分析模型一致且多達先前報告之結果的十倍。 The 2-dimensional and 3-dimensional configurations of the nanoribbon and nanowires are controlled during their growth to avoid specific geometries such as crimp, loop and branch layout, or controlled after their growth to (as an example) A tubular (or helical) structure is created by coupling the elements to a strained elastomeric support to produce a sinusoidal structure or by using built-in residual stresses in the layered system. Semiconductor nanowebbing with wavy geometry is of interest because of its high efficiency Electronic component systems can be used for potential applications such as spherically curved focal plane arrays, smart rubber surgical gloves, and conformable structural health monitors. This method in which the electronic device itself can be extended is different and may complement the alternative to the same application using rigid device islands along with extendable metal interconnects. The previously described wavy nanowebbing has two major disadvantages: (i) its fixed period and amplitude defined by the modulus of the material and the thickness of the webbing to provide little control over the geometry or phase of the corrugations. Spontaneously formed, and (ii) limited by the non-optimal wavy geometry resulting from the process, the maximum strain that can be accommodated is in the range of 20% to 30%. The procedure introduced herein uses a lithographically defined surface adhesion site along with the elastic deformation of the support substrate to achieve a curved configuration (by deterministic control of its geometry). Periodic or aperiodic design is possible for any selected set of individual nanoribbons in a large scale, organized array of such structures. The special geometry designed for extensible electronic components enables a strain range of up to 150% (even in brittle materials such as GaAs), which is consistent with the mechanical analysis model and up to ten times the previously reported results.

圖24展示此程序中之步驟。製造始於對遮罩之製備，該遮罩用於對聚二甲基矽氧烷(PDMS)之彈性體基板上的表面化學黏著位點進行圖案化。此過程涉及在稱作UVO遮罩的不常見類型之振幅光罩(經由步驟i製造)與PDMS保形接觸時經由該光罩而傳遞深紫外(UV)光(240-260nm)。UVO遮罩佔有透明區域中起伏之凹入特徵，使得向UV之曝露在接近PDMS之表面處產生臭氧之圖案化區。臭氧將以-CH3及-H端基支配之未改質疏水性表面轉換為以-OH及-O-Si-O-官能基終止的高度極性及反應性表面(亦即，活性表面)。未曝露之區保持未改質之表面化學(亦即，非活性表面)。此處引入之程序涉及於較大單軸預加應變(對於長度自L變為L+△L，εpre=△L/L)下在PDMS基板(厚度為~4mm)上 之曝露(步驟ii)。對於具有簡單週期性線條圖案之遮罩，吾人在步驟(i)中將圖24A之步驟(iii)中的活性條帶(指示為標有"活性表面"之線條)與非活性條帶之寬度(例如，鄰近活性條帶之間的距離)表示為Wact與Win。活性區可強烈且不可逆地結合至在表面上具有曝露之-OH或-Si-O基團的其他材料。如下文所概括，利用此等圖案化黏著位點以在奈米織帶中形成經清楚界定之3D幾何形狀。或者，藉由在互連與基板接觸之前對互連類似地進行圖案化而提供類似的黏著結合位點圖案。 Figure 24 shows the steps in this procedure. Fabrication begins with the preparation of a mask for patterning surface chemical adhesion sites on a polydimethyl methoxyalkane (PDMS) elastomeric substrate. This process involves the transmission of deep ultraviolet (UV) light (240-260 nm) through the reticle when an unusual type of amplitude reticle known as a UVO mask (made via step i) is in conformal contact with the PDMS. The UVO mask occupies a concave feature of the undulations in the transparent region such that exposure to UV produces a patterned region of ozone near the surface of the PDMS. Ozone will convert unmodified hydrophobic surface -H -CH 3 and is at the disposal of the end group -OH and -O-Si-O- terminated highly polar functional group and a reactive surface (i.e., surface active). The unexposed areas maintain unmodified surface chemistry (i.e., inactive surfaces). The procedure introduced here involves exposure to a larger uniaxial pre-strain (for lengths from L to L + ΔL, ε pre = ΔL/L) on a PDMS substrate (thickness ~ 4 mm) (step ii) . For a mask with a simple periodic line pattern, in step (i) we have the active strip (indicated as the line labeled "active surface") in step (iii) of Figure 24A and the width of the inactive strip. (eg, the distance between adjacent active strips) is expressed as W act and W in . The active region can bind strongly and irreversibly to other materials having exposed -OH or -Si-O groups on the surface. As outlined below, the patterned adhesion sites are utilized to form a clearly defined 3D geometry in the nanotextile. Alternatively, a similar adhesive bond site pattern is provided by similarly patterning the interconnect before the interconnect is in contact with the substrate.

在此實例中，奈米織帶由單晶Si及GaAs組成。藉由使用先前描述之程序(見Khang等人，Science 311,208-212(2006))而由絕緣體上矽(SOI)晶圓製備矽織帶。GaAs織帶包括藉由分子束磊晶法(molecular-beam epitaxy,MBE)在(100)SI-GaAs晶圓上形成的摻雜Si之n型GaAs(120nm；載體濃度為4×1017cm3)、半絕緣GaAs(SI-GaAs；150nm)及AlAs(200nm)之多層。藉由使用沿(0 1 1)結晶定向而光阻圖案化之線條作為蝕刻遮罩而在H3PO4及H2O2之水性蝕刻劑中化學蝕刻磊晶層，從而界定織帶。移除光阻劑且接著將晶圓浸泡於HF之乙醇溶液(乙醇與49%之水性HF的體積為2：1)中移除AlAs層，藉此釋放具有由光阻劑判定之寬度(對於圖24D中之實例為100μm)的GaAs(n-GaAs/SI-GaAs)之織帶。乙醇向HF溶液之添加減小易碎織帶歸因於乾燥期間之毛細管力之作用而破裂的機率。較低表面張力(與水相比)亦最小化GaAs織帶之空間布局中的乾燥誘發之無序。在最後步驟中，沈積較薄SiO2層(~30nm)以提供必要-Si-OH表面化學以供與PDMS之活性區域結合。 In this example, the nanowebbing consists of single crystal Si and GaAs. The webbing tape is prepared from a silicon-on-insulator (SOI) wafer by using the previously described procedure (see Khang et al., Science 311, 208-212 (2006)). The GaAs webbing includes Si-doped n-type GaAs (120 nm; carrier concentration of 4×10 17 cm 3 ) formed on a (100) SI-GaAs wafer by molecular-beam epitaxy (MBE). Multilayers of semi-insulating GaAs (SI-GaAs; 150 nm) and AlAs (200 nm). The ribbon is chemically etched in an aqueous etchant of H 3 PO 4 and H 2 O 2 by using a line patterned by photoresist along the (0 1 1) crystal orientation as an etch mask to define the webbing. The photoresist is removed and the wafer is then immersed in an ethanol solution of HF (2:1 volume of ethanol and 49% aqueous HF) to remove the AlAs layer, thereby releasing the width determined by the photoresist (for The example in Fig. 24D is a 100 μm) GaAs (n-GaAs/SI-GaAs) webbing. The addition of ethanol to the HF solution reduces the chance that the fragile web will rupture due to the capillary force during drying. The lower surface tension (compared to water) also minimizes the drying induced disorder in the spatial layout of the GaAs webbing. In the final step, a thinner SiO 2 layer (~30 nm) is deposited to provide the necessary -Si-OH surface chemistry for binding to the active region of PDMS.

抵靠經UVO處理、預延伸之PDMS基板(平行於預加應變之方向而定向之織帶)而層壓經處理之SOI或GaAs晶圓，將其在烘 箱中於90℃下烘焙數分鐘，且移除晶圓，從而將所有織帶轉移至PDMS的表面(步驟iv)。加熱促進Si織帶上之原生SiO2層或GaAs織帶上之沈積的SiO2層與PDMS之主動區之間的保形接觸及該兩者之間的強矽氧烷鍵(亦即，-O-Si-O-)之形成。相對較弱之凡得瓦爾力(Waals force)使織帶結合至PDMS之非活性表面區域。使PDMS中之應變鬆弛經由織帶與PDMS之非活性區域的實體分離而產生彎曲(步驟v)。歸因於強化學鍵結，織帶保持在活性區域中繫栓至PDMS。所得3D織帶幾何形狀(亦即，彎曲之空間變化的圖案)視預加應變之量值及表面活性之圖案(例如，Win及Wact之形狀及尺寸)而定。(可經由織帶上之圖案化結合位點而達成類似結果)。對於簡單線條圖案之情況，Win及預加應變判定彎曲之寬度及振幅。當Wact>100μm時，歸因於產生"波狀"矽之類型的機械不穩定性，在相同織帶中亦形成具有比彎曲小得多的波長及振幅之正弦波(見圖25，以不同Wact形成之樣本之影像)。作為製造之最後步驟，可藉由澆鑄並固化液態預聚物而將3D織帶結構囊封於PDMS中(見圖24步驟vi)。歸因於液體之低黏度及低表面能，其流動且填充形成於織帶與基板之間的間隙(見圖26)。 Laminating the treated SOI or GaAs wafer against a UVO treated, pre-stretched PDMS substrate (webbing oriented parallel to the direction of pre-strain), baking it in an oven at 90 ° C for a few minutes, and The wafer is removed to transfer all webbing to the surface of the PDMS (step iv). Strong heating acceleration siloxane bonds between the silica deposited on the primary web on the Si or GaAs layer SiO 2 SiO 2 layer webbing conformal contact between the active region and PDMS and the two (i.e., -O- Formation of Si-O-). The relatively weak Waals force binds the webbing to the inactive surface area of the PDMS. The strain relaxation in the PDMS is caused to separate by the separation of the webbing from the entity of the inactive area of the PDMS (step v). Due to the strong chemical bonding, the webbing remains tied to the PDMS in the active area. The resulting 3D geometry of the webbing (i.e., the bending of the spatially varying pattern) depends on the pre-strain magnitude and pattern of surfactants (e.g., W in and W act of shape and size) may be. (Similar results can be achieved via patterned binding sites on the webbing). For the case of a simple line pattern, W in and pre-strain determine the width and amplitude of the bend. When W act >100 μm, due to the mechanical instability of the type of "wavy" ,, a sine wave with a much smaller wavelength and amplitude than the bend is formed in the same webbing (see Figure 25, to be different). Image of a sample formed by W act ). As a final step in the manufacture, the 3D webbing structure can be encapsulated in PDMS by casting and curing the liquid prepolymer (see step vi in Figure 24). Due to the low viscosity and low surface energy of the liquid, it flows and fills the gap formed between the webbing and the substrate (see Figure 26).

圖24D展示PDMS上之彎曲GaAs織帶之斜視掃描電子顯微鏡(scanning electron microscope,SEM)影像，其中εpre=60%且Wact=10μm且Win=400μm。該影像顯示對於陣列中之所有織帶具有共有幾何形狀及空間相干相位之均勻週期性彎曲。將錨固點適當地對齊至微影界定之黏著位點。插圖展示結合區域之SEM影像；寬度為~10μm，其與Wact相一致。該等影像亦顯示PDMS之表面為平坦的，即使在結合位點處亦如此。與先前報告之強耦接之波狀結構大不相同的此行為提示，對於此處描述之 情況，PDMS誘發移位，但並不密切涉及於彎曲製程中(亦即，其模數不影響織帶之幾何形狀)。在此意義上，PDMS表示用於經由施加於黏著位點處之力而控制織帶的柔軟、非破壞性工具。 Figure 24D shows a squint scanning electron microscope (SEM) image of a curved GaAs webbing on a PDMS with ε pre = 60% and W act = 10 μm and W in = 400 μm. The image shows uniform periodic curvature with a common geometry and spatial coherence phase for all webbing in the array. The anchor points are properly aligned to the adhesion sites defined by the lithography. The inset shows the SEM image of the binding region; the width is ~10 μm, which is consistent with W act . These images also show that the surface of the PDMS is flat, even at the binding site. This behavioral behavior, which differs greatly from the previously reported strong coupling wavy structure, suggests that PDMS induces displacement in the case described here, but is not closely related to the bending process (ie, its modulus does not affect the ribbon) Geometric shape). In this sense, PDMS denotes a soft, non-destructive tool for controlling the webbing via the force applied to the adhesive site.

圖27A展示以不同εpre形成於PDMS上之彎曲織帶的側視光學顯微相片(Wact=10μm且Win=190μm)。彎曲之高度(例如，"振幅")隨著εpre而增加。非活性區域中之織帶在較低εpre處未充分分離(見以εpre=11.3%及25.5%而形成之樣本)。在較高εpre處，織帶(厚度h)與PDMS分離以形成具有由下式特徵化之豎直移位輪廓之彎曲： Figure 27A shows a side view optical micrograph of a curved webbing formed on a PDMS with different ε pre (W act = 10 μm and W in = 190 μm). The height of the bend (eg, "amplitude") increases with ε pre . The webbing in the inactive area is not sufficiently separated at the lower ε pre (see samples formed with ε pre = 11.3% and 25.5%). At a higher ε pre , the webbing (thickness h) is separated from the PDMS to form a bend with a vertically shifted profile characterized by:

其中： among them:

如藉由對均勻薄層中所形成之彎曲的非線性分析所判定，織帶中之最大拉伸應變近似為 As determined by nonlinear analysis of the bending formed in a uniform thin layer, the maximum tensile strain in the webbing is approximately

彎曲之寬度為2L1且週期為2L2。因為對於h<1μm，h2π2/(12L1 2)遠小於εpre(在此報告中亦即>10%)，所以振幅獨立於織帶之機械特性(例如，厚度、化學組成、楊氏模數等等)，且主要由黏著位點之布局及預加應變所判定。此結論提示如下方法之一般適用性：由任何材料製成之織帶均將形成類似彎曲幾何形狀。此預測與藉由此處所使用之Si與GaAs之織帶而獲得的結果相一致。在圖27A中繪製為虛線之對於33.7%及56.0%之預加應變而計算所得的輪廓與在GaAs織帶中的觀測結果良好地符合。另外，除了在低εpre處(表1及表2)，圖27A所示之彎曲之參數(包括週期、寬度及振幅)與分析計算相一致。此研究之一引起關注之結果在於織帶中之最大拉伸應變較小(例如，~1.2%)，即使對於較大εpre(例如，56.0%)亦如此。如隨後所論述，此定比致能可延伸性，即使對於諸如GaAs之脆性材料的情況亦如此。 The width of the bend is 2 L 1 and the period is 2 L 2 . Since h 2 π 2 /(12L 1 2 ) is much smaller than ε pre (also referred to as >10% in this report) for h<1 μm, the amplitude is independent of the mechanical properties of the webbing (eg thickness, chemical composition, Young's) Modulus, etc.), and is mainly determined by the layout of the adhesion sites and the pre-stress. This conclusion suggests a general applicability of a method in which a web of any material will form a similar curved geometry. This prediction is consistent with the results obtained by the webbing of Si and GaAs used herein. The profile calculated for the pre-stressed strain of 33.7% and 56.0% in Fig. 27A is in good agreement with the observations in the GaAs webbing. In addition, except for the low ε pre (Table 1 and Table 2), the parameters of the bend (including the period, width, and amplitude) shown in Fig. 27A are consistent with the analytical calculations. One of the concerns of this study is that the maximum tensile strain in the webbing is small (e.g., ~1.2%), even for larger ε pre (e.g., 56.0%). As discussed later, this ratio is capable of extensibility, even for the case of brittle materials such as GaAs.

微影界定之黏著位點可具有比與圖24中之結構相關聯之簡單格柵或柵格圖案複雜的幾何形狀。舉例而言，可在個別織帶中形成具有不同寬度及振幅之彎曲。作為實例，圖27B展示彎曲Si織帶(寬度及厚度分別為50μm及290nm)之SEM影像，該織帶以50%之預加應變及以Wact=15μm且Win沿織帶的長度等於350、300、250、250、300及350μm為特徵之黏著位點而形成。該影像清楚地展示織帶中之每一者中的鄰近彎曲之寬度及振幅之變化。彎曲織帶亦可以對於不同織帶之不同相位而形成。圖27C呈現以彎曲中隨垂直於織帶之長度的距離而線性變化之相位來設計的Si系統之實例。用於此樣本之UVO遮罩具有分別為15μm及250μm之Wact及Win。PDMS印模上之活性條帶與Si織帶之間的角度為30。歸因於對黏著位點之簡單微影控制而可易於達成許多其他可能性，且一些可能性展示於(例如)圖13至圖17中。 The lithographically defined adhesive sites may have a complex geometry than a simple grid or grid pattern associated with the structure of FIG. For example, bends having different widths and amplitudes can be formed in individual webbings. As an example, FIG. 27B shows an SEM image of a curved Si webbing (width and thickness of 50 μm and 290 nm, respectively) having a pre-strain of 50% and W act =15 μm and W in length of the webbing equal to 350,300. 250, 250, 300, and 350 μm are formed by the characteristic adhesion sites. The image clearly shows the change in width and amplitude of adjacent bends in each of the webbing. The curved webbing can also be formed for different phases of different webbings. Figure 27C presents an example of a Si system designed to have a phase that varies linearly with a distance perpendicular to the length of the webbing. The UVO mask used in this sample has W act and W in of 15 μm and 250 μm, respectively. The angle between the active strip on the PDMS stamp and the Si webbing is 30. Many other possibilities are readily attributable due to simple lithographic control of the adhesion sites, and some possibilities are shown, for example, in Figures 13-17.

具有εpre=60%、Wact=10μm及不同Win的PDMS上之彎曲GaAs織帶之簡單實例(如圖27D中所示)說明對於可延伸電子元件中的應用為重要之態樣。與對力學之分析解良好符合之輪廓展示在Win=100μm(及更小)時，歸因於GaAs中之破裂而導致的失效。失效係由超過GaAs之屈服點(~2%)的拉伸應變(在此情況下為~2.5%)所導致。因此可藉由選擇與εpre成比例之Win(»Wact)來達成對延伸及壓縮之強健性的最佳組態。在此情形中，可適應高達及大於100%之預加應變。吾人藉由向PDMS支撐物施加力而直接論證此類型之可延伸性。織帶之區段的端至端距離(Lprojected)之改變提供根據下式而量化可延伸性及可壓縮性之手段： 其中表示斷裂之前的最大/最小長度，且為鬆弛狀態下之長度。延伸及壓縮分別對應於大於及小於之。Wact=10μm且Win=400μm且εpre=60%的PDMS上之彎曲織帶顯示出60%之可延伸性(亦即εpre)及高達30%之可壓縮性。將織帶嵌入於PDMS中在機械上保護結構，且亦產生持續可逆回應，但在力學上存在微小改變。特定言之，可延伸性及可壓縮性分別減小至~51.4%(圖28A)與~18.7%(圖28B)。織帶頂部之PDMS基質部分歸因於下伏PDMS的固化誘發之收縮而使彎曲之峰微微變平。小週期波紋在較大壓縮應變下歸因於產生先前所述之波狀織帶結構之類型的自發力學而形成於此等區域中。如圖28B所說明，機械失效傾向於開始於此等區中，由此減小可壓縮性。Wact=10μm且Win=300μm之彎曲結構避免此類型之行為。雖然 該等實例顯示出比圖28A所示之實例稍低的可延伸性，但短週期波紋之缺少將可壓縮性增加至~26%。總體而言，形成於具有圖案化表面化學黏著位點之預延伸之PDMS基板上的具有彎曲之單晶GaAs奈米織帶顯示出高於50%之可延伸性及大於25%之可壓縮性，此對應於接近100%之滿標度應變範圍。此等數字藉由增加εpre及Win且藉由使用具有比PDMS高之伸長率的基板材料而得到進一步改良。對於更加精密之系統，亦可重複此等製造程序來產生具有多個彎曲織帶之層的樣本(見圖29)。 A simple example of a curved GaAs webbing on a PDMS having ε pre = 60%, W act = 10 μm, and different W in (as shown in Figure 27D) illustrates aspects that are important for applications in extendable electronic components. The profile that is in good agreement with the analytical solution to mechanics exhibits a failure due to cracking in GaAs at W in = 100 μm (and smaller). The failure is caused by a tensile strain (~2.5% in this case) that exceeds the yield point of GaAs (~2%). Therefore, the optimal configuration of the robustness of the extension and compression can be achieved by selecting W in (»W act ) proportional to ε pre . In this case, pre-stressed strains up to and greater than 100% can be accommodated. We directly demonstrate this type of extensibility by applying a force to the PDMS support. The change in the end-to-end distance (L projected ) of the webbing segment provides a means to quantify the extensibility and compressibility according to the following formula: among them Indicates the maximum/minimum length before breaking, and It is the length in the relaxed state. Extension and compression respectively correspond to greater than and less than It . The curved webbing on PDMS with W act = 10 μm and W in = 400 μm and ε pre = 60% showed 60% extensibility (i.e., ε pre ) and up to 30% compressibility. Embedding the webbing in the PDMS mechanically protects the structure and also produces a sustained reversible response, but with minor changes in mechanics. In particular, the extensibility and compressibility were reduced to ~51.4% (Fig. 28A) and ~18.7%, respectively (Fig. 28B). The PDMS matrix at the top of the webbing is partially flattened by the cure-induced shrinkage of the underlying PDMS. The small periodic corrugations are formed in these regions at a greater compressive strain due to the spontaneous mechanics of the type that produced the previously described undulating webbing structure. As illustrated in Figure 28B, mechanical failure tends to begin in such zones, thereby reducing compressibility. A curved structure with W act = 10 μm and W in = 300 μm avoids this type of behavior. While these examples show slightly lower extensibility than the example shown in Figure 28A, the lack of short period corrugations increases the compressibility to ~26%. In general, a curved single crystal GaAs nanoweb formed on a pre-stretched PDMS substrate having a patterned surface chemical adhesion site exhibits greater than 50% extensibility and greater than 25% compressibility, This corresponds to a full scale strain range approaching 100%. These numbers are further improved by increasing ε pre and W in and by using a substrate material having a higher elongation than PDMS. For more sophisticated systems, these manufacturing procedures can be repeated to produce a sample with multiple layers of curved webbing (see Figure 29).

此較大可延伸性/可壓縮性之直接結果為極大程度之機械可撓曲性。圖30A至圖30C呈現說明此特徵之撓曲組態的光學顯微相片。分別將PDMS基板(厚度為~4mm)撓曲為凹入(~5.7mm之半徑)、平坦及凸起(~6.1mm之半徑)的彎曲。該等影像說明輪廓如何改變以適應撓曲誘發之表面應變(對於此等情況為~20%至25%)。實際上，形狀類似於在壓縮(~20%)及張力(~20%)中所獲得之形狀。嵌入之系統歸因於中性機械平面效應而顯示出甚至更高水準之可撓曲性。當頂部與底部PDMS層具有類似厚度時，在撓曲期間不存在彎曲形狀上的改變(圖30D)。 The direct result of this greater extensibility/compressibility is a great degree of mechanical flexibility. Figures 30A through 30C present optical micrographs illustrating the flex configuration of this feature. The PDMS substrate (thickness ~4 mm) was flexed to a curvature of a concave (~5.7 mm radius), a flat and a convex (~6.1 mm radius). These images illustrate how the profile changes to accommodate deflection induced surface strain (~20% to 25% for these cases). In fact, the shape is similar to that obtained in compression (~20%) and tension (~20%). The embedded system exhibits an even higher level of flexibility due to the neutral mechanical plane effect. When the top and bottom PDMS layers have similar thicknesses, there is no change in curved shape during flexing (Fig. 30D).

為了論證功能電子設備中之此等機械特性，吾人使用具有類似於圖30所示之輪廓的輪廓之彎曲GaAs織帶，藉由將較薄金電極沈積至織帶之SI-GaAs側上以進行肖特基接觸(Schottky contact)而建立金屬-半導體-金屬光偵測器(MSM PD)。圖31A展示MSM PD在延伸~50%之前及之後的幾何形狀及等效電路及俯視光學顯微相片。在無光之情況下，幾乎無電流流過PD；電流隨著紅外光束(波長為~850nm)之增加的照射而增大(圖31B)。電流/電壓(I-V)之不對稱特徵可歸因於接觸點之電特性的差異。圖31C(延伸)及圖31D(壓縮)展示在不同程度之延伸及壓縮所量測 之I-V。電流在PD延伸高達44.4%時增大，且接著隨著進一步延伸而減小。因此光源之每單位面積的強度為恆定的，所以電流隨延伸之增大可歸因於彎曲GaAs織帶的投影面積(稱作有效面積，Seff)隨織帶變平之增大。使PD進一步延伸可能誘發GaAs織帶之表面上及/或晶格中的缺陷，其導致電流之減小且最終在斷裂時導致斷路。類似地，壓縮使Seff減小且因此使電流減小(圖31D)。此等結果指示，嵌入於PDMS基質中之彎曲GaAs織帶提供對於諸如耐磨監視器、彎曲成像陣列及其他設備之各種應用為有用的充分可延伸/可壓縮類型之光感應器。 In order to demonstrate such mechanical properties in functional electronic devices, we have used a curved GaAs webbing having a profile similar to that shown in Figure 30, by depositing a thinner gold electrode onto the SI-GaAs side of the webbing for SCHOTT A metal-semiconductor-metal photodetector (MSM PD) is established by a Schottky contact. Figure 31A shows the geometry and equivalent circuit and top view optical micrograph of the MSM PD before and after extending ~50%. In the absence of light, almost no current flows through the PD; the current increases with increasing illumination of the infrared beam (wavelength ~850 nm) (Fig. 31B). The asymmetry of the current/voltage (IV) can be attributed to the difference in electrical characteristics of the contact points. Figure 31C (extension) and Figure 31D (compression) show IV measured at different degrees of extension and compression. The current increases as the PD extends up to 44.4% and then decreases with further extension. Therefore, the intensity per unit area of the light source is constant, so the increase in current with extension can be attributed to the increased projected area of the curved GaAs webbing (referred to as effective area, S eff ) as the webbing is flattened. Further extension of the PD may induce defects on the surface of the GaAs webbing and/or in the crystal lattice, which results in a decrease in current and eventually leads to an open circuit upon breaking. Similarly, compression reduces S eff and thus reduces current (Figure 31D). These results indicate that a curved GaAs webbing embedded in a PDMS matrix provides a fully extensible/compressible type of light sensor useful for various applications such as wear resistant monitors, curved imaging arrays, and other devices.

總之，此實例指示，具有以微影方式界定之黏著位點之柔軟彈性體作為用於在半導體奈米織帶中形成特定類型之3維組態的工具為有用的。可延伸電子元件提供此等類型之結構的許多可能應用領域之一實例。簡單PD設備論證一些能力。對結構之高水準控制及將高溫處理步驟(例如，歐姆接觸之形成)與彎曲製程及PDMS分離之能力指示較為複雜之設備(例如，電晶體及較小電路薄片)為可能的。鄰近織帶中之彎曲的受到良好控制之相位提供電互連多個元件之機會。又，雖然此處報告之實驗使用GaAs與Si奈米織帶，但其他材料(例如，GaN、InP及其他半導體)及其他結構(例如，奈米線、奈米薄膜)與此方法相容。 In summary, this example indicates that a soft elastomer having a lithographically defined adhesive site is useful as a tool for forming a particular type of 3-dimensional configuration in a semiconductor nanoweb. Extensible electronic components provide an example of one of many possible fields of application for such types of structures. Simple PD devices demonstrate some capabilities. It is possible to have a high level of control of the structure and the ability to separate high temperature processing steps (eg, the formation of ohmic contacts) from the bending process and PDMS to indicate more complex equipment (eg, transistors and smaller circuit sheets). The well-controlled phase of the bend in the adjacent webbing provides the opportunity to electrically interconnect multiple components. Also, although the experiments reported herein use GaAs and Si nanowebbing, other materials (e.g., GaN, InP, and other semiconductors) and other structures (e.g., nanowires, nanofilms) are compatible with this process.

GaAs織帶之製造：具有定製磊晶層之GaAs晶圓(細節描述於本文中)係購自IQE Inc.,Bethlehem,PA。光微影及濕式化學蝕刻產生GaAs織帶。以5000rpm之速度將AZ光阻劑(例如AZ 5214)旋轉澆鑄於GaAs晶圓上歷時30秒，且接著於100℃下軟烘焙1分鐘。經由具有以沿GaAs之(011)結晶方向而定向之圖案化線的光罩之曝露繼之以顯影在光阻劑中產生線條圖案。溫和O2電漿(亦即，除渣製程)移除殘餘光阻劑。GaAs晶圓接著在蝕刻 劑(4mL H3PO4(85重量%)、52mL H2O2(30重量%)及48mL去離子水)中經各向異性蝕刻1分鐘，在冰水浴中經冷卻。以於乙醇中稀釋之HF溶液(Fisher® Chemicals)(在體積上為1：2)來溶解AlAs層。在通風櫃中使具有在母晶圓上之經釋放織帶的樣本乾燥。以藉由電子束蒸鍍沈積之30nm的SiO2來塗佈經乾燥之樣本。 Fabrication of GaAs Ribbon: GaAs wafers with custom epitaxial layers (details are described herein) are available from IQE Inc., Bethlehem, PA. Photolithography and wet chemical etching produce GaAs webbing. AZ photoresist (e.g., AZ 5214) was spin cast onto a GaAs wafer at 5000 rpm for 30 seconds and then soft baked at 100 °C for 1 minute. Exposure to a mask having patterned lines oriented in the (011) crystallographic direction of GaAs followed by development produces a line pattern in the photoresist. The mild O 2 plasma (ie, the desmearing process) removes residual photoresist. The GaAs wafer was then anisotropically etched for 1 minute in an etchant (4 mL H 3 PO 4 (85 wt%), 52 mL H 2 O 2 (30 wt%) and 48 mL deionized water) and cooled in an ice water bath. . The diluted HF solution in ethanol (Fisher ® Chemicals) (in a volume of 1: 2) to dissolve AlAs layers. The sample with the released webbing on the mother wafer is dried in a fume hood. The dried sample was coated with 30 nm of SiO 2 deposited by electron beam evaporation.

Si織帶之製造：由絕緣體上矽(SOI)晶圓(Soitect,Inc.，頂部矽290nm，內埋氧化物400nm，p型)來製造矽織帶。使用AZ 5214光阻劑藉由習知光微影法對晶圓進行圖案化，且藉由SF6電漿(PlasmaTherm RIE，SF6 40sccm，50毫托，100W)對其進行蝕刻。在以丙酮將光阻劑洗淨之後，接著在HF(49%)中蝕刻內埋氧化物層。 Fabrication of Si webbing: woven webbing was produced from a silicon-on-insulator (SOI) wafer (Soitect, Inc., top 矽 290 nm, buried oxide 400 nm, p-type). The wafer was patterned by conventional photolithography using an AZ 5214 photoresist and etched by SF6 plasma (Plasma Therm RIE, SF6 40 sccm, 50 mTorr, 100 W). After the photoresist was washed with acetone, the buried oxide layer was then etched in HF (49%).

UVO遮罩之製造：於食人魚溶液(piranha solution)中清洗熔融石英載片(於60℃)15分鐘且以充足的水對其進行徹底沖洗。藉由氮氣吹掃來乾燥經清洗之載片，且將其置放於電子束蒸鍍器之腔室中以藉由5nm之Ti(作為黏著層)及100nm之Au(對於UV光之遮罩層)的連續層而塗佈。以3000rpm之速度將負性光阻劑(亦即，SU8 5)旋轉澆鑄於載片上歷時30秒來產生~5μm厚之膜。軟烘焙、曝露於UV光、後烘焙及顯影在光阻劑中產生圖案。溫和O2電漿(亦即，除渣製程)移除殘餘光阻劑。光阻劑充當遮罩以分別藉由金蝕刻劑(亦即，I2與KI之水性溶液)及鈦蝕刻劑(亦即，HCl之稀釋溶液)來蝕刻Au與Ti。 Manufacture of UVO mask: The fused silica slide (at 60 ° C) was rinsed in a piranha solution for 15 minutes and thoroughly rinsed with sufficient water. The cleaned slide was dried by nitrogen purge and placed in the chamber of the electron beam vaporizer to pass 5 nm of Ti (as an adhesive layer) and 100 nm of Au (a mask for UV light) Coated with a continuous layer of layers). A negative photoresist (i.e., SU8 5) was spin cast onto the slide at 3000 rpm for 30 seconds to produce a ~5 μm thick film. Soft baking, exposure to UV light, post-baking and development create patterns in the photoresist. The mild O 2 plasma (ie, the desmearing process) removes residual photoresist. The photoresist acts as a mask to etch Au and Ti by a gold etchant (i.e., an aqueous solution of I 2 and KI) and a titanium etchant (i.e., a diluted solution of HCl), respectively.

PDMS印模之製造：藉由將預聚物(A：B=1：10，Sylgard 184，Dow Corning)傾注至皮氏培養皿中繼之以於65℃下烘焙4小時來製備具有~4mm之厚度的PDMS基板。自所得固化物件切割具有合適大小及矩形形狀之厚片且接著以異丙醇對其進行沖 洗且藉由氮氣吹掃使其乾燥。使用特別設計之台來將PDMS機械延伸至所要程度的應變。經由置放為與PDMS接觸之UVO遮罩使此等經延伸之基板受到短波長UV光(低壓汞燈，BHK，自240至260nm為173μW/cm2)的照射歷時5分鐘產生經圖案化之表面化學。 Fabrication of PDMS impressions: prepared by pre-polymerizing a prepolymer (A: B = 1:10, Sylgard 184, Dow Corning) into a Petri dish relay for 6 hours at 65 ° C. Thickness of PDMS substrate. A slab of suitable size and rectangular shape was cut from the resulting cured article and then rinsed with isopropyl alcohol and dried by nitrogen purge. A specially designed table is used to mechanically extend the PDMS to the desired degree of strain. The extended substrate was subjected to illumination by short-wavelength UV light (low pressure mercury lamp, BHK, 173 μW/cm 2 from 240 to 260 nm) over a period of 5 minutes via a UVO mask placed in contact with the PDMS to produce a patterned Surface chemistry.

彎曲GaAs織帶之形成及嵌入：相對於具有經圖案化之表面化學的延伸之PDMS層壓具有塗佈有SiO2之經釋放之織帶的GaAs晶圓。在烘箱中於90℃下烘焙5分鐘，在空氣中冷卻至室溫且接著緩慢鬆弛PDMS中之應變沿每一織帶產生彎曲。嵌入彎曲織帶涉及泛光曝露於UV光下5分鐘且接著將液態PDMS預聚物澆鑄至~4mm之厚度。將樣本在烘箱中於65℃下固化4小時或在室溫下固化36小時使得預聚物固化來使彎曲織帶嵌入於PDMS之固體基質中。 Formation and Embedding of Curved GaAs Ribbon: A GaAs wafer having a release coated web of SiO 2 relative to a PDMS laminate having a patterned surface chemistry extension. Bake in an oven at 90 ° C for 5 minutes, cool to room temperature in air and then slowly relax the strain in the PDMS to create a bend along each webbing. Embedding the curved webbing involves flood exposure to UV light for 5 minutes and then casting the liquid PDMS prepolymer to a thickness of ~4 mm. The samples were cured in an oven at 65 ° C for 4 hours or at room temperature for 36 hours to allow the prepolymer to cure to embed the curved webbing in the solid matrix of PDMS.

彎曲織帶之表徵：藉由使樣本傾斜~90°(對於非嵌入之樣本)或~30°(對於嵌入之樣本)而以光學顯微鏡對織帶進行成像。在以較薄金層(厚度為~5nm)塗佈樣本之後將SEM影像記錄於Philips XL30場發射掃描電子顯微鏡上。使用用於預延伸PDMS印模之同一台來延伸及壓縮所得樣本。 Characterization of the curved webbing: The webbing is imaged by an optical microscope by tilting the sample to ~90° (for non-embedded samples) or ~30° (for embedded samples). SEM images were recorded on a Philips XL30 field emission scanning electron microscope after coating the samples with a thinner gold layer (thickness ~ 5 nm). The resulting sample was extended and compressed using the same set used to pre-extend the PDMS impression.

SMS PD之製造及表徵：PD之製造始於採取圖24B之底部圖框中所示之組態的樣本。輕柔地將~0.8mm寬之聚對苯二甲酸乙二酯(PET)薄片的條帶置放於PDMS上，其中條帶之縱軸與織帶之縱軸垂直。此條帶充當對於30nm厚之金膜之電子束蒸鍍(以形成肖特基電極)的蔽蔭遮罩。移除PET條帶且鬆弛預延伸之PDMS印模形成建有彎曲GaAs織帶之SMS PD。將液態PDMS預聚物澆鑄至織帶之無電極的區域上，且接著於烘箱中固化。金電極延伸越過頂部PDMS以致能藉由半導體參數分析器而進行之 探測。(Agilent 4155C)。在對光回應之量測中，藉由使用用於延伸及壓縮之機械台來控制PD。IR LED源(具有850nm之波長)提供照射。 Fabrication and Characterization of SMS PD: The fabrication of PD begins with the configuration of the sample shown in the bottom panel of Figure 24B. A strip of ~0.8 mm wide polyethylene terephthalate (PET) flakes was gently placed on the PDMS with the longitudinal axis of the strip perpendicular to the longitudinal axis of the webbing. This strip acts as a shadow mask for electron beam evaporation (to form a Schottky electrode) for a 30 nm thick gold film. The PET strip was removed and the relaxed pre-stretched PDMS stamp formed an SMS PD with a curved GaAs web. The liquid PDMS prepolymer was cast onto the electrodeless region of the webbing and then cured in an oven. The gold electrode extends across the top PDMS to enable it to be performed by a semiconductor parameter analyzer probe. (Agilent 4155C). In the measurement of the response to light, the PD is controlled by using a mechanical table for extension and compression. The IR LED source (having a wavelength of 850 nm) provides illumination.

實例2：轉印：吾人之技術方法使用體現於先前描述之基於平坦印模的印刷方法中之某些思想。雖然此等基本技術提供有前途之起點，但如下文所述，必須引入許多根本上的新特徵來滿足用於成像之半球陣列偵測器(Hemispherical Array Detector for Imaging,HARDI)系統之挑戰。 Example 2: Transfer: Our technical approach uses some of the ideas embodied in the previously described flat impression based printing methods. While these basic techniques provide a promising starting point, as described below, many fundamental new features must be introduced to meet the challenges of Hemispherical Array Detector for Imaging (HARDI) systems for imaging.

圖32及圖33說明與向彎曲表面之轉印相關之總策略。步驟之第一集合(圖32)涉及經設計以將互連之Si CMOS"小晶片(chiplet)"自晶圓之平坦表面起離且接著將幾何形狀變換為半球形狀之較薄球面彎曲彈性體印模的製造及控制。藉由抵靠經選擇具有所要曲率半徑之高品質光學元件(亦即，凸透鏡與凹透鏡之配對)澆鑄並固化液態預聚物以獲得諸如聚二甲基矽氧烷(PDMS)之彈性體而形成用於此製程之印模。印模具有模製之圓形輪緣。藉由使此輪緣上之模製槽(圖32中之虛線圓)配合至適當大小之剛性圓形固持環而徑向延伸此元件將此球形印模變換為延伸之平坦薄片。使此延伸之印模與支撐具有較薄互連之預成型且經底切蝕刻之Si CMOS"小晶片"的母晶圓接觸且接著剝離該印模以此等互連之"小晶片"對此元件"塗墨"。小晶片與柔軟彈性體元件之間的凡得瓦爾相互作用(Van der Waals interaction)對此製程提供充分黏著。 Figures 32 and 33 illustrate the overall strategy associated with transfer to a curved surface. The first set of steps (Fig. 32) relates to a thinner spherically curved elastomer designed to detach an interconnected Si CMOS "chiplet" from the flat surface of the wafer and then transform the geometry into a hemispherical shape Manufacturing and control of impressions. Formed by casting and curing a liquid prepolymer against a high quality optical element having a desired radius of curvature (ie, a pair of convex and concave lenses) to obtain an elastomer such as polydimethyl siloxane (PDMS) The stamp used for this process. The stamp has a molded round rim. This spherical element is transformed into an extended flat sheet by mating the molding groove (the dotted circle in Fig. 32) on the rim to a suitably sized rigid circular holding ring. Contacting the extended stamp with a mother wafer that supports a thinner interconnected preformed and undercut etched Si CMOS "small wafer" and then stripping the stamp to interconnect such "small wafer" pairs This component is "painted". The Van der Waals interaction between the small wafer and the soft elastomeric element provides sufficient adhesion to the process.

移除固持環使得PDMS鬆弛回其初始半球形狀，藉此實現小晶片陣列的平坦至球形之變換。此變換誘發印模之表面處的壓縮應變。藉由互連之局部分層及提昇而在CMOS小晶片陣列中適 應此等應變(圖32之左下部)。此等"上推"互連以避免對小晶片之損害及其電特性之有害的應變誘發之改變之方式來吸收應變。將小晶片中之應變保持於~0.1%以下實現此等兩個目標。互連所需之空間限制CMOS小晶片之最大填充因數。然而，光偵測器消耗幾乎全部像素面積，由此提供達到80%之填充因數目標的簡單途徑。 Removing the retaining ring causes the PDMS to relax back to its original hemispherical shape, thereby enabling a flat to spherical transition of the small wafer array. This transformation induces compressive strain at the surface of the stamp. Suitable for CMOS small wafer arrays by local layering and enhancement of interconnects This strain should be applied (lower left in Figure 32). These "push up" interconnections absorb strain in a manner that avoids damage to the small wafer and its harmful strain-induced changes in electrical characteristics. Keeping the strain in the small wafer below ~0.1% achieves these two goals. The space required for the interconnect limits the maximum fill factor of the CMOS small chip. However, photodetectors consume almost all of the pixel area, thereby providing an easy way to achieve an 80% fill factor goal.

在步驟之第二集合(圖33)中，使用經"塗墨"之半球印模來將此等元件轉印至具有匹配形狀之空腔的最終設備基板(例如，在此實例中為具有匹配半球狀空腔之玻璃基板)上。此轉移製程使用諸如光可固化BCB(Dow Chemical)或聚胺基甲酸酯(Norland Optical Adhesive)之紫外(UV)固化光聚合物作為黏著劑。將此等材料以薄(數十微米厚)液態膜之形式塗覆至設備基板。在與印模接觸之後，此液態層即流動以符合與小晶片及上推互連相關聯之起伏結構。穿過透明基板之UV光使光聚合物固化且將其變換為固體形式以在移除印模之後即產生平滑、平面化之頂部表面。用以形成功能系統之最終整合涉及電極及光偵測器材料之沈積及圖案化，及匯流排線至外部控制電路之微影界定。 In a second set of steps (Fig. 33), an "inked" hemispherical impression is used to transfer the elements to a final device substrate having a matching shaped cavity (e.g., in this example with a match) On the glass substrate of the hemispherical cavity). This transfer process uses an ultraviolet (UV) curing photopolymer such as photocurable BCB (Dow Chemical) or Norland Optical Adhesive as an adhesive. These materials are applied to the device substrate in the form of a thin (tens of microns thick) liquid film. After contact with the stamp, the liquid layer flows to conform to the relief structure associated with the small wafer and the push-up interconnect. The UV light passing through the transparent substrate cures the photopolymer and transforms it into a solid form to produce a smooth, planarized top surface after removal of the stamp. The final integration used to form the functional system involves the deposition and patterning of the electrodes and photodetector materials, and the lithography of the busbars to the external control circuitry.

圖32及圖33之方法具有若干顯著特徵。第一，其利用最新平面電子技術來致能對半球基板之可靠、節省成本及高效能的操作。特定言之，小晶片由以0.13μm之設計規則加以處理之矽電晶體之集合組成來得到HARDI系統之局部像素級處理能力。使用習知處理連同絕緣體上矽晶圓以形成此等設備。內埋氧化物提供犧牲層(藉由HF而進行底切蝕刻)來製備用於印刷之小晶片。互連由窄且薄(~100nm)之金屬線組成。 The methods of Figures 32 and 33 have several salient features. First, it utilizes the latest planar electronics technology to enable reliable, cost-effective and efficient operation of hemispherical substrates. In particular, the small wafer consists of a collection of germanium transistors processed with a design rule of 0.13 μm to obtain local pixel-level processing capabilities of the HARDI system. Conventional processing is used in conjunction with a silicon germanium wafer to form such devices. The buried oxide provides a sacrificial layer (undercut etching by HF) to prepare a small wafer for printing. The interconnect consists of a narrow and thin (~100 nm) metal line.

第二特徵在於該方法使用彈性體元件及機械設計以致能平面向半球之受到良好控制的變換。轉移印模及綜合機械模型化 中之可逆線性力學如隨後所概括而實現此控制。第三個有吸引力之態樣在於，轉移製程及策略之用以控制黏著之某些基本組件在平面應用中已得到論證。實際上，已經設計以用於彼等平面印刷應用之台可經調適以用於圖32及圖33之製程。圖34展示適用於此製程中的具有整合式視覺系統及氣壓致動器之自製印刷器。 A second feature is that the method uses elastomeric elements and mechanical design to enable a well-controlled transformation of the planar hemisphere. Transfer impression and integrated mechanical modeling The reversible linear mechanics in this are implemented as outlined later. The third attractive aspect is that some of the basic components of the transfer process and strategy used to control adhesion have been demonstrated in planar applications. In fact, stations that have been designed for use in their planar printing applications can be adapted for use in the processes of Figures 32 and 33. Figure 34 shows a home-made printer with an integrated vision system and a pneumatic actuator suitable for use in this process.

使用此等類型之印刷器系統來論證圖32及圖33之製程的若干態樣。圖35展示以單晶矽島狀物之陣列而"塗墨"之半球印模之表面的掃描電子顯微相片影像，該等單晶矽島狀物在正方陣列中藉由重摻雜之矽織帶而互連。圖36展示光學影像。在平面至球形之變換期間，此等織帶互連以圖32中所描繪之方式上推。此等類型之互連之關鍵態樣在於，當與完全成形之小晶片的轉移組合時，其減小對於高解析度彎曲表面微影或直接對半球進行之其他形式之處理的需要。 A number of aspects of the process of Figures 32 and 33 are demonstrated using these types of printer systems. Figure 35 shows a scanning electron micrograph of the surface of a hemispherical impression of an "ink-coated" array of single-crystal iridium islands, which are heavily doped in a square array. Ribbon and interconnect. Figure 36 shows an optical image. During web-to-spherical transitions, these webbing interconnections are pushed up in the manner depicted in FIG. A key aspect of these types of interconnects is the need to reduce the need for high resolution curved surface lithography or other forms of direct hemispherical processing when combined with the transfer of fully formed small wafers.

除了材料及總處理策略以外，執行對半球印模、上推互連及與剛性設備島狀物之相互作用的彈性機械回應之全計算模型化。此等計算以促進設計控制及最佳化之水準顯示製程之物理現象。基於線性彈性板理論之簡單估計暗示與圖32之製程相關聯的應變水準對於2mm厚之印模及半徑為1cm之球面可達到10%或更高。因此，為了可靠設計控制，對於高達此值之兩倍(亦即，~20%)的應變在線性彈性狀態中操作印模為必要的。圖37展示PDMS之若干變體之實驗應力/應變曲線，關於該等變體，吾人在基於塊狀平坦印模之印刷的水準上具有經驗。184-PDMS看來似乎提供良好初始材料，因為其提供高達~40%之應變的高線性及彈性回應。 In addition to materials and overall processing strategies, full computational modeling of elastic mechanical responses to hemispherical impressions, push-up interconnections, and interactions with rigid equipment islands is performed. These calculations promote the physical phenomena of the process of design control and optimization. A simple estimate based on the linear elastic plate theory implies that the strain level associated with the process of Figure 32 can be 10% or more for a 2 mm thick stamp and a 1 cm radius spherical surface. Therefore, for reliable design control, it is necessary to operate the stamp in a linear elastic state for strains up to twice this value (i.e., ~20%). Figure 37 shows experimental stress/strain curves for several variations of PDMS with respect to which we have experience in the level of printing based on block-like flat impressions. The 184-PDMS appears to provide a good starting material because it provides a high linearity and elastic response with strains up to ~40%.

諸如此等之機械量測連同關於小晶片及織帶上推互連之模 數及幾何形狀的文獻值提供對於模型化為必要之資訊。採用兩種計算方法。第一者為滿標度有限元模型化(finite element modeling,FEM)，在其中分析平坦基板上之設備及互連幾何形狀(例如，大小、間距、多層)的細節。在分析中直接考慮不同材料(例如，印模、矽、互連)。外加側向壓力以使印模及電路變形為所要球形形狀。有限元分析給出應變分布(尤其是設備及互連中之最大應變)及經變換之設備之間的不均勻間距。該方法之優勢在於其俘獲設備幾何形狀及材料之所有細節，且因此可用以探察轉印製程之不同設計的效果以減小最大應變及不均勻性。然而，此方法為計算密集的且因此耗費時間，因為其涉及較廣範圍之長度標度及對印模上之大量結構設備之模型化。 Mechanical measurements such as these, together with the simulation of small wafers and webbing push-up interconnects The literature values for numbers and geometries provide the information necessary for modeling. Two calculation methods are used. The first is finite element modeling (FEM), in which the details of the device and interconnect geometry (eg, size, spacing, multilayer) on a flat substrate are analyzed. Different materials (eg, stamps, defects, interconnects) are directly considered in the analysis. Additional lateral pressure is applied to deform the stamp and circuit into the desired spherical shape. Finite element analysis gives the strain distribution (especially the maximum strain in the equipment and interconnects) and the uneven spacing between the transformed devices. The advantage of this method is that it captures all the details of the device geometry and material, and thus can be used to explore the effects of different designs of the transfer process to reduce maximum strain and non-uniformity. However, this method is computationally intensive and therefore time consuming because it involves a wide range of length scales and modeling of a large number of structural devices on the stamp.

第二種方法為設備(小晶片)之單胞模型，該模型分析該等設備在負載情況下之機械效能。每一設備藉由一單胞表示，且其在機械負載下之回應(例如，撓曲及張力)經由有限元方法而得到徹底研究。接著藉由以互連連接之單胞來替代每一設備。接著將此單胞模型併入至有限元分析中以替代對設備及互連之詳細模型化。此外，在遠離球面之邊緣處，應變相對均勻以使得許多單胞可經整合且其效能可由粗略水準之模型表示。在接近球面邊緣處，應變高度不均勻，使得對設備之詳細模型化仍為必要的。該方法之優勢在於其顯著減少計算量。使用第一種方法中之滿標度有限元模型化來驗證此單胞模型。一旦經驗證，單胞模型即提供強有力之設計工具，因為其適用於對設備、互連及其間距的不同設計之快速探察。 The second method is the unit cell model of the device (small wafer), which analyzes the mechanical performance of the devices under load. Each device is represented by a unit cell and its response under mechanical loading (eg, deflection and tension) is thoroughly investigated by finite element methods. Each device is then replaced by a unit cell connected by an interconnect. This unit cell model is then incorporated into the finite element analysis to replace the detailed modeling of the device and interconnect. Moreover, at the edge away from the sphere, the strain is relatively uniform so that many unit cells can be integrated and their performance can be represented by a roughly level model. At near the edge of the sphere, the strain height is not uniform, making detailed modeling of the equipment still necessary. The advantage of this method is that it significantly reduces the amount of calculation. The unit cell model was validated using the full scale finite element modeling in the first method. Once validated, the unit cell model provides a powerful design tool because it is suitable for rapid exploration of different designs of devices, interconnects, and their spacing.

圖38呈現關於如圖32所概括，將半球印模延伸為平坦幾何形狀(且將其鬆弛回至其半球形狀)的初步FEM結果。頂部圖框展示具有如同圖32中所示意性說明之幾何形狀的幾何形狀之半球 印模之橫截面圖。此等結果展示延伸薄膜之應變中的如由其不均勻厚度所顯見之微小空間不均勻性。經由適當選擇藉由澆鑄及固化而形成印模時所抵靠之結構來對印模之厚度輪廓進行涉及可消除此等不均勻性。然而，值得注意的是，一些不均勻應變為可接受的，因為(i)上推互連固有地容許扭曲，且(ii)小晶片無需在每一像素位置處完全居中；較大光偵測器將以均勻背面電極填充像素區，該背面電極可獨立於小晶片在像素區內的位置而建立至其之電接觸。 Figure 38 presents preliminary FEM results for extending the hemispherical impression to a flat geometry (and relaxing it back to its hemispherical shape) as summarized in Figure 32. The top frame shows the hemisphere of the geometry having the geometry as illustrated in Figure 32. A cross-sectional view of the stamp. These results show the small spatial inhomogeneities in the strain of the stretched film as seen by its uneven thickness. The non-uniformity can be eliminated by appropriately selecting the thickness profile of the stamp by properly selecting the structure against which the stamp is formed by casting and curing. However, it is worth noting that some uneven strain is acceptable because (i) the push-up interconnect inherently allows for distortion, and (ii) the small wafer does not need to be fully centered at each pixel location; The device will fill the pixel region with a uniform back electrode that can establish electrical contact thereto independently of the location of the small wafer within the pixel region.

模型化亦可判定Si CMOS小晶片中應變之水準。系統應經設計以將此等小晶片應變保持於~0.1%至0.2%以下來避免電特性之改變及(可能地)歸因於斷裂或分層之機械失效。此模型化促進對印模及處理條件之設計以避免小晶片曝露於在此範圍以上的應變。 Modeling can also determine the level of strain in Si CMOS small wafers. The system should be designed to maintain strain on these small wafers below ~0.1% to 0.2% to avoid changes in electrical characteristics and (possibly) mechanical failure due to fracture or delamination. This modeling facilitates the design of the stamp and processing conditions to avoid exposure of the small wafer to strains above this range.

實例3：雙軸可延伸"波狀"矽奈米薄膜 Example 3: Two-axis extendable "wavy" 矽 nano film

此實例引入雙軸可延伸形式之單晶矽，其由彈性體支撐物上之二維彎曲或"波狀"矽奈米薄膜組成。描述用於此等結構之製造程序，且呈現該等結構之幾何形狀之各種態樣及對於沿各個方向之單軸及雙軸應變的回應。此等系統之力學分析模型提供用於定量理解該等系統之行為之構架。此等類別之材料提供得到具有充分的二維可延伸性之高效能電子元件之途徑。 This example introduces a biaxially extensible form of single crystal tantalum consisting of a two dimensional curved or "wavy" tantalum film on an elastomeric support. The manufacturing procedures for such structures are described, and various aspects of the geometry of the structures and responses to uniaxial and biaxial strains in various directions are presented. The mechanical analysis models of these systems provide a framework for quantitative understanding of the behavior of such systems. Materials of these categories provide access to high performance electronic components with sufficient two-dimensional extensibility.

提供機械可撓曲性之電子元件對於資訊顯示器、X射線成像光伏打設備及其他系統中之應用為所關注的。可逆可延伸性為一不同且更具技術挑戰性之機械特徵，其將致能無法藉由諸如智慧型外科手套、電子眼攝影機及個人保健監視器之僅可撓曲之電子元件實現的設備可能性。在得到此類型之電子元件之一方法中，可延伸導線使剛性設備島狀物互連以對於不可延伸之 設備組件提供電路級可延伸性。在替代策略中，某些結構形式之薄單晶半導體及其他電子材料允許設備自身之可延伸性。近來之論證涉及在矽及砷化鎵之奈米織帶(厚度在數十與數百奈米之間且寬度在微米範圍內)中使用彎曲一維"波狀"幾何形狀以在金屬氧化物半導體場效電晶體(MOSFET)、金屬半導體場效電晶體(MESFET)、pn接合二極體及肖特基電極中達成單軸可延伸性。此實例展示類似材料之奈米薄膜可成形為二維(2D)波狀幾何形狀以提供充分的2D可延伸性。描述該等系統之製造程序連同對該等系統之機械回應的詳細實驗表徵及分析模型化。 Electronic components that provide mechanical flexibility are of interest for applications in information displays, X-ray imaging photovoltaic devices, and other systems. Reversible extensibility is a different and more technically challenging mechanical feature that will enable device possibilities that cannot be achieved by flexible electronic components such as smart surgical gloves, electronic eye cameras, and personal care monitors. . In one method of obtaining electronic components of this type, the extendable wires interconnect the rigid device islands for non-extendable Device components provide circuit level extensibility. In alternative strategies, certain structural forms of thin single crystal semiconductors and other electronic materials allow for the extensibility of the device itself. Recent arguments have involved the use of curved one-dimensional "wavy" geometries in metal oxide semiconductors in nanobelt ribbons of tantalum and gallium arsenide (thickness between tens and hundreds of nanometers and widths in the micrometer range) Uniaxial extensibility is achieved in field effect transistor (MOSFET), metal semiconductor field effect transistor (MESFET), pn junction diode, and Schottky electrode. This example demonstrates that a nano film of similar material can be formed into a two-dimensional (2D) wavy geometry to provide sufficient 2D extensibility. Describe the manufacturing procedures of these systems along with detailed experimental characterization and analytical modeling of the mechanical responses to the systems.

圖39示意性地說明用於在彈性體支撐物上形成二維可延伸Si奈米薄膜之步驟。對於此實例，由絕緣體上矽(SOI)晶圓(Soitec,Inc.，p型)製造此等薄膜，其始於藉由以光微影界定光阻劑之合適圖案且接著以反應性離子蝕刻(Plasma Therm RIE，SF6 40sccm，50毫托，100W)移除曝露之矽而形成頂部矽中之孔洞(~2.5μm之直徑及-25μm之間距)之正方陣列。此相同步驟界定薄膜之整體橫向尺寸，該尺寸對於此處報告之樣本處於3-5平方毫米之範圍內。厚度處於55nm與320nm之間。將經蝕刻之樣本浸沒於濃縮氫氟酸(HF 49%)中移除SiO2內埋層(145至1000nm厚)；在丙酮中清洗移除光阻劑。抵靠經研磨之矽晶圓澆鑄並固化聚二甲基矽氧烷(PDMS)之預聚物產生平坦彈性體基板(~4mm厚)。曝露於藉由強烈紫外光(240-260nm)形成之臭氧環境中5分鐘將疏水性PDMS表面(-CH3及-H端基)轉換為親水性狀態(-OH及-O-Si-O端基)。在對流烘箱中於70至180℃下暫時加熱該活性PDMS基板誘發受控程度之各向同性熱膨脹。使此元件與經處理之SOI晶圓接觸且接著再次將其剝離將整個奈米薄膜轉移至PDMS。對流烘箱中歷時數分鐘之繼續加熱促進薄膜與PDMS之 間強黏著結合之形成。在最後步驟中，將奈米薄膜/PDMS結構i冷卻至室溫(約25℃)以釋放熱誘發之預加應變(△L/L)。此製程導致Si奈米薄膜及PDMS之附近表面區域中的二維(2D)波狀結構之起伏之自發形成。此等結構在一維週期性波起主要作用之接近邊緣處、通常觀測到二維魚骨狀布局之內部區域中及無序魚骨狀結構經常發生的接近中央處顯示出不同狀態。魚骨狀區域以波紋中鄰近峰之間的距離(吾人稱作短波長λ)、波紋之振幅A1(圖1中未展示)及與魚骨狀結構中之鄰近"凹凸"之間的間隔相關聯之較長距離2 π/k2(沿X2方向)(吾人稱作長波長)為特徵。其他特徵長度為"凹凸"波長2 π/k1(沿x1方向，與長波長方向x2垂直)、凹凸之振幅A2、凹凸角θ。圖39之底部圖框示意性地說明此等特徵。 Figure 39 schematically illustrates the steps for forming a two-dimensional extensible Si nanofilm on an elastomeric support. For this example, such films are fabricated from silicon-on-insulator (SOI) wafers (Soitec, Inc., p-type) starting with a suitable pattern of photoresist defined by photolithography followed by reactive ion etching (Plasma Therm RIE, SF 6 40 sccm, 50 mTorr, 100 W) The square of the holes in the top crucible (~2.5 μm diameter and -25 μm spacing) was removed after exposure. This same step defines the overall lateral dimension of the film, which is in the range of 3-5 square millimeters for the sample reported herein. The thickness is between 55 nm and 320 nm. The etched sample was immersed in concentrated hydrofluoric acid (HF 49%) to remove the buried layer of SiO 2 (145 to 1000 nm thick); the photoresist was removed by washing in acetone. A pre-polymer of polydimethylsiloxane (PDMS) was cast and cured against a ground silicon wafer to produce a flat elastomeric substrate (~4 mm thick). Exposure to hydrophobic PDMS surface (-CH 3 and -H end groups) to a hydrophilic state (-OH and -O-Si-O ends) exposed to an ozone environment formed by intense ultraviolet light (240-260 nm) for 5 minutes base). Temporarily heating the active PDMS substrate at 70 to 180 ° C in a convection oven induced a controlled degree of isotropic thermal expansion. This element was brought into contact with the treated SOI wafer and then peeled off again to transfer the entire nanofilm to PDMS. Continued heating in the convection oven for a few minutes promotes the formation of a strong bond between the film and the PDMS. In the final step, the nanofilm/PDMS structure i was cooled to room temperature (about 25 ° C) to release the heat-induced pre-strain (ΔL/L). This process results in the spontaneous formation of undulations of two-dimensional (2D) wavy structures in the vicinity of the surface area of the Si nanofilm and PDMS. These structures show different states near the edge where the one-dimensional periodic wave plays a major role, the inner region where the two-dimensional fishbone-like layout is usually observed, and the near center where the disordered fishbone structure often occurs. Fishbone-like region the distance between adjacent corrugation peak (I referred to a short wavelength λ), the amplitude of the corrugations (not shown in FIG. 1) A 1 and the spacing between the fish-bone structure adjacent to the "irregularities" related The longer distance 2 π/k 2 (in the X 2 direction) (which I call the long wavelength) is characteristic. The other characteristic lengths are "concave" wavelength 2 π/k 1 (in the x 1 direction, perpendicular to the long wavelength direction x 2 ), the amplitude A 2 of the concavities and convexities, and the concave and convex angle θ. The bottom panel of Figure 39 schematically illustrates these features.

圖40之部分a-f展示對於具有100nm之厚度(約4×4mm2之橫向尺寸)及~3.8%之熱預加應變(藉由加熱至150℃而界定)的奈米薄膜，於魚骨狀波紋之形成期間之不同階段收集的光學顯微相片。此等影像指示兩階段之結構形成，該等階段中之第一者涉及在較大區上起主要作用之一維波紋繼之以撓曲此等波紋結構以最終在完全冷卻時形成緊密魚骨狀布局(圖40 d-f)。圖40h展示兩個特徵波長之時間演進。短波長傾向於隨著冷卻導致矽上的逐漸較大之壓縮應變(歸因於PDMS之相對較大之熱收縮)而減小。特定言之，此值自初始階段中之17至18μm降至魚骨狀結構變得突出時之~14.7μm，且最終在完全冷卻之狀態下降至~12.7μm。此波長在較大區上為均勻的(~5%之變化)。相反地，如自圖40g中之影像所顯而易見的，與魚骨狀布局相關聯之長波長顯示出寬廣範圍之值。在跨越此樣本之~100個點處之量測得到值之分布，其概述於圖40g之直方圖中。可由面外位移 w=A1cos[k1x1+k1A2cos(k2x2)]表示魚骨狀結構(圖49)。此處，係數：波紋之振幅A1、長波長2 π/k2、凹凸波長2 π/k1及凹凸之振幅A2藉由對特定薄膜厚度、膜的機械特性及基板之分析而判定。短波長λ為(2 π/k1)sin(θ/2)。模型化使用如由量測而得之等同長度及波狀結構之週期而判定的Si應變替代熱預加應變來作為施加之預加應變(圖50)。使Si變形之實際應變可能歸因於Si於PDMS上之負載效應而通常稍小於估計之熱預加應變。舉例而言，Si應變在3.8%之熱預加應變下為2.4%。對於該位移w，Si膜中之應力、應變及位移場可在A1、k1、A2及k2之方面自馮卡門板理論(Von Karman plate theory)獲得。自3D彈性理論獲得PDMS基板中之場。最小化由Si膜中之薄膜能量及撓曲能量及PDMS基板中之彈性能量組成之總能量給出A1、k1、A2及k2。Si及PDMS之楊氏模數及柏松比為ESi=130GPa、vSi=0.27、EPDMS=1.8MPa且vPDMS=0.5。實驗與模型均給出凹凸角θ為約90°。理論給出之短波長在2.4%之雙軸預加應變下為12.4μm，此與以上之實驗結果良好地符合。長波長2 π/k2之較大變化亦由理論計算所預測到，其為30至60μm。 Part af of Figure 40 shows a nano-film with a thickness of 100 nm (a lateral dimension of about 4 x 4 mm 2 ) and a thermal pre-strain of ~ 3.8% (defined by heating to 150 ° C). Optical micrographs collected at different stages during the formation. These images indicate the formation of a two-stage structure, the first of which involves one of the main functions of the larger area, followed by the deflection of the corrugated structure to eventually form a tight fishbone upon complete cooling. Shape layout (Figure 40 df). Figure 40h shows the time evolution of two characteristic wavelengths. Short wavelengths tend to decrease with increasing progressive compressive strain on the crucible due to cooling (due to the relatively large thermal contraction of PDMS). In particular, this value decreased from 17 to 18 μm in the initial stage to ~14.7 μm when the fishbone structure became prominent, and eventually dropped to ~12.7 μm in the state of complete cooling. This wavelength is uniform over a large area (~5% change). Conversely, as is apparent from the image in Figure 40g, the long wavelength associated with the fishbone layout exhibits a wide range of values. The distribution of values is measured at ~100 points across this sample, which is summarized in the histogram of Figure 40g. The fishbone structure can be represented by the out-of-plane displacement w=A 1 cos[k 1 x 1 +k 1 A 2 cos(k 2 x 2 )] (Fig. 49). Here, the coefficient: the amplitude A1 of the corrugation, the long wavelength 2 π/k 2 , the concave-convex wavelength 2 π/k 1 , and the amplitude A 2 of the concavity and convexity are determined by analyzing the specific film thickness, the mechanical properties of the film, and the substrate. The short wavelength λ is (2 π / k 1 ) sin (θ/2). The modeling uses the Si strain determined by measuring the equivalent length and the period of the wavy structure instead of the thermal pre-strain as the applied pre-strain (Fig. 50). The actual strain that deforms Si may be attributed to the loading effect of Si on the PDMS and is typically slightly less than the estimated thermal pre-strain. For example, the Si strain is 2.4% at 3.8% of the hot pre-stress. For this displacement w, the stress, strain and displacement fields in the Si film can be obtained from Von Karman plate theory in terms of A 1 , k 1 , A 2 and k 2 . The field in the PDMS substrate was obtained from the 3D elastic theory. Minimizing the total energy composed of the film energy and the flexural energy in the Si film and the elastic energy in the PDMS substrate gives A 1 , k 1 , A 2 and k 2 . The Young's modulus and the Poisson's ratio of Si and PDMS were E Si = 130 GPa, v Si = 0.27, E PDMS = 1.8 MPa, and v PDMS = 0.5. Both the experiment and the model give a concave-convex angle θ of about 90°. The short wavelength given by the theory is 12.4 μm at a biaxial pre-stress of 2.4%, which is in good agreement with the above experimental results. The large change in the long wavelength of 2 π/k 2 is also predicted by theoretical calculation, which is 30 to 60 μm.

圖41呈現類似於圖40之完全冷卻狀態所說明之結構的結構之原子力顯微鏡(atomic force microscope,AFM)及掃描電子顯微鏡(SEM)影像。此等影像清楚地展示，魚骨狀圖案以鋸齒狀結構為特徵，該等結構界定兩個特徵性方向，即使壓縮應變完全為各向同性亦如此。魚骨狀結構表示最小彈性能量組態，其減小系統中之總平面內應力且減輕兩個方向上之雙軸壓縮。因此，此幾何形狀相較於"棋盤形"及1D波紋布局而言在較大區上為較佳的，因為魚骨狀模式為此等三個模式中在所有方向上使平面內應力鬆弛而不誘發顯著延伸能量之唯一一者。僅在緊接凹凸 處誘發顯著延伸。1D模式僅在一個方向上使預加應力降低。棋盤形模式在所有方向上降低應力，但其產生伴隨撓曲之顯著延伸能量。 Figure 41 presents an atomic force microscope (AFM) and a scanning electron microscope (SEM) image of a structure similar to that illustrated in the fully cooled state of Figure 40. These images clearly show that the fishbone pattern is characterized by a zigzag structure that defines two characteristic directions, even if the compressive strain is completely isotropic. The fishbone structure represents the minimum elastic energy configuration that reduces the total in-plane stress in the system and mitigates biaxial compression in both directions. Therefore, this geometry is preferred over a larger area than the "checkerboard" and 1D corrugated layout because the fishbone pattern relaxes the in-plane stress in all directions for the three modes. The only one that does not induce significant extension energy. Only in close proximity Significant extension was induced at the site. The 1D mode reduces pre-stressing in only one direction. The checkerboard pattern reduces stress in all directions, but it produces significant extension energy with deflection.

自AFM影像提取之兩個線切圖指示沿凹凸方向(輪廓i)及垂直於波紋(輪廓ii)的週期性(但僅近似正弦)之起伏輪廓。波紋之由輪廓ii判定之λ及A1分別為12.8μm及0.66μm。由理論分析給出之為12.4μm之λ類似於實驗資料；然而，得自理論分析的A1為0.90μm，其為稍高於實驗結果之值。SEM影像清楚地展示如由在波紋之凸起及凹入區域中接近矽中之小孔洞的樣本之狀態所顯見之薄膜與PDMS之間的密切結合。此等影像亦指示波紋結構與此等孔洞之位置完全不相關，因為2.5μm之孔洞大小遠小於吾人之實驗中的變形模式之特徵性波長。對於波狀結構之幾何形狀對矽之厚度之依賴性的研究可提供對物理現象之額外理解且進一步驗證力學模型。圖42展示一些結果，包括對於類似熱應變以不同厚度形成於薄膜中之波紋結構的光學顯微相片以及波長與振幅。對於100nm之厚度，波紋之λ及A1分別為12.6(±0.37)μm及0.64(±0.07)μm，且對於320nm之厚度，其為45.1(±1.06)μm及1.95(±0.18)μm。此等值相當良好地對應於理論計算，該等理論計算得到λ及A1對於100nm之情況為12.4μm及0.90μm且對於320nm之情況分別為45.1μm及3.29μm。 The two line cuts extracted from the AFM image indicate the undulating profile along the relief direction (contour i) and perpendicular (but only approximately sinusoidal) perpendicular to the corrugation (contour ii). The λ and A 1 of the corrugation determined by the contour ii were 12.8 μm and 0.66 μm, respectively. The λ given by the theoretical analysis of 12.4 μm is similar to the experimental data; however, A 1 from the theoretical analysis is 0.90 μm, which is a value slightly higher than the experimental result. The SEM image clearly shows the close association between the film and PDMS as evidenced by the state of the sample approaching the small hole in the ridge in the raised and recessed regions of the corrugation. These images also indicate that the corrugated structure is completely uncorrelated with the location of the holes, since the 2.5 μm hole size is much smaller than the characteristic wavelength of the deformation mode in our experiments. The study of the dependence of the geometry of the wavy structure on the thickness of the crucible provides an additional understanding of the physical phenomena and further validates the mechanical model. Figure 42 shows some of the results, including optical micrographs of the corrugated structures formed in the film at different thicknesses similar to thermal strain, as well as wavelength and amplitude. For a thickness of 100 nm, λ and A 1 of the corrugations are 12.6 (±0.37) μm and 0.64 (±0.07) μm, respectively, and for a thickness of 320 nm, they are 45.1 (±1.06) μm and 1.95 (±0.18) μm. These values correspond quite well to the theoretical calculations, which give λ and A 1 of 12.4 μm and 0.90 μm for 100 nm and 45.1 μm and 3.29 μm for 320 nm, respectively.

此等波狀薄膜提供各個平面內方向上之對於應變的真實可延伸性，此與藉由先前描述之織帶幾何形狀所提供之一維可延伸性形成對比。為了研究此態樣，吾人藉由使用經校準機械台及以熱誘發之3.8%的預加應變而製備之2D可延伸薄膜執行沿不同方向之單軸抗張延伸測試。圖43提供一些影像。在情況i中，沿長波紋之方向施加之拉伸應變(εst)使得魚骨狀結構"展開"(εst 為1.8%)，逐漸導致完全延伸狀態(εst為3.8%)下的1D波狀幾何形狀。此延伸藉由柏松效應而在正交方向上誘發具有粗略等於拉伸應變之一半的振幅之壓縮應變。可藉由在此方向上壓縮波狀結構而適應此壓縮應變。在解除所施加之拉伸應變之後，原始魚骨狀波紋即恢復而顯示出與最初相當類似之結構。(圖51展示在5、10、15個延伸循環之後收集之光學顯微相片)。 These undulating films provide true extensibility for strain in each in-plane direction as opposed to one dimensional extensibility provided by the previously described web geometry. To investigate this aspect, we performed uniaxial tensile elongation tests in different directions by using a calibrated mechanical table and a 2D extensible film prepared with a thermally induced pre-stress of 3.8%. Figure 43 provides some images. In case i, the tensile strain (ε st ) applied in the direction of the long corrugation causes the fishbone structure to "expand" (ε st is 1.8%), gradually leading to 1D in the fully extended state (ε st is 3.8%) Wavy geometry. This extension induces a compressive strain having an amplitude roughly equal to one-half of the tensile strain in the orthogonal direction by the cypress effect. This compressive strain can be accommodated by compressing the wavy structure in this direction. After the applied tensile strain is released, the original fishbone corrugations are restored to show a structure quite similar to the original. (Figure 51 shows optical micrographs collected after 5, 10, and 15 extension cycles).

在對角方向上施加之拉伸應變(情況ii)展示類似結構改變，但在完全延伸時，1D波紋結構沿由施加之應變所界定之方向對準而非為初始幾何形狀。對於垂直情況iii，在較小應變(εst為1.8%)處，樣本之某些部分完全失去魚骨狀布局而沿延伸方向產生新的1D波紋。隨著增加之應變，較多區域經歷此變換直至整個區由此等定向之1D波紋組成。此等新形成之1D波紋垂直於原始波紋之定向；在解除之後，其即簡單地撓曲以形成無序魚骨狀幾何形狀。對於圖43B中所示之全部情況，波長均隨拉伸應變而增大且在解除之後即恢復至其原始值，即使在正交方向上由柏松效應誘發壓縮應力亦如此。此行為由於由魚骨狀波紋之展開所誘發的λ之增大而產生，該增大大於由柏松效應引起之此波長的減小。(圖52)對於情況i，凹凸波長2 π/k1(圖52A)在施加之拉伸應變εst下歸因於柏松效應而減小至2 π/k'1(圖52B)，亦即，k'1>k1。然而，相應凹凸角θ'歸因於魚骨狀結構之展開而大於角θ。短波長λ=(2 π/k1)sin(θ/2)變為λ'=(2 π/k'1)sin(θ'/2)，其在角改變之效應克服柏松效應時可大於λ。吾人之理論模型給出對於εst=0、1.8%及3.8%，λ=12.4、14.6及17.2μm，此證實了如在實驗中所觀測的，短波長隨施加之應變而增大。對於情況iii，λ及2 π/k1均隨施加之延伸應變而增大，因為波紋沿延伸應變之方向而鬆弛，且凹凸角θ未因柏松效應而顯著改變。亦藉由熱誘發之 拉伸應變來研究彎曲薄膜之雙軸可延伸性(圖53)。由熱應變產生之魚骨狀波紋隨著對樣本加熱而緩慢消失；其在冷卻之後即完全恢復。 The tensile strain applied in the diagonal direction (case ii) exhibits a similar structural change, but when fully extended, the 1D corrugated structure is aligned along the direction defined by the applied strain rather than the initial geometry. For the vertical case iii, at a small strain (ε st of 1.8%), some portions of the sample completely lost the fishbone layout and new 1D ripples were created along the extension direction. With increasing strain, more regions experience this transformation until the entire region is composed of such oriented 1D ripples. These newly formed 1D corrugations are oriented perpendicular to the original corrugations; after release, they simply flex to form a disordered fishbone geometry. For all of the cases shown in Fig. 43B, the wavelengths all increase with tensile strain and return to their original values after release, even if the compressive stress is induced by the cypress effect in the orthogonal direction. This behavior is due to an increase in λ induced by the unfolding of the fishbone corrugation, which is greater than the decrease in this wavelength caused by the cypress effect. (Fig. 52) For the case i, the concave-convex wavelength 2 π/k 1 (Fig. 52A) is reduced to 2 π/k' 1 due to the cypress effect at the applied tensile strain ε st (Fig. 52B), That is, k' 1 > k 1 . However, the corresponding embossing angle θ' is due to the expansion of the fishbone structure and is larger than the angle θ. The short wavelength λ=(2 π/k 1 )sin(θ/2) becomes λ'=(2 π/k' 1 )sin(θ'/2), which can be used when the effect of the angle change overcomes the cypress effect. Greater than λ. The theoretical model of ours gives for ε st =0, 1.8% and 3.8%, λ = 12.4, 14.6 and 17.2 μm, which confirms that as observed in the experiments, the short wavelength increases with the applied strain. In the case of iii, λ and 2 π / k 1 increase with increasing strain is applied to the extension, because of corrugations extending along the direction of the relaxation of strain, and the angle θ irregularities not change significantly effect Yinbo Song. The biaxial extensibility of the curved film was also investigated by heat-induced tensile strain (Fig. 53). The fishbone corrugations produced by thermal strain slowly disappear as the sample is heated; it fully recovers after cooling.

此等觀測結果僅適用於薄膜之中央區域。如圖39之底部圖框中所指示，薄膜之邊緣展示1D波紋結構，其中波向量沿邊緣而定向。圖44中展示邊緣區域、中央區域及其之間的過渡區之AFM影像及線切圖輪廓。起源於Si之邊緣附近之1D波紋(頂部圖框)逐漸變得撓曲(中部圖框)直至其變換為中央區域中之魚骨狀幾何形狀(底部圖框)。此等區域中之λ值分別為16.6μm、13.7μm及12.7μm(自頂部圖框起)，其中A1為0.52μm、0.55μm及0.67μm。與邊緣處之1D波紋相對比，2D魚骨狀波紋具有較小λ及A1，此提示Si之內部區比邊緣受到較強的壓縮應變之影響。邊緣附近之應力狀態在某距離範圍內，由於薄膜之無牽引力邊緣而近似為單軸壓縮。此單軸壓縮平行於此自由邊緣，且因此導致沿該邊緣之1D波紋。然而，應力狀態在魚骨狀結構產生之中央區域中變為等雙軸壓縮。對於1D波紋邊緣與魚骨狀波紋之間的過渡區，不平衡雙軸壓縮造成具有較大凹凸角之"半"魚骨狀波紋。吾人之模型得到對於1D波紋分別為16.9μm及0.86μm之λ及A1及對於魚骨狀結構分別為12.4μm及0.90μm之λ及A1。此等結果與實驗觀測值相當良好地符合。 These observations apply only to the central area of the film. As indicated in the bottom panel of Figure 39, the edges of the film exhibit a 1D corrugated structure in which the wave vectors are oriented along the edges. The AFM image and line cut outline of the edge region, the central region, and the transition region therebetween are shown in FIG. The 1D ripple (top frame) originating near the edge of Si gradually becomes deflected (middle frame) until it is transformed into a fishbone geometry in the central region (bottom frame). The λ values in these regions were 16.6 μm, 13.7 μm, and 12.7 μm, respectively (from the top frame), where A 1 was 0.52 μm, 0.55 μm, and 0.67 μm. In contrast to the 1D ripple at the edge, the 2D fishbone corrugations have smaller λ and A 1 , suggesting that the inner region of Si is more affected by the compressive strain than the edge. The stress state near the edge is within a certain distance range, which is approximately uniaxial compression due to the non-tractive edge of the film. This uniaxial compression is parallel to this free edge and thus results in a 1D ripple along the edge. However, the stress state becomes equal biaxial compression in the central region where the fishbone structure is produced. For the transition zone between the 1D corrugated edge and the fishbone corrugation, unbalanced biaxial compression results in a "half" fishbone corrugation with a larger bump angle. We obtained for the 1D model λ 16.9μm and the corrugations are of 0.86μm and A 1 and fishbone-like structure for λ 12.4μm and 0.90μm, respectively, and the A 1. These results are in good agreement with the experimental observations.

為了進一步研究此等邊緣效應，吾人製造具有1000μm之長度及100μm、200μm、500μm及1000μm之寬度的矩形薄膜，其均處於同一PDMS基板上。圖45展示此等結構對於兩個不同水準之熱預加應變之光學顯微相片。在較低熱預加應變(約2.3%，圖45A)處，100μm及200μm寬之薄膜顯示出自一側至另一側的完全1D波紋，其在末端具有平坦未變形之區域。500μm寬之薄 膜展示類似之1D波紋及平坦區域，但波紋在結構之中部具有微微撓曲之幾何形狀，其具有大體上小於100μm及200μm之情況的整體有序性及定向上之均勻性。對於1000μm之方塊，1D波紋存在於邊緣之中央區域中，其在角落中具有平坦區。薄膜之中央部分展示完全形成之魚骨狀幾何形狀。對於角落平坦區域，歸因於兩個自由邊緣而存在近似無應力之狀態。在該等角落附近無波紋形成。隨著增大之預加應變(4.8%，圖45B)，所有情況下之平坦區域在大小上均減小。1D波紋狀態在100μm及200μm之織帶中持續，但顯著魚骨狀形態在500μm之情況的中央區域中出現。在較高預加應變處，等雙軸壓縮應變存在於500μm寬之薄膜的內部區域中。對於1000μm之方塊薄膜，魚骨狀狀態延伸至接近邊緣之區域。可將界定平坦區域之空間延伸之特徵長度標度(吾人稱作邊緣效應長度)Ledge估計為薄膜大小及預加應變的函數。圖45C展示指示對於此處研究之情況，此長度以獨立於薄膜之大小之方式隨預加應變之線性縮放的結果。隨著預加應變變得較高，單軸應變區域之長度變得較小。因此，可在接近兩個自由邊緣處之無應力區域中觀測到較短範圍之1D波紋形式及類似狀態。 To further investigate these edge effects, we have fabricated rectangular films having a length of 1000 μm and a width of 100 μm, 200 μm, 500 μm, and 1000 μm, all on the same PDMS substrate. Figure 45 shows an optical micrograph of the thermal pre-strain of these two structures for two different levels. At lower thermal pre-strain (about 2.3%, Figure 45A), the 100 μm and 200 μm wide films show a complete 1D ripple from side to side with a flat, undeformed region at the end. A 500 μm wide film exhibits similar 1D corrugations and flat areas, but the corrugations have a slightly deflected geometry in the middle of the structure with overall order and orientation uniformity of substantially less than 100 μm and 200 μm. For a 1000 μm square, a 1D ripple exists in the central region of the edge, which has a flat region in the corner. The central portion of the film exhibits a fully formed fishbone geometry. For a flat area of the corner, there is an approximately stress-free state due to the two free edges. No ripples are formed near the corners. With increasing pre-stress (4.8%, Figure 45B), the flat areas in all cases decrease in size. The 1D corrugated state continued in the webbing of 100 μm and 200 μm, but the significant fishbone morphology appeared in the central region of the case of 500 μm. At higher pre-stressed strains, the isoaxial compressive strain is present in the inner region of the 500 μm wide film. For a 1000 μm square film, the fishbone state extends to an area close to the edge. The feature length scale (which I call the edge effect length) Ledge that defines the spatial extension of the flat region can be estimated as a function of film size and pre-strain. Figure 45C shows the results of a linear scaling of the length with pre-strain in a manner independent of the size of the film for the case studied here. As the pre-added strain becomes higher, the length of the uniaxial strain region becomes smaller. Thus, a shorter range of 1D corrugation patterns and the like can be observed in the unstressed regions near the two free edges.

圖46展示在包括圓形、橢圓形、六邊形及三角形之其他薄膜幾何形狀中形成之波狀結構的光學顯微相片。該等結果定性地與圖45之織帶及方塊中之觀測結果相一致。特定言之，邊緣區域展示平行於邊緣而定向之1D波紋。具有正交定向之波紋僅出現於距邊緣距離大於Ledae處。對於圓形，1D波紋歸因於薄膜之形狀而以全面徑向定向出現於接近邊緣處，魚骨狀波紋出現於中央。橢圓形顯示出類似行為，但在長軸之邊緣處具有平坦區域(歸因於此等區域中之較小曲率半徑)。對於六邊形及三角 形形狀，銳角隅角(分別為120°及60°之角度)導致平坦區域。魚骨狀幾何形狀出現於六邊形之中央。三角形之中央展示對於此處所示之預加應變的水準，1D波紋之合併。對於具有清角之形狀(例如，六邊形、三角形及橢圓形之尖端)，在隅角附近不存在波紋，因為兩個相交之自由邊緣(未必垂直)給出無應力狀態。對於三角形形狀，不存在足夠空間來產生魚骨狀結構，即使是在中央區域中亦如此。 Figure 46 shows an optical micrograph of a wavy structure formed in other film geometries including circles, ellipses, hexagons, and triangles. These results are qualitatively consistent with the observations in the webbing and squares of Figure 45. In particular, the edge regions exhibit 1D ripples oriented parallel to the edges. Corrugations with orthogonal orientation appear only at a distance from the edge greater than L edae . For a circle, the 1D corrugation appears at a near radial edge due to the shape of the film in a full radial orientation, with fishbone corrugations appearing in the center. The ellipse shows a similar behavior, but has a flat area at the edge of the long axis (due to the smaller radius of curvature in these areas). For hexagonal and triangular shapes, acute corners (angles of 120° and 60°, respectively) result in flat areas. The fishbone geometry appears in the center of the hexagon. The center of the triangle shows the combination of 1D ripple for the level of pre-strain shown here. For shapes with clear angles (eg, hexagonal, triangular, and elliptical tips), there are no corrugations near the corners because the two intersecting free edges (not necessarily perpendicular) give an unstressed state. For a triangular shape, there is not enough space to create a fishbone structure, even in a central region.

薄膜自身提供達成雙軸可延伸電子設備之途徑。可利用上文概述之邊緣效應來實現對於該等設備之特定類別可為有用之特定結果。特定言之，在成像系統中，於光偵測器之位置處保持平坦未變形區域以避免在此等設備具有波狀形狀時發生之非理想狀態可能具有價值。圖47呈現達成此結果之可延伸薄膜之一些代表性實例。此等結構由以30μm×150μm之織帶(對於正交織帶而言為30μm×210μm)在豎直及水平方向上(圖47A、圖47C)及在豎直、水平及對角方向上(圖47E、圖47G)連接的100μm×100μm之正方島狀物組成。織帶中之波紋之振幅及波長的改變提供以在較大程度上避免正方島狀物之區域中之變形的方式來適應所施加之應變之手段。吾人檢查此等結構在若干不同所施加應變下之行為。圖47之部分a及e展示在藉由於烘箱中加熱樣本而施加的較低應變(約2.3%)之狀態中之代表性情況。圖47之部分c及g展示在藉由使用機械台而施加之相對較高的雙軸應變(約15%)下之相同結構。如所顯而易見的，在低應變狀態下島狀物保持平坦；在足夠高之應變下，開始於此等區域中形成波紋結構。如傾斜角度之SEM影像(圖47B、圖47D、圖47F、圖47H)中所示，在所有應變下，PDMS與Si之間的良好黏著得以保持。圖47之部分b及d中之高放大率SEM影像的插圖亦證實Si與 PDMS之強結合。 The film itself provides a means to achieve a two-axis extendable electronic device. The edge effects outlined above can be utilized to achieve specific results that may be useful for a particular class of such devices. In particular, in an imaging system, it may be of value to maintain a flat, undeformed region at the location of the photodetector to avoid non-ideal conditions that occur when such devices have a wavy shape. Figure 47 presents some representative examples of stretchable films that achieve this result. These structures are in the vertical and horizontal directions (Fig. 47A, Fig. 47C) and in the vertical, horizontal and diagonal directions with a web of 30 μm × 150 μm (30 μm × 210 μm for the positive interlaced strip) (Fig. 47E). Figure 47G) The connected square island of 100 μm × 100 μm. The change in amplitude and wavelength of the corrugations in the webbing provides a means to accommodate the applied strain in a manner that largely avoids deformation in the region of the square islands. We examine the behavior of these structures under a number of different applied strains. Parts a and e of Figure 47 show representative cases in a state of lower strain (about 2.3%) applied by heating the sample in the oven. Parts c and g of Figure 47 show the same structure at a relatively high biaxial strain (about 15%) applied by using a mechanical table. As is apparent, the islands remain flat under low strain conditions; at sufficiently high strains, the formation of corrugated structures in such regions begins. As shown in the SEM image of the oblique angle (Fig. 47B, Fig. 47D, Fig. 47F, Fig. 47H), good adhesion between PDMS and Si was maintained at all strains. The illustrations of the high magnification SEM images in parts b and d of Figure 47 also confirm Si and A strong combination of PDMS.

總而言之，矽之奈米薄膜可與預加應變之彈性體基板整合以產生具有幾何形狀之一範圍的2D "波狀"結構。此等系統之機械行為的許多態樣與理論預測之行為良好地一致。此等結果對於電子元件在使用期間或在安裝期間需要充分可延伸性之系統中之應用為有用的。 In summary, the nanofilm of tantalum can be integrated with a pre-strained elastomeric substrate to create a 2D "wavy" structure with a range of geometries. Many aspects of the mechanical behavior of these systems are in good agreement with the theoretical predictions. These results are useful for applications in electronic systems that require sufficient extensibility during use or during installation.

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實例4：藉由使用印刷半導體奈米材料而得到之異質整合式三維電子元件 Example 4: Heterogeneous integrated three-dimensional electronic components obtained by using printed semiconductor nanomaterials

吾人已開發一種簡單方法來將寬廣類別之相異材料組合至具有二維或三維(3D)布局之異質整合式(HGI)電子系統中。該製程始於不同半導體奈米材料(例如，單壁碳奈米管及氮化鎵、矽及砷化鎵之單晶奈米線/織帶)於單獨基板上之合成。對使用柔軟印模及此等基板作為供體的附加轉印製程繼之以設備及互連之形成之重複應用產生將此等(或其他)半導體奈米材料的任何組合併入於剛性或可撓性設備基板上之高效能3D-HGI電子元件。此通用方法可產生使用其他技術難以達成或不可能達成的寬廣範圍之不常見電子系統。 We have developed a simple method to combine a wide variety of dissimilar materials into a heterogeneous integrated (HGI) electronic system with a two- or three-dimensional (3D) layout. The process begins with the synthesis of different semiconductor nanomaterials (eg, single-walled carbon nanotubes and single crystal nanowires/ribbons of gallium nitride, germanium, and gallium arsenide) on separate substrates. The additional transfer process using a soft stamp and such substrates as a donor, followed by repeated application of the formation of devices and interconnects, results in the incorporation of any combination of such (or other) semiconductor nanomaterials into the rigid or High performance 3D-HGI electronic components on flexible device substrates. This versatile approach can produce a wide range of uncommon electronic systems that are difficult or impossible to achieve using other technologies.

許多現有及新興電子設備受益於相異類別之半導體向二維或三維(2D或3D)布局的單一系統中之整體異質整合(HGI)。實例包括多功能射頻通信設備、紅外(IR)成像攝影機、可定址感應器陣列及混合CMOS/奈米線/奈米設備電路(3-7)。在一些代表性系統中，化合物半導體或其他材料提供高速操作、有效光偵測或感應能力，而矽CMOS在通常包括堆疊3D組態之電路中提供數位讀出及信號處理。晶圓結合(8)及磊晶成長(9、10)表示用於達成此等類型之3D-HGI系統的兩種最為廣泛使用之方法。前者製程涉及藉由使用黏著劑或熱起始界面化學而進行的分別形成於不同半導體晶圓上之積體電路、光電二極體或感應器之實體 結合。此方法在許多情況中適用，但其具有重要缺點，包括(i)縮放至較大區或第三(亦即，堆疊)維度中之數層的有限能力，(ii)與不常見材料(例如，奈米結構之材料)或低溫材料及基板之不相容性，(iii)對於貫穿晶圓之電互連的具有挑戰性之製造及對準，(iv)對於平坦、平面結合表面之高要求及(v)可因藉由全異材料之差異熱膨脹/收縮而產生的機械應變發生之曲折及破裂。磊晶成長提供一種不同方法，其涉及藉由分子束磊晶法或其他手段而進行的較薄半導體材料層於其他材料之晶圓之表面上的直接形成。雖然此方法避免前述問題中之一些，但對於磊晶法之要求對可成長之材料的品質及類型加以嚴格限制，即使是在使用緩衝層及其他進階技術時亦如此。相反地，諸如無機材料之奈米級線、織帶、薄膜或粒子或者諸如單壁碳奈米管(SWNT)或石墨薄片(graphene sheet)(11-14)的基於碳之系統之新興類別的半導體奈米材料可成長且接著懸浮於溶劑中，或以回避對於磊晶成長或晶圓結合之需要之方式而轉移至基板上。近來的工作展示(例如)藉由溶液澆鑄(15)而形成之交叉奈米線二極體以2D布局的整合。此處呈現之結果說明相異單晶無機半導體(例如，GaN、Si及GaAs之奈米線/織帶)可如何藉由使用可伸縮及確定性印刷技術而彼此組合及亦與其他類別之奈米材料(例如，SWNT)組合來產生2D或3D布局之複雜HGI電子系統。特定言之，整合至剛性無機及可撓性塑膠基板上之設備陣列、邏輯閘及活動可定址光偵測器中的高效能金屬氧化物半導體場效電晶體(MOSFET)、金屬半導體場效電晶體(MESFET)、薄膜電晶體(TFT)、光電二極體及其他組件之超薄多層堆疊論證該等能力中之一些。 Many existing and emerging electronic devices benefit from the overall heterogeneous integration (HGI) of a heterogeneous class of semiconductors into a single system of two or three dimensional (2D or 3D) layouts. Examples include multi-function RF communication devices, infrared (IR) imaging cameras, addressable sensor arrays, and hybrid CMOS/nanowire/nano device circuits (3-7). In some representative systems, compound semiconductors or other materials provide high speed operation, effective light detection or sensing capabilities, while CMOS provides digital readout and signal processing in circuits that typically include stacked 3D configurations. Wafer bonding (8) and epitaxial growth (9, 10) represent the two most widely used methods for achieving these types of 3D-HGI systems. The former process involves the formation of integrated circuits, photodiodes or inductors respectively formed on different semiconductor wafers by using an adhesive or thermal initiation interface chemistry. Combine. This method works in many situations, but it has important drawbacks, including (i) limited ability to scale to larger areas or layers in a third (ie, stacked) dimension, (ii) to uncommon materials (eg , the material of the nanostructure) or the incompatibility of the low temperature material and the substrate, (iii) the challenging manufacturing and alignment of the electrical interconnection through the wafer, (iv) the height of the flat, planar bonding surface Requirements and (v) tortuosity and cracking due to mechanical strain caused by differential thermal expansion/contraction of dissimilar materials. Epitaxial growth provides a different approach involving the direct formation of thinner layers of semiconductor material on the surface of wafers of other materials by molecular beam epitaxy or other means. While this approach avoids some of the aforementioned problems, the requirements for the epitaxial process impose strict limits on the quality and type of materials that can be grown, even when using buffer layers and other advanced techniques. Conversely, nanoscale wires such as inorganic materials, webbing, films or particles or emerging classes of semiconductors based on carbon-based systems such as single-walled carbon nanotubes (SWNTs) or graphite sheets (11-14) The nanomaterial can be grown and then suspended in a solvent or transferred to the substrate in a manner that avoids the need for epitaxial growth or wafer bonding. Recent work has demonstrated, for example, the integration of crossed nanowire diodes formed by solution casting (15) in a 2D layout. The results presented herein illustrate how different single crystal inorganic semiconductors (eg, nanowires/ribbons of GaN, Si, and GaAs) can be combined with each other by using scalable and deterministic printing techniques and also with other classes of nanometers. Materials (eg, SWNTs) are combined to produce a complex HGI electronic system in a 2D or 3D layout. In particular, high-performance metal-oxide-semiconductor field-effect transistors (MOSFETs) and metal-semiconductor field-effect transistors integrated into device arrays, logic gates, and active addressable photodetectors on rigid inorganic and flexible plastic substrates. Ultra-thin multi-layer stacks of crystalline (MESFET), thin film transistors (TFT), photodiodes, and other components demonstrate some of these capabilities.

圖57說明用於製造此等3D-HGI系統之代表性步驟。該製程 始於各處於自己的源基板上之半導體奈米材料之合成。此處呈現之設備整合藉由使用基於晶圓之源材料及微影蝕刻程序而形成之單晶Si、GaN及GaAs的奈米線及奈米織帶(16-21)與藉由化學氣相沈積而成長之SWNT之網路(13、21)。圖57之頂部的掃描電子顯微相片展示在自源基板移除之後的此等半導體奈米材料。對於電路製造，此等元件仍處於在製造或成長階段期間於晶圓上界定之組態：在Si、GaN及GaAs奈米線/織帶之情況下為對準陣列，且對於SWNT為亞單層隨機網路。可在源基板上執行用於實現與Si、GaN及GaAs之歐姆接觸之高溫摻雜及退火程序。下一步驟涉及使用先前描述之基於彈性體印模之印刷技術來將此等經處理之元件自源基板轉移至設備基板(諸如圖57中所說明的聚醯亞胺(PI)之薄片)。特定言之，抵靠源基板層壓聚二甲基矽氧烷(PDMS)之印模建立與半導體奈米材料元件之軟凡得瓦爾黏著接觸。使經"塗墨"之印模與在表面上具有液態預聚物(例如，聚醯胺酸)之薄旋轉澆鑄層之設備基板(例如，PI薄片)接觸，且接著使聚合物固化使得在印模經移除時此等半導體材料嵌埋於此層上且良好地黏附至此層(16-20)。類似程序對於基板(亦即，剛性或可撓性、有機或無機)之一範圍及半導體奈米材料之一範圍適用[此製程之一略經修改的版本用於SWNT(21)。]。中間層(在此情況下為PI)之厚度可小至500nm，且對於此處描述之系統通常為1至1.5μm。在包括閘極介電質、電極及互連之形成的某一額外處理之後，可重複轉印及設備製造步驟，其始於於先前完成之電路級之頂部旋塗新的預聚物中間層。經特別設計以用於轉印之自動台或習知遮罩對準器致能在數平方公分上~1μm之疊置重合精度。(22)(圖61)。簡單地藉由在中間層中之由光圖案化及/或乾式蝕刻界定之開口上蒸鍍金 屬線及將金屬線蒸鍍至該等開口中而形成層與層的互連(23)。此用以得到3D-HGI電子元件之不常見方法具有若干重要特徵。第一，設備基板上之所有處理均於低溫下發生，藉此避免可導致多層堆疊系統中之不合需要之變形的差異熱膨脹/收縮效應。此操作亦致能對低溫塑膠基板及中間層材料之使用，且其有助於確保下伏電路層不會因對上覆設備之處理而熱降級。第二，該方法可應用於寬廣類別之半導體奈米材料，包括諸如SWNT之薄膜的新興材料。第三，柔軟印模致能與下伏設備層之非破壞性接觸；此等印模連同超薄半導體材料亦可容許具有某構形之表面。第四，超薄設備幾何形狀(<1μm)及中間層(<1.5μm)允許層與層之電互連的簡單形成。克服習知方法之劣勢中之許多者的此等特徵說明於下文描述之若干電路論證中。 Figure 57 illustrates representative steps for fabricating such 3D-HGI systems. The process Synthesis of semiconductor nanomaterials starting from their own source substrates. The device presented here integrates nanowires and nanowebs (16-21) of single crystal Si, GaN, and GaAs formed by using wafer-based source materials and photolithography etching processes and by chemical vapor deposition. The network of SWNTs that grew up (13, 21). The scanning electron micrograph at the top of Figure 57 shows these semiconductor nanomaterials after removal from the source substrate. For circuit fabrication, these components are still in a configuration defined on the wafer during the manufacturing or growth phase: in the case of Si, GaN, and GaAs nanowires/webbing, the alignment array, and for the SWNT sub-monolayer Random network. A high temperature doping and annealing process for achieving ohmic contact with Si, GaN, and GaAs can be performed on the source substrate. The next step involves transferring the otherwise processed elements from the source substrate to a device substrate (such as the sheet of polyimpenimine (PI) illustrated in Figure 57) using the previously described elastomer-based impression-based printing techniques. In particular, the impression of the polydimethylsiloxane (PDMS) against the source substrate establishes a soft van der Waals contact with the semiconductor nanomaterial component. Contacting an "inked" stamp with a device substrate (eg, a PI sheet) having a thin spin casting layer of a liquid prepolymer (eg, polylysine) on the surface, and then curing the polymer such that These semiconductor materials are embedded on this layer as the stamp is removed and adhere well to this layer (16-20). Similar procedures apply to a range of substrates (ie, rigid or flexible, organic or inorganic) and one of the semiconductor nanomaterials [a slightly modified version of this process for SWNT (21). ]. The thickness of the intermediate layer (PI in this case) can be as small as 500 nm and is typically from 1 to 1.5 [mu]m for the systems described herein. After some additional processing including the formation of gate dielectrics, electrodes, and interconnects, the transfer and device fabrication steps can be repeated, starting with the spin-coating of a new prepolymer interlayer on top of the previously completed circuit level. . Automated tables or conventional mask aligners specifically designed for transfer enable stacking coincidence accuracy of ~1 μm over a few square centimeters. (22) (Fig. 61). Evaporation of gold simply by openings defined by photo-patterning and/or dry etching in the intermediate layer The wires are lined up and vapor deposited into the openings to form a layer-to-layer interconnect (23). This uncommon method for obtaining 3D-HGI electronic components has several important features. First, all processing on the device substrate occurs at low temperatures, thereby avoiding differential thermal expansion/contraction effects that can result in undesirable deformations in the multilayer stacking system. This operation also enables the use of low temperature plastic substrates and interlayer materials, and it helps to ensure that the underlying circuit layer is not thermally degraded by the processing of the overlying device. Second, the method can be applied to a wide range of semiconductor nanomaterials, including emerging materials such as SWNT films. Third, the soft stamp enables non-destructive contact with the underlying device layer; these stamps, along with the ultra-thin semiconductor material, also permit surfaces having a certain configuration. Fourth, ultra-thin device geometries (<1 μm) and intermediate layers (<1.5 μm) allow for the simple formation of electrical interconnections of layers. These features of many of the disadvantages of overcoming conventional methods are illustrated in several circuit demonstrations described below.

圖58呈現藉由使用圖57中說明之總處理流程，使用具有摻雜接觸點(形成於源晶圓上)、電漿增強化學氣相沈積之SiO2介電質及用於源極、汲極及閘極之Cr/Au金屬化的單晶矽奈米織帶(24)而製造之三層3D堆疊陣列Si MOSFET。每一設備使用三個對準之奈米織帶，其具有分別為87μm、290nm及250μm之寬度、厚度及長度。圖2A展示系統之邊緣之俯視光學顯微相片，該邊緣具有經設計以分別顯示基板之支撐一個、兩個及三個MOSFET層之部分的布局。第二層之設備幾何形狀相對於第一層及第三層之九十度旋轉有助於闡明系統之布局。堆疊結構之示意性橫截面圖及傾斜圖出現於圖58B中。可使用共焦光學顯微法來在三維上觀察樣本。圖58C展示該等影像之俯視圖及傾斜圖，其經著色以易於觀察。(影像品質隨深度而稍有降級，此歸因於自上層之散射及吸收)。圖58D呈現對每一層中之代表性設備[具有19μm之通道長度(L c )、由在摻雜源極/汲極區域上延伸 之閘極電極的距離界定之5.5μm之通道重疊距離(Lo)及200μm之通道寬度(W)的頂部閘極MOSFET]之電量測結果。三層中之每一者上之形成於PI基板上的設備展示出極佳特性(470±30cm2/Vs之線性遷移率，>104之開關比及-0.1±0.2V之臨限電壓)，且在不同層中的設備之間不存在系統差異。可藉由重複相同程序來向此系統添加額外層。如圖59中所說明，除了具有單一半導體之3D電路以外，可在多層中使用各種半導體以形成完整3D-HGI系統。為了說明此能力，吾人分別使用GaN及Si奈米織帶與SWNT膜而在PI基板上製造MESFET(特定言之，高電子遷移率電晶體HEMT)、MOSFET及TFT之陣列。圖59A及圖59B分別展示所得設備之高放大率光學影像與共焦影像。第一層上之GaN HEMT對於源極及汲極使用歐姆接觸點(Ti/Al/Mo/Au，其於源晶圓上加以退火)，且對於閘極使用肖特基(Ni/Au)接觸點。通道長度與寬度及閘極寬度分別為20μm、170μm及5μm。每一設備使用具有分別為1.2μm、10μm及150μm之厚度、寬度及長度、藉由設備基板上之處理而電互連的GaN織帶(由AlGaN/GaN/AlN之多層堆疊構成)。第二層上之SWNT TFT對於閘極介電質使用SiO2/環氧樹脂，且對於源極、汲極及閘極使用Cr/Au，其具有分別為50μm及200μm之通道長度及寬度。Si MOSFET使用與圖58中所示之設計相同的設計。可藉由使用Si、SWNT及GaN之不同組合來建構各種其他3D-HGI設備(圖61及圖62)。圖59C呈現圖59A及圖59B之系統中的典型設備之電流-電壓特徵。在所有情況中，特性均類似於在源晶圓上製造的特性：GaN HEMT具有-2.4±0.2V之臨限電壓(Vth)、>106之開關比及0.6±0.5mS之轉導；SWNT TFT具有Vth=-5.3±1.5V、>105之開關比及5.9±2.0cm2/Vs之線性遷移率；Si MOSFET具有Vth=0.2±0.3 v、>104之開關比及500±30cm2/Vs之線性遷移率。此等設備之一受關注態樣(其係由對薄PI基板(25μm)、設備(2.4μm)及PI/PU中間層(5μm)之使用而得出)為其機械可撓曲性，此對於在可撓性電子元件中之應用為重要的。吾人將對於圖59A之3D-HGI系統中之Si、SWNT及GaN設備的有效轉導(g eff )評估為撓曲半徑之函數。展示如經正規化為未撓曲狀態下之轉導(g 0eff )的此等資料之圖59D說明對於低至3.7mm之撓曲半徑的穩定效能。 Figure 58 shows the use of a SiO 2 dielectric with doped contacts (formed on the source wafer), plasma enhanced chemical vapor deposition, and for source, 汲 by using the overall process flow illustrated in Figure 57. A three-layer 3D stacked array Si MOSFET fabricated by pole and gate Cr/Au metallized single crystal germanium webbing (24). Each device used three aligned nanoweb webs having widths, thicknesses, and lengths of 87 μm, 290 nm, and 250 μm, respectively. 2A shows a top view optical micrograph of the edge of the system having a layout designed to respectively display portions of the substrate supporting one, two, and three MOSFET layers. The 90 degree rotation of the device geometry of the second layer relative to the first and third layers helps to clarify the layout of the system. A schematic cross-sectional view and a tilted view of the stacked structure appear in Figure 58B. Confocal optical microscopy can be used to view the sample in three dimensions. Figure 58C shows a top view and an oblique view of the images, which are colored for easy viewing. (Image quality is slightly degraded with depth due to scattering and absorption from the upper layer). Figure 58D presents a channel overlap distance of 5.5 μm defined for a representative device in each layer [having a channel length ( L c ) of 19 μm and a distance from a gate electrode extending over the doped source/drain region (Lo ) and the power measurement result of the top gate MOSFET of the channel width (W) of 200 μm. The devices formed on the PI substrate on each of the three layers exhibit excellent characteristics (linear linear mobility of 470 ± 30 cm 2 /Vs, switching ratio of > 10 4 and threshold voltage of -0.1 ± 0.2 V) And there is no systematic difference between devices in different layers. Additional layers can be added to this system by repeating the same procedure. As illustrated in Figure 59, in addition to a 3D circuit having a single semiconductor, various semiconductors can be used in multiple layers to form a complete 3D-HGI system. To illustrate this capability, we used GaN and Si nanowebs and SWNT films to fabricate arrays of MESFETs (specifically, high electron mobility transistor HEMTs), MOSFETs, and TFTs on PI substrates. Figures 59A and 59B show high magnification optical images and confocal images of the resulting device, respectively. The GaN HEMT on the first layer uses ohmic contacts (Ti/Al/Mo/Au, which is annealed on the source wafer) for the source and drain, and Schottky (Ni/Au) contact for the gate. point. The channel length and width and the gate width are 20 μm, 170 μm, and 5 μm, respectively. Each device used a GaN webbing (consisting of a multilayer stack of AlGaN/GaN/AlN) having electrical thicknesses, widths, and lengths of 1.2 μm, 10 μm, and 150 μm, respectively, by processing on the device substrate. The SWNT TFT on the second layer uses SiO 2 /epoxy for the gate dielectric and Cr/Au for the source, drain and gate, with channel lengths and widths of 50 μm and 200 μm, respectively. The Si MOSFET uses the same design as that shown in FIG. Various other 3D-HGI devices can be constructed by using different combinations of Si, SWNT, and GaN (Fig. 61 and Fig. 62). Figure 59C presents the current-voltage characteristics of a typical device in the system of Figures 59A and 59B. In all cases, the characteristics are similar to characteristics of the source manufactured on the wafer: GaN HEMT having a threshold voltage (V th) -2.4 ± 0.2V, the> off ratio of 106 and 0.6 ± 0.5mS of transduction; SWNT TFT has a switching ratio of V th =-5.3±1.5V, >10 5 and a linear mobility of 5.9±2.0cm 2 /Vs; Si MOSFET has a switching ratio of V th =0.2±0.3 v, >10 4 and 500 Linear mobility of ±30 cm 2 /Vs. One of these devices is of interest (which is derived from the use of thin PI substrates (25 μm), devices (2.4 μm), and PI/PU intermediate layers (5 μm)) for its mechanical flexibility. It is important for applications in flexible electronic components. We will evaluate the effective transduction (g eff ) for the Si, SWNT, and GaN devices in the 3D-HGI system of Figure 59A as a function of the deflection radius. Figure 59D, which shows such data as normalized to transconductance ( g0eff ) in an undeflected state, illustrates stable performance for deflection radii as low as 3.7 mm.

形成於此等3D-HGI設備中之不同級之間的電互連可產生引起關注之電路能力。較薄聚合物中間層使得此等互連能夠藉由在微影界定之開口上蒸鍍金屬線或將金屬線蒸鍍至該等開口中而簡單地形成。圖60呈現一些實例。圖60A中所示之第一者為3D NMOS反相器(邏輯閘)，其中驅動(L=4μm，W=200μm)與負載(L=4μm,W=30μm)Si MOSFET處於不同級上。在5V之電源電壓之情況下，此雙層反相器顯示出經良好界定的轉移特徵，其中增益為~2，此與使用類似電晶體之習知平面反相器(25)之效能相當。圖60B展示藉由使用整合之n通道Si MOSFET與p通道SWNT TFT而具有互補設計(CMOS)之反相器，其經設計以使上拉與下拉方向上之電流驅動能力均衡(圖65)。以至VDD端子之5V偏壓及自0V至5V之閘極電壓(輸入)而收集之轉移曲線出現於圖60A中。曲線形狀及增益(高達~7)定性地與數值電路模擬(圖65)相一致。作為第三實例，吾人建立與可撓性PI基板上之Si MOSFET整合的金屬-半導體-金屬(MSM)紅外(IR)偵測器(26)來論證用於製造可用於活性IR成像器中之單胞的能力。在此情況下，轉移至具有Si奈米織帶MOSFET之印刷陣列之基板上的GaAs之印刷奈米織帶(厚度、寬度及長度分別為270μm、100nm及400μm)形成MSM之基礎。沈積於此等GaAs奈米織帶之末端 上的電極(Ti/Au=5/70nm)形成背對背肖特基二極體，其中間隔為10μm。所得偵測器單元顯示出隨IR照射之強度而增大的電流增強(圖60C)，此與電路模擬(圖66)相一致。在不考慮自半導體之表面反射的光之情況下，在1V至5V觀測到於850nm之波長處約0.30A/W之回應率。該系統亦顯示出具有低於1cm之曲率半徑的可撓曲性，此對於諸如廣角IR夜視成像器之彎曲焦平面陣列之進階系統可為有用的。 Electrical interconnections between different stages formed in such 3D-HGI devices can create circuit capabilities that cause concern. The thinner polymeric intermediate layer enables such interconnects to be formed simply by vaporizing metal lines on the openings defined by the lithography or by vapor depositing the metal lines into the openings. Figure 60 presents some examples. The first shown in Fig. 60A is a 3D NMOS inverter (logic gate) in which the driving (L = 4 μm, W = 200 μm) is at a different level from the load (L = 4 μm, W = 30 μm) Si MOSFET. In the case of a supply voltage of 5V, the dual-layer inverter exhibits a well-defined transfer characteristic with a gain of ~2, which is comparable to the performance of a conventional planar inverter (25) using a similar transistor. Figure 60B shows a complementary design (CMOS) inverter with integrated n-channel Si MOSFETs and p-channel SWNT TFTs designed to equalize the current drive capability in the pull-up and pull-down directions (Figure 65). The transfer curve collected with a 5V bias of the VDD terminal and a gate voltage (input) from 0V to 5V appears in Figure 60A. The curve shape and gain (up to ~7) are qualitatively consistent with the numerical circuit simulation (Figure 65). As a third example, we have established a metal-semiconductor-metal (MSM) infrared (IR) detector (26) integrated with a Si MOSFET on a flexible PI substrate to demonstrate that it can be used in an active IR imager. The ability of a single cell. In this case, the GaAs printed nanoweb (thickness, width, and length of 270 μm, 100 nm, and 400 μm, respectively) transferred onto the substrate having the printed array of Si nanoweb MOSFETs forms the basis of the MSM. Deposited at the end of these GaAs nanoribbon ribbons The upper electrode (Ti/Au = 5/70 nm) forms a back-to-back Schottky diode with a spacing of 10 μm. The resulting detector unit showed an increase in current as a function of IR illumination (Fig. 60C), which is consistent with the circuit simulation (Fig. 66). The response rate of about 0.30 A/W at a wavelength of 850 nm was observed at 1 V to 5 V without considering the light reflected from the surface of the semiconductor. The system also exhibits flexibility with a radius of curvature of less than 1 cm, which may be useful for advanced systems such as curved focal plane arrays of wide-angle IR night vision imagers.

印刷半導體奈米材料提供得到3D-HGI系統之新方法且可在各種應用領域中具有重要應用，不僅是此處報告之系統所提示的應用領域，且有其他應用領域，包括具有整合式讀出及感應電子元件之微流體設備、將不常見感應材料與習知矽基電子元件合併之生化感應系統及將化合物半導體之發光器與矽驅動電子元件或微機電結構組合的光子/光電子系統。另外，此方法與較薄輕型塑膠基板之相容性可產生對於具有不常見形狀因數或機械可撓性作為關鍵特徵的設備之額外機會。 Printed semiconductor nanomaterials provide a new approach to 3D-HGI systems and can be used in a variety of applications, not only in the application areas suggested by the systems reported here, but also in other application areas, including integrated readout. And a microfluidic device for inductive electronic components, a biochemical sensing system that combines unusual inductive materials with conventional germanium-based electronic components, and a photonic/photovoltaic subsystem that combines a compound semiconductor illuminator with a germanium drive electronic component or a microelectromechanical structure. In addition, the compatibility of this method with thinner lightweight plastic substrates can create additional opportunities for devices with unusual form factors or mechanical flexibility as key features.

材料及方法：設備製造：矽設備：製造始於藉由處理絕緣體上矽晶圓(SOI；具有290nm之頂部Si層之Soitec unibond，其具有6.0~9.4×1014/cm3之摻雜級)而進行的對單晶矽之接觸點摻雜薄織帶之界定。第一步驟涉及磷摻雜，其使用固源及旋塗式摻雜劑(Filmtronic,P509)且使用電漿增強化學氣相沈積(PECVD)之SiO2(Plasmatherm,300nm,900毫托，350sccm,2%之SiH4/He,795sccm NO2,250℃)的光微影界定之層作為遮罩來控制摻雜劑於何處擴散至矽中。在摻雜之後，經由光阻劑之圖案化層而進行的SF6電漿蝕刻界定織帶。藉由濃HF溶液(Fisher Chemicals)而進行的對內埋氧化物之底切蝕刻將織帶自晶圓釋放。此程序完成單晶矽之接觸點摻雜織帶的製造。在下一步驟中，使聚二甲 基矽氧烷(PDMS,A：B=1：10,Sylgard 184,Dow Corning)之平坦彈性體印模與光阻劑塗佈之織帶接觸，且接著剝離印模，從而將織帶自晶圓移除，且藉由疏水性PDMS與光阻劑之間的凡得瓦爾力使得織帶仍黏附至印模之表面。抵靠旋塗有較薄液態PI前驅物聚醯胺酸(Sigma_Aldrich Inc.)層(~1.5μm)之25μm的聚醯亞胺(PI)薄片來層壓如此以來自晶圓之s-Si織帶而經"塗墨"的印模。使前驅物固化，剝離PDMS印模且汽提光阻劑將織帶保留為嵌埋於PI基板之表面上且良好地黏附至該表面。閘極介電質層由藉由PECVD於相對較低之溫度，250℃下沈積之SiO2層(厚度為~100nm)組成。光微影及CF4電漿蝕刻界定對矽之摻雜源極/汲極區域之開口。在藉由光微影及濕式蝕刻而進行之單一步驟中界定Cr/Au(5/100nm，藉由電子束蒸鍍自底部至頂部而形成，Temescal FC-1800)之源極、汲極及閘極電極。 Materials and Methods: Equipment Manufacturing: Tantalum Equipment: Fabrication begins with the processing of silicon-on-insulator wafers (SOI; Soitec unibond with a top Si layer of 290 nm with a doping level of 6.0 to 9.4 x 10 14 /cm 3 ) The definition of the doped thin ribbon of the contact point of the single crystal germanium is carried out. The first step involves phosphorus doping using solid-state and spin-on dopants (Filmtronic, P509) and using plasma enhanced chemical vapor deposition (PECVD) of SiO 2 (Plasmatherm, 300 nm, 900 mTorr, 350 sccm, A layer of photolithography defined by 2% SiH 4 /He, 795 sccm NO 2 , 250 ° C) acts as a mask to control where the dopant diffuses into the crucible. After doping, the SF 6 plasma etch through the patterned layer of photoresist defines the webbing. The undercut etching of the buried oxide by concentrated HF solution (Fisher Chemicals) releases the webbing from the wafer. This procedure completes the fabrication of a single point germanium contact point doped webbing. In the next step, a flat elastomeric impression of polydimethyloxane (PDMS, A:B = 1:10, Sylgard 184, Dow Corning) is contacted with a photoresist coated webbing, and then peeled off. The mold, thereby removing the webbing from the wafer, and the webbing still adheres to the surface of the stamp by the van der Waals force between the hydrophobic PDMS and the photoresist. The s-Si webbing from the wafer was laminated by a 25 μm polyimine (PI) sheet spin coated with a thin liquid PI precursor polyglycine (Sigma_Aldrich Inc.) layer (~1.5 μm). And the impression of "painting". The precursor was cured, the PDMS stamp was peeled off and the stripping photoresist was left to be embedded on the surface of the PI substrate and adhered well to the surface. The gate dielectric layer consists of a SiO 2 layer (thickness ~100 nm) deposited by PECVD at a relatively low temperature, 250 ° C. Photolithography and CF 4 plasma etching define openings to the doped source/drain regions of the crucible. The source, the bungee and the Cr/Au (5/100 nm formed by electron beam evaporation from the bottom to the top, Temescal FC-1800) are defined in a single step by photolithography and wet etching. Gate electrode.

GaN設備：在具有異質結構[AlGaN(18nm)/GaN(0.6μm)/AlN(0.6μm)/Si]的GaN之塊狀晶圓上製造GaN微結構。歐姆接觸區由AZ 5214光阻劑界定且接著於RIE系統中以SiCl4電漿而加以清洗。Ti/Al/Mo/Au(15nm/60nm/35nm/50nm)金屬層接著藉由電子束蒸鍍(Ti/Al/Mo)及熱蒸鍍(Au)而沈積。洗掉完整之抗蝕劑使金屬接觸點保留於GaN上。在N2環境中於850℃下歷時30秒之熱退火形成歐姆接觸點。SiO2(Plasmatherm,300nm,900毫托，350sccm,2%之SiH4/He,795sccm NO2,250℃)及Cr金屬(電子束蒸鍍器，150nm)層經沈積作為對於隨後的感應耦合電漿(ICP)蝕刻之遮罩材料。光微影、濕式蝕刻及RIE處理(50毫托，40sccm CF4,100W,14分鐘)界定GaN之織帶幾何形狀。在以丙酮移除光阻劑之後，使用ICP乾式蝕刻(3.2毫托，15sccm Cl2,5sccm Ar,-100V偏壓，14分鐘)來移除曝露之GaN且稍稍蝕刻至 Si中(~1.5μm)以促進隨後的各向異性蝕刻。接著藉由使用四甲基銨氫氧化物(Aldrich,150℃，歷時4分30秒)而自GaN下方蝕刻掉Si。將樣本浸漬於BOE(6：1,NH4F：HF)中歷時30秒以移除PECVD SiO2，且將新的50nm之電子束蒸鍍之SiO2層沈積於GaN織帶的頂部上。接著抵靠塗佈有2μm之聚胺基甲酸酯(PU,Norland optical adhesive,No.73)的PI薄片層壓藉由來自母晶圓之GaN織帶而經"塗墨"之PDMS厚片。使樣本曝露於UV光(173μWcm-2)下15分鐘以使PU固化。剝離PDMS且藉由浸沒於BOE中20秒而移除電子束SiO2導致GaN元件向塑膠基板之轉移。使用負性光阻劑(AZ nLOF2020)來圖案化Ni/Au(80/180nm)之肖特基接觸點。藉由AZ汽提器(KWIK，歷時30分鐘)來移除光阻劑。 GaN device: A GaN microstructure was fabricated on a bulk wafer of GaN having a heterostructure [AlGaN (18 nm) / GaN (0.6 μm) / AlN (0.6 μm) / Si]. The ohmic contact region is defined by AZ 5214 photoresist and then cleaned with SiCl 4 plasma in an RIE system. The Ti/Al/Mo/Au (15 nm/60 nm/35 nm/50 nm) metal layer was then deposited by electron beam evaporation (Ti/Al/Mo) and thermal evaporation (Au). The complete resist is washed away to leave the metal contacts on the GaN. Thermal annealing at 850 ° C for 30 seconds in an N 2 environment forms an ohmic contact. SiO 2 (Plasmatherm, 300 nm, 900 mTorr, 350 sccm, 2% SiH 4 /He, 795 sccm NO 2 , 250 ° C) and Cr metal (electron beam evaporator, 150 nm) layer were deposited as a subsequent inductive coupling Pulp (ICP) etched mask material. Photolithography, wet etching, and RIE processing (50 mTorr, 40 sccm CF 4 , 100 W, 14 minutes) define the ribbon geometry of GaN. After removing the photoresist with acetone, ICP dry etching (3.2 mTorr, 15 sccm Cl 2 , 5 sccm Ar, -100 V bias, 14 minutes) was used to remove the exposed GaN and slightly etched into Si (~1.5 μm) ) to promote subsequent anisotropic etching. Si was then etched away from the underside of GaN by using tetramethylammonium hydroxide (Aldrich, 150 ° C for 4 minutes and 30 seconds). The sample was immersed in BOE (6: 1, NH 4 F: HF) for 30 seconds to remove the PECVD SiO 2, and a new electron beam deposition of 50nm of SiO 2 layer is deposited on top of GaN webbing. The PDMS slabs which were "inked" by GaN webbing from the mother wafer were then laminated against PI sheets coated with 2 μm polyurethane (PU, Norland optical adhesive, No. 73). The sample is exposed to UV light (173μWcm -2) for 15 minutes to cure PU. The PDMS was stripped and the electron beam SiO 2 was removed by immersion in BOE for 20 seconds resulting in the transfer of the GaN element to the plastic substrate. A negative photoresist (AZ nLOF2020) was used to pattern the Schottky contact of Ni/Au (80/180 nm). The photoresist was removed by an AZ stripper (KWIK, which lasted 30 minutes).

SWNT設備：使用化學氣相沈積(CVD)來在SiO2/Si晶圓上生長個別單壁碳奈米管之隨機網路。使用連同甲醇而沈積於基板上之鐵蛋白(Sigma Aldrich)作為催化劑。饋入氣體為甲烷(1900sccm CH4連同300sccm H2)。藉由Ar氣之高流動來沖洗爐中之石英管以在生長之前進行清洗。在生長期間，使溫度保持於900℃歷時20分鐘。轉移涉及類似於如先前所描述之製程的印刷之程序或者將厚Au層及PI前驅物塗佈於具有管之SiO2/Si基板上的稍稍不同之方法。在使PI固化之後剝離Au/PI。相對於塗佈有薄環氧樹脂層(SU8,150nm)之經預圖案化之設備基板而層壓此層，且接著分別藉由氧反應性離子蝕刻及濕式蝕刻而移除PI及Au層完成轉移。在底部閘極設備之情況中，基板支撐經預圖案化之閘極電極及介電質。特定言之，藉由光微影而圖案化Cr/Au/Cr(2nm/10nm/10nm)之閘極電極，且接著使用PECVD將300nm之SiO2沈積於基板上。直接於管之頂部界定Cr/Au(2nm/20nm)之源極及汲極電極。 SWNT apparatus: using a chemical vapor deposition (CVD) individually grown single-walled carbon nanotubes of random web on a SiO 2 / Si wafer. Ferritin (Sigma Aldrich) deposited on the substrate together with methanol was used as a catalyst. The feed gas was methane (1900 sccm CH 4 along with 300 sccm H 2 ). The quartz tube in the furnace is flushed by the high flow of Ar gas to be cleaned prior to growth. During the growth, the temperature was maintained at 900 ° C for 20 minutes. The transfer involves a procedure similar to the printing process as described previously or a slightly different method of applying a thick Au layer and a PI precursor to a SiO 2 /Si substrate having a tube. The Au/PI was peeled off after the PI was cured. The layer is laminated with respect to a pre-patterned device substrate coated with a thin epoxy layer (SU8, 150 nm), and then the PI and Au layers are removed by oxygen reactive ion etching and wet etching, respectively. Complete the transfer. In the case of a bottom gate device, the substrate supports the pre-patterned gate electrode and dielectric. Specifically, a gate electrode of Cr/Au/Cr (2 nm/10 nm/10 nm) was patterned by photolithography, and then 300 nm of SiO 2 was deposited on the substrate using PECVD. The source and drain electrodes of Cr/Au (2 nm/20 nm) are defined directly on top of the tube.

3D電路：3D Si NMOS反相器：藉由重複應用相同製造程序來建構多層設備。特定言之，將PI前驅物旋轉澆鑄於設備之現有層之頂部，且將矽織帶轉印於頂部。接著使用相同製程來製造設備。對於豎直金屬互連，藉由在AZ4620光阻劑之層中光圖案化開口，且接著藉由於RIE系統中使用CF4及O2電漿蝕刻掉此曝露區中之SiO2及PI而界定電極區。向此區中沈積300nm之Al於底部建立接觸，且在藉由蝕刻之SiO2及PI而形成之階梯邊緣上提供電連續連接。 3D Circuitry: 3D Si NMOS Inverter: Constructs a multi-layer device by repeatedly applying the same manufacturing process. Specifically, the PI precursor is spun cast on top of the existing layer of the device and the webbing is transferred to the top. The same process is then used to fabricate the device. For vertical metal interconnects, the openings are photopatterned in a layer of AZ4620 photoresist and then defined by etching the SiO 2 and PI in the exposed regions using CF 4 and O 2 plasma in the RIE system. Electrode zone. A 300 nm Al is deposited in this region to establish contact at the bottom, and an electrical continuous connection is provided on the step edge formed by etching of SiO 2 and PI.

SWNT及Si CMOS反相器：SWNT設備由藉由光微影在管網路上界定的Au(20nm)之源極/汲極接觸點組成。SiO2(100nm)/Si晶圓基板提供閘極介電質及閘極。接著在選擇性地以光阻劑(AZ5214)塗佈SWNT電晶體之後將環氧樹脂(SU8,500nm)旋塗至此基板上。在用於環氧樹脂之固化的UV曝露之後，抵靠基板而層壓以未摻雜Si織帶"塗墨"之PDMS厚片，且隨後藉由緩慢人工剝離來移除該厚片以完成轉印製程。使用Cr/Au(5nm/100nm)作為對於矽設備中之源極及汲極電極之肖特基接觸點。使用Al(100nm)以連接SWNT與Si電晶體。 SWNT and Si CMOS Inverters: SWNT devices consist of source/drain contacts of Au (20 nm) defined by photolithography on the tube network. The SiO 2 (100 nm) / Si wafer substrate provides a gate dielectric and a gate. An epoxy resin (SU8, 500 nm) was then spin coated onto the substrate after selectively coating the SWNT transistor with a photoresist (AZ5214). After UV exposure for curing of the epoxy resin, a PDMS slab that is "ink-coated" with an undoped Si web is laminated against the substrate, and then the slab is removed by slow manual stripping to complete the transfer. Printing process. Cr/Au (5 nm/100 nm) was used as the Schottky contact point for the source and drain electrodes in the germanium device. Al (100 nm) was used to connect the SWNTs to the Si transistors.

整合有Si TFT之GaAs MSM IR偵測器：使用GaAs晶圓(IQE Inc.,Bethlehem,PA.)以產生背對背肖特基二極體。由具有多個磊晶層[摻雜Si之n型GaAs(120nm)/半絕緣(SI)-GaAs(150nm)/AlAs(200nm)/SI-GaAs]的GaAs之高品質塊狀晶圓產生織帶。n型GaAs之載體濃度為4×1017cm-3。在蝕刻劑(4mL H3PO4(85重量%)、52mL H2O2(30重量%)及48mL去離子水)中對具有光阻劑遮罩圖案之GaAs晶圓進行各向異性蝕刻。以乙醇中之稀HF溶液(在體積上為1：2)來蝕刻掉AlAs層。接著藉由電子束蒸鍍器沈積2nm之Ti及28nm之SiO2之層。接著使以GaAs織帶塗 墨之PDMS印模與塗佈有PI的Si電晶體之層(厚度為1.5μm)接觸。剝離PDMS且藉由BOE蝕刻劑移除Ti及SiO2完成GaAs向設備基板之轉移。藉由電子束蒸鍍而沈積用於肖特基接觸點之金屬(Ti/Au=5nm/70nm)。藉由首先圖案化AZ4620光阻劑之層，接著於RIE系統中使用CF4及O2電漿蝕刻穿開口且接著沈積300nm之Al來界定GaAs背對背肖特基二極體與Si MOSFET之間的電互連。 GaAs MSM IR detector integrated with Si TFT: GaAs wafers (IQE Inc., Bethlehem, PA.) were used to create back-to-back Schottky diodes. Ribbon produced from a high quality bulk wafer of GaAs with multiple epitaxial layers [n-doped n-type GaAs (120 nm) / semi-insulating (SI) - GaAs (150 nm) / AlAs (200 nm) / SI-GaAs] . The carrier concentration of the n-type GaAs is 4 × 10 17 cm -3 . The GaAs wafer having the photoresist mask pattern was anisotropically etched in an etchant (4 mL H 3 PO 4 (85% by weight), 52 mL H 2 O 2 (30% by weight), and 48 mL of deionized water). The AlAs layer was etched away with a dilute HF solution in ethanol (1:2 in volume). A layer of 2 nm of Ti and 28 nm of SiO 2 was then deposited by an electron beam evaporator. Next, a PDMS stamp coated with a GaAs web was brought into contact with a layer (having a thickness of 1.5 μm) of a PI-coated Si transistor. The transfer of GaAs to the device substrate is accomplished by stripping the PDMS and removing Ti and SiO 2 by the BOE etchant. A metal (Ti/Au = 5 nm / 70 nm) for the Schottky contact was deposited by electron beam evaporation. Between the GaAs back-to-back Schottky diode and the Si MOSFET is defined by first patterning the layer of AZ4620 photoresist, followed by etching the openings in the RIE system using CF 4 and O 2 plasma and then depositing 300 nm of Al. Electrical interconnection.

設備表徵：使用半導體參數分析器(Agilent,4155C)及習知探測台來進行二極體及電晶體之電表徵。在具有850nm之波長的IR LED源下量測IR回應。 Equipment Characterization: Electrical characterization of diodes and transistors was performed using a semiconductor parameter analyzer (Agilent, 4155C) and a conventional probe station. The IR response was measured at an IR LED source having a wavelength of 850 nm.

電路模擬：為了比較CMOS反相器之量測而得之轉移曲線與一模擬，經驗地產生對於n通道Si MOSFET與p通道SWNT TFT之2級PSPICE模型。基於預設PSPICE MOSFET模型(MbreakN及MbreakP)而產生此等PSPICE模型，該預設PSPICE MOSFET模型具有提取之參數來配合圖65B所示之Si NMOS及SWNT PMOS之量測而得的四個曲線。藉由使用與Si MOSFET串連連接之背對背肖特基二極體而經驗地產生對於GaAs MSM光偵測器之PSPICE模型。 Circuit Simulation: A 2-stage PSPICE model for n-channel Si MOSFETs and p-channel SWNT TFTs is empirically generated to compare the transfer curves of a CMOS inverter with a simulation. These PSPICE models are generated based on a preset PSPICE MOSFET model (MbreakN and MbreakP) having extracted parameters to match the four curves of the Si NMOS and SWNT PMOS measurements shown in FIG. 65B. The PSPICE model for a GaAs MSM photodetector is empirically generated by using a back-to-back Schottky diode connected in series with a Si MOSFET.

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美國專利申請案第11/115,954號、第11/145,574號、第11/145,542號、第60/863,248號、第11/465,317號、第11/423,287號、第11/423,192號及第11/421,654號在不與本發明之描述不一致的程度上以引用方式併入本文中。 U.S. Patent Application Serial Nos. 11/115,954, 11/145,574, 11/145,542, 60/863,248, 11/465,317, 11/423,287, 11/423,192, and 11/421,654 The number is incorporated herein by reference to the extent that it is not inconsistent with the description of the invention.

遍及此申請案之所有參考文獻(例如包括經頒予或授予之專利或等效物之專利文件；專利申請公開案；及非專利文獻或其他源材料)在每一參考文獻至少部分不與本申請案之揭示內容不一致的程度上(例如，部分不一致之參考文獻藉由引用除了該參考文獻之部分不一致之部分以外的部分而併入)以全文引用之方式併入本文中，如同個別地以引用方式併入一般。 All references (such as patent documents including patents or equivalents granted or granted); patent application publications; and non-patent literature or other source materials are at least partially inconsistent with each reference in this application. To the extent that the disclosure of the application is inconsistent (e.g., a partially inconsistent reference is incorporated by reference to a portion other than the inconsistent portion of the reference), which is incorporated herein by reference in its entirety as if individually The reference is incorporated into the general.

本文已使用之術語及表達係用作描述之術語且非限制之術語，且在使用該等術語及表達中不欲排除所展示及描述的特徵之任何等效物或其部分，但應認識到，各種修改在所主張的本發明之範疇內為可能的。因此，應瞭解，雖然已藉由較佳實施例、例示性實施例及可選特徵而特別揭示本發明，但可由熟習此項技術者採用對本文揭示之概念的修改及變化，且應瞭解，將該等修改及變化視作處於由所附申請專利範圍界定之本發明之範疇內。本文提供之特定實施例為本發明之有用實施例的實例，且熟習此項技術者將易瞭解，可藉由使用本發明之描述中所闡述之設備、設備組件、方法步驟之大量變化來執行本發明。如對於熟習此項技術者為明顯的，對於本發明之方法有用之方法及設備可包括大量可選組成及處理元件及步驟。 The terms and expressions used herein are used to describe terms and not to limit the terms, and the use of such terms and expressions are not intended to exclude any equivalents or parts of the features shown and described, but Various modifications are possible within the scope of the claimed invention. Therefore, it is to be understood that the invention may be <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; Such modifications and variations are considered to be within the scope of the invention as defined by the appended claims. The specific embodiments provided herein are examples of useful embodiments of the present invention and will be readily understood by those skilled in the art, which can be practiced by a large number of variations of the apparatus, device components, and method steps described in the description of the invention. this invention. As will be apparent to those skilled in the art, the methods and apparatus useful for the methods of the present invention can include a wide variety of optional components and processing elements and steps.

除非另行規定，否則本文描述或舉例說明之組件的每一表述或組合可用以實踐本發明。 Each expression or combination of components described or exemplified herein may be used to practice the invention, unless otherwise specified.

在說明書中無論何時給出一範圍(例如，溫度範圍、時間範圍或者組成或濃度範圍)時，所有中間範圍及子範圍以及所給出之範圍中包括的所有個別值均欲包括於揭示內容中。應瞭解，包括於本文之描述中的任何子範圍或者範圍或子範圍中之個別值可自本文之申請專利範圍排除。 Whenever a range (eg, temperature range, time range, or composition or concentration range) is given in the specification, all intermediate ranges and sub-ranges and all individual values included in the range given are intended to be included in the disclosure. . It is understood that any sub-range or range of sub-ranges or sub-ranges included in the description herein may be excluded from the scope of the patent application herein.

說明書中提及之所有專利及公開案指示熟習與本發明有關 之技術者之技術水準。本文引用之參考文獻以其全文引用之方式併入本文中以指示在其出版或申請日期時的技術狀態，且意欲此資訊可在需要時使用於本文中以排除處於先前技術中之特定實施例。舉例而言，在主張物質之組成時，應瞭解，在先於申請者之發明之前的技術中已知並可用之化合物(包括在本文引用之參考文獻中提供致能揭示案所關於的化合物)不欲包括於本文所主張的物質組成中。 All patents and publications mentioned in the specification are familiar with the present invention. The technical level of the technician. The references cited herein are hereby incorporated by reference in their entirety to the extent of the disclosure of the disclosure of the disclosure of the disclosure of . For example, when advocating the composition of a substance, it is to be understood that the compounds are known and available in the prior art prior to the applicant's invention (including the disclosure of the compounds referred to in the references cited herein) It is not intended to be included in the composition of matter claimed herein.

在用於本文中時，"包含"與"包括"、"含有"或"以......為特徵"同義且為包括性或開放式的，且不排除額外未敍述之元件或方法步驟。在用於本文中時，"由......組成"排除在所主張之元件中未規定的任何元件、步驟或成份。在用於本文中時，"本質上由......組成"不排除不在本質上影響申請專利範圍之基本及新穎特徵的材料或步驟。在本文之每一例子中，術語"包含"、"本質上由...組成"及"由...組成"中之任一者可由另兩個術語中之任一者替代。可在缺少未於本文中特別揭示之任何元件、限制的情況下實踐在本文中適當地以說明方式描述之本發明。 As used herein, "including" is synonymous with "including", "containing" or "characterized" and is inclusive or open, and does not exclude additional elements or methods not described. step. As used herein, "consisting of" excludes any element, step or component that is not specified in the claimed element. As used herein, "consisting essentially of" does not exclude materials or steps that do not materially affect the basic and novel characteristics of the claimed invention. In each of the examples herein, any of the terms "comprising," "consisting essentially of," and "consisting of" may be replaced by any of the other two terms. The invention as described herein suitably illustrated in the present specification may be practiced in the absence of any elements or limitations not specifically disclosed herein.

一般熟習此項技術者將瞭解，可在實踐本發明時使用除特別舉例說明之內容以外的起始材料、生物材料、試劑、合成方法、純化方法、分析方法、檢定方法及生物學方法而無需採用過度實驗。該等材料及方法的所有技術已知之功能等效物意欲包括於本發明中。已使用之術語及表達係用作描述之術語且非限制之術語，且在使用該等術語及表達中不欲排除所展示及描述的特徵之任何等效物或其部分，但應認識到，各種修改在所主張的本發明之範疇內為可能的。因此，應瞭解，雖然已藉由較佳實施例及可選特徵而特別揭示本發明，但可由熟習此項技術者採用對本文揭示之概念的修改及變化，且應瞭解，將該等 修改及變化視作處於由所附申請專利範圍界定之本發明之範疇內。 It will be apparent to those skilled in the art that starting materials, biological materials, reagents, synthetic methods, purification methods, analytical methods, assay methods, and biological methods other than those specifically illustrated may be used in the practice of the present invention without Excessive experimentation was used. Functional equivalents of all techniques known to the materials and methods are intended to be included in the present invention. The use of the terms and expressions are used to describe terms and not to limit the terms, and the use of such terms and expressions is not intended to exclude any equivalents or parts of the features shown and described, but it should be recognized that Various modifications are possible within the scope of the claimed invention. Therefore, it is to be understood that the invention may be <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; Modifications and variations are considered to be within the scope of the invention as defined by the appended claims.

Claims (21)

一種二維設備陣列，其包含：一可撓性基板，其具有一支撐表面；至少一個設備組件(device component)，其被支撐於該支撐表面上；及至少兩個可延伸互連(interconnects)，該至少兩個可延伸互連之每一者具有一第一末端、一第二末端、及位於該第一末端與該第二末端之間的一中央部分，其中該至少兩個可延伸互連自該支撐表面之一平面中之該至少一個設備組件沿著至少兩個不同之方向延伸，以形成該二維設備陣列，其中該至少兩個可延伸互連之每一者之該第一末端與該至少一個設備組件電通聯，其中該至少兩個可延伸互連之該中央部分包含至少兩個撓曲(bent)組態區域及位於該至少兩個撓曲組態區域之間的至少一個接觸點，其中每一撓曲組態區域具有一非線性構形(conformation)且不與該可撓性基板之該支撐表面實體接觸，且其中該至少一個接觸點之每一者與該可撓性基板之該支撐表面實體通聯。 A two-dimensional device array comprising: a flexible substrate having a support surface; at least one device component supported on the support surface; and at least two extendable interconnects Each of the at least two extendable interconnects has a first end, a second end, and a central portion between the first end and the second end, wherein the at least two extendable The at least one device component in a plane from the support surface extends in at least two different directions to form the two-dimensional device array, wherein the first of each of the at least two extendable interconnects An end is electrically coupled to the at least one device component, wherein the central portion of the at least two extendable interconnects includes at least two bent configuration regions and at least between the at least two flex configuration regions a contact point, wherein each flex configuration region has a non-linear conformation and is not in physical contact with the support surface of the flexible substrate, and wherein each of the at least one contact point The surface of a solid support may be a flexible substrate of Communications. 如請求項1之二維設備陣列，其中每一撓曲組態區域為彎曲狀的。 A two-dimensional array of devices as claimed in claim 1, wherein each of the flex configuration regions is curved. 如請求項1之二維設備陣列，其中該至少一個接觸點結合至該可撓性基板之該支撐表面。 The array of two-dimensional devices of claim 1, wherein the at least one contact point is bonded to the support surface of the flexible substrate. 如請求項1之二維設備陣列，其中該至少一個設備組件包含 選自由一金屬、一半導體、一絕緣體、一壓電材料、一鐵電材料、一磁致伸縮材料、一電致伸縮材料、一超導體、一鐵磁材料、及一熱電材料所組成之群組之一或多個材料。 The two-dimensional device array of claim 1, wherein the at least one device component comprises Selecting a group consisting of a metal, a semiconductor, an insulator, a piezoelectric material, a ferroelectric material, a magnetostrictive material, an electrostrictive material, a superconductor, a ferromagnetic material, and a thermoelectric material One or more materials. 如請求項1之二維設備陣列，其中該至少一個設備組件係一電子設備、一光學設備、一光電設備、一機械設備、一微機電設備、一奈米機電設備、一微流體設備或一熱設備。 The two-dimensional device array of claim 1, wherein the at least one device component is an electronic device, an optical device, an optoelectronic device, a mechanical device, a microelectromechanical device, a nanometer electromechanical device, a microfluidic device or a Thermal equipment. 如請求項5之二維設備陣列，其中該至少兩個可延伸互連係可調設備組件，其每一者具有選擇性地隨由該至少兩個撓曲組態區域所提供之該中央部分之一應變位準而改變之至少一電性質、光性質或機械性質。 The array of two-dimensional devices of claim 5, wherein the at least two extendable interconnect-tunable device components each have a portion of the central portion selectively provided by the at least two flex configuration regions At least one electrical property, optical property or mechanical property that is altered by a strain level. 如請求項1之二維設備陣列，其中該至少兩個可延伸互連係複數個可延伸互連，且其中該複數個可延伸互連之至少一者包含與該支撐表面實體通聯之該至少一個接觸點及延伸自該至少一個接觸點之三個或三個以上之撓曲組態區域。 The two-dimensional device array of claim 1, wherein the at least two extendable interconnects are a plurality of extendable interconnects, and wherein at least one of the plurality of extendable interconnects comprises the at least one of the plurality of extendable interconnects a contact point and three or more flex configuration regions extending from the at least one contact point. 如請求項1之二維設備陣列，其中該至少兩個可延伸互連之每一者進一步包含與該第一末端、該第二末端、或該第一末端及該第二末端兩者電接觸之一或多個接觸墊。 The two-dimensional device array of claim 1, wherein each of the at least two extendable interconnects further comprises electrical contact with the first end, the second end, or both the first end and the second end One or more contact pads. 如請求項8之二維設備陣列，其中該至少一個設備組件與該一或多個接觸墊電接觸。 A two-dimensional array of devices as claimed in claim 8, wherein the at least one device component is in electrical contact with the one or more contact pads. 如請求項1之二維設備陣列，其中該至少兩個可延伸互連之每一者具有一捲曲構形、一起皺構形、一彎曲構形及/或一波狀組態。 The two-dimensional array of devices of claim 1, wherein each of the at least two extendable interconnects has a crimp configuration, a wrinkle configuration, a curved configuration, and/or a wave configuration. 如請求項1之二維設備陣列，其中該至少兩個撓曲組態區域之每一者包含一摺疊區域、一凸起區域、一凹入區域或其任何組合。 The two-dimensional array of devices of claim 1, wherein each of the at least two flex configuration regions comprises a folded region, a raised region, a recessed region, or any combination thereof. 如請求項1之二維設備陣列，其中該可撓性基板包含一彈性體材料。 The two-dimensional array of devices of claim 1, wherein the flexible substrate comprises an elastomeric material. 如請求項1之二維設備陣列，其中該至少一個設備組件係複數個設備組件，且其中該至少兩個可延伸互連係複數個可延伸互連。 The two-dimensional device array of claim 1, wherein the at least one device component is a plurality of device components, and wherein the at least two extendable interconnects are a plurality of extendable interconnects. 如請求項13之二維設備陣列，其中該二維設備陣列具有具有一柵格組態、一花形組態、一橋接組態或其任何組合。 The two-dimensional device array of claim 13, wherein the two-dimensional device array has a grid configuration, a flower configuration, a bridge configuration, or any combination thereof. 如請求項13之二維設備陣列，其中該複數個設備組件之一或多者藉由該複數個可延伸互連而連接至相鄰之若干個設備組件。 The two-dimensional device array of claim 13, wherein one or more of the plurality of device components are connected to adjacent ones of the plurality of device components by the plurality of extendable interconnects. 如請求項15之二維設備陣列，其中該複數個可延伸互連之至少一者係定向於與該複數個可延伸互連之另一者不同之一方向。 The two-dimensional array of devices of claim 15, wherein at least one of the plurality of extendable interconnects is oriented in a different direction than the other of the plurality of extendable interconnects. 如請求項13之二維設備陣列，其中該二維設備陣列之至少一部分包含彼此在一方向上平行對準之該複數個可延伸互連之兩個或兩個以上之可延伸互連或在兩個或兩個以上的方向上定向之該複數個可延伸互連之兩個或兩個以上之可延伸互連。 The two-dimensional device array of claim 13, wherein at least a portion of the two-dimensional device array comprises two or more extendable interconnects of the plurality of extendable interconnects aligned in parallel with each other in one direction or in two Two or more extendable interconnects of the plurality of extendable interconnects oriented in one or more directions. 如請求項13之二維設備陣列，其中該二維設備陣列包含兩個或兩個以上之設備層，且其中每一設備層包含複數個該設備組件及複數個該可延伸互連。 The two-dimensional device array of claim 13, wherein the two-dimensional device array comprises two or more device layers, and wherein each device layer comprises a plurality of the device components and a plurality of the extendable interconnects. 如請求項13之二維設備陣列，其中該可撓性基板之該支撐表面之至少一部份係彎曲狀、凹入、突起或半球形的。 The two-dimensional array of devices of claim 13, wherein at least a portion of the support surface of the flexible substrate is curved, concave, convex or hemispherical. 如請求項13之二維設備陣列，其中該二維設備陣列包含下列之一或多者：一光偵測器、一光二極體陣列、一顯示器、一發光設備、一光伏打設備、一感測器陣列、一薄片 掃描器、一LED顯示器、一半導體雷射陣列、一光學成像系統、一大面積電子元件、一電晶體陣列、一邏輯閘陣列、一微處理器、一積體電路或其任何組合。 The two-dimensional device array of claim 13, wherein the two-dimensional device array comprises one or more of the following: a photodetector, a photodiode array, a display, a illuminating device, a photovoltaic device, and a sense Array of detectors, a thin slice A scanner, an LED display, a semiconductor laser array, an optical imaging system, a large area electronic component, a transistor array, a logic gate array, a microprocessor, an integrated circuit, or any combination thereof. 如請求項13之二維設備陣列，其中該二維設備陣列具有一花形組態，其中該至少兩個可延伸互連係複數個可延伸互連，且其中該複數個可延伸互連之至少一者包含：至少一個接觸點，其與該支撐表面實體通聯；及延伸自該至少一個接觸點之三個或三個以上之撓曲組態區域。 The two-dimensional device array of claim 13, wherein the two-dimensional device array has a flower-shaped configuration, wherein the at least two extendable interconnects are a plurality of extendable interconnects, and wherein at least one of the plurality of extendable interconnects The method includes: at least one contact point physically associated with the support surface; and three or more flex configuration regions extending from the at least one contact point.
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