"互連"指代能夠與組件建立電連接或在組件之間建立電連接之導電材料。特定言之,互連可在分離及/或可相對於彼此移動之組件之間建立電接觸。視所要設備規格、操作及應用而定,互連由合適材料製成。對於需要高傳導性之應用而言,可使用典型互連金屬,包括(但不限於)銅、銀、金、鋁及其類似物、合金。合適傳導材料可包括如矽、氧化銦錫或GaAs之半導體。"半導體"指代於非常低之溫度下為絕緣體,但在約300克耳文之溫度下具有明顯電導率之任何材料。在本描述中,對術語半導體之使用意欲與在微電子及電子設備之技術中對此術語之使用相一致。在本發明中有用之半導體可包含元素半導體,諸如矽、鍺及金剛石,以及化合物半導體,諸如:諸如SiC及SiGe之第IV族化合物半導體、諸如AlSb、AlAs、Aln、AlP、BN、GaSb、GaAs、GaN、GaP、InSb、InAs、InN及InP之第III-V族半導體、諸如Alx
Ga1-x
As之第III-V族三元化合物半導體合金、諸如CsSe、CdS、CdTe、ZnO、ZnSe、ZnS及ZnTe之第II-VI族半導體、第I-VII族半導體CuCl、諸如PbS、PbTe及SnS之第IV-VI族半導體、諸如Pbl2
、MoS2
及GaSe之層狀半導體及諸如CuO及Cu2
O之氧化物半導體。術語半導體包括本徵半導體及非本徵半導體,該等非本徵半導體摻有一或多種選定材料(包括具有p型摻雜材料及n型摻雜材料之半導體)以提供對給定應用或設備有用之有益電子特性。術語半導體包括包含半導體及/或摻雜劑之混合物的複合材料。在本發明之一些應用中有用之特定半導體材料包括(但不限於)Si、Ge、SiC、AlP、AlAs、AlSb、GaN、GaP、GaAs、GaSb、InP、InAs、GaSb、InP、InAs、InSb、ZnO、ZnSe、ZnTe、CdS、CdSe、ZnSe、ZnTe、CdS、CdSe、CdTe、HgS、PbS、PbSe、PbTe、AlGaAs、AlInAs、AlInP、GaAsP、GaInAs、GaInP、AlGaAsSb、AlGaInP及GaInAsP。多孔矽半導體材料對於本發明在感應器及發光材料(諸如發光二極體(LED)及固態雷射)之領域中的應用為有用的。半導體材料之雜質為除半導體材料自身或提供至半導體材料之任何摻雜劑以外之原子、元素、離子及/或分子。雜質為存在於半導體材料中的可能消極地影響半導體材料之電子特性之不合需要的材料,且包括(但不限於)氧、碳及包括重金屬之金屬。重金屬雜質包括(但不限於)週期表上處於銅與鉛之間的族之元素、鈣、鈉及其所有離子、化合物及/或錯合物。 "可延伸"之互連在本文中用以廣泛地指代能夠經受在一或多個方向上的諸如延伸、撓曲及/或壓縮之多種力及應變而不會有害地影響至設備組件之電連接或自設備組件之電導的互連。因此,可延伸互連可由諸如GaAs之相對脆性之材料形成,然而歸因於互連之幾何組態而即使在曝露於顯著變形力(例如,延伸、撓曲、壓縮)下時仍能夠持續起作用。在一例示性實施例中,可延伸互連可經受大於約1%、10%或約30%之應變而不斷裂。在一實例中,藉由使互連之至少一部分所結合至之下伏彈性體基板延伸而產生應變。 使用"設備組件"以廣泛地指代電氣設備內之個別組件。組件可為光電二極體、LED、TFT、電極、半導體、其他光收集/偵測組件、電晶體、積體電路、能夠收納設備組件之接觸焊墊、薄膜設備、電路元件、控制元件、微處理器、傳感器及其組合中之一或多者。如諸如金屬蒸鍍、導線結合、固體或導電膏之施加的技術中所已知,設備組件可連接至一或多個接觸焊墊。電氣設備一般指代併有複數個設備組件之設備,且包括較大面積之電子元件、印刷線路板、積體電路、設備組件陣列、生物及/或化學感應器、物理感應器(例如,溫度、光、輻射等等)、太陽能電池或光伏打陣列、顯示器陣列、集光器、系統及顯示器。 "基板"指代具有能夠支撐包括設備組件或互連之組件之表面的材料。"結合"至基板之互連指代互連之與基板處於實體接觸且實質上不能夠相對於所結合至之基板表面移動的部分。相反,未結合之部分能夠相對於基板作顯著移動。互連之未結合部分一般對應於(諸如)藉由應變誘發之互連撓曲而具有"撓曲組態"之部分。 在此描述之上下文中,"撓曲組態"指代具有由力之施加所導致之彎曲構形之結構。在本發明中,撓曲結構可具有一或多個摺疊區域、凸起區域、凹入區域及其任何組合。舉例而言,可以捲曲構形、起皺構形、彎曲構形及/或波狀(亦即,波紋狀)組態而提供在本發明中有用之撓曲結構。 諸如可延伸撓曲互連之撓曲結構可以撓曲結構處於應變下之構形而結合至諸如聚合物及/或彈性基板之可撓性基板。在一些實施例中,諸如撓曲織帶結構之撓曲結構處於等於或小於約30%之應變下、等於或小於約10%之應變下、等於或小於約5%之應變下,且在對於一些應用為較佳之實施例中,處於等於或小於約1%之應變下。在一些實施例中,諸如撓曲織帶結構之撓曲結構處於自約0.5%至約30%之範圍中選擇之應變下、自約0.5%至約10%之範圍中選擇的應變下、自約0.5%至約5%之範圍中選擇之應變下。或者,可延伸撓曲互連可結合至係設備組件之基板的基板,該基板包括自身非可撓性之基板。基板自身可為平坦、大體上平坦、彎曲、具有銳緣或其任何組合。可延伸撓曲互連可用於轉移至此等複雜基板表面形狀中之任何一或多者。 互連可具有任何數目之幾何形狀或形狀,只要該幾何形狀或形狀促進互連在不破裂之情況下的撓曲或延伸即可。可將一般互連幾何形狀描述為"彎曲"或"波狀"。在一態樣中,可由藉由對下伏可變形基板施加力以使得下伏基板之尺寸的改變在互連中產生彎曲或波紋(因為互連之部分結合至基板,且結合部分之間的區域未結合)而對互連施加力(例如,應變)來獲得彼幾何形狀。因此,可藉由結合至基板之末端及末端之間未與基板結合之彎曲中央部分來界定個別互連。"彎曲"指代相對複雜之形狀,諸如對於在中央部分具有一或多個額外結合區域之互連之情況。"弧狀"指代具有振幅之一般呈正弦之形狀,其中振幅對應於互連與基板表面之間的最大分離距離。 互連可具有任何橫截面形狀。一形狀之互連為織帶狀互連。"織帶"指代具有厚度及寬度的大體上呈矩形形狀之橫截面。特定尺寸視經由互連之所要傳導性、互連之組成及使鄰近設備組件電連接之互連的數目而定。舉例而言,使鄰近組件連接之橋接組態的互連可具有與使鄰近組件連接之單一互連不同之尺寸。因此,只要產生合適電導率,尺寸可具有任何合適值,諸如在約10 μm與1 cm之間的寬度及在約50 nm與1 nm之間的厚度,或者在約0.001與0.1之間的範圍內之寬度厚度比,或約為0.01之比。 "彈性體"指代可延伸或變形且至少部分地返回其原始形狀而無顯著永久變形之聚合材料。彈性體基板通常經受實質上之彈性變形。在本發明中有用之例示性彈性體基板包括(但不限於)彈性體及彈性體之複合材料或混合物,以及顯示出彈性之聚合物及共聚物。在一些方法中,經由沿一或多個主軸提供彈性基板之擴展之機構來對彈性體基板預加應變。舉例而言,可藉由使彈性基板沿第一軸擴展(包括用以將半球形表面變換為平坦表面的在徑向方向上之擴展)而提供預加應變。或者,可沿複數個軸來擴展彈性基板(例如經由沿相對於彼此正交定位之第一與第二軸的擴展)。經由提供彈性基板之擴展之機構而對彈性基板預加應變的手段包括撓曲、捲繞、折曲、平整、擴展彈性基板或以其他方式使彈性基板變形。預加應變之手段亦包括藉由升高彈性基板之溫度,藉此提供彈性基板之熱膨脹而提供之預加應變。在本發明中有用之彈性體可包括(但不限於)熱塑性彈性體、苯乙烯類材料、烯烴材料、聚烯烴、聚胺基甲酸酯熱塑性彈性體、聚醯胺、合成橡膠、PDMS、聚丁二烯、聚異丁烯、聚(苯乙烯-丁二烯-苯乙烯)、聚胺基甲酸酯、聚氯丁烯及聚矽氧。 將對於長度自L(處於靜止)變為L+ΔL(在所施加之力下)之應變界定為:ε=ΔL/L,其中ΔL為自靜止之移位距離。軸向應變指代施加至基板之軸以產生移位ΔL之力。亦藉由在其他方向上施加之力來產生應變,諸如撓曲力、壓縮力、剪切力及其任何組合。亦可藉由將彎曲表面延伸為平坦表面或是相反過程來產生應變或壓縮。 "楊氏模數(Young's modulus)"為材料、設備或層之機械特性,其指代對於給定物質,應力與應變之比。楊氏模數可由以下表達式提供;; (II) 其中E為楊氏模數,L0
為平衡長度,ΔL為在所施加之應力下的長度改變,F為所施加之力且A為力所施加於之面積。亦可經由下式而以拉梅常數(Lame constant)來表達楊氏模數:; (III) 其中λ及μ為拉梅彈性常數。高楊氏模數(或"高模數")及低楊氏模數(或"低模數")為對於給定材料、層或設備中之楊氏模數之量值的相對描述符。在本發明中,高楊氏模數大於低楊氏模數,對於一些應用較佳地大約10倍,對於其他應用更佳大約100倍且對於其他應用甚至更佳大約1000倍。藉由使具有空間變化之楊氏模數之彈性體聚合及/或藉由以在各個位置處具有不同彈性之多個層而使彈性體層化來獲得複雜表面形狀。 壓縮在本文中以與應變類似之方式而使用,但特別指代用以減小基板之特徵性長度或體積之力,從而ΔL<0。 "斷裂"指代互連中之實體破裂,其使得互連實質上不能夠導電。 "結合位點之圖案"指代結合手段對支撐基板表面及/或對互連之空間應用,其使得所支撐之互連具有與基板之結合區域及未結合區域。舉例而言,於末端結合至基板且在中央部分未結合之互連。進一步之形狀控制藉由在中央部分中提供額外結合位點以使得未結合之區域被劃分為兩個不同的中央部分而為可能的。結合手段可包括黏著劑、黏著前驅物、熔接、光微影、光可固化聚合物。一般而言,結合位點可藉由多種技術而加以圖案化,且可在能夠提供基板與特徵(例如,互連)之間的強黏著力之表面活性(Wact
)區域及黏著力相對較弱之表面非活性(Win
)的方面加以描述。可在Wact
與Win
之尺寸方面描述以黏著方式圖案化成直線之基板。彼等變數連同預加應變之量值εpre
影響互連幾何形狀。 藉由以下非限制性實例可進一步瞭解本發明。本文引用之所有參考文獻在不與隨附揭示內容不一致的程度上以引用方式併入本文中。雖然本文之描述含有許多特定細節,但此等特定細節不應解釋為限制本發明之範疇,而應解釋為僅僅提供對本發明之目前較佳的實施例中之一些之說明。因此,本發明之範疇應由所附申請專利範圍及其等效物判定而非由給出之實例所判定。 圖1大體概述用於製造彎曲或波狀互連之一方法。在基板20上提供金屬特徵10(諸如將為互連之金屬特徵)。視情況可(諸如)藉由光微影或以蔽蔭遮罩而處理接觸金屬特徵及/或基板表面以減小黏著。諸如藉由微機械加工、蝕刻及/或機械雕合而在特徵10與基板20之間引入分隔物(裂縫)25。藉由柔性彈性體印模30取得金屬特徵10。印模30之後續變形在金屬特徵10中產生波狀或彎曲幾何形狀40。由在取得金屬特徵時處於應變下且隨後解除所施加之張力的印模30提供彎曲之產生,或藉由在取得金屬特徵之後壓縮印模30而提供彎曲之產生。 圖2展示藉由圖1中所概述之方法而產生之彎曲或波狀金屬特徵之一實例。圖2為可延伸波狀/彎曲電互連40之相片,該電互連40係藉由自剛性基板取至經預加應變之可延伸PDMS橡膠基板30上,隨後解除應變,藉此誘發彎曲而形成。 圖3中提供用於產生波狀可延伸電極及/或互連之方法。如圖3A所示,藉由(例如)微機械加工製程而在基板20上製備波狀特徵22。一表面具有波狀特徵22之基板20充當用於模製具有相應波狀表面32之彈性體印模30的母體。藉由(諸如)經由蔽蔭遮罩之蒸鍍及/或電鍍而在波狀表面32上沈積金屬特徵10。 圖4提供用於製造平滑波狀彈性體基板之一方法。各向異性Si(100)蝕刻提供具有銳緣24之基板20(圖4B-頂部畫面)。旋塗PR藉由在基板20之銳緣谷24中沈積PR 26而使銳緣谷平滑。抵靠基板20而澆鑄彈性體印模34。印模34具有銳緣凹入特徵。在印模34上澆鑄第二彈性體印模36以產生具有銳緣峰之印模。以Su-8 50壓印印模36且在適當時使其固化。旋塗PR 26使50之銳緣谷平滑。抵靠具有平滑谷之50而澆鑄彈性體基板30。移除基板30以顯露波狀且平滑之表面32。 圖54概述製造波狀可延伸電極之一方法:於波狀母體上沈積,隨後在彼母體上澆鑄一印模,使印模固化,且藉此在釋放後即將電極轉移至母體。圖55展示藉由圖4中之方法結合圖54中之方法而製備的在波狀PDMS上之可延伸金屬電極(Au,300 nm厚)之影像。於金屬特徵10與基板20之間展示界面112。界面112可包含促進底部畫面中所說明的藉由印模30而進行的金屬特徵10之移除之材料。簡言之,一方法使用:於預清潔之2"×3"玻璃載片上旋塗SU-8 10之薄塗層以使得玻璃表面被完全覆蓋。使載片/SU-8與具有所要波狀表面特徵(平滑谷及陡峰)之PDMS印模接觸且輕柔施加壓力以使得所有氣穴經移除。在正面於UV燈下閃蒸固化印模/模結構歷時30秒,翻轉,且在背面固化額外之40秒。在固化之後,在熱板上於65℃下烘焙5分鐘。在烘焙之後,允許樣本冷卻至室溫,並將SU-8模自PDMS母體剝離。SU-8現將具有具有銳緣谷之波狀表面起伏。為了使此等谷趨於平滑,將一份SU-8 2與一份較薄之SU-8混合,且以高RPM而旋塗歷時90秒。曝露於UV燈下歷時20秒來固化且於65℃進行後烘焙歷時3分鐘。一旦冷卻,即經由電鍍、光微影及蝕刻/起離及/或經由蔽蔭遮罩之蒸鍍而沈積金屬線或接觸點。以MPTMS對SU-8上之金屬處理1小時,且接著抵靠其而澆鑄彈性體基板。在移除後,PDMS具有波狀表面起伏(其具有平滑之峰及谷)連同轉移之金屬結構。圖55為藉由圖54中概述之製程而製造之波狀可延伸電極之相片,且亦提供可延伸波狀金屬電極的作為所施加之拉伸應變(高達30%)之函數的量測而得之電阻資料。 圖5提供藉由圖4中概述之方法而製造之平滑波狀PDMS基板30之一實例。設備組件60可於非波狀區域(例如,大體上平坦之部分)中支撐於波狀基板30且在需要時連接至互連10。 圖6展示向銳緣谷或凹入特徵中旋塗平滑層之一實例。藉由旋塗光可固化環氧樹脂26而使銳緣基板34(圖6A)平滑來產生平滑波狀基板。藉由抵靠圖6B之基板澆鑄PDMS印模且隨後自基板34移除印模30而獲得具有平滑波狀表面32之彈性體(例如,PDMS)印模30。 圖7為可延伸電極之相片。圖7A為具有波狀表面32之彈性體基板30的橫截面之相片。圖7B為藉由在波狀彈性體基板表面32上蒸鍍金屬10而製成之電極的俯視顯微相片。影像之焦平面處於波狀起伏之峰上。在圖7C中,焦平面處於波狀起伏之谷上且金屬互連10處於與電極250之電接觸中。藉由經由蔽蔭遮罩而蒸鍍至平滑波狀彈性體基板上來沈積可延伸電極。在此實例中,電極250在受張力而延伸至高達約10%的期間保持經由互連10之傳導性及連接性。 本文揭示之方法及設備可用以製造多種電子設備,包括(例如)可延伸被動式矩陣LED顯示器(見圖8)。將波狀電極(例如,互連10及接觸焊墊70)圖案化於兩個彈性體基板30上。藉由轉印而將設備組件60(在此情況中為ILED像素)於接觸焊墊70處圖案化波狀電極上。相應地組裝兩個基板30以使得互連10以不同定向(在此實例中為垂直)而延行。圖9說明該被動式矩陣LED顯示器之2D機械可延伸性。除了能夠單軸及雙軸延伸以外,顯示器能夠顯著撓曲而不破裂。該多軸撓曲向彎曲表面提供模製電子設備之能力以製造彎曲電子設備且併入智慧電子織物或顯示器中。 彎曲電子設備之一該實例提供於圖10中。圖10說明包含分布於球面彎曲透鏡上之無機光電二極體陣列之"人造眼"。展示人造陣列之四個不同視圖。圖11示意性地說明對於可延伸平坦電子設備之要求。為了圍繞球形表面而包繞平坦薄片,薄片必須在一個以上的方向上延伸。 圖12為用於製造能夠與彎曲表面相符之可延伸彎曲半導體陣列之製造機制。藉由在基板(諸如畫面(i)中所說明之"母晶圓")上之選擇性Au或Ti/Au沈積來製造薄Si元件。使Si結合至經預加應變(指示為L+ΔL)及UVO處理之PDMS(畫面(ii))。如所說明,在兩個方向上提供預加應變。該結合係藉由此項技術中已知之任何手段而進行,諸如(例如)塗覆至Si元件、基板或兩者之黏著劑。以選定圖案應用結合手段以使得Si具有將保持與基板之實體接觸(在變形之後)之結合區域及不與基板實體接觸之處於撓曲組態的其他區域(例如,相對於結合區域中之黏著力不結合或弱結合之區域)。自晶圓基板移除經預加應變之基板以顯露半導體陣列之平坦柵格(畫面(iii))。在將基板自L+ΔL鬆弛至L後,互連10即在弱結合之區域中彎曲(見畫面(iv))為撓曲組態,而設備組件60(例如,半導體Si接觸焊墊)仍保持結合至基板30。因此,彎曲互連10向整個陣列賦予可延伸性,且特定言之相對於其他組件60移動組件60之能力。不破壞組件60之間的電接觸而藉此向彎曲表面或可撓曲表面提供保形能力。 圖13提供採取單一柵格組態140(頂部兩幅畫面)、具有複數個連接之互連160的柵格組態(左下部畫面)及花形組態150(右下部畫面)之彎曲可延伸矽陣列之光學顯微影像。在此等實例中之每一者中,互連10在中央部分中彎曲,互連末端附接至接觸焊墊70。互連及接觸焊墊70支撐於PDMS基板30上。圖14至圖17進一步提供許多不同互連幾何形狀之特寫視圖。圖14提供電子顯微影像以展示具有中央部分90連同第一末端100及第二末端110之基本彎曲或波狀互連10。中央部分採取撓曲組態。末端100及110連接至設備組件(在此情況下為接觸焊墊70),從而能夠建立與設備組件之電接觸。互連10及接觸焊墊70支撐於諸如彈性體PDMS基板之基板30上。 圖15為藉由複數個(兩個)互連160彼此連接之鄰近設備組件(例如,接觸焊墊70)之電子顯微影像。圖15與圖14比較論證了可藉由一或多個互連10來使設備組件70彼此連接以向電子設備提供額外可撓性。舉例而言,具有相對較大之佔據面積之設備組件或接觸焊墊70視情況可藉由多個互連而連接至另一設備組件。 圖16為採取花形組態150之互連之電子顯微影像。與柵格組態相比,花形組態具有在兩個以上之縱向方向上定向之互連。在此實例中,存在四個不同定向以使得諸如接觸焊墊70之設備組件能夠接觸對角鄰近之設備組件。在此實例中,互連10具有電連接至設備組件(未圖示)之互連末端100與110之間的可選結合區域102,藉此將中央部分90劃分為各具有撓曲組態之兩個未結合區域92。 圖17為以橋接組態130配置之互連的電子顯微影像。在橋接組態中,存在橋接中央部分高峰120,三個或三個以上互連末端自其延伸。舉例而言,於未結合區域中相交之兩個互連導致高峰120,其具有自其延伸之四個互連末端。對於設備組件為交錯配置之情形,高峰120可具有自其延伸之三個末端。在設備組件之間存在多個互連連接之情況下,四個以上之末端可自高峰120延伸。 雖然本文提供之圖式中之許多者展示係接觸焊墊70之設備組件,但本文主張的方法及設備能夠連接至大量設備組件以提供可延伸且因此形狀符合之電子設備。舉例而言,圖18展示設備組件60,其為藉由支撐於彈性體基板30上之彎曲互連10而連接至採取陣列組態之其他光電二極體的光電二極體。 圖19描繪彎曲矽陣列之一維延伸行為。畫面(i)為在未施加任何應變力之情況下的彎曲矽陣列之圖像。施加延伸力(如藉由畫面(i)上方之箭頭所指示)以使陣列在一方向上延伸。如畫面(2)至(4)所展示,彎曲互連變平。當於畫面(5)中解除延伸力時,陣列返回至其彎曲組態(見畫面(6)至(8))。畫面(1)與(8)之間的比較展示在延伸之前與延伸之後的彎曲組態相同,此指示該過程可逆。 設備組件之彎曲陣列可易於轉移至彎曲表面,包括剛性或非彈性彎曲表面。藉由圖20之氣泡或氣球印模400來提供用於促進對彎曲表面之保形接觸的一設備及製程之實例。彈性體基板30(在此實例中為約20 μm厚之PDMS薄膜)固定於外殼腔室300中以提供由面向內部之基板壁及外殼腔室所界定之腔室容積310。施加正壓力(例如,腔室300中之壓力大於外部壓力)產生能夠與凹入狀收納基板保形接觸之凸起200基板表面。相反,負壓力產生能夠與凸起狀收納基板保形接觸之凹入表面210。對基板之局部彈性(例如,楊氏模數)之空間控制允許產生複雜彎曲幾何形狀。圖20之左下部畫面說明用於藉由引入氣體至腔室310或自腔室310移除氣體之注射器而控制外殼容積310中的壓力之一構件。圖式右側之影像為PDMS薄膜回應於正壓力之增加水準的不同彎曲。用於在彈性體基板上提供彎曲互連之方法及設備中之任一者可與用於轉印至彎曲基板的該等設備一起使用。 圖21中概述用於在彎曲表面上產生彎曲或上推互連之另一構件。抵靠成形之表面澆鑄薄彈性體膜以產生具有至少一彎曲部分之彈性體基板。基板能夠延伸以使表面變平,從而使得基板能夠與彎曲及平坦表面相符。將互連施加至平坦印模,且在解除延伸力之後,基板表面即鬆弛回至彎曲幾何形狀,從而在互連中產生應變,藉由互連中央部分之上推而適應該應變。 圖22中提供由圖20所示之設備造成的彎曲矽陣列之"二維"延伸之實例。在此實例中,互連包含採取柵格組態之複數個彎曲互連連接,其中互連由290 nm厚之Si製成。將最初為平坦之彎曲矽陣列(左上部影像)置放入外殼中,且施加正壓力以使陣列擴展為氣泡或氣球組態(例如,彎曲表面)。最右側影像中展示最大擴展,且隨後移除正壓力。類似於對於平坦基板之單軸延伸的結果,此"彎曲"延伸為可逆的。在最大化與彎曲表面之保形接觸的擴展之任一階段,可藉由此項技術中已知之任何手段來將陣列轉移至彎曲表面。圖23展示藉由氣球印模而進行的至塗佈有黏著劑(彈性體基板或SU-8)之玻璃透鏡上之矽印刷之實例。透鏡可為凹入或凸起的。在此實例中,R分別等於19.62 mm及9.33 mm。 實例1:半導體奈米織帶中之受控彎曲結構連同在可延伸電子元件中之應用實例 對半導體奈米結構之組成、形狀、空間位置及/或幾何組態之控制對於此等材料之幾乎所有應用均為重要的。雖然存在用於界定奈米線及奈米織帶之材料組成、直徑、長度及位置之方法,但存在相對較少用於控制其二維及三維(2D及3D)組態的方法。本文提供用於在奈米織帶中形成原本難以產生的特定類別之3D形狀之機械策略。此實例涉及對用以提供對黏著位點之空間控制之微影圖案化表面化學反應與用以誘發受到良好控制的局部移位之支撐基板之彈性變形的組合使用。可藉由力學分析模型而定量地描述以此方式及此等組態而產生於GaAs與Si之奈米織帶中的經精確設計之彎曲幾何形狀。作為一應用實例,特定結構提供至具有極高可延伸性水準(高達~100%)、可壓縮性水準(高達~25%)及可撓曲性水準(具有低至~5 mm之曲率半徑)之電子元件的途徑。 對奈米織帶及奈米線之2維及3維組態在其生長期間加以控制以避免諸如捲曲、環狀及分支布局之特定幾何形狀,或在其生長之後加以控制以(作為實例)藉由將此等元件耦接至受到應變之彈性體支撐物而產生正弦波狀結構或藉由使用成層系統中的內建殘餘應力而產生管狀(或螺旋)結構。具有波狀幾何形狀之半導體奈米織帶受到關注,此部分因為其使得高效能可延伸電子元件系統能夠用於潛在應用,諸如球面彎曲焦平面陣列、智慧型橡膠外科手套及適型結構保健監視器。電子設備自身可延伸之此方法與達成使用剛性設備島狀物連同可延伸金屬互連之此等相同應用之替代方法不同且可能為對其之補充。先前描述之波狀奈米織帶具有兩個主要劣勢:(i)其以由材料之模數及織帶之厚度所界定之固定週期及振幅以幾乎不提供對波紋的幾何形狀或相位之控制之方式而自發形成,及(ii)受到由此製程所導致的非最佳波狀幾何形狀之限制,其可適應之最大應變在20%至30%之範圍內。此處引入之程序使用微影界定之表面黏著位點連同支撐基板之彈性變形來達成彎曲組態(藉由對其幾何形狀之確定性控制)。週期性或非週期性設計對於該等結構之大規模、有組織陣列中的個別奈米織帶之任一選定集合為可能的。經設計以用於可延伸電子元件之專用幾何形狀致能高達接近150%之應變範圍(即使在諸如GaAs之脆性材料中),此與力學分析模型一致且多達先前報告之結果的十倍。 圖24展示此程序中之步驟。製造始於對遮罩之製備,該遮罩用於對聚二甲基矽氧烷(PDMS)之彈性體基板上的表面化學黏著位點進行圖案化。此過程涉及在稱作UVO遮罩的不常見類型之振幅光罩(經由步驟i製造)與PDMS保形接觸時經由該光罩而傳遞深紫外(UV)光(240-260 nm)。UVO遮罩佔有透明區域中起伏之凹入特徵,使得向UV之曝露在接近PDMS之表面處產生臭氧之圖案化區。臭氧將以-CH3
及-H端基支配之未改質疏水性表面轉換為以-OH及-O-Si-O-官能基終止的高度極性及反應性表面(亦即,活性表面)。未曝露之區保持未改質之表面化學(亦即,非活性表面)。此處引入之程序涉及於較大單軸預加應變(對於長度自L變為L+ΔL,εpre
=ΔL/L)下在PDMS基板(厚度為~4 mm)上之曝露(步驟ii)。對於具有簡單週期性線條圖案之遮罩,吾人在步驟(i)中將圖24A之步驟(iii)中的活性條帶(指示為標有"活性表面"之線條)與非活性條帶之寬度(例如,鄰近活性條帶之間的距離)表示為Wact
與Win
。活性區可強烈且不可逆地結合至在表面上具有曝露之-OH或-Si-O基團的其他材料。如下文所概括,利用此等圖案化黏著位點以在奈米織帶中形成經清楚界定之3D幾何形狀。或者,藉由在互連與基板接觸之前對互連類似地進行圖案化而提供類似的黏著結合位點圖案。 在此實例中,奈米織帶由單晶Si及GaAs組成。藉由使用先前描述之程序(見Khang等人,Science 311, 208-212 (2006))而由絕緣體上矽(SOI)晶圓製備矽織帶。GaAs織帶包括藉由分子束磊晶法(molecular-beam epitaxy, MBE)在(100)SI-GaAs晶圓上形成的摻雜Si之n型GaAs(120 nm;載體濃度為4×1017
cm3
)、半絕緣GaAs(SI-GaAs;150 nm)及AlAs(200 nm)之多層。藉由使用沿(0 1 1)結晶定向而光阻圖案化之線條作為蝕刻遮罩而在H3
PO4
及H2
O2
之水性蝕刻劑中化學蝕刻磊晶層,從而界定織帶。移除光阻劑且接著將晶圓浸泡於HF之乙醇溶液(乙醇與49%之水性HF的體積為2:1)中移除AlAs層,藉此釋放具有由光阻劑判定之寬度(對於圖24D中之實例為100 μm)的GaAs(n-GaAs/SI-GaAs)之織帶。乙醇向HF溶液之添加減小易碎織帶歸因於乾燥期間之毛細管力之作用而破裂的機率。較低表面張力(與水相比)亦最小化GaAs織帶之空間布局中的乾燥誘發之無序。在最後步驟中,沈積較薄SiO2
層(~30 nm)以提供必要-Si-OH表面化學以供與PDMS之活性區域結合。 抵靠經UVO處理、預延伸之PDMS基板(平行於預加應變之方向而定向之織帶)而層壓經處理之SOI或GaAs晶圓,將其在烘箱中於90℃下烘焙數分鐘,且移除晶圓,從而將所有織帶轉移至PDMS的表面(步驟iv)。加熱促進Si織帶上之原生SiO2
層或GaAs織帶上之沈積的SiO2
層與PDMS之主動區之間的保形接觸及該兩者之間的強矽氧烷鍵(亦即,-O-Si-O-)之形成。相對較弱之凡得瓦爾力(Waals force)使織帶結合至PDMS之非活性表面區域。使PDMS中之應變鬆弛經由織帶與PDMS之非活性區域的實體分離而產生彎曲(步驟v)。歸因於強化學鍵結,織帶保持在活性區域中繫栓至PDMS。所得3D織帶幾何形狀(亦即,彎曲之空間變化的圖案)視預加應變之量值及表面活性之圖案(例如,Win
及Wact
之形狀及尺寸)而定。(可經由織帶上之圖案化結合位點而達成類似結果)。對於簡單線條圖案之情況,Win
及預加應變判定彎曲之寬度及振幅。當Wact
>100 μm時,歸因於產生"波狀"矽之類型的機械不穩定性,在相同織帶中亦形成具有比彎曲小得多的波長及振幅之正弦波(見圖25,以不同Wact
形成之樣本之影像)。作為製造之最後步驟,可藉由澆鑄並固化液態預聚物而將3D織帶結構囊封於PDMS中(見圖24步驟vi)。歸因於液體之低黏度及低表面能,其流動且填充形成於織帶與基板之間的間隙(見圖26)。 圖24D展示PDMS上之彎曲GaAs織帶之斜視掃描電子顯微鏡(scanning electron microscope, SEM)影像,其中εpre
= 60%且Wact
=10 μm且Win
=400 μm。該影像顯示對於陣列中之所有織帶具有共有幾何形狀及空間相干相位之均勻週期性彎曲。將錨固點適當地對齊至微影界定之黏著位點。插圖展示結合區域之SEM影像;寬度為~10 μm,其與Wact
相一致。該等影像亦顯示PDMS之表面為平坦的,即使在結合位點處亦如此。與先前報告之強耦接之波狀結構大不相同的此行為提示,對於此處描述之情況,PDMS誘發移位,但並不密切涉及於彎曲製程中(亦即,其模數不影響織帶之幾何形狀)。在此意義上,PDMS表示用於經由施加於黏著位點處之力而控制織帶的柔軟、非破壞性工具。 圖27A展示以不同εpre
形成於PDMS上之彎曲織帶的側視光學顯微相片(Wact
=10 μm且Win
=190 μm)。彎曲之高度(例如,"振幅")隨著εpre
而增加。非活性區域中之織帶在較低εpre
處未充分分離(見以εpre
=11.3%及25.5%而形成之樣本)。在較高εpre
處,織帶(厚度h)與PDMS分離以形成具有由下式特徵化之豎直移位輪廓之彎曲:其中: 。 如藉由對均勻薄層中所形成之彎曲的非線性分析所判定,織帶中之最大拉伸應變近似為。 彎曲之寬度為2L1
且週期為2L2
。因為對於h<1 μm,h2
π2
/(12L1 2
)遠小於εpre
(在此報告中亦即>10%),所以振幅獨立於織帶之機械特性(例如,厚度、化學組成、楊氏模數等等),且主要由黏著位點之布局及預加應變所判定。此結論提示如下方法之一般適用性:由任何材料製成之織帶均將形成類似彎曲幾何形狀。此預測與藉由此處所使用之Si與GaAs之織帶而獲得的結果相一致。在圖27A中繪製為虛線之對於33.7%及56.0%之預加應變而計算所得的輪廓與在GaAs織帶中的觀測結果良好地符合。另外,除了在低εpre
處(表1及表2),圖27A所示之彎曲之參數(包括週期、寬度及振幅)與分析計算相一致。此研究之一引起關注之結果在於織帶中之最大拉伸應變較小(例如,~1.2%),即使對於較大εpre
(例如,56.0%)亦如此。如隨後所論述,此定比致能可延伸性,即使對於諸如GaAs之脆性材料的情況亦如此。 微影界定之黏著位點可具有比與圖24中之結構相關聯之簡單格柵或柵格圖案複雜的幾何形狀。舉例而言,可在個別織帶中形成具有不同寬度及振幅之彎曲。作為實例,圖27B展示彎曲Si織帶(寬度及厚度分別為50 μm及290 nm)之SEM影像,該織帶以50%之預加應變及以Wact
=15 μm且Win
沿織帶的長度等於350、300、250、250、300及350 μm為特徵之黏著位點而形成。該影像清楚地展示織帶中之每一者中的鄰近彎曲之寬度及振幅之變化。彎曲織帶亦可以對於不同織帶之不同相位而形成。圖27C呈現以彎曲中隨垂直於織帶之長度的距離而線性變化之相位來設計的Si系統之實例。用於此樣本之UVO遮罩具有分別為15 μm及250 μm之Wact
及Win
。PDMS印模上之活性條帶與Si織帶之間的角度為30 。歸因於對黏著位點之簡單微影控制而可易於達成許多其他可能性,且一些可能性展示於(例如)圖13至圖17中。 具有εpre
=60%、Wact
=10 μm及不同Win
的PDMS上之彎曲GaAs織帶之簡單實例(如圖27D中所示)說明對於可延伸電子元件中的應用為重要之態樣。與對力學之分析解良好符合之輪廓展示在Win
=100 μm(及更小)時,歸因於GaAs中之破裂而導致的失效。失效係由超過GaAs之屈服點(~2%)的拉伸應變(在此情況下為~2.5%)所導致。因此可藉由選擇與εpre
成比例之Win
(»Wact
)來達成對延伸及壓縮之強健性的最佳組態。在此情形中,可適應高達及大於100%之預加應變。吾人藉由向PDMS支撐物施加力而直接論證此類型之可延伸性。織帶之區段的端至端距離(Lprojected
)之改變提供根據下式而量化可延伸性及可壓縮性之手段:, 其中表示斷裂之前的最大/最小長度,且為鬆弛狀態下之長度。延伸及壓縮分別對應於大於及小於之。Wact
=10 μm且Win
=400 μm且εpre
=60%的PDMS上之彎曲織帶顯示出60%之可延伸性(亦即εpre
)及高達30%之可壓縮性。將織帶嵌入於PDMS中在機械上保護結構,且亦產生持續可逆回應,但在力學上存在微小改變。特定言之,可延伸性及可壓縮性分別減小至~51.4%(圖28A)與~18.7%(圖28B)。織帶頂部之PDMS基質部分歸因於下伏PDMS的固化誘發之收縮而使彎曲之峰微微變平。小週期波紋在較大壓縮應變下歸因於產生先前所述之波狀織帶結構之類型的自發力學而形成於此等區域中。如圖28B所說明,機械失效傾向於開始於此等區中,由此減小可壓縮性。Wact
=10 μm且Win
=300 μm之彎曲結構避免此類型之行為。雖然該等實例顯示出比圖28A所示之實例稍低的可延伸性,但短週期波紋之缺少將可壓縮性增加至~26%。總體而言,形成於具有圖案化表面化學黏著位點之預延伸之PDMS基板上的具有彎曲之單晶GaAs奈米織帶顯示出高於50%之可延伸性及大於25%之可壓縮性,此對應於接近100%之滿標度應變範圍。此等數字藉由增加εpre
及Win
且藉由使用具有比PDMS高之伸長率的基板材料而得到進一步改良。對於更加精密之系統,亦可重複此等製造程序來產生具有多個彎曲織帶之層的樣本(見圖29)。 此較大可延伸性/可壓縮性之直接結果為極大程度之機械可撓曲性。圖30A至圖30C呈現說明此特徵之撓曲組態的光學顯微相片。分別將PDMS基板(厚度為~4 mm)撓曲為凹入(~5.7 mm之半徑)、平坦及凸起(~6.1 mm之半徑)的彎曲。該等影像說明輪廓如何改變以適應撓曲誘發之表面應變(對於此等情況為~20%至25%)。實際上,形狀類似於在壓縮(~20%)及張力(~20%)中所獲得之形狀。嵌入之系統歸因於中性機械平面效應而顯示出甚至更高水準之可撓曲性。當頂部與底部PDMS層具有類似厚度時,在撓曲期間不存在彎曲形狀上的改變(圖30D)。 為了論證功能電子設備中之此等機械特性,吾人使用具有類似於圖30所示之輪廓的輪廓之彎曲GaAs織帶,藉由將較薄金電極沈積至織帶之SI-GaAs側上以進行肖特基接觸(Schottky contact)而建立金屬-半導體-金屬光偵測器(MSM PD)。圖31A展示MSM PD在延伸~50%之前及之後的幾何形狀及等效電路及俯視光學顯微相片。在無光之情況下,幾乎無電流流過PD;電流隨著紅外光束(波長為~850 nm)之增加的照射而增大(圖31B)。電流/電壓(I-V)之不對稱特徵可歸因於接觸點之電特性的差異。圖31C(延伸)及圖31D(壓縮)展示在不同程度之延伸及壓縮所量測之I-V。電流在PD延伸高達44.4%時增大,且接著隨著進一步延伸而減小。因此光源之每單位面積的強度為恆定的,所以電流隨延伸之增大可歸因於彎曲GaAs織帶的投影面積(稱作有效面積,Seff
)隨織帶變平之增大。使PD進一步延伸可能誘發GaAs織帶之表面上及/或晶格中的缺陷,其導致電流之減小且最終在斷裂時導致斷路。類似地,壓縮使Seff
減小且因此使電流減小(圖31D)。此等結果指示,嵌入於PDMS基質中之彎曲GaAs織帶提供對於諸如耐磨監視器、彎曲成像陣列及其他設備之各種應用為有用的充分可延伸/可壓縮類型之光感應器。 總之,此實例指示,具有以微影方式界定之黏著位點之柔軟彈性體作為用於在半導體奈米織帶中形成特定類型之3維組態的工具為有用的。可延伸電子元件提供此等類型之結構的許多可能應用領域之一實例。簡單PD設備論證一些能力。對結構之高水準控制及將高溫處理步驟(例如,歐姆接觸之形成)與彎曲製程及PDMS分離之能力指示較為複雜之設備(例如,電晶體及較小電路薄片)為可能的。鄰近織帶中之彎曲的受到良好控制之相位提供電互連多個元件之機會。又,雖然此處報告之實驗使用GaAs與Si奈米織帶,但其他材料(例如,GaN、InP及其他半導體)及其他結構(例如,奈米線、奈米薄膜)與此方法相容。 GaAs織帶之製造:具有定製磊晶層之GaAs晶圓(細節描述於本文中)係購自IQE Inc., Bethlehem, PA。光微影及濕式化學蝕刻產生GaAs織帶。以5000 rpm之速度將AZ光阻劑(例如AZ 5214)旋轉澆鑄於GaAs晶圓上歷時30秒,且接著於100℃下軟烘焙1分鐘。經由具有以沿GaAs之(011)結晶方向而定向之圖案化線的光罩之曝露繼之以顯影在光阻劑中產生線條圖案。溫和O2
電漿(亦即,除渣製程)移除殘餘光阻劑。GaAs晶圓接著在蝕刻劑(4 mL H3
PO4
(85重量%)、52 mL H2
O2
(30重量%)及48 mL去離子水)中經各向異性蝕刻1分鐘,在冰水浴中經冷卻。以於乙醇中稀釋之HF溶液(Fisher®
Chemicals)(在體積上為1:2)來溶解AlAs層。在通風櫃中使具有在母晶圓上之經釋放織帶的樣本乾燥。以藉由電子束蒸鍍沈積之30 nm的SiO2
來塗佈經乾燥之樣本。 Si織帶之製造:由絕緣體上矽(SOI)晶圓(Soitect, Inc.,頂部矽290 nm,內埋氧化物400 nm,p型)來製造矽織帶。使用AZ 5214光阻劑藉由習知光微影法對晶圓進行圖案化,且藉由SF6電漿(PlasmaTherm RIE,SF6 40 sccm,50毫托,100 W)對其進行蝕刻。在以丙酮將光阻劑洗淨之後,接著在HF(49%)中蝕刻內埋氧化物層。 UVO遮罩之製造:於食人魚溶液(piranha solution)中清洗熔融石英載片(於60℃)15分鐘且以充足的水對其進行徹底沖洗。藉由氮氣吹掃來乾燥經清洗之載片,且將其置放於電子束蒸鍍器之腔室中以藉由5 nm之Ti(作為黏著層)及100 nm之Au(對於UV光之遮罩層)的連續層而塗佈。以3000 rpm之速度將負性光阻劑(亦即,SU8 5)旋轉澆鑄於載片上歷時30秒來產生~5 μm厚之膜。軟烘焙、曝露於UV光、後烘焙及顯影在光阻劑中產生圖案。溫和O2
電漿(亦即,除渣製程)移除殘餘光阻劑。光阻劑充當遮罩以分別藉由金蝕刻劑(亦即,I2
與KI之水性溶液)及鈦蝕刻劑(亦即,HCl之稀釋溶液)來蝕刻Au與Ti。 PDMS印模之製造:藉由將預聚物(A:B=1:10,Sylgard 184,Dow Corning)傾注至皮氏培養皿中繼之以於65℃下烘焙4小時來製備具有~4 mm之厚度的PDMS基板。自所得固化物件切割具有合適大小及矩形形狀之厚片且接著以異丙醇對其進行沖洗且藉由氮氣吹掃使其乾燥。使用特別設計之台來將PDMS機械延伸至所要程度的應變。經由置放為與PDMS接觸之UVO遮罩使此等經延伸之基板受到短波長UV光(低壓汞燈,BHK,自240至260 nm為173 μW/cm2
)的照射歷時5分鐘產生經圖案化之表面化學。 彎曲GaAs織帶之形成及嵌入:相對於具有經圖案化之表面化學的延伸之PDMS層壓具有塗佈有SiO2
之經釋放之織帶的GaAs晶圓。在烘箱中於90℃下烘焙5分鐘,在空氣中冷卻至室溫且接著緩慢鬆弛PDMS中之應變沿每一織帶產生彎曲。嵌入彎曲織帶涉及泛光曝露於UV光下5分鐘且接著將液態PDMS預聚物澆鑄至~4 mm之厚度。將樣本在烘箱中於65℃下固化4小時或在室溫下固化36小時使得預聚物固化來使彎曲織帶嵌入於PDMS之固體基質中。 彎曲織帶之表徵:藉由使樣本傾斜~90° (對於非嵌入之樣本)或~30° (對於嵌入之樣本)而以光學顯微鏡對織帶進行成像。在以較薄金層(厚度為~5 nm)塗佈樣本之後將SEM影像記錄於Philips XL30場發射掃描電子顯微鏡上。使用用於預延伸PDMS印模之同一台來延伸及壓縮所得樣本。 SMS PD之製造及表徵:PD之製造始於採取圖24B之底部圖框中所示之組態的樣本。輕柔地將~0.8 mm寬之聚對苯二甲酸乙二酯(PET)薄片的條帶置放於PDMS上,其中條帶之縱軸與織帶之縱軸垂直。此條帶充當對於30 nm厚之金膜之電子束蒸鍍(以形成肖特基電極)的蔽蔭遮罩。移除PET條帶且鬆弛預延伸之PDMS印模形成建有彎曲GaAs織帶之SMS PD。將液態PDMS預聚物澆鑄至織帶之無電極的區域上,且接著於烘箱中固化。金電極延伸越過頂部PDMS以致能藉由半導體參數分析器而進行之探測。(Agilent 4155C)。在對光回應之量測中,藉由使用用於延伸及壓縮之機械台來控制PD。IR LED源(具有850 nm之波長)提供照射。 實例2:轉印: 吾人之技術方法使用體現於先前描述之基於平坦印模的印刷方法中之某些思想。雖然此等基本技術提供有前途之起點,但如下文所述,必須引入許多根本上的新特徵來滿足用於成像之半球陣列偵測器(Hemispherical Array Detector for Imaging, HARDI)系統之挑戰。 圖32及圖33說明與向彎曲表面之轉印相關之總策略。步驟之第一集合(圖32)涉及經設計以將互連之Si CMOS "小晶片(chiplet)"自晶圓之平坦表面起離且接著將幾何形狀變換為半球形狀之較薄球面彎曲彈性體印模的製造及控制。藉由抵靠經選擇具有所要曲率半徑之高品質光學元件(亦即,凸透鏡與凹透鏡之配對)澆鑄並固化液態預聚物以獲得諸如聚二甲基矽氧烷(PDMS)之彈性體而形成用於此製程之印模。印模具有模製之圓形輪緣。藉由使此輪緣上之模製槽(圖32中之虛線圓)配合至適當大小之剛性圓形固持環而徑向延伸此元件將此球形印模變換為延伸之平坦薄片。使此延伸之印模與支撐具有較薄互連之預成型且經底切蝕刻之Si CMOS "小晶片"的母晶圓接觸且接著剝離該印模以此等互連之"小晶片"對此元件"塗墨"。小晶片與柔軟彈性體元件之間的凡得瓦爾相互作用(Van der Waals interaction)對此製程提供充分黏著。 移除固持環使得PDMS鬆弛回其初始半球形狀,藉此實現小晶片陣列的平坦至球形之變換。此變換誘發印模之表面處的壓縮應變。藉由互連之局部分層及提昇而在CMOS小晶片陣列中適應此等應變(圖32之左下部)。此等"上推"互連以避免對小晶片之損害及其電特性之有害的應變誘發之改變之方式來吸收應變。將小晶片中之應變保持於~0.1%以下實現此等兩個目標。互連所需之空間限制CMOS小晶片之最大填充因數。然而,光偵測器消耗幾乎全部像素面積,由此提供達到80%之填充因數目標的簡單途徑。 在步驟之第二集合(圖33)中,使用經"塗墨"之半球印模來將此等元件轉印至具有匹配形狀之空腔的最終設備基板(例如,在此實例中為具有匹配半球狀空腔之玻璃基板)上。此轉移製程使用諸如光可固化BCB(Dow Chemical)或聚胺基甲酸酯(Norland Optical Adhesive)之紫外(UV)固化光聚合物作為黏著劑。將此等材料以薄(數十微米厚)液態膜之形式塗覆至設備基板。在與印模接觸之後,此液態層即流動以符合與小晶片及上推互連相關聯之起伏結構。穿過透明基板之UV光使光聚合物固化且將其變換為固體形式以在移除印模之後即產生平滑、平面化之頂部表面。用以形成功能系統之最終整合涉及電極及光偵測器材料之沈積及圖案化,及匯流排線至外部控制電路之微影界定。 圖32及圖33之方法具有若干顯著特徵。第一,其利用最新平面電子技術來致能對半球基板之可靠、節省成本及高效能的操作。特定言之,小晶片由以0.13 μm之設計規則加以處理之矽電晶體之集合組成來得到HARDI系統之局部像素級處理能力。使用習知處理連同絕緣體上矽晶圓以形成此等設備。內埋氧化物提供犧牲層(藉由HF而進行底切蝕刻)來製備用於印刷之小晶片。互連由窄且薄(~100 nm)之金屬線組成。 第二特徵在於該方法使用彈性體元件及機械設計以致能平面向半球之受到良好控制的變換。轉移印模及綜合機械模型化中之可逆線性力學如隨後所概括而實現此控制。第三個有吸引力之態樣在於,轉移製程及策略之用以控制黏著之某些基本組件在平面應用中已得到論證。實際上,已經設計以用於彼等平面印刷應用之台可經調適以用於圖32及圖33之製程。圖34展示適用於此製程中的具有整合式視覺系統及氣壓致動器之自製印刷器。 使用此等類型之印刷器系統來論證圖32及圖33之製程的若干態樣。圖35展示以單晶矽島狀物之陣列而"塗墨"之半球印模之表面的掃描電子顯微相片影像,該等單晶矽島狀物在正方陣列中藉由重摻雜之矽織帶而互連。圖36展示光學影像。在平面至球形之變換期間,此等織帶互連以圖32中所描繪之方式上推。此等類型之互連之關鍵態樣在於,當與完全成形之小晶片的轉移組合時,其減小對於高解析度彎曲表面微影或直接對半球進行之其他形式之處理的需要。 除了材料及總處理策略以外,執行對半球印模、上推互連及與剛性設備島狀物之相互作用的彈性機械回應之全計算模型化。此等計算以促進設計控制及最佳化之水準顯示製程之物理現象。基於線性彈性板理論之簡單估計暗示與圖32之製程相關聯的應變水準對於2 mm厚之印模及半徑為1 cm之球面可達到10%或更高。因此,為了可靠設計控制,對於高達此值之兩倍(亦即,~20%)的應變在線性彈性狀態中操作印模為必要的。圖37展示PDMS之若干變體之實驗應力/應變曲線,關於該等變體,吾人在基於塊狀平坦印模之印刷的水準上具有經驗。184-PDMS看來似乎提供良好初始材料,因為其提供高達~40%之應變的高線性及彈性回應。 諸如此等之機械量測連同關於小晶片及織帶上推互連之模數及幾何形狀的文獻值提供對於模型化為必要之資訊。採用兩種計算方法。第一者為滿標度有限元模型化(finite element modeling, FEM),在其中分析平坦基板上之設備及互連幾何形狀(例如,大小、間距、多層)的細節。在分析中直接考慮不同材料(例如,印模、矽、互連)。外加側向壓力以使印模及電路變形為所要球形形狀。有限元分析給出應變分布(尤其是設備及互連中之最大應變)及經變換之設備之間的不均勻間距。該方法之優勢在於其俘獲設備幾何形狀及材料之所有細節,且因此可用以探察轉印製程之不同設計的效果以減小最大應變及不均勻性。然而,此方法為計算密集的且因此耗費時間,因為其涉及較廣範圍之長度標度及對印模上之大量結構設備之模型化。 第二種方法為設備(小晶片)之單胞模型,該模型分析該等設備在負載情況下之機械效能。每一設備藉由一單胞表示,且其在機械負載下之回應(例如,撓曲及張力)經由有限元方法而得到徹底研究。接著藉由以互連連接之單胞來替代每一設備。接著將此單胞模型併入至有限元分析中以替代對設備及互連之詳細模型化。此外,在遠離球面之邊緣處,應變相對均勻以使得許多單胞可經整合且其效能可由粗略水準之模型表示。在接近球面邊緣處,應變高度不均勻,使得對設備之詳細模型化仍為必要的。該方法之優勢在於其顯著減少計算量。使用第一種方法中之滿標度有限元模型化來驗證此單胞模型。一旦經驗證,單胞模型即提供強有力之設計工具,因為其適用於對設備、互連及其間距的不同設計之快速探察。 圖38呈現關於如圖32所概括,將半球印模延伸為平坦幾何形狀(且將其鬆弛回至其半球形狀)的初步FEM結果。頂部圖框展示具有如同圖32中所示意性說明之幾何形狀的幾何形狀之半球印模之橫截面圖。此等結果展示延伸薄膜之應變中的如由其不均勻厚度所顯見之微小空間不均勻性。經由適當選擇藉由澆鑄及固化而形成印模時所抵靠之結構來對印模之厚度輪廓進行涉及可消除此等不均勻性。然而,值得注意的是,一些不均勻應變為可接受的,因為(i)上推互連固有地容許扭曲,且(ii)小晶片無需在每一像素位置處完全居中;較大光偵測器將以均勻背面電極填充像素區,該背面電極可獨立於小晶片在像素區內的位置而建立至其之電接觸。 模型化亦可判定Si CMOS小晶片中應變之水準。系統應經設計以將此等小晶片應變保持於~0.1%至0.2%以下來避免電特性之改變及(可能地)歸因於斷裂或分層之機械失效。此模型化促進對印模及處理條件之設計以避免小晶片曝露於在此範圍以上的應變。 實例3:雙軸可延伸"波狀"矽奈米薄膜 此實例引入雙軸可延伸形式之單晶矽,其由彈性體支撐物上之二維彎曲或"波狀"矽奈米薄膜組成。描述用於此等結構之製造程序,且呈現該等結構之幾何形狀之各種態樣及對於沿各個方向之單軸及雙軸應變的回應。此等系統之力學分析模型提供用於定量理解該等系統之行為之構架。此等類別之材料提供得到具有充分的二維可延伸性之高效能電子元件之途徑。 提供機械可撓曲性之電子元件對於資訊顯示器、X射線成像光伏打設備及其他系統中之應用為所關注的。可逆可延伸性為一不同且更具技術挑戰性之機械特徵,其將致能無法藉由諸如智慧型外科手套、電子眼攝影機及個人保健監視器之僅可撓曲之電子元件實現的設備可能性。在得到此類型之電子元件之一方法中,可延伸導線使剛性設備島狀物互連以對於不可延伸之設備組件提供電路級可延伸性。在替代策略中,某些結構形式之薄單晶半導體及其他電子材料允許設備自身之可延伸性。近來之論證涉及在矽及砷化鎵之奈米織帶(厚度在數十與數百奈米之間且寬度在微米範圍內)中使用彎曲一維"波狀"幾何形狀以在金屬氧化物半導體場效電晶體(MOSFET)、金屬半導體場效電晶體(MESFET)、pn接合二極體及肖特基電極中達成單軸可延伸性。此實例展示類似材料之奈米薄膜可成形為二維(2D)波狀幾何形狀以提供充分的2D可延伸性。描述該等系統之製造程序連同對該等系統之機械回應的詳細實驗表徵及分析模型化。 圖39示意性地說明用於在彈性體支撐物上形成二維可延伸Si奈米薄膜之步驟。對於此實例,由絕緣體上矽(SOI)晶圓(Soitec, Inc.,p型)製造此等薄膜,其始於藉由以光微影界定光阻劑之合適圖案且接著以反應性離子蝕刻(Plasma Therm RIE,SF6
40 sccm,50毫托,100 W)移除曝露之矽而形成頂部矽中之孔洞(~2.5 μm之直徑及~25 μm之間距)之正方陣列。此相同步驟界定薄膜之整體橫向尺寸,該尺寸對於此處報告之樣本處於3-5平方毫米之範圍內。厚度處於55 nm與320 nm之間。將經蝕刻之樣本浸沒於濃縮氫氟酸(HF 49%)中移除SiO2
內埋層(145至1000 nm厚);在丙酮中清洗移除光阻劑。抵靠經研磨之矽晶圓澆鑄並固化聚二甲基矽氧烷(PDMS)之預聚物產生平坦彈性體基板(~4 mm厚)。曝露於藉由強烈紫外光(240-260 nm)形成之臭氧環境中5分鐘將疏水性PDMS表面(-CH3
及-H端基)轉換為親水性狀態(-OH及-O-Si-O端基)。在對流烘箱中於70至180℃下暫時加熱該活性PDMS基板誘發受控程度之各向同性熱膨脹。使此元件與經處理之SOI晶圓接觸且接著再次將其剝離將整個奈米薄膜轉移至PDMS。對流烘箱中歷時數分鐘之繼續加熱促進薄膜與PDMS之間強黏著結合之形成。在最後步驟中,將奈米薄膜/PDMS結構i冷卻至室溫(約25℃)以釋放熱誘發之預加應變(ΔL/L)。此製程導致Si奈米薄膜及PDMS之附近表面區域中的二維(2D)波狀結構之起伏之自發形成。此等結構在一維週期性波起主要作用之接近邊緣處、通常觀測到二維魚骨狀布局之內部區域中及無序魚骨狀結構經常發生的接近中央處顯示出不同狀態。魚骨狀區域以波紋中鄰近峰之間的距離(吾人稱作短波長λ)、波紋之振幅A1
(圖1中未展示)及與魚骨狀結構中之鄰近"凹凸"之間的間隔相關聯之較長距離2 π/k2
(沿x2
方向)(吾人稱作長波長)為特徵。其他特徵長度為"凹凸"波長2 π/k1
(沿x1
方向,與長波長方向x2
垂直)、凹凸之振幅A2
、凹凸角θ。圖39之底部圖框示意性地說明此等特徵。 圖40之部分a-f展示對於具有100 nm之厚度(約4×4 mm2
之橫向尺寸)及~3.8%之熱預加應變(藉由加熱至150℃而界定)的奈米薄膜,於魚骨狀波紋之形成期間之不同階段收集的光學顯微相片。此等影像指示兩階段之結構形成,該等階段中之第一者涉及在較大區上起主要作用之一維波紋繼之以撓曲此等波紋結構以最終在完全冷卻時形成緊密魚骨狀布局(圖40 d-f)。圖40h展示兩個特徵波長之時間演進。短波長傾向於隨著冷卻導致矽上的逐漸較大之壓縮應變(歸因於PDMS之相對較大之熱收縮)而減小。特定言之,此值自初始階段中之17至18 μm降至魚骨狀結構變得突出時之~14.7 μm,且最終在完全冷卻之狀態下降至~12.7 μm。此波長在較大區上為均勻的(~5%之變化)。相反地,如自圖40g中之影像所顯而易見的,與魚骨狀布局相關聯之長波長顯示出寬廣範圍之值。在跨越此樣本之~100個點處之量測得到值之分布,其概述於圖40g之直方圖中。可由面外位移w=A1
cos[k1
x1
+k1
A2
cos(k2
x2
)]表示魚骨狀結構(圖49)。此處,係數:波紋之振幅A1
、長波長2 π/k2
、凹凸波長2 π/k1
及凹凸之振幅A2
藉由對特定薄膜厚度、膜的機械特性及基板之分析而判定。短波長λ為(2 π/k1
)sin(θ/2)。模型化使用如由量測而得之等同長度及波狀結構之週期而判定的Si應變替代熱預加應變來作為施加之預加應變(圖50)。使Si變形之實際應變可能歸因於Si於PDMS上之負載效應而通常稍小於估計之熱預加應變。舉例而言,Si應變在3.8%之熱預加應變下為2.4%。對於該位移w,Si膜中之應力、應變及位移場可在A1
、k1
、A2
及k2
之方面自馮卡門板理論(Von Karman plate theory)獲得。自3D彈性理論獲得PDMS基板中之場。最小化由Si膜中之薄膜能量及撓曲能量及PDMS基板中之彈性能量組成之總能量給出A1
、k1
、A2
及k2
。Si及PDMS之楊氏模數及柏松比為ESi
=130 GPa、vSi
=0.27、EPDMS
=1.8 MPa且vPDMS
=0.5。實驗與模型均給出凹凸角θ為約90°。理論給出之短波長在2.4%之雙軸預加應變下為12.4 μm,此與以上之實驗結果良好地符合。長波長2 π/k2
之較大變化亦由理論計算所預測到,其為30至60 μm。 圖41呈現類似於圖40之完全冷卻狀態所說明之結構的結構之原子力顯微鏡(atomic force microscope, AFM)及掃描電子顯微鏡(SEM)影像。此等影像清楚地展示,魚骨狀圖案以鋸齒狀結構為特徵,該等結構界定兩個特徵性方向,即使壓縮應變完全為各向同性亦如此。魚骨狀結構表示最小彈性能量組態,其減小系統中之總平面內應力且減輕兩個方向上之雙軸壓縮。因此,此幾何形狀相較於"棋盤形"及1D波紋布局而言在較大區上為較佳的,因為魚骨狀模式為此等三個模式中在所有方向上使平面內應力鬆弛而不誘發顯著延伸能量之唯一一者。僅在緊接凹凸處誘發顯著延伸。1D模式僅在一個方向上使預加應力降低。棋盤形模式在所有方向上降低應力,但其產生伴隨撓曲之顯著延伸能量。 自AFM影像提取之兩個線切圖指示沿凹凸方向(輪廓i)及垂直於波紋(輪廓ii)的週期性(但僅近似正弦)之起伏輪廓。波紋之由輪廓ii判定之λ及A1
分別為12.8 μm及0.66 μm。由理論分析給出之為12.4 μm之λ類似於實驗資料;然而,得自理論分析的A1
為0.90 μm,其為稍高於實驗結果之值。SEM影像清楚地展示如由在波紋之凸起及凹入區域中接近矽中之小孔洞的樣本之狀態所顯見之薄膜與PDMS之間的密切結合。此等影像亦指示波紋結構與此等孔洞之位置完全不相關,因為2.5 μm之孔洞大小遠小於吾人之實驗中的變形模式之特徵性波長。對於波狀結構之幾何形狀對矽之厚度之依賴性的研究可提供對物理現象之額外理解且進一步驗證力學模型。圖42展示一些結果,包括對於類似熱應變以不同厚度形成於薄膜中之波紋結構的光學顯微相片以及波長與振幅。對於100 nm之厚度,波紋之λ及A1
分別為12.6(±0.37) μm及0.64(±0.07) μm,且對於320 nm之厚度,其為45.1(±1.06) μm及1.95(±0.18) μm。此等值相當良好地對應於理論計算,該等理論計算得到λ及A1
對於100 nm之情況為12.4 μm及0.90 μm且對於320 nm之情況分別為45.1 μm及3.29 μm。 此等波狀薄膜提供各個平面內方向上之對於應變的真實可延伸性,此與藉由先前描述之織帶幾何形狀所提供之一維可延伸性形成對比。為了研究此態樣,吾人藉由使用經校準機械台及以熱誘發之3.8%的預加應變而製備之2D可延伸薄膜執行沿不同方向之單軸抗張延伸測試。圖43提供一些影像。在情況i中,沿長波紋之方向施加之拉伸應變(εst
)使得魚骨狀結構"展開"(εst
為1.8%),逐漸導致完全延伸狀態(εst
為3.8%)下的1D波狀幾何形狀。此延伸藉由柏松效應而在正交方向上誘發具有粗略等於拉伸應變之一半的振幅之壓縮應變。可藉由在此方向上壓縮波狀結構而適應此壓縮應變。在解除所施加之拉伸應變之後,原始魚骨狀波紋即恢復而顯示出與最初相當類似之結構。(圖51展示在5、10、15個延伸循環之後收集之光學顯微相片)。 在對角方向上施加之拉伸應變(情況ii)展示類似結構改變,但在完全延伸時,1D波紋結構沿由施加之應變所界定之方向對準而非為初始幾何形狀。對於垂直情況iii,在較小應變(εst
為1.8%)處,樣本之某些部分完全失去魚骨狀布局而沿延伸方向產生新的1D波紋。隨著增加之應變,較多區域經歷此變換直至整個區由此等定向之1D波紋組成。此等新形成之1D波紋垂直於原始波紋之定向;在解除之後,其即簡單地撓曲以形成無序魚骨狀幾何形狀。對於圖43B中所示之全部情況,波長均隨拉伸應變而增大且在解除之後即恢復至其原始值,即使在正交方向上由柏松效應誘發壓縮應力亦如此。此行為由於由魚骨狀波紋之展開所誘發的λ之增大而產生,該增大大於由柏松效應引起之此波長的減小。(圖52)對於情況i,凹凸波長2 π/k1
(圖52A)在施加之拉伸應變εst
下歸因於柏松效應而減小至2 π/k'1
(圖52B),亦即,k'1
>k1
。然而,相應凹凸角θ'歸因於魚骨狀結構之展開而大於角θ。短波長λ=(2 π/k1
)sin(θ/2)變為λ'=(2 π/k'1
)sin(θ'/2),其在角改變之效應克服柏松效應時可大於λ。吾人之理論模型給出對於εst
=0、1.8%及3.8%,λ=
12.4、14.6及17.2 μm,此證實了如在實驗中所觀測的,短波長隨施加之應變而增大。對於情況iii,λ及2 π/k1
均隨施加之延伸應變而增大,因為波紋沿延伸應變之方向而鬆弛,且凹凸角θ未因柏松效應而顯著改變。亦藉由熱誘發之拉伸應變來研究彎曲薄膜之雙軸可延伸性(圖53)。由熱應變產生之魚骨狀波紋隨著對樣本加熱而緩慢消失;其在冷卻之後即完全恢復。 此等觀測結果僅適用於薄膜之中央區域。如圖39之底部圖框中所指示,薄膜之邊緣展示1D波紋結構,其中波向量沿邊緣而定向。圖44中展示邊緣區域、中央區域及其之間的過渡區之AFM影像及線切圖輪廓。起源於Si之邊緣附近之1D波紋(頂部圖框)逐漸變得撓曲(中部圖框)直至其變換為中央區域中之魚骨狀幾何形狀(底部圖框)。此等區域中之λ值分別為16.6 μm、13.7 μm及12.7 μm(自頂部圖框起),其中A1
為0.52 μm、0.55 μm及0.67 μm。與邊緣處之1D波紋相對比,2D魚骨狀波紋具有較小λ及A1
,此提示Si之內部區比邊緣受到較強的壓縮應變之影響。邊緣附近之應力狀態在某距離範圍內,由於薄膜之無牽引力邊緣而近似為單軸壓縮。此單軸壓縮平行於此自由邊緣,且因此導致沿該邊緣之1D波紋。然而,應力狀態在魚骨狀結構產生之中央區域中變為等雙軸壓縮。對於1D波紋邊緣與魚骨狀波紋之間的過渡區,不平衡雙軸壓縮造成具有較大凹凸角之"半"魚骨狀波紋。吾人之模型得到對於1D波紋分別為16.9 μm及0.83 μm之λ及A1
及對於魚骨狀結構分別為12.4 μm及0.90 μm之λ及A1
。此等結果與實驗觀測值相當良好地符合。 為了進一步研究此等邊緣效應,吾人製造具有1000 μm之長度及100 μm、200 μm、500 μm及1000 μm之寬度的矩形薄膜,其均處於同一PDMS基板上。圖45展示此等結構對於兩個不同水準之熱預加應變之光學顯微相片。在較低熱預加應變(約2.3%,圖45A)處,100 μm及200 μm寬之薄膜顯示出自一側至另一側的完全1D波紋,其在末端具有平坦未變形之區域。500 μm寬之薄膜展示類似之1D波紋及平坦區域,但波紋在結構之中部具有微微撓曲之幾何形狀,其具有大體上小於100 μm及200 μm之情況的整體有序性及定向上之均勻性。對於1000 μm之方塊,1D波紋存在於邊緣之中央區域中,其在角落中具有平坦區。薄膜之中央部分展示完全形成之魚骨狀幾何形狀。對於角落平坦區域,歸因於兩個自由邊緣而存在近似無應力之狀態。在該等角落附近無波紋形成。隨著增大之預加應變(4.8%,圖45B),所有情況下之平坦區域在大小上均減小。1D波紋狀態在100 μm及200 μm之織帶中持續,但顯著魚骨狀形態在500 μm之情況的中央區域中出現。在較高預加應變處,等雙軸壓縮應變存在於500 μm寬之薄膜的內部區域中。對於1000 μm之方塊薄膜,魚骨狀狀態延伸至接近邊緣之區域。可將界定平坦區域之空間延伸之特徵長度標度(吾人稱作邊緣效應長度)Ledge
估計為薄膜大小及預加應變的函數。圖45C展示指示對於此處研究之情況,此長度以獨立於薄膜之大小之方式隨預加應變之線性縮放的結果。隨著預加應變變得較高,單軸應變區域之長度變得較小。因此,可在接近兩個自由邊緣處之無應力區域中觀測到較短範圍之1D波紋形式及類似狀態。 圖46展示在包括圓形、橢圓形、六邊形及三角形之其他薄膜幾何形狀中形成之波狀結構的光學顯微相片。該等結果定性地與圖45之織帶及方塊中之觀測結果相一致。特定言之,邊緣區域展示平行於邊緣而定向之1D波紋。具有正交定向之波紋僅出現於距邊緣距離大於Ledge
處。對於圓形,1D波紋歸因於薄膜之形狀而以全面徑向定向出現於接近邊緣處,魚骨狀波紋出現於中央。橢圓形顯示出類似行為,但在長軸之邊緣處具有平坦區域(歸因於此等區域中之較小曲率半徑)。對於六邊形及三角形形狀,銳角隅角(分別為120°及60°之角度)導致平坦區域。魚骨狀幾何形狀出現於六邊形之中央。三角形之中央展示對於此處所示之預加應變的水準,1D波紋之合併。對於具有清角之形狀(例如,六邊形、三角形及橢圓形之尖端),在隅角附近不存在波紋,因為兩個相交之自由邊緣(未必垂直)給出無應力狀態。對於三角形形狀,不存在足夠空間來產生魚骨狀結構,即使是在中央區域中亦如此。 薄膜自身提供達成雙軸可延伸電子設備之途徑。可利用上文概述之邊緣效應來實現對於該等設備之特定類別可為有用之特定結果。特定言之,在成像系統中,於光偵測器之位置處保持平坦未變形區域以避免在此等設備具有波狀形狀時發生之非理想狀態可能具有價值。圖47呈現達成此結果之可延伸薄膜之一些代表性實例。此等結構由以30 μm×150 μm之織帶(對於正交織帶而言為30 μm×210 μm)在豎直及水平方向上(圖47A、圖47C)及在豎直、水平及對角方向上(圖47E、圖47G)連接的100 μm×100 μm之正方島狀物組成。織帶中之波紋之振幅及波長的改變提供以在較大程度上避免正方島狀物之區域中之變形的方式來適應所施加之應變之手段。吾人檢查此等結構在若干不同所施加應變下之行為。圖47之部分a及e展示在藉由於烘箱中加熱樣本而施加的較低應變(約2.3%)之狀態中之代表性情況。圖47之部分c及g展示在藉由使用機械台而施加之相對較高的雙軸應變(約15%)下之相同結構。如所顯而易見的,在低應變狀態下島狀物保持平坦;在足夠高之應變下,開始於此等區域中形成波紋結構。如傾斜角度之SEM影像(圖47B、圖47D、圖47F、圖47H)中所示,在所有應變下,PDMS與Si之間的良好黏著得以保持。圖47之部分b及d中之高放大率SEM影像的插圖亦證實Si與PDMS之強結合。 總而言之,矽之奈米薄膜可與預加應變之彈性體基板整合以產生具有幾何形狀之一範圍的2D "波狀"結構。此等系統之機械行為的許多態樣與理論預測之行為良好地一致。此等結果對於電子元件在使用期間或在安裝期間需要充分可延伸性之系統中之應用為有用的。 參考文獻 1. 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介電質及用於源極、汲極及閘極之Cr/Au金屬化的單晶矽奈米織帶(24)而製造之三層3D堆疊陣列Si MOSFET。每一設備使用三個對準之奈米織帶,其具有分別為87 μm、290 nm及250 μm之寬度、厚度及長度。圖2A展示系統之邊緣之俯視光學顯微相片,該邊緣具有經設計以分別顯示基板之支撐一個、兩個及三個MOSFET層之部分的布局。第二層之設備幾何形狀相對於第一層及第三層之九十度旋轉有助於闡明系統之布局。堆疊結構之示意性橫截面圖及傾斜圖出現於圖58B中。可使用共焦光學顯微法來在三維上觀察樣本。圖58C展示該等影像之俯視圖及傾斜圖,其經著色以易於觀察。(影像品質隨深度而稍有降級,此歸因於自上層之散射及吸收)。圖58D呈現對每一層中之代表性設備[具有19 μm之通道長度(Lc
)、由在摻雜源極/汲極區域上延伸之閘極電極的距離界定之5.5 μm之通道重疊距離(Lo)及200 μm之通道寬度(W)的頂部閘極MOSFET]之電量測結果。三層中之每一者上之形成於PI基板上的設備展示出極佳特性(470±30 cm2
/Vs之線性遷移率,>104
之開關比及-0.1±0.2 V之臨限電壓),且在不同層中的設備之間不存在系統差異。可藉由重複相同程序來向此系統添加額外層。如圖59中所說明,除了具有單一半導體之3D電路以外,可在多層中使用各種半導體以形成完整3D-HGI系統。為了說明此能力,吾人分別使用GaN及Si奈米織帶與SWNT膜而在PI基板上製造MESFET(特定言之,高電子遷移率電晶體HEMT)、MOSFET及TFT之陣列。圖59A及圖59B分別展示所得設備之高放大率光學影像與共焦影像。第一層上之GaN HEMT對於源極及汲極使用歐姆接觸點(Ti/Al/Mo/Au,其於源晶圓上加以退火),且對於閘極使用肖特基(Ni/Au)接觸點。通道長度與寬度及閘極寬度分別為20 μm、170 μm及5 μm。每一設備使用具有分別為1.2 μm、10 μm及150 μm之厚度、寬度及長度、藉由設備基板上之處理而電互連的GaN織帶(由AlGaN/GaN/AlN之多層堆疊構成)。第二層上之SWNT TFT對於閘極介電質使用SiO2
/環氧樹脂,且對於源極、汲極及閘極使用Cr/Au,其具有分別為50 μm及200 μm之通道長度及寬度。Si MOSFET使用與圖58中所示之設計相同的設計。可藉由使用Si、SWNT及GaN之不同組合來建構各種其他3D-HGI設備(圖61及圖62)。圖59C呈現圖59A及圖59B之系統中的典型設備之電流-電壓特徵。在所有情況中,特性均類似於在源晶圓上製造的特性:GaN HEMT具有-2.4±0.2 V之臨限電壓(Vth
)、>106
之開關比及0.6±0.5 mS之轉導;SWNT TFT具有Vth
=-5.3±1.5 V、>105
之開關比及5.9±2.0 cm2
/Vs之線性遷移率;Si MOSFET具有Vth
=0.2±0.3 V、>104
之開關比及500±30 cm2
/Vs之線性遷移率。此等設備之一受關注態樣(其係由對薄PI基板(25 μm)、設備(2.4 μm)及PI/PU中間層(5 μm)之使用而得出)為其機械可撓曲性,此對於在可撓性電子元件中之應用為重要的。吾人將對於圖59A之3D-HGI系統中之Si、SWNT及GaN設備的有效轉導(g eff
)評估為撓曲半徑之函數。展示如經正規化為未撓曲狀態下之轉導(g 0eff
)的此等資料之圖59D說明對於低至3.7 mm之撓曲半徑的穩定效能。 形成於此等3D-HGI設備中之不同級之間的電互連可產生引起關注之電路能力。較薄聚合物中間層使得此等互連能夠藉由在微影界定之開口上蒸鍍金屬線或將金屬線蒸鍍至該等開口中而簡單地形成。圖60呈現一些實例。圖60A中所示之第一者為3D NMOS反相器(邏輯閘),其中驅動(L=4 μm,W=200 μm)與負載(L=4 μm, W=30 μm)Si MOSFET處於不同級上。在5 V之電源電壓之情況下,此雙層反相器顯示出經良好界定的轉移特徵,其中增益為~2,此與使用類似電晶體之習知平面反相器(25)之效能相當。圖60B展示藉由使用整合之n通道Si MOSFET與p通道SWNT TFT而具有互補設計(CMOS)之反相器,其經設計以使上拉與下拉方向上之電流驅動能力均衡(圖65)。以至VDD端子之5 V偏壓及自0 V至5 V之閘極電壓(輸入)而收集之轉移曲線出現於圖60A中。曲線形狀及增益(高達~7)定性地與數值電路模擬(圖65)相一致。作為第三實例,吾人建立與可撓性PI基板上之Si MOSFET整合的金屬-半導體-金屬(MSM)紅外(IR)偵測器(26)來論證用於製造可用於活性IR成像器中之單胞的能力。在此情況下,轉移至具有Si奈米織帶MOSFET之印刷陣列之基板上的GaAs之印刷奈米織帶(厚度、寬度及長度分別為270 μm、100 nm及400 μm)形成MSM之基礎。沈積於此等GaAs奈米織帶之末端上的電極(Ti/Au=5/70 nm)形成背對背肖特基二極體,其中間隔為10 μm。所得偵測器單元顯示出隨IR照射之強度而增大的電流增強(圖60C),此與電路模擬(圖66)相一致。在不考慮自半導體之表面反射的光之情況下,在1 V至5 V觀測到於850 nm之波長處約0.30 A/W之回應率。該系統亦顯示出具有低於1 cm之曲率半徑的可撓曲性,此對於諸如廣角IR夜視成像器之彎曲焦平面陣列之進階系統可為有用的。 印刷半導體奈米材料提供得到3D-HGI系統之新方法且可在各種應用領域中具有重要應用,不僅是此處報告之系統所提示的應用領域,且有其他應用領域,包括具有整合式讀出及感應電子元件之微流體設備、將不常見感應材料與習知矽基電子元件合併之生化感應系統及將化合物半導體之發光器與矽驅動電子元件或微機電結構組合的光子/光電子系統。另外,此方法與較薄輕型塑膠基板之相容性可產生對於具有不常見形狀因數或機械可撓性作為關鍵特徵的設備之額外機會。 材料及方法:設備製造:矽設備:製造始於藉由處理絕緣體上矽晶圓(SOI;具有290 nm之頂部Si層之Soitec unibond,其具有6.0~9.4×1014
/cm3
之摻雜級)而進行的對單晶矽之接觸點摻雜薄織帶之界定。第一步驟涉及磷摻雜,其使用固源及旋塗式摻雜劑(Filmtronic, P509)且使用電漿增強化學氣相沈積(PECVD)之SiO2
(Plasmatherm, 300 nm, 900毫托,350 sccm, 2%之SiH4
/He, 795 sccm NO2
, 250℃)的光微影界定之層作為遮罩來控制摻雜劑於何處擴散至矽中。在摻雜之後,經由光阻劑之圖案化層而進行的SF6
電漿蝕刻界定織帶。藉由濃HF溶液(Fisher Chemicals)而進行的對內埋氧化物之底切蝕刻將織帶自晶圓釋放。此程序完成單晶矽之接觸點摻雜織帶的製造。在下一步驟中,使聚二甲基矽氧烷(PDMS, A:B=1:10, Sylgard 184, Dow Corning)之平坦彈性體印模與光阻劑塗佈之織帶接觸,且接著剝離印模,從而將織帶自晶圓移除,且藉由疏水性PDMS與光阻劑之間的凡得瓦爾力使得織帶仍黏附至印模之表面。抵靠旋塗有較薄液態PI前驅物聚醯胺酸(Sigma_Aldrich Inc.)層(~1.5 μm)之25 μm的聚醯亞胺(PI)薄片來層壓如此以來自晶圓之s-Si織帶而經"塗墨"的印模。使前驅物固化,剝離PDMS印模且汽提光阻劑將織帶保留為嵌埋於PI基板之表面上且良好地黏附至該表面。閘極介電質層由藉由PECVD於相對較低之溫度,250℃下沈積之SiO2
層(厚度為~100 nm)組成。光微影及CF4
電漿蝕刻界定對矽之摻雜源極/汲極區域之開口。在藉由光微影及濕式蝕刻而進行之單一步驟中界定Cr/Au(5/100 nm,藉由電子束蒸鍍自底部至頂部而形成,Temescal FC-1800)之源極、汲極及閘極電極。 GaN設備:在具有異質結構[AlGaN(18 nm)/GaN(0.6 μm)/AlN(0.6 μm)/Si]的GaN之塊狀晶圓上製造GaN微結構。歐姆接觸區由AZ 5214光阻劑界定且接著於RIE系統中以SiCl4
電漿而加以清洗。Ti/Al/Mo/Au(15 nm/60 nm/35 nm/50 nm)金屬層接著藉由電子束蒸鍍(Ti/Al/Mo)及熱蒸鍍(Au)而沈積。洗掉完整之抗蝕劑使金屬接觸點保留於GaN上。在N2
環境中於850℃下歷時30秒之熱退火形成歐姆接觸點。SiO2
(Plasmatherm, 300 nm, 900毫托,350 sccm, 2%之SiH4
/He, 795 sccm NO2
, 250℃)及Cr金屬(電子束蒸鍍器,150 nm)層經沈積作為對於隨後的感應耦合電漿(ICP)蝕刻之遮罩材料。光微影、濕式蝕刻及RIE處理(50毫托,40 sccm CF4
, 100 W, 14分鐘)界定GaN之織帶幾何形狀。在以丙酮移除光阻劑之後,使用ICP乾式蝕刻(3.2毫托,15 sccm Cl2
, 5 sccm Ar, -100 V偏壓,14分鐘)來移除曝露之GaN且稍稍蝕刻至Si中(~1.5 μm)以促進隨後的各向異性蝕刻。接著藉由使用四甲基銨氫氧化物(Aldrich, 150℃,歷時4分30秒)而自GaN下方蝕刻掉Si。將樣本浸漬於BOE(6:1, NH4
F: HF)中歷時30秒以移除PECVD SiO2
,且將新的50 nm之電子束蒸鍍之SiO2
層沈積於GaN織帶的頂部上。接著抵靠塗佈有2 μm之聚胺基甲酸酯(PU, Norland optical adhesive, No. 73)的PI薄片層壓藉由來自母晶圓之GaN織帶而經"塗墨"之PDMS厚片。使樣本曝露於UV光(173 μWcm-2
)下15分鐘以使PU固化。剝離PDMS且藉由浸沒於BOE中20秒而移除電子束SiO2
導致GaN元件向塑膠基板之轉移。使用負性光阻劑(AZ nLOF2020)來圖案化Ni/Au (80/180 nm)之肖特基接觸點。藉由AZ汽提器(KWIK,歷時30分鐘)來移除光阻劑。 SWNT設備:使用化學氣相沈積(CVD)來在SiO2
/Si晶圓上生長個別單壁碳奈米管之隨機網路。使用連同甲醇而沈積於基板上之鐵蛋白(Sigma Aldrich)作為催化劑。饋入氣體為甲烷(1900 sccm CH4
連同300 sccm H2
)。藉由Ar氣之高流動來沖洗爐中之石英管以在生長之前進行清洗。在生長期間,使溫度保持於900℃歷時20分鐘。轉移涉及類似於如先前所描述之製程的印刷之程序或者將厚Au層及PI前驅物塗佈於具有管之SiO2
/Si基板上的稍稍不同之方法。在使PI固化之後剝離Au/PI。相對於塗佈有薄環氧樹脂層(SU8, 150 nm)之經預圖案化之設備基板而層壓此層,且接著分別藉由氧反應性離子蝕刻及濕式蝕刻而移除PI及Au層完成轉移。在底部閘極設備之情況中,基板支撐經預圖案化之閘極電極及介電質。特定言之,藉由光微影而圖案化Cr/Au/Cr(2 nm/10 nm/10 nm)之閘極電極,且接著使用PECVD將300 nm之SiO2
沈積於基板上。直接於管之頂部界定Cr/Au(2 nm/20 nm)之源極及汲極電極。 3D電路:3D Si NMOS反相器:藉由重複應用相同製造程序來建構多層設備。特定言之,將PI前驅物旋轉澆鑄於設備之現有層之頂部,且將矽織帶轉印於頂部。接著使用相同製程來製造設備。對於豎直金屬互連,藉由在AZ4620光阻劑之層中光圖案化開口,且接著藉由於RIE系統中使用CF4
及O2
電漿蝕刻掉此曝露區中之SiO2
及PI而界定電極區。向此區中沈積300 nm之Al於底部建立接觸,且在藉由蝕刻之SiO2
及PI而形成之階梯邊緣上提供電連續連接。 SWNT及Si CMOS反相器:SWNT設備由藉由光微影在管網路上界定的Au(20 nm)之源極/汲極接觸點組成。SiO2
(100 nm)/Si晶圓基板提供閘極介電質及閘極。接著在選擇性地以光阻劑(AZ5214)塗佈SWNT電晶體之後將環氧樹脂(SU8, 500 nm)旋塗至此基板上。在用於環氧樹脂之固化的UV曝露之後,抵靠基板而層壓以未摻雜Si織帶"塗墨"之PDMS厚片,且隨後藉由緩慢人工剝離來移除該厚片以完成轉印製程。使用Cr/Au(5 nm/100 nm)作為對於矽設備中之源極及汲極電極之肖特基接觸點。使用Al(100 nm)以連接SWNT與Si電晶體。 整合有Si TFT之GaAs MSM IR偵測器:使用GaAs晶圓(IQE Inc., Bethlehem, PA.)以產生背對背肖特基二極體。由具有多個磊晶層[摻雜Si之n型GaAs(120 nm)/半絕緣(SI)-GaAs(150 nm)/AlAs(200 nm)/SI-GaAs]的GaAs之高品質塊狀晶圓產生織帶。n型GaAs之載體濃度為4×1017
cm-3
。在蝕刻劑(4 mL H3
PO4
(85重量%)、52 mL H2
O2
(30重量%)及48 mL去離子水)中對具有光阻劑遮罩圖案之GaAs晶圓進行各向異性蝕刻。以乙醇中之稀HF溶液(在體積上為1:2)來蝕刻掉AlAs層。接著藉由電子束蒸鍍器沈積2 nm之Ti及28 nm之SiO2
之層。接著使以GaAs織帶塗墨之PDMS印模與塗佈有PI的Si電晶體之層(厚度為1.5 μm)接觸。剝離PDMS且藉由BOE蝕刻劑移除Ti及SiO2
完成GaAs向設備基板之轉移。藉由電子束蒸鍍而沈積用於肖特基接觸點之金屬(Ti/Au=5 nm/70 nm)。藉由首先圖案化AZ4620光阻劑之層,接著於RIE系統中使用CF4
及O2
電漿蝕刻穿開口且接著沈積300 nm之Al來界定GaAs背對背肖特基二極體與Si MOSFET之間的電互連。 設備表徵:使用半導體參數分析器(Agilent, 4155C)及習知探測台來進行二極體及電晶體之電表徵。在具有850 nm之波長的IR LED源下量測IR回應。 電路模擬:為了比較CMOS反相器之量測而得之轉移曲線與一模擬,經驗地產生對於n通道Si MOSFET與p通道SWNT TFT之2級PSPICE模型。基於預設PSPICE MOSFET模型(MbreakN及MbreakP)而產生此等PSPICE模型,該預設PSPICE MOSFET模型具有提取之參數來配合圖65B所示之Si NMOS及SWNT PMOS之量測而得的四個曲線。藉由使用與Si MOSFET串連連接之背對背肖特基二極體而經驗地產生對於GaAs MSM光偵測器之PSPICE模型。 實例4之參考文獻: 1. K. Banerjee, S. J. Souri, P. Kapur, K. C. Saraswat, Proc. IEEE, 89, 602 (2001)。 2. S. F. Al-Sarawi, D. Abbott, P. D. Franzon, IEEE Trans. Components, Packaging, and Manufacturing Technology, Part B, 21, 2 (1998)。 3. A. S. Brown, W. A. Doolittle, N. M. Jokerst, S. Kang, S. Huang, S. W. Seo Materials Science and Engineering B 87, 317 (2001)。 4. Y.-C. Tseng, P. Xuan, A. Javey, R. Malloy, Q. Wang, J. Bokor, H. Dai, Nano letters 4, 123 (2004)。 5. C. Joachim, J. K. Gimzewski, A. Aviram, Nature 408, 541 (2000)。 6. G. Roelkens等人,Optics Express 13, 10102 (2005)。 7. D. B. Strukov, K. K. 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Quantum Electron. 27, 737 (1991)。 美國專利申請案第11/115,954號、第11/145,574號、第11/145,542號、第60/863,248號、第11/465,317號、第11/423,287號、第11/423,192號及第11/421,654號在不與本發明之描述不一致的程度上以引用方式併入本文中。 遍及此申請案之所有參考文獻(例如包括經頒予或授予之專利或等效物之專利文件;專利申請公開案;及非專利文獻或其他源材料)在每一參考文獻至少部分不與本申請案之揭示內容不一致的程度上(例如,部分不一致之參考文獻藉由引用除了該參考文獻之部分不一致之部分以外的部分而併入)以全文引用之方式併入本文中,如同個別地以引用方式併入一般。 本文已使用之術語及表達係用作描述之術語且非限制之術語,且在使用該等術語及表達中不欲排除所展示及描述的特徵之任何等效物或其部分,但應認識到,各種修改在所主張的本發明之範疇內為可能的。因此,應瞭解,雖然已藉由較佳實施例、例示性實施例及可選特徵而特別揭示本發明,但可由熟習此項技術者採用對本文揭示之概念的修改及變化,且應瞭解,將該等修改及變化視作處於由所附申請專利範圍界定之本發明之範疇內。本文提供之特定實施例為本發明之有用實施例的實例,且熟習此項技術者將易瞭解,可藉由使用本發明之描述中所闡述之設備、設備組件、方法步驟之大量變化來執行本發明。如對於熟習此項技術者為明顯的,對於本發明之方法有用之方法及設備可包括大量可選組成及處理元件及步驟。 除非另行規定,否則本文描述或舉例說明之組件的每一表述或組合可用以實踐本發明。 在說明書中無論何時給出一範圍(例如,溫度範圍、時間範圍或者組成或濃度範圍)時,所有中間範圍及子範圍以及所給出之範圍中包括的所有個別值均欲包括於揭示內容中。應瞭解,包括於本文之描述中的任何子範圍或者範圍或子範圍中之個別值可自本文之申請專利範圍排除。 說明書中提及之所有專利及公開案指示熟習與本發明有關之技術者之技術水準。本文引用之參考文獻以其全文引用之方式併入本文中以指示在其出版或申請日期時的技術狀態,且意欲此資訊可在需要時使用於本文中以排除處於先前技術中之特定實施例。舉例而言,在主張物質之組成時,應瞭解,在先於申請者之發明之前的技術中已知並可用之化合物(包括在本文引用之參考文獻中提供致能揭示案所關於的化合物)不欲包括於本文所主張的物質組成中。 在用於本文中時,"包含"與"包括"、"含有"或"以……為特徵"同義且為包括性或開放式的,且不排除額外未敍述之元件或方法步驟。在用於本文中時,"由……組成"排除在所主張之元件中未規定的任何元件、步驟或成份。在用於本文中時,"本質上由……組成"不排除不在本質上影響申請專利範圍之基本及新穎特徵的材料或步驟。在本文之每一例子中,術語"包含"、"本質上由…組成"及"由…組成"中之任一者可由另兩個術語中之任一者替代。可在缺少未於本文中特別揭示之任何元件、限制的情況下實踐在本文中適當地以說明方式描述之本發明。 一般熟習此項技術者將瞭解,可在實踐本發明時使用除特別舉例說明之內容以外的起始材料、生物材料、試劑、合成方法、純化方法、分析方法、檢定方法及生物學方法而無需採用過度實驗。該等材料及方法的所有技術已知之功能等效物意欲包括於本發明中。已使用之術語及表達係用作描述之術語且非限制之術語,且在使用該等術語及表達中不欲排除所展示及描述的特徵之任何等效物或其部分,但應認識到,各種修改在所主張的本發明之範疇內為可能的。因此,應瞭解,雖然已藉由較佳實施例及可選特徵而特別揭示本發明,但可由熟習此項技術者採用對本文揭示之概念的修改及變化,且應瞭解,將該等修改及變化視作處於由所附申請專利範圍界定之本發明之範疇內。 表1:自圖31A所示之彎曲提取之參數(得自實驗及計算)。該等計算假設活性區域之寬度(亦即,對於圖式中所示之樣本為10 μm)在延伸之前及之後相同。表2:自圖31D所示之彎曲提取之參數(得自實驗及計算) "Interconnect" refers to a conductive material that is capable of establishing an electrical connection with a component or establishing an electrical connection between components. In particular, the interconnects can establish electrical contact between components that are separate and/or moveable relative to one another. Depending on the equipment specifications, operation and application, the interconnections are made of suitable materials. For applications requiring high conductivity, typical interconnect metals can be used including, but not limited to, copper, silver, gold, aluminum, and the like, alloys. Suitable conductive materials can include semiconductors such as germanium, indium tin oxide or GaAs. "Semiconductor" refers to any material that is an insulator at very low temperatures but has significant electrical conductivity at a temperature of about 300 grams of ear. In this description, the use of the term semiconductor is intended to be consistent with the use of this term in the art of microelectronics and electronic devices. Semiconductors useful in the present invention may include elemental semiconductors such as germanium, germanium, and diamond, and compound semiconductors such as Group IV compound semiconductors such as SiC and SiGe, such as AlSb, AlAs, Aln, AlP, BN, GaSb, GaAs. , Group III-V semiconductors of GaN, GaP, InSb, InAs, InN, and InP, such as Alx
Ga1-x
Group III-V ternary compound semiconductor alloy of As, Group II-VI semiconductor such as CsSe, CdS, CdTe, ZnO, ZnSe, ZnS and ZnTe, Group I-VII semiconductor CuCl, such as PbS, PbTe and SnS Group IV-VI semiconductors, such as Pbl2
MoS2
And layered semiconductors of GaSe and such as CuO and Cu2
O-oxide semiconductor. The term semiconductor includes intrinsic semiconductors and extrinsic semiconductors that incorporate one or more selected materials (including semiconductors having p-type dopant materials and n-type dopant materials) to provide usefulness for a given application or device. Useful electronic properties. The term semiconductor includes composite materials comprising a mixture of semiconductors and/or dopants. Specific semiconductor materials useful in some applications of the invention include, but are not limited to, Si, Ge, SiC, AlP, AlAs, AlSb, GaN, GaP, GaAs, GaSb, InP, InAs, GaSb, InP, InAs, InSb, ZnO, ZnSe, ZnTe, CdS, CdSe, ZnSe, ZnTe, CdS, CdSe, CdTe, HgS, PbS, PbSe, PbTe, AlGaAs, AlInAs, AlInP, GaAsP, GaInAs, GaInP, AlGaAsSb, AlGaInP, and GaInAsP. Porous germanium semiconductor materials are useful for the application of the invention in the field of inductors and luminescent materials such as light emitting diodes (LEDs) and solid state lasers. Impurities of the semiconductor material are atoms, elements, ions and/or molecules other than the semiconductor material itself or any dopant provided to the semiconductor material. Impurities are undesirable materials present in the semiconductor material that may negatively affect the electronic properties of the semiconductor material, and include, but are not limited to, oxygen, carbon, and metals including heavy metals. Heavy metal impurities include, but are not limited to, elements of the family between copper and lead on the periodic table, calcium, sodium, and all of their ions, compounds, and/or complexes. "Extensible" interconnects are used herein to broadly refer to a variety of forces and strains, such as extension, flexing, and/or compression, that can withstand one or more directions without adversely affecting device components. Electrical connection or interconnection of conductance from device components. Thus, the extendable interconnect can be formed from a relatively brittle material such as GaAs, but due to the geometric configuration of the interconnect, it can continue to be sustained even when exposed to significant deformation forces (eg, extension, flex, compression) effect. In an exemplary embodiment, the extendable interconnect can withstand strain greater than about 1%, 10%, or about 30% without breaking. In one example, strain is created by bonding at least a portion of the interconnect to the underlying elastomeric substrate. "Device components" are used to refer broadly to individual components within an electrical device. The components can be photodiodes, LEDs, TFTs, electrodes, semiconductors, other light collecting/detecting components, transistors, integrated circuits, contact pads capable of housing device components, thin film devices, circuit components, control components, micro One or more of a processor, a sensor, and a combination thereof. The device component can be connected to one or more contact pads as is known in the art of metal evaporation, wire bonding, solid or conductive paste application. Electrical equipment generally refers to equipment that has a plurality of equipment components, and includes a large area of electronic components, printed wiring boards, integrated circuits, arrays of equipment components, biological and/or chemical sensors, physical sensors (eg, temperature) , light, radiation, etc.), solar cells or photovoltaic arrays, display arrays, concentrators, systems and displays. "Substrate" refers to a material that has a surface that is capable of supporting a component that includes device components or interconnects. The "bonded" to substrate interconnect refers to the portion of the interconnect that is in physical contact with the substrate and that is substantially incapable of moving relative to the substrate surface to which it is bonded. Instead, the unbound portion can move significantly relative to the substrate. The unbonded portions of the interconnect generally correspond to portions of the "flex configuration", such as by strain-induced interconnect deflection. In the context of this description, "flex configuration" refers to a structure having a curved configuration resulting from the application of force. In the present invention, the flex structure may have one or more folded regions, raised regions, recessed regions, and any combination thereof. For example, a flex configuration, a creping configuration, a curved configuration, and/or a wavy (ie, corrugated) configuration can be provided to provide a flex structure useful in the present invention. A flexure structure, such as an extendable flexure interconnect, can be bonded to a flexible substrate such as a polymer and/or an elastic substrate in a configuration in which the flexure structure is in strain. In some embodiments, the flexure structure, such as a flexural webbing structure, is at a strain equal to or less than about 30%, a strain equal to or less than about 10%, a strain equal to or less than about 5%, and for some In a preferred embodiment, the application is at a strain equal to or less than about 1%. In some embodiments, the flexural structure, such as a flexural webbing structure, is at a strain selected from a range of from about 0.5% to about 30%, from a strain selected from the range of from about 0.5% to about 10%, from about The strain selected from the range of 0.5% to about 5%. Alternatively, the extendable flexure interconnect can be bonded to a substrate of a substrate of a system component that includes a substrate that is itself non-flexible. The substrate itself can be flat, substantially flat, curved, have a sharp edge, or any combination thereof. The extendable flex interconnect can be used to transfer to any one or more of the complex substrate surface shapes. The interconnect can have any number of geometries or shapes as long as the geometry or shape facilitates flexing or extension of the interconnect without breaking. The general interconnect geometry can be described as "bending" or "wavy". In one aspect, bending or corrugation can be created in the interconnect by applying a force to the underlying deformable substrate such that a change in the size of the underlying substrate (because the interconnected portion is bonded to the substrate and between the bonded portions) The regions are unbonded and a force (eg, strain) is applied to the interconnect to obtain the geometry. Thus, individual interconnections can be defined by bonding to the curved central portion of the substrate that is not bonded to the substrate between the ends and ends. "Bending" refers to a relatively complex shape, such as for an interconnection with one or more additional bonding regions in the central portion. "Arc" refers to a generally sinusoidal shape having an amplitude corresponding to the maximum separation distance between the interconnect and the surface of the substrate. The interconnect can have any cross-sectional shape. A shape interconnect is a ribbon interconnect. "Webbing" refers to a generally rectangular cross section having a thickness and a width. The particular size depends on the desired conductivity of the interconnect, the composition of the interconnect, and the number of interconnects that electrically connect adjacent device components. For example, an interconnect that enables a bridge configuration of adjacent components can have a different size than a single interconnect that connects adjacent components. Thus, as long as a suitable conductivity is produced, the dimensions can have any suitable value, such as a width between about 10 μm and 1 cm and a thickness between about 50 nm and 1 nm, or a range between about 0.001 and 0.1. The width to thickness ratio within, or about 0.01 ratio. "Elastomer" refers to a polymeric material that can be stretched or deformed and at least partially returns to its original shape without significant permanent deformation. Elastomeric substrates are typically subjected to substantial elastic deformation. Exemplary elastomeric substrates useful in the present invention include, but are not limited to, composites or mixtures of elastomers and elastomers, as well as polymers and copolymers that exhibit elasticity. In some methods, the elastomeric substrate is pre-stressed via a mechanism that provides expansion of the elastic substrate along one or more spindles. For example, the pre-strain can be provided by expanding the elastic substrate along the first axis, including the expansion in the radial direction to transform the hemispherical surface into a flat surface. Alternatively, the elastic substrate can be expanded along a plurality of axes (e.g., via expansion along first and second axes that are orthogonally positioned relative to each other). The means for pre-straining the elastic substrate via a mechanism that provides expansion of the elastic substrate includes flexing, winding, flexing, flattening, expanding the elastic substrate, or otherwise deforming the elastic substrate. The pre-straining means also includes providing a pre-strain by providing a thermal expansion of the elastic substrate by raising the temperature of the elastic substrate. Elastomers useful in the present invention may include, but are not limited to, thermoplastic elastomers, styrenic materials, olefin materials, polyolefins, polyurethane thermoplastic elastomers, polyamines, synthetic rubbers, PDMS, poly Butadiene, polyisobutylene, poly(styrene-butadiene-styrene), polyurethane, polychloroprene and polyfluorene. The strain for the length from L (at rest) to L + ΔL (under the applied force) is defined as: ε = ΔL / L, where ΔL is the displacement distance from rest. Axial strain refers to the force applied to the axis of the substrate to create a force that shifts ΔL. Strain is also generated by forces applied in other directions, such as flexing force, compressive force, shear force, and any combination thereof. Strain or compression can also be produced by extending the curved surface to a flat surface or vice versa. "Young's modulus" is the mechanical property of a material, device, or layer that refers to the ratio of stress to strain for a given substance. Young's modulus can be provided by the following expression;(II) where E is Young's modulus, L0
To balance the length, ΔL is the change in length under the applied stress, F is the applied force and A is the area to which the force is applied. The Young's modulus can also be expressed by the Lame constant by the following formula:(III) where λ and μ are the Lame elastic constants. High Young's modulus (or "high modulus") and low Young's modulus (or "low modulus") are relative descriptors for the magnitude of Young's modulus in a given material, layer or device. In the present invention, the high Young's modulus is greater than the low Young's modulus, preferably about 10 times for some applications, about 100 times better for other applications, and even about 1000 times for other applications. Complex surface shapes are obtained by polymerizing elastomers having spatially varying Young's modulus and/or by laminating elastomers with multiple layers having different resilience at various locations. Compression is used herein in a manner similar to strain, but particularly refers to the force used to reduce the characteristic length or volume of the substrate such that ΔL < 0. "Fracture" refers to the rupture of a solid in an interconnect that makes the interconnect substantially incapable of conducting electricity. "Pattern of binding sites" refers to the application of bonding means to the surface of the support substrate and/or to the interconnect, such that the supported interconnects have bonded regions and unbonded regions with the substrate. For example, an interconnect that is bonded to the substrate at the end and not bonded at the central portion. Further shape control is possible by providing additional binding sites in the central portion such that unbound regions are divided into two distinct central portions. Bonding means may include an adhesive, an adhesive precursor, a weld, a photolithography, a photocurable polymer. In general, the binding sites can be patterned by a variety of techniques and can provide surface adhesion with strong adhesion between the substrate and features (eg, interconnects) (WAct
) Area and adhesion are relatively weak surface inactive (WIn
The aspects are described. Available in WAct
With WIn
The size aspect describes a substrate that is patterned into a straight line in an adhesive manner. The magnitude of these variables together with the pre-added strain εPre
Affects interconnect geometry. The invention will be further understood by the following non-limiting examples. All references cited herein are incorporated herein by reference to the extent that they are not inconsistent with the accompanying disclosure. Although the description herein contains many specific details, the specific details are not to be construed as limiting the scope of the invention, but are to be construed as merely providing a description of some of the presently preferred embodiments of the invention. Therefore, the scope of the invention should be determined by the scope of the appended claims and their equivalents. Figure 1 generally outlines one method for making a curved or wavy interconnect. Metal features 10 (such as metal features that will be interconnected) are provided on substrate 20. Contact metal features and/or substrate surfaces may be treated to reduce adhesion, such as by photolithography or by masking, as appropriate. A separator (crack) 25 is introduced between the feature 10 and the substrate 20, such as by micromachining, etching, and/or mechanical engraving. The metal feature 10 is taken by the flexible elastomer stamp 30. Subsequent deformation of the stamp 30 produces a wavy or curved geometry 40 in the metal feature 10. The creation of a bend is provided by the stamp 30 which is under strain when the metal feature is taken and then relieves the applied tension, or by compressing the stamp 30 after taking the metal feature. Figure 2 shows an example of a curved or wavy metallic feature produced by the method outlined in Figure 1. 2 is a photograph of an extendable wavy/curved electrical interconnect 40 that is drawn from a rigid substrate onto a pre-strained extensible PDMS rubber substrate 30, followed by strain relief, thereby inducing bending And formed. A method for producing a wavy extensible electrode and/or interconnect is provided in FIG. As shown in FIG. 3A, undulating features 22 are fabricated on substrate 20 by, for example, a micromachining process. The substrate 20 having a wavy feature 22 on its surface serves as a precursor for molding the elastomeric stamp 30 having the corresponding undulating surface 32. The metal features 10 are deposited on the undulating surface 32 by, for example, evaporation and/or electroplating through a shadow mask. Figure 4 provides a method for making a smooth corrugated elastomeric substrate. An anisotropic Si (100) etch provides a substrate 20 having a sharp edge 24 (Fig. 4B - top screen). Spin coating PR smoothes the sharp edge valley by depositing PR 26 in the sharp edge valley 24 of the substrate 20. The elastomer stamp 34 is cast against the substrate 20. The stamp 34 has a sharp edge recessed feature. A second elastomeric stamp 36 is cast over the stamp 34 to produce an impression having a sharp peak. The stamp 36 is stamped with Su-8 50 and cured as appropriate. Spin coating PR 26 smoothes the sharp edge valley of 50. The elastomer substrate 30 is cast against the 50 having a smooth valley. Substrate 30 is removed to reveal a wavy and smooth surface 32. Figure 54 outlines one method of making a wavy extensible electrode: deposition on a wavy precursor followed by casting a stamp on the parent to cure the stamp and thereby transferring the electrode to the precursor after release. Figure 55 shows an image of an extensible metal electrode (Au, 300 nm thick) on a wavy PDMS prepared by the method of Figure 4 in conjunction with the method of Figure 54. An interface 112 is shown between the metal feature 10 and the substrate 20. Interface 112 may include material that facilitates removal of metal features 10 by stamp 30 as illustrated in the bottom panel. Briefly, one method uses: a thin coating of SU-8 10 is spin coated onto a pre-cleaned 2" x 3" glass slide such that the glass surface is completely covered. The slide/SU-8 was brought into contact with a PDMS stamp having the desired wavy surface features (smooth valleys and steep peaks) and pressure was applied gently to remove all air pockets. The stamper/mold structure was flash cured under a UV lamp for 30 seconds, flipped, and cured on the back for an additional 40 seconds. After curing, it was baked on a hot plate at 65 ° C for 5 minutes. After baking, the samples were allowed to cool to room temperature and the SU-8 mold was peeled from the PDMS matrix. SU-8 will now have undulating surface undulations with sharp valleys. To smooth these grains, a portion of SU-8 2 was mixed with a thinner SU-8 and spin coated at high RPM for 90 seconds. It was cured by exposure to a UV lamp for 20 seconds and post-baked at 65 ° C for 3 minutes. Once cooled, the metal lines or contact points are deposited via electroplating, photolithography and etching/disengagement and/or evaporation through a shadow mask. The metal on SU-8 was treated with MPTMS for 1 hour and then the elastomeric substrate was cast against it. After removal, the PDMS has undulating surface undulations (which have smooth peaks and valleys) along with the transferred metal structure. Figure 55 is a photograph of a corrugated extensible electrode fabricated by the process outlined in Figure 54 and also providing measurement of the stretchable corrugated metal electrode as a function of applied tensile strain (up to 30%). Get the resistance data. FIG. 5 provides an example of a smooth wavy PDMS substrate 30 fabricated by the method outlined in FIG. The device assembly 60 can be supported on the corrugated substrate 30 in a non-wavy region (eg, a substantially flat portion) and connected to the interconnect 10 as needed. Figure 6 shows an example of spin-coating a smoothing layer into a sharp valley or recessed feature. The smooth edge substrate 34 (Fig. 6A) is smoothed by spin coating the photocurable epoxy resin 26 to produce a smooth corrugated substrate. An elastomeric (e.g., PDMS) stamp 30 having a smooth undulating surface 32 is obtained by casting a PDMS stamp against the substrate of Figure 6B and subsequently removing the stamp 30 from the substrate 34. Figure 7 is a photograph of an extendable electrode. FIG. 7A is a photograph of a cross section of an elastomeric substrate 30 having a wavy surface 32. FIG. 7B is a top photomicrograph of an electrode made by vapor-depositing metal 10 on wave-like elastomer substrate surface 32. The focal plane of the image is on a undulating peak. In FIG. 7C, the focal plane is on the undulating valley and the metal interconnect 10 is in electrical contact with the electrode 250. The extendable electrode is deposited by evaporation onto a smooth undulating elastomeric substrate via a shadow mask. In this example, electrode 250 maintains conductivity and connectivity via interconnect 10 during tensions extending up to about 10%. The methods and apparatus disclosed herein can be used to fabricate a variety of electronic devices including, for example, extendable passive matrix LED displays (see Figure 8). Wave electrodes (eg, interconnect 10 and contact pads 70) are patterned on the two elastomer substrates 30. Device component 60 (in this case, an ILED pixel) is patterned on the wavy electrode at contact pad 70 by transfer. The two substrates 30 are assembled accordingly such that the interconnects 10 are extended in different orientations (vertical in this example). Figure 9 illustrates the 2D mechanical extensibility of the passive matrix LED display. In addition to being able to uniaxially and biaxially extend, the display can flex significantly without breaking. The multi-axis flexing provides the curved surface with the ability to mold electronic devices to make curved electronic devices and incorporate them into smart electronic fabrics or displays. One example of a curved electronic device is provided in FIG. Figure 10 illustrates an "artificial eye" comprising an array of inorganic photodiodes distributed over a spherically curved lens. Show four different views of the artificial array. Figure 11 schematically illustrates the requirements for an extendable flat electronic device. In order to wrap the flat sheet around the spherical surface, the sheet must extend in more than one direction. Figure 12 is a fabrication mechanism for fabricating an extensible curved semiconductor array that is conformable to a curved surface. Thin Si elements are fabricated by selective Au or Ti/Au deposition on a substrate such as the "parent wafer" illustrated in picture (i). Si was bonded to PDMS (picture (ii)) which was pre-strained (indicated as L+ΔL) and UVO treated. As explained, pre-stress is provided in both directions. The bonding is performed by any means known in the art, such as, for example, an adhesive applied to the Si component, the substrate, or both. The bonding means is applied in a selected pattern such that Si has a bonding region that will remain in physical contact with the substrate (after deformation) and other regions in a flex configuration that are not in physical contact with the substrate (eg, with respect to bonding in the bonding region) The area where force does not combine or weakly combine). The pre-strained substrate is removed from the wafer substrate to reveal a flat grid of the semiconductor array (picture (iii)). After the substrate is relaxed from L+ΔL to L, the interconnect 10 is bent in the weakly bonded region (see picture (iv)) for the flex configuration, while the device component 60 (eg, the semiconductor Si contact pad) remains The bonding to the substrate 30 is maintained. Thus, the curved interconnect 10 imparts extensibility to the entire array, and in particular the ability to move the assembly 60 relative to other components 60. The electrical contact between the components 60 is not compromised thereby providing conformal capability to the curved or deflectable surface. Figure 13 provides a grid configuration (lower left picture) with a single grid configuration 140 (top two frames), interconnect 160 with multiple connections, and a curved configuration of the flower configuration 150 (bottom right frame). Optical microscopic images of the array. In each of these examples, the interconnect 10 is bent in a central portion that is attached to the contact pad 70. Interconnect and contact pads 70 are supported on PDMS substrate 30. Figures 14 through 17 further provide close-up views of a number of different interconnect geometries. FIG. 14 provides an electron micrograph to show a substantially curved or wavy interconnect 10 having a central portion 90 along with a first end 100 and a second end 110. The central part takes the flex configuration. The ends 100 and 110 are connected to a device component (in this case, a contact pad 70) to enable electrical contact with the device components. The interconnect 10 and contact pads 70 are supported on a substrate 30 such as an elastomeric PDMS substrate. Figure 15 is an electron micrograph of a neighboring device component (e.g., contact pad 70) that is connected to each other by a plurality (two) of interconnects 160. 15 and FIG. 14 demonstrate that device components 70 can be connected to one another by one or more interconnects 10 to provide additional flexibility to the electronic device. For example, a device component or contact pad 70 having a relatively large footprint may optionally be connected to another device component by a plurality of interconnects. Figure 16 is an electron micrograph of the interconnection of the flower configuration 150. The flower configuration has an interconnection oriented in more than two longitudinal directions compared to the grid configuration. In this example, there are four different orientations to enable device components such as contact pads 70 to contact diagonally adjacent device components. In this example, interconnect 10 has an optional bond area 102 electrically connected between interconnect ends 100 and 110 of a device component (not shown), thereby dividing central portion 90 into a flex configuration. Two unbound regions 92. 17 is an electron micrograph of an interconnect configured in a bridging configuration 130. In a bridge configuration, there is a bridging central portion peak 120 from which three or more interconnected ends extend. For example, the two interconnects that intersect in the unbonded region result in a peak 120 having four interconnected ends extending therefrom. For the case where the device components are in a staggered configuration, the peaks 120 can have three ends extending therefrom. Where there are multiple interconnect connections between device components, more than four ends may extend from peak 120. While many of the figures provided herein show device components that are in contact with solder pads 70, the methods and devices claimed herein are capable of being coupled to a wide variety of device components to provide an electronic device that is extensible and thus conformal in shape. For example, FIG. 18 shows an apparatus assembly 60 that is connected to a photodiode of other photodiodes that take an array configuration by a curved interconnect 10 supported on an elastomeric substrate 30. Figure 19 depicts one dimensional extension behavior of a curved tantalum array. Picture (i) is an image of a curved 矽 array without applying any strain force. An extension force is applied (as indicated by the arrow above the screen (i)) to extend the array in one direction. As shown in pictures (2) to (4), the curved interconnect is flattened. When the extension force is released in the picture (5), the array returns to its curved configuration (see pictures (6) to (8)). A comparison between pictures (1) and (8) shows the same bending configuration as before stretching, which indicates that the process is reversible. The curved array of equipment components can be easily transferred to curved surfaces, including rigid or inelastic curved surfaces. An example of an apparatus and process for facilitating conformal contact to a curved surface is provided by the bubble or balloon impression 400 of FIG. An elastomeric substrate 30 (a PDMS film of about 20 μm thickness in this example) is secured in the housing chamber 300 to provide a chamber volume 310 defined by the interior facing substrate wall and housing chamber. Applying a positive pressure (e.g., the pressure in the chamber 300 is greater than the external pressure) creates a raised 200 substrate surface that can conformally contact the recessed receiving substrate. Conversely, the negative pressure creates a concave surface 210 that can conformally contact the raised receiving substrate. Spatial control of the local elasticity of the substrate (eg, Young's modulus) allows for the creation of complex curved geometries. The lower left panel of Figure 20 illustrates one of the components for controlling the pressure in the housing volume 310 by introducing a gas into the chamber 310 or a syringe that removes gas from the chamber 310. The image on the right side of the figure is the different bending of the PDMS film in response to the increase in positive pressure. Any of the methods and apparatus for providing a curved interconnect on an elastomeric substrate can be used with such devices for transfer to a curved substrate. Another component for creating a curved or push-up interconnect on a curved surface is outlined in FIG. A thin elastomeric film is cast against the shaped surface to create an elastomeric substrate having at least one curved portion. The substrate can be extended to flatten the surface so that the substrate can conform to curved and flat surfaces. The interconnect is applied to the flat stamp, and after the extension force is released, the substrate surface is relaxed back to the curved geometry, creating strain in the interconnect, which is accommodated by pushing the central portion over the interconnect. An example of a "two-dimensional" extension of an array of curved turns caused by the apparatus shown in Figure 20 is provided in Figure 22. In this example, the interconnect includes a plurality of curved interconnect connections in a grid configuration, wherein the interconnects are made of 290 nm thick Si. An array of initially curved ridges (upper left image) is placed into the housing and a positive pressure is applied to expand the array into a bubble or balloon configuration (eg, a curved surface). The maximum expansion is shown in the far right image and the positive pressure is subsequently removed. This "bend" extends to be reversible similar to the result of uniaxial stretching of a flat substrate. At any stage of maximizing the expansion of the conformal contact with the curved surface, the array can be transferred to the curved surface by any means known in the art. Figure 23 shows an example of ruthenium printing onto a glass lens coated with an adhesive (elastomer substrate or SU-8) by a balloon impression. The lens can be concave or convex. In this example, R is equal to 19.62 mm and 9.33 mm, respectively. Example 1: Controlled Bending Structure in Semiconductor Nanowebs, along with Application Examples in Extensible Electronic Components, Control of Composition, Shape, Spatial Position, and/or Geometric Configuration of Semiconductor Nanostructures for Almost All of These Materials Applications are important. While there are methods for defining the material composition, diameter, length, and location of the nanowires and nanowebbing, there are relatively few methods for controlling their 2D and 3D (2D and 3D) configurations. This paper provides a mechanical strategy for forming a 3D shape of a particular class that would otherwise be difficult to produce in a nanoweb. This example relates to the combined use of a lithographic patterned surface chemical reaction to provide spatial control of the adhesion sites and an elastic deformation of the support substrate to induce a locally controlled local displacement. The precisely designed bending geometry resulting from the GaAs and Si nanotextiles in this manner and in these configurations can be quantitatively described by a mechanical analysis model. As an application example, specific structures are provided to have extremely high extensibility levels (up to ~100%), compressibility levels (up to ~25%), and flexibility levels (with a radius of curvature as low as ~5 mm) The way of electronic components. The 2-dimensional and 3-dimensional configurations of the nanoribbon and nanowires are controlled during their growth to avoid specific geometries such as crimp, loop and branch layout, or controlled after their growth to (as an example) A tubular (or helical) structure is created by coupling the elements to a strained elastomeric support to produce a sinusoidal structure or by using built-in residual stresses in the layered system. Semiconductor nanoribbons with wavy geometries have attracted attention because of their ability to enable high-performance extendable electronic component systems for potential applications, such as spherically curved focal plane arrays, smart rubber surgical gloves, and conformal health monitors. . This method in which the electronic device itself can be extended is different and may complement the alternative to the same application using rigid device islands along with extendable metal interconnects. The previously described wavy nanowebbing has two major disadvantages: (i) its fixed period and amplitude defined by the modulus of the material and the thickness of the webbing to provide little control over the geometry or phase of the corrugations. Spontaneously formed, and (ii) limited by the non-optimal wavy geometry resulting from the process, the maximum strain that can be accommodated is in the range of 20% to 30%. The procedure introduced herein uses a lithographically defined surface adhesion site along with the elastic deformation of the support substrate to achieve a curved configuration (by deterministic control of its geometry). Periodic or aperiodic design is possible for any selected set of individual nanoribbons in a large scale, organized array of such structures. The special geometry designed for extensible electronic components enables a strain range of up to 150% (even in brittle materials such as GaAs), which is consistent with the mechanical analysis model and up to ten times the previously reported results. Figure 24 shows the steps in this procedure. Fabrication begins with the preparation of a mask for patterning surface chemical adhesion sites on a polydimethyl methoxyalkane (PDMS) elastomeric substrate. This process involves the transmission of deep ultraviolet (UV) light (240-260 nm) via the reticle when an unusual type of amplitude reticle known as a UVO mask (made via step i) is in conformal contact with the PDMS. The UVO mask occupies a concave feature of the undulations in the transparent region such that exposure to UV produces a patterned region of ozone near the surface of the PDMS. Ozone will be -CH3
The unmodified hydrophobic surface governed by the -H terminal group is converted to a highly polar and reactive surface (i.e., active surface) terminated with -OH and -O-Si-O- functional groups. The unexposed areas maintain unmodified surface chemistry (i.e., inactive surfaces). The procedure introduced here involves a large uniaxial pre-stress (for lengths from L to L + ΔL, εPre
Exposure on PDMS substrate (thickness ~4 mm) at =ΔL/L) (step ii). For a mask with a simple periodic line pattern, in step (i) we have the active strip (indicated as the line labeled "active surface") in step (iii) of Figure 24A and the width of the inactive strip. (for example, the distance between adjacent active strips) is expressed as WAct
With WIn
. The active region can bind strongly and irreversibly to other materials having exposed -OH or -Si-O groups on the surface. As outlined below, the patterned adhesion sites are utilized to form a clearly defined 3D geometry in the nanotextile. Alternatively, a similar adhesive bond site pattern is provided by similarly patterning the interconnect before the interconnect is in contact with the substrate. In this example, the nanowebbing consists of single crystal Si and GaAs. The webbing tape is prepared from a silicon-on-insulator (SOI) wafer by using the previously described procedure (see Khang et al., Science 311, 208-212 (2006)). GaAs webbing includes Si-doped n-type GaAs (120 nm; carrier concentration 4×10) formed on a (100) SI-GaAs wafer by molecular-beam epitaxy (MBE)17
Cm3
), semi-insulating GaAs (SI-GaAs; 150 nm) and multiple layers of AlAs (200 nm). By using a line patterned by photoresist along the (0 1 1) crystal orientation as an etch mask in H3
PO4
And H2
O2
The aqueous etchant chemically etches the epitaxial layer to define the webbing. The photoresist is removed and the wafer is then immersed in an ethanol solution of HF (2:1 volume of ethanol and 49% aqueous HF) to remove the AlAs layer, thereby releasing the width determined by the photoresist (for The example in Fig. 24D is a 100 μm) GaAs (n-GaAs/SI-GaAs) webbing. The addition of ethanol to the HF solution reduces the chance that the fragile web will rupture due to the capillary force during drying. The lower surface tension (compared to water) also minimizes the drying induced disorder in the spatial layout of the GaAs webbing. In the final step, deposit thinner SiO2
Layer (~30 nm) to provide the necessary -Si-OH surface chemistry for binding to the active region of PDMS. Laminating the treated SOI or GaAs wafer against a UVO treated, pre-stretched PDMS substrate (webbing oriented parallel to the direction of pre-strain), baking it in an oven at 90 ° C for a few minutes, and The wafer is removed to transfer all webbing to the surface of the PDMS (step iv). Heating promotes native SiO on Si ribbon2
Deposited SiO on a layer or GaAs ribbon2
The conformal contact between the layer and the active region of the PDMS and the formation of a strong siloxane coupling (i.e., -O-Si-O-) between the two. The relatively weak Waals force binds the webbing to the inactive surface area of the PDMS. The strain relaxation in the PDMS is caused to separate by the separation of the webbing from the entity of the inactive area of the PDMS (step v). Due to the strong chemical bonding, the webbing remains tied to the PDMS in the active area. The resulting 3D webbing geometry (ie, the spatially varying pattern of the bend) depends on the amount of pre-stressed strain and the pattern of surface activity (eg, WIn
And WAct
Depending on the shape and size). (Similar results can be achieved via patterned binding sites on the webbing). For simple line patterns, WIn
And pre-stressing determines the width and amplitude of the bend. When WAct
>100 μm, due to the mechanical instability of the type of "wavy" ,, a sine wave with a much smaller wavelength and amplitude than the bend is formed in the same webbing (see Figure 25, for a different W).Act
The image of the formed sample). As a final step in the manufacture, the 3D webbing structure can be encapsulated in PDMS by casting and curing the liquid prepolymer (see step vi in Figure 24). Due to the low viscosity and low surface energy of the liquid, it flows and fills the gap formed between the webbing and the substrate (see Figure 26). Figure 24D shows a squint scanning electron microscope (SEM) image of a curved GaAs webbing on a PDMS, where εPre
= 60% and WAct
=10 μm and WIn
=400 μm. The image shows uniform periodic curvature with a common geometry and spatial coherence phase for all webbing in the array. The anchor points are properly aligned to the adhesion sites defined by the lithography. The illustration shows the SEM image of the bonded area; the width is ~10 μm, which is related to WAct
Consistent. These images also show that the surface of the PDMS is flat, even at the binding site. This behavioral behavior, which differs greatly from the previously reported strong coupling wavy structure, suggests that PDMS induces displacement in the case described here, but is not closely related to the bending process (ie, its modulus does not affect the ribbon) Geometric shape). In this sense, PDMS denotes a soft, non-destructive tool for controlling the webbing via the force applied to the adhesive site. Figure 27A shows a different εPre
Side-view optical micrograph of a curved webbing formed on a PDMS (WAct
=10 μm and WIn
=190 μm). The height of the bend (for example, "amplitude") with εPre
And increase. The webbing in the inactive area is at a lower εPre
Not fully separated (see εPre
= 11.3% and 25.5% of the sample). At a higher εPre
Where, the webbing (thickness h) is separated from the PDMS to form a bend having a vertically shifted profile characterized by:among them: . As determined by nonlinear analysis of the bending formed in a uniform thin layer, the maximum tensile strain in the webbing is approximately. The width of the bend is 2L1
And the period is 2L2
. Because for h<1 μm,h2
π2
/(12L1 2
) much smaller than εPre
(>10% in this report), so the amplitude is independent of the mechanical properties of the webbing (eg thickness, chemical composition, Young's modulus, etc.) and is mainly determined by the placement of the adhesive sites and the pre-stress . This conclusion suggests a general applicability of a method in which a web of any material will form a similar curved geometry. This prediction is consistent with the results obtained by the webbing of Si and GaAs used herein. The profile calculated for the pre-stressed strain of 33.7% and 56.0% in Fig. 27A is in good agreement with the observations in the GaAs webbing. In addition, except at low εPre
At the table (Table 1 and Table 2), the parameters of the bending (including the period, width and amplitude) shown in Fig. 27A are consistent with the analytical calculations. One of the concerns of this study is that the maximum tensile strain in the webbing is small (for example, ~1.2%), even for larger εPre
(for example, 56.0%) is also true. As discussed later, this ratio is capable of extensibility, even for the case of brittle materials such as GaAs. The lithographically defined adhesive sites may have a complex geometry than a simple grid or grid pattern associated with the structure of FIG. For example, bends having different widths and amplitudes can be formed in individual webbings. As an example, Figure 27B shows an SEM image of a curved Si webbing (width and thickness of 50 μm and 290 nm, respectively) with a 50% pre-strain and WAct
=15 μm and WIn
It is formed along the length of the webbing that is equal to 350, 300, 250, 250, 300, and 350 μm. The image clearly shows the change in width and amplitude of adjacent bends in each of the webbing. The curved webbing can also be formed for different phases of different webbings. Figure 27C presents an example of a Si system designed to have a phase that varies linearly with a distance perpendicular to the length of the webbing. The UVO mask used for this sample has 15 μm and 250 μm, respectively.Act
And WIn
. The angle between the active strip on the PDMS stamp and the Si webbing is 30. Many other possibilities are readily attributable due to simple lithographic control of the adhesion sites, and some possibilities are shown, for example, in Figures 13-17. With εPre
=60%, WAct
=10 μm and different WIn
A simple example of a curved GaAs webbing on a PDMS (as shown in Figure 27D) illustrates aspects that are important for applications in extendable electronic components. A good fit with the analytical solution to mechanics is shown in WIn
=100 μm (and smaller) due to failure due to cracking in GaAs. The failure is caused by a tensile strain (~2.5% in this case) that exceeds the yield point of GaAs (~2%). So by choosing with εPre
Proportional WIn
(»WAct
) to achieve the best configuration for the robustness of extension and compression. In this case, pre-stressed strains up to and greater than 100% can be accommodated. We directly demonstrate this type of extensibility by applying a force to the PDMS support. End-to-end distance of the section of the webbing (LProjected
The change provides a means to quantify extensibility and compressibility according to the following formula:, among themIndicates the maximum/minimum length before breaking, andIt is the length in the relaxed state. Extension and compression respectively correspond to greater than and less thanIt. WAct
=10 μm and WIn
=400 μm and εPre
= 60% of the curved webbing on the PDMS shows 60% extensibility (ie εPre
And up to 30% compressibility. Embedding the webbing in the PDMS mechanically protects the structure and also produces a sustained reversible response, but with minor changes in mechanics. In particular, the extensibility and compressibility were reduced to ~51.4% (Fig. 28A) and ~18.7%, respectively (Fig. 28B). The PDMS matrix at the top of the webbing is partially flattened by the cure-induced shrinkage of the underlying PDMS. The small periodic corrugations are formed in these regions at a greater compressive strain due to the spontaneous mechanics of the type that produced the previously described undulating webbing structure. As illustrated in Figure 28B, mechanical failure tends to begin in such zones, thereby reducing compressibility. WAct
=10 μm and WIn
A curved structure of =300 μm avoids this type of behavior. While these examples show slightly lower extensibility than the example shown in Figure 28A, the lack of short period corrugations increases the compressibility to ~26%. In general, a curved single crystal GaAs nanoweb formed on a pre-stretched PDMS substrate having a patterned surface chemical adhesion site exhibits greater than 50% extensibility and greater than 25% compressibility, This corresponds to a full scale strain range approaching 100%. These numbers are increased by εPre
And WIn
Further improvements are obtained by using a substrate material having a higher elongation than PDMS. For more sophisticated systems, these manufacturing procedures can be repeated to produce a sample with multiple layers of curved webbing (see Figure 29). The direct result of this greater extensibility/compressibility is a great degree of mechanical flexibility. Figures 30A through 30C present optical micrographs illustrating the flex configuration of this feature. The PDMS substrate (thickness ~4 mm) was flexed to a curvature of a concave (~5.7 mm radius), flat and convex (~6.1 mm radius). These images illustrate how the profile changes to accommodate deflection induced surface strain (~20% to 25% for these cases). In fact, the shape is similar to that obtained in compression (~20%) and tension (~20%). The embedded system exhibits an even higher level of flexibility due to the neutral mechanical plane effect. When the top and bottom PDMS layers have similar thicknesses, there is no change in curved shape during flexing (Fig. 30D). In order to demonstrate such mechanical properties in functional electronic devices, we have used a curved GaAs webbing having a profile similar to that shown in Figure 30, by depositing a thinner gold electrode onto the SI-GaAs side of the webbing for SCHOTT A metal-semiconductor-metal photodetector (MSM PD) is established by a Schottky contact. Figure 31A shows the geometry and equivalent circuit and top view optical micrograph of the MSM PD before and after extending ~50%. In the absence of light, almost no current flows through the PD; the current increases with increasing illumination of the infrared beam (wavelength ~850 nm) (Fig. 31B). The asymmetry of the current/voltage (I-V) can be attributed to the difference in electrical characteristics of the contact points. Figure 31C (extension) and Figure 31D (compression) show I-V measured at different degrees of extension and compression. The current increases as the PD extends up to 44.4% and then decreases with further extension. Therefore, the intensity per unit area of the light source is constant, so the increase in current with extension can be attributed to the projected area of the curved GaAs webbing (referred to as the effective area, SEff
) as the webbing flattens. Further extension of the PD may induce defects on the surface of the GaAs webbing and/or in the crystal lattice, which results in a decrease in current and eventually leads to an open circuit upon breaking. Similarly, compression makes SEff
The current is reduced and thus reduced (Fig. 31D). These results indicate that a curved GaAs webbing embedded in a PDMS matrix provides a fully extensible/compressible type of light sensor useful for various applications such as wear resistant monitors, curved imaging arrays, and other devices. In summary, this example indicates that a soft elastomer having a lithographically defined adhesive site is useful as a tool for forming a particular type of 3-dimensional configuration in a semiconductor nanoweb. Extensible electronic components provide an example of one of many possible fields of application for such types of structures. Simple PD devices demonstrate some capabilities. It is possible to have a high level of control of the structure and the ability to separate high temperature processing steps (eg, the formation of ohmic contacts) from the bending process and PDMS to indicate more complex equipment (eg, transistors and smaller circuit sheets). The well-controlled phase of the bend in the adjacent webbing provides the opportunity to electrically interconnect multiple components. Also, although the experiments reported herein use GaAs and Si nanowebbing, other materials (e.g., GaN, InP, and other semiconductors) and other structures (e.g., nanowires, nanofilms) are compatible with this process. Fabrication of GaAs Ribbon: GaAs wafers with custom epitaxial layers (details are described herein) are available from IQE Inc., Bethlehem, PA. Photolithography and wet chemical etching produce GaAs webbing. AZ photoresist (e.g., AZ 5214) was spin cast onto a GaAs wafer at 5000 rpm for 30 seconds and then soft baked at 100 °C for 1 minute. Exposure to a mask having patterned lines oriented in the (011) crystallographic direction of GaAs followed by development produces a line pattern in the photoresist. Gentle O2
The plasma (ie, the desmearing process) removes residual photoresist. GaAs wafer followed by etchant (4 mL H3
PO4
(85% by weight), 52 mL H2
O2
(30% by weight) and 48 mL of deionized water were anisotropically etched for 1 minute and cooled in an ice water bath. HF solution diluted in ethanol (Fisher®
Chemicals) (1:2 in volume) to dissolve the AlAs layer. The sample with the released webbing on the mother wafer is dried in a fume hood. 30 nm SiO deposited by electron beam evaporation2
To coat the dried sample. Fabrication of Si webbing: woven webbing is made from a silicon-on-insulator (SOI) wafer (Soitect, Inc., top 矽290 nm, buried oxide 400 nm, p-type). Wafers were patterned by conventional photolithography using AZ 5214 photoresist and etched by SF6 plasma (Plasma Therm RIE, SF6 40 sccm, 50 mTorr, 100 W). After the photoresist was washed with acetone, the buried oxide layer was then etched in HF (49%). Manufacture of UVO mask: The fused silica slide (at 60 ° C) was rinsed in a piranha solution for 15 minutes and thoroughly rinsed with sufficient water. The washed slide was dried by nitrogen purge and placed in the chamber of the electron beam vaporizer to pass 5 nm of Ti (as an adhesive layer) and 100 nm of Au (for UV light) The continuous layer of the mask layer is applied. A negative photoresist (i.e., SU8 5) was spin cast onto the slide at 3000 rpm for 30 seconds to produce a ~5 μm thick film. Soft baking, exposure to UV light, post-baking and development create patterns in the photoresist. Gentle O2
The plasma (ie, the desmearing process) removes residual photoresist. The photoresist acts as a mask to separate the gold etchant (ie, I2
An aqueous solution of KI and a titanium etchant (i.e., a diluted solution of HCl) are used to etch Au and Ti. Fabrication of PDMS impressions: prepared with ~4 mm by pouring the prepolymer (A: B = 1:10, Sylgard 184, Dow Corning) into a Petri dish relay for 6 hours at 65 °C. The thickness of the PDMS substrate. A slab of suitable size and rectangular shape was cut from the resulting cured article and then rinsed with isopropyl alcohol and dried by nitrogen purge. A specially designed table is used to mechanically extend the PDMS to the desired degree of strain. These extended substrates are subjected to short-wavelength UV light via a UVO mask placed in contact with the PDMS (low pressure mercury lamp, BHK, 173 μW/cm from 240 to 260 nm)2
The illumination of the pattern produced a patterned surface chemistry for 5 minutes. Formation and embedding of curved GaAs webbing: coated with SiO relative to PDMS laminates with patterned surface chemistry2
The GaAs wafer of the released webbing. Bake in an oven at 90 ° C for 5 minutes, cool to room temperature in air and then slowly relax the strain in the PDMS to create a bend along each webbing. Embedding the curved webbing involves flood exposure to UV light for 5 minutes and then casting the liquid PDMS prepolymer to a thickness of ~4 mm. The samples were cured in an oven at 65 ° C for 4 hours or at room temperature for 36 hours to allow the prepolymer to cure to embed the curved webbing in the solid matrix of PDMS. Characterization of the curved webbing: The webbing is imaged by an optical microscope by tilting the sample to ~90° (for non-embedded samples) or ~30° (for embedded samples). SEM images were recorded on a Philips XL30 field emission scanning electron microscope after coating the samples with a thinner gold layer (thickness ~5 nm). The resulting sample was extended and compressed using the same set used to pre-extend the PDMS impression. Fabrication and Characterization of SMS PD: The fabrication of PD begins with the configuration of the sample shown in the bottom panel of Figure 24B. A strip of polyethylene terephthalate (PET) sheets of ~0.8 mm width was gently placed on the PDMS with the longitudinal axis of the strip perpendicular to the longitudinal axis of the webbing. This strip acts as a shadow mask for electron beam evaporation (to form a Schottky electrode) for a 30 nm thick gold film. The PET strip was removed and the relaxed pre-stretched PDMS stamp formed an SMS PD with a curved GaAs web. The liquid PDMS prepolymer was cast onto the electrodeless region of the webbing and then cured in an oven. The gold electrode extends across the top PDMS to enable detection by a semiconductor parametric analyzer. (Agilent 4155C). In the measurement of the response to light, the PD is controlled by using a mechanical table for extension and compression. The IR LED source (with a wavelength of 850 nm) provides illumination. Example 2: Transfer: Our technical approach uses some of the ideas embodied in the previously described flat impression based printing methods. While these basic techniques provide a promising starting point, as described below, many fundamental new features must be introduced to meet the challenges of Hemispherical Array Detector for Imaging (HARDI) systems for imaging. Figures 32 and 33 illustrate the overall strategy associated with transfer to a curved surface. The first set of steps (Fig. 32) relates to a thinner spherically curved elastomer designed to detach an interconnected Si CMOS "chiplet" from the flat surface of the wafer and then transform the geometry into a hemispherical shape Manufacturing and control of impressions. Formed by casting and curing a liquid prepolymer against a high quality optical element having a desired radius of curvature (ie, a pair of convex and concave lenses) to obtain an elastomer such as polydimethyl siloxane (PDMS) The stamp used for this process. The stamp has a molded round rim. This spherical element is transformed into an extended flat sheet by mating the molding groove (the dotted circle in Fig. 32) on the rim to a suitably sized rigid circular holding ring. Contacting the extended stamp with a mother wafer that supports a thinner interconnected preformed and undercut etched Si CMOS "small wafer" and then stripping the stamp to interconnect the "small wafer" pairs This component is "painted". The Van der Waals interaction between the small wafer and the soft elastomeric element provides sufficient adhesion to the process. Removing the retaining ring causes the PDMS to relax back to its original hemispherical shape, thereby enabling a flat to spherical transition of the small wafer array. This transformation induces compressive strain at the surface of the stamp. These strains are accommodated in the CMOS small wafer array by local delamination and enhancement of the interconnect (lower left in Figure 32). These "push up" interconnections absorb strain in a manner that avoids damage to the small wafer and its harmful strain-induced changes in electrical characteristics. Keeping the strain in the small wafer below ~0.1% achieves these two goals. The space required for the interconnect limits the maximum fill factor of the CMOS small chip. However, photodetectors consume almost all of the pixel area, thereby providing an easy way to achieve an 80% fill factor goal. In a second set of steps (Fig. 33), an "inked" hemispherical impression is used to transfer the elements to a final device substrate having a matching shaped cavity (e.g., in this example with a match) On the glass substrate of the hemispherical cavity). This transfer process uses an ultraviolet (UV) curing photopolymer such as photocurable BCB (Dow Chemical) or Norland Optical Adhesive as an adhesive. These materials are applied to the device substrate in the form of a thin (tens of microns thick) liquid film. After contact with the stamp, the liquid layer flows to conform to the relief structure associated with the small wafer and the push-up interconnect. The UV light passing through the transparent substrate cures the photopolymer and transforms it into a solid form to produce a smooth, planarized top surface after removal of the stamp. The final integration used to form the functional system involves the deposition and patterning of the electrodes and photodetector materials, and the lithography of the busbars to the external control circuitry. The methods of Figures 32 and 33 have several salient features. First, it utilizes the latest planar electronics technology to enable reliable, cost-effective and efficient operation of hemispherical substrates. In particular, the small wafer consists of a collection of germanium transistors processed with a design rule of 0.13 μm to obtain the local pixel-level processing capability of the HARDI system. Conventional processing is used in conjunction with a silicon germanium wafer to form such devices. The buried oxide provides a sacrificial layer (undercut etching by HF) to prepare a small wafer for printing. The interconnect consists of a narrow and thin (~100 nm) metal wire. A second feature is that the method uses elastomeric elements and mechanical design to enable a well-controlled transformation of the planar hemisphere. Reversible linear mechanics in transfer stamping and integrated mechanical modeling are achieved as outlined below. The third attractive aspect is that some of the basic components of the transfer process and strategy used to control adhesion have been demonstrated in planar applications. In fact, stations that have been designed for use in their planar printing applications can be adapted for use in the processes of Figures 32 and 33. Figure 34 shows a home-made printer with an integrated vision system and a pneumatic actuator suitable for use in this process. A number of aspects of the process of Figures 32 and 33 are demonstrated using these types of printer systems. Figure 35 shows a scanning electron micrograph of the surface of a hemispherical impression of an "ink-coated" array of single-crystal iridium islands, which are heavily doped in a square array. Ribbon and interconnect. Figure 36 shows an optical image. During web-to-spherical transitions, these webbing interconnections are pushed up in the manner depicted in FIG. A key aspect of these types of interconnects is the need to reduce the need for high resolution curved surface lithography or other forms of direct hemispherical processing when combined with the transfer of fully formed small wafers. In addition to materials and overall processing strategies, full computational modeling of elastic mechanical responses to hemispherical impressions, push-up interconnections, and interactions with rigid equipment islands is performed. These calculations promote the physical phenomena of the process of design control and optimization. A simple estimate based on the linear elastic plate theory implies that the strain level associated with the process of Figure 32 can be 10% or more for a 2 mm thick stamp and a 1 cm radius spherical surface. Therefore, for reliable design control, it is necessary to operate the stamp in a linear elastic state for strains up to twice this value (i.e., ~20%). Figure 37 shows experimental stress/strain curves for several variations of PDMS with respect to which we have experience in the level of printing based on block-like flat impressions. The 184-PDMS appears to provide a good starting material because it provides a high linearity and elastic response with strains up to ~40%. Mechanical measurements such as these, along with literature values for the modulus and geometry of the small wafer and webbing push-up interconnects, provide the information necessary for modeling. Two calculation methods are used. The first is finite element modeling (FEM), in which the details of the device and interconnect geometry (eg, size, spacing, multilayer) on a flat substrate are analyzed. Different materials (eg, stamps, defects, interconnects) are directly considered in the analysis. Additional lateral pressure is applied to deform the stamp and circuit into the desired spherical shape. Finite element analysis gives the strain distribution (especially the maximum strain in the equipment and interconnects) and the uneven spacing between the transformed devices. The advantage of this method is that it captures all the details of the device geometry and material, and thus can be used to explore the effects of different designs of the transfer process to reduce maximum strain and non-uniformity. However, this method is computationally intensive and therefore time consuming because it involves a wide range of length scales and modeling of a large number of structural devices on the stamp. The second method is the unit cell model of the device (small wafer), which analyzes the mechanical performance of the devices under load. Each device is represented by a unit cell and its response under mechanical loading (eg, deflection and tension) is thoroughly investigated by finite element methods. Each device is then replaced by a unit cell connected by an interconnect. This unit cell model is then incorporated into the finite element analysis to replace the detailed modeling of the device and interconnect. Moreover, at the edge away from the sphere, the strain is relatively uniform so that many unit cells can be integrated and their performance can be represented by a roughly level model. At near the edge of the sphere, the strain height is not uniform, making detailed modeling of the equipment still necessary. The advantage of this method is that it significantly reduces the amount of calculation. The unit cell model was validated using the full scale finite element modeling in the first method. Once validated, the unit cell model provides a powerful design tool because it is suitable for rapid exploration of different designs of devices, interconnects, and their spacing. Figure 38 presents preliminary FEM results for extending the hemispherical impression to a flat geometry (and relaxing it back to its hemispherical shape) as summarized in Figure 32. The top panel shows a cross-sectional view of a hemispherical impression having a geometry that is geometrically illustrated as illustrated in FIG. These results show the small spatial inhomogeneities in the strain of the stretched film as seen by its uneven thickness. The non-uniformity can be eliminated by appropriately selecting the thickness profile of the stamp by properly selecting the structure against which the stamp is formed by casting and curing. However, it is worth noting that some uneven strain is acceptable because (i) the push-up interconnect inherently allows for distortion, and (ii) the small wafer does not need to be fully centered at each pixel location; The device will fill the pixel region with a uniform back electrode that can establish electrical contact thereto independently of the location of the small wafer within the pixel region. Modeling can also determine the level of strain in Si CMOS small wafers. The system should be designed to maintain strain on these small wafers below ~0.1% to 0.2% to avoid changes in electrical characteristics and (possibly) mechanical failure due to fracture or delamination. This modeling facilitates the design of the stamp and processing conditions to avoid exposure of the small wafer to strains above this range. Example 3: Biaxially extensible "wavy" tantalum film This example introduces a biaxially extensible form of single crystal tantalum consisting of a two dimensional curved or "wavy" tantalum film on an elastomeric support. The manufacturing procedures for such structures are described, and various aspects of the geometry of the structures and responses to uniaxial and biaxial strains in various directions are presented. The mechanical analysis models of these systems provide a framework for quantitative understanding of the behavior of such systems. Materials of these categories provide access to high performance electronic components with sufficient two-dimensional extensibility. Electronic components that provide mechanical flexibility are of interest for applications in information displays, X-ray imaging photovoltaic devices, and other systems. Reversible extensibility is a different and more technically challenging mechanical feature that will enable device possibilities that cannot be achieved by flexible electronic components such as smart surgical gloves, electronic eye cameras, and personal care monitors. . In one method of obtaining electronic components of this type, the extendable wires interconnect the rigid device islands to provide circuit level extensibility for the non-extendable device components. In alternative strategies, certain structural forms of thin single crystal semiconductors and other electronic materials allow for the extensibility of the device itself. Recent arguments have involved the use of curved one-dimensional "wavy" geometries in metal oxide semiconductors in nanobelt ribbons of tantalum and gallium arsenide (thickness between tens and hundreds of nanometers and widths in the micrometer range) Uniaxial extensibility is achieved in field effect transistor (MOSFET), metal semiconductor field effect transistor (MESFET), pn junction diode, and Schottky electrode. This example demonstrates that a nano film of similar material can be formed into a two-dimensional (2D) wavy geometry to provide sufficient 2D extensibility. Describe the manufacturing procedures of these systems along with detailed experimental characterization and analytical modeling of the mechanical responses to the systems. Figure 39 schematically illustrates the steps for forming a two-dimensional extensible Si nanofilm on an elastomeric support. For this example, such films are fabricated from silicon-on-insulator (SOI) wafers (Soitec, Inc., p-type) starting with a suitable pattern of photoresist defined by photolithography followed by reactive ion etching (Plasma Therm RIE, SF6
40 sccm, 50 mTorr, 100 W) The square of the hole in the top ridge (~2.5 μm diameter and ~25 μm distance) is removed after exposure. This same step defines the overall lateral dimension of the film, which is in the range of 3-5 square millimeters for the sample reported herein. The thickness is between 55 nm and 320 nm. The etched sample is immersed in concentrated hydrofluoric acid (HF 49%) to remove SiO2
Buried layer (145 to 1000 nm thick); remove the photoresist in acetone. A pre-polymer of polydimethylsiloxane (PDMS) was cast and cured against a ground germanium wafer to produce a flat elastomeric substrate (~4 mm thick). Exposure to hydrophobic PDMS surface (-CH) in an ozone environment formed by intense ultraviolet light (240-260 nm) for 5 minutes3
And -H terminal group) is converted to a hydrophilic state (-OH and -O-Si-O end groups). Temporarily heating the active PDMS substrate at 70 to 180 ° C in a convection oven induced a controlled degree of isotropic thermal expansion. This element was brought into contact with the treated SOI wafer and then peeled off again to transfer the entire nanofilm to PDMS. Continued heating in the convection oven for a few minutes promotes the formation of a strong bond between the film and the PDMS. In the final step, the nanofilm/PDMS structure i is cooled to room temperature (about 25 ° C) to release the thermally induced pre-strain (ΔL/L). This process results in the spontaneous formation of undulations of two-dimensional (2D) wavy structures in the vicinity of the surface area of the Si nanofilm and PDMS. These structures show different states near the edge where the one-dimensional periodic wave plays a major role, the inner region where the two-dimensional fishbone-like layout is usually observed, and the near center where the disordered fishbone structure often occurs. The fishbone area is the distance between adjacent peaks in the corrugation (referred to as the short wavelength λ) and the amplitude A of the corrugation1
(not shown in Figure 1) and the longer distance associated with the spacing between adjacent "bumps" in the fishbone structure 2 π/k2
(along x2
Direction) (which I call long wavelength) is characteristic. Other feature lengths are "bump" wavelength 2 π/k1
(along x1
Direction, and long wavelength direction x2
Vertical), amplitude A of the bump2
, concave and convex angle θ. The bottom panel of Figure 39 schematically illustrates these features. Part a-f of Figure 40 shows a thickness of about 100 nm (about 4 x 4 mm)2
The transverse film size) and ~3.8% of the hot pre-stressed (defined by heating to 150 ° C) nanofilm, optical micrographs collected at different stages during the formation of fishbone corrugations. These images indicate the formation of a two-stage structure, the first of which involves one of the main functions of the larger area, followed by the deflection of the corrugated structure to eventually form a tight fishbone upon complete cooling. Shape layout (Figure 40 df). Figure 40h shows the time evolution of two characteristic wavelengths. Short wavelengths tend to decrease with increasing progressive compressive strain on the crucible due to cooling (due to the relatively large thermal contraction of PDMS). In particular, this value drops from 17 to 18 μm in the initial phase to ~14.7 μm when the fishbone structure becomes prominent, and eventually drops to ~12.7 μm in the fully cooled state. This wavelength is uniform over a large area (~5% change). Conversely, as is apparent from the image in Figure 40g, the long wavelength associated with the fishbone layout exhibits a wide range of values. The distribution of values is measured at ~100 points across this sample, which is summarized in the histogram of Figure 40g. Can be displaced by the out-of-plane w=A1
Cos[k1
x1
+k1
A2
Cos(k2
x2
)] indicates a fishbone structure (Fig. 49). Here, the coefficient: the amplitude of the ripple A1
Long wavelength 2 π/k2
, concave and convex wavelength 2 π / k1
And the amplitude of the bump A2
It is determined by the thickness of a specific film, the mechanical properties of the film, and the analysis of the substrate. Short wavelength λ is (2 π/k1
) sin(θ/2). The modeling uses the Si strain determined by measuring the equivalent length and the period of the wavy structure instead of the thermal pre-strain as the applied pre-strain (Fig. 50). The actual strain that deforms Si may be attributed to the loading effect of Si on the PDMS and is typically slightly less than the estimated thermal pre-strain. For example, the Si strain is 2.4% at 3.8% of the hot pre-stress. For this displacement w, the stress, strain and displacement fields in the Si film can be in A1
,k1
, A2
And k2
This aspect is obtained from the Von Karman plate theory. The field in the PDMS substrate was obtained from the 3D elastic theory. Minimizing the total energy composed of the film energy and flexural energy in the Si film and the elastic energy in the PDMS substrate gives A1
,k1
, A2
And k2
. The Young's modulus and the Poisson's ratio of Si and PDMS are ESi
=130 GPa, vSi
=0.27, EPDMS
=1.8 MPa and vPDMS
=0.5. Both the experiment and the model give a concave-convex angle θ of about 90°. The short wavelength given by the theory is 12.4 μm at a biaxial pre-stress of 2.4%, which is in good agreement with the above experimental results. Long wavelength 2 π/k2
The larger change is also predicted by theoretical calculations, which are 30 to 60 μm. Figure 41 presents an atomic force microscope (AFM) and a scanning electron microscope (SEM) image of a structure similar to that illustrated in the fully cooled state of Figure 40. These images clearly show that the fishbone pattern is characterized by a zigzag structure that defines two characteristic directions, even if the compressive strain is completely isotropic. The fishbone structure represents the minimum elastic energy configuration that reduces the total in-plane stress in the system and mitigates biaxial compression in both directions. Therefore, this geometry is preferred over a larger area than the "checkerboard" and 1D corrugated layout because the fishbone pattern relaxes the in-plane stress in all directions for the three modes. The only one that does not induce significant extension energy. A significant extension is induced only at the concavities and convexities. The 1D mode reduces pre-stressing in only one direction. The checkerboard pattern reduces stress in all directions, but it produces significant extension energy with deflection. The two line cuts extracted from the AFM image indicate the undulating profile along the relief direction (contour i) and perpendicular (but only approximately sinusoidal) perpendicular to the corrugation (contour ii). λ and A of the corrugation determined by the contour ii1
They are 12.8 μm and 0.66 μm, respectively. The theoretically analyzed λ of 12.4 μm is similar to the experimental data; however, the theoretical analysis is obtained from A.1
It is 0.90 μm, which is a value slightly higher than the experimental results. The SEM image clearly shows the close association between the film and PDMS as evidenced by the state of the sample approaching the small hole in the ridge in the raised and recessed regions of the corrugation. These images also indicate that the corrugated structure is completely uncorrelated with the location of the holes, since the 2.5 μm hole size is much smaller than the characteristic wavelength of the deformation mode in our experiments. The study of the dependence of the geometry of the wavy structure on the thickness of the crucible provides an additional understanding of the physical phenomena and further validates the mechanical model. Figure 42 shows some of the results, including optical micrographs of the corrugated structures formed in the film at different thicknesses similar to thermal strain, as well as wavelength and amplitude. For thicknesses of 100 nm, λ and A of the ripple1
They are 12.6 (±0.37) μm and 0.64 (±0.07) μm, respectively, and for the thickness of 320 nm, they are 45.1 (±1.06) μm and 1.95 (±0.18) μm. This value corresponds fairly well to theoretical calculations, which yield λ and A1
The case is 12.4 μm and 0.90 μm for 100 nm and 45.1 μm and 3.29 μm for 320 nm. These undulating films provide true extensibility for strain in each in-plane direction as opposed to one dimensional extensibility provided by the previously described web geometry. To investigate this aspect, we performed uniaxial tensile elongation tests in different directions by using a calibrated mechanical table and a 2D extensible film prepared with a thermally induced pre-stress of 3.8%. Figure 43 provides some images. In case i, the tensile strain applied in the direction of the long corrugation (εSt
) makes the fish bone structure "expand" (εSt
(1.8%), gradually leading to a fully extended state (εSt
1D wavy geometry at 3.8%). This extension induces a compressive strain having an amplitude roughly equal to one-half of the tensile strain in the orthogonal direction by the cypress effect. This compressive strain can be accommodated by compressing the wavy structure in this direction. After the applied tensile strain is released, the original fishbone corrugations are restored to show a structure quite similar to the original. (Figure 51 shows optical micrographs collected after 5, 10, and 15 extension cycles). The tensile strain applied in the diagonal direction (case ii) exhibits a similar structural change, but when fully extended, the 1D corrugated structure is aligned along the direction defined by the applied strain rather than the initial geometry. For vertical case iii, at a small strain (εSt
At 1.8%), some parts of the sample completely lost the fishbone layout and created new 1D ripples along the extension. With increasing strain, more regions experience this transformation until the entire region is composed of such oriented 1D ripples. These newly formed 1D corrugations are oriented perpendicular to the original corrugations; after release, they simply flex to form a disordered fishbone geometry. For all of the cases shown in Fig. 43B, the wavelengths all increase with tensile strain and return to their original values after release, even if the compressive stress is induced by the cypress effect in the orthogonal direction. This behavior is due to an increase in λ induced by the unfolding of the fishbone corrugation, which is greater than the decrease in this wavelength caused by the cypress effect. (Fig. 52) For case i, the concave and convex wavelength is 2 π/k1
(Fig. 52A) Tensile strain ε appliedSt
Reduced to 2 π/k' due to the cypress effect1
(Fig. 52B), that is, k'1
>k1
. However, the corresponding embossing angle θ' is due to the expansion of the fishbone structure and is larger than the angle θ. Short wavelength λ=(2 π/k1
) sin(θ/2) becomes λ'=(2 π/k'1
) sin(θ'/2), which may be greater than λ when the effect of the angular change overcomes the cypress effect. Our theoretical model gives for εSt
=0, 1.8% and 3.8%, λ=
12.4, 14.6 and 17.2 μm, which confirms that as observed in the experiment, the short wavelength increases with the applied strain. For case iii, λ and 2 π/k1
Both increase with the applied extension strain because the corrugations relax in the direction of the extension strain, and the embossed angle θ does not change significantly due to the cypress effect. The biaxial extensibility of the curved film was also investigated by heat-induced tensile strain (Fig. 53). The fishbone corrugations produced by thermal strain slowly disappear as the sample is heated; it fully recovers after cooling. These observations apply only to the central area of the film. As indicated in the bottom panel of Figure 39, the edges of the film exhibit a 1D corrugated structure in which the wave vectors are oriented along the edges. The AFM image and line cut outline of the edge region, the central region, and the transition region therebetween are shown in FIG. The 1D ripple (top frame) originating near the edge of Si gradually becomes deflected (middle frame) until it is transformed into a fishbone geometry in the central region (bottom frame). The lambda values in these regions are 16.6 μm, 13.7 μm, and 12.7 μm, respectively (from the top frame), where A1
It is 0.52 μm, 0.55 μm and 0.67 μm. In contrast to the 1D ripple at the edge, the 2D fishbone corrugation has smaller λ and A1
This suggests that the inner region of Si is more affected by the compressive strain than the edge. The stress state near the edge is within a certain distance range, which is approximately uniaxial compression due to the non-tractive edge of the film. This uniaxial compression is parallel to this free edge and thus results in a 1D ripple along the edge. However, the stress state becomes equal biaxial compression in the central region where the fishbone structure is produced. For the transition zone between the 1D corrugated edge and the fishbone corrugation, unbalanced biaxial compression results in a "half" fishbone corrugation with a larger bump angle. Our model obtained λ and A for the 1D ripple of 16.9 μm and 0.83 μm, respectively.1
And for fish bone structure, respectively, λ and A of 12.4 μm and 0.90 μm1
. These results are in good agreement with the experimental observations. To further investigate these edge effects, we fabricated rectangular films with lengths of 1000 μm and widths of 100 μm, 200 μm, 500 μm, and 1000 μm, all on the same PDMS substrate. Figure 45 shows an optical micrograph of the thermal pre-strain of these two structures for two different levels. At lower thermal pre-strain (about 2.3%, Figure 45A), the 100 μm and 200 μm wide films show a complete 1D ripple from side to side with a flat, undeformed region at the end. A 500 μm wide film exhibits similar 1D corrugations and flat areas, but the corrugations have a slightly deflected geometry in the middle of the structure with overall order and uniform orientation over substantially less than 100 μm and 200 μm. Sex. For a 1000 μm square, a 1D ripple exists in the central region of the edge, which has a flat region in the corner. The central portion of the film exhibits a fully formed fishbone geometry. For a flat area of the corner, there is an approximately stress-free state due to the two free edges. No ripples are formed near the corners. With increasing pre-stress (4.8%, Figure 45B), the flat areas in all cases decrease in size. The 1D corrugated state lasted in the webs of 100 μm and 200 μm, but the significant fishbone morphology appeared in the central region of the 500 μm case. At higher pre-stressed strains, the isoaxial compressive strain is present in the inner region of the 500 μm wide film. For a 1000 μm square film, the fishbone state extends to the area near the edge. A feature length scale that extends the space defining the flat region (which I call the edge effect length) LEdge
Estimated as a function of film size and pre-stress. Figure 45C shows the results of a linear scaling of the length with pre-strain in a manner independent of the size of the film for the case studied here. As the pre-added strain becomes higher, the length of the uniaxial strain region becomes smaller. Thus, a shorter range of 1D corrugation patterns and the like can be observed in the unstressed regions near the two free edges. Figure 46 shows an optical micrograph of a wavy structure formed in other film geometries including circles, ellipses, hexagons, and triangles. These results are qualitatively consistent with the observations in the webbing and squares of Figure 45. In particular, the edge regions exhibit 1D ripples oriented parallel to the edges. Corrugations with orthogonal orientation appear only at a distance from the edge greater than LEdge
At the office. For a circle, the 1D corrugation appears at a near radial edge due to the shape of the film in a full radial orientation, with fishbone corrugations appearing in the center. The ellipse shows a similar behavior, but has a flat area at the edge of the long axis (due to the smaller radius of curvature in these areas). For hexagonal and triangular shapes, acute corners (angles of 120° and 60°, respectively) result in flat areas. The fishbone geometry appears in the center of the hexagon. The center of the triangle shows the combination of 1D ripple for the level of pre-strain shown here. For shapes with clear angles (eg, hexagonal, triangular, and elliptical tips), there are no corrugations near the corners because the two intersecting free edges (not necessarily perpendicular) give an unstressed state. For a triangular shape, there is not enough space to create a fishbone structure, even in a central region. The film itself provides a means to achieve a two-axis extendable electronic device. The edge effects outlined above can be utilized to achieve specific results that may be useful for a particular class of such devices. In particular, in an imaging system, it may be of value to maintain a flat, undeformed region at the location of the photodetector to avoid non-ideal conditions that occur when such devices have a wavy shape. Figure 47 presents some representative examples of stretchable films that achieve this result. These structures are in the vertical and horizontal directions (Fig. 47A, Fig. 47C) and the vertical, horizontal and diagonal directions of the web of 30 μm × 150 μm (30 μm × 210 μm for the positive interlaced strip). The upper (Fig. 47E, Fig. 47G) connected 100 μm × 100 μm square islands. The change in amplitude and wavelength of the corrugations in the webbing provides a means to accommodate the applied strain in a manner that largely avoids deformation in the region of the square islands. We examine the behavior of these structures under a number of different applied strains. Parts a and e of Figure 47 show representative cases in a state of lower strain (about 2.3%) applied by heating the sample in the oven. Parts c and g of Figure 47 show the same structure at a relatively high biaxial strain (about 15%) applied by using a mechanical table. As is apparent, the islands remain flat under low strain conditions; at sufficiently high strains, the formation of corrugated structures in such regions begins. As shown in the SEM image of the oblique angle (Fig. 47B, Fig. 47D, Fig. 47F, Fig. 47H), good adhesion between PDMS and Si was maintained at all strains. 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Nuzzo, RG & Rogers, JA Photolithographic route to the fabrication of micro/nanowires of III-V semiconductors. Adv. Funct. Mater. 15, 30-40 (2005). 32. Loo, Y.-L.; Someya, T., Baldwin, KW, Bao, Z., Ho, P., Dodabalapur, A., Katz, HE & Rogers, JA Soft, conformable electrical contacts for organic semiconductors: High-resolution plastic circuits by lamination. Proc. Natl. Acad. Sci. USA 99, 10252-10256 (2002). 33. Suo, Z., Ma, E. Y., Gleskova, H., Wagner, S. Mechanics of rollable and foldable film-on-foil electronics. Appl. Phys. Lett. 74, 1177-1179 (1999). P. Mandlik, S. P. Lacour, J. W. Li, S. Y. Chou, and S. Wagner, leee Electron Device Letters 27, 650-652 (2006). D. S. Gray, J. Tien and C. S. Chen, Advanced Materials 16, 393-+ (2004). S. P. Lacour, S. Wagner, Z. Y. Huang and Z. Suo, Applied Physics Letters 82, 2404-2406 (2003). S. P. Lacour, J. Jones, S. Wagner, T. Li and Z. G. Suo, Proceedings of the leee 93, 1459-1467 (2005). J. Jones, S. P. Lacour, S. Wagner and Z. G. Suo, Journal of Vacuum Science & Technology A 22, 1723-1725 (2004). S. P. Lacour, J. Jones, Z. Suo and S. Wagner, leee Electron Device Letters 25, 179-181 (2004). W. T. S. Huck, N. Bowden, P. Onck, T. Pardoen, J. W. Hutchinson and G. M. Whitesides, Langmuir 16, 3497-3501 (2000). N. Bowden, S. Brittain, A. G. Evans, J. W. Hutchinson and G. M. Whitesides, Nature 393, 146-149 (1998). S. Wagner, S. P. Lacour, J. Jones, P. H. I. Hsu, J. C. Sturm, T. Li and Z. G. Suo, Physica E-Low-Dimensional Systems & Nanostructures 25, 326-334 (2004). H. Kudo, T. Sawada, E. Kazawa, H. Yoshida, Y. Iwasaki and K. Mitsubayashi, Biosensors & Bioelectronics 22, 558-562 (2006). T. Li, Z. G. Suo, S. P. Lacour and S. Wagner, Journal of Materials Research 20, 3274-3277 (2005). S. P. Lacour, D. Chan, S. Wagner, T. Li and Z. G. Suo, Applied Physics Letters 88 (2006). S. P. Lacour, C. Tsay and S. Wagner, leee Electron Device Letters 25, 792-794 (2004). S. P. Lacour, S. Wagner, R. J. Narayan, T. Li and Z. G. Suo, Journal of Applied Physics 100 (2006). Reuss, R. H, et al., Proc. IEEE 2005, 93, 1239. Jain, K. et al., Proc. IEEE 2005, 93, 1500. Nathan, A., et al., Microelectron. Reliab. 2002, 42, 735. Someya, T et al., T. Proc. Natl. Acad. Sci. U.S.A. 2004, 101, 9966. Hsu, P. H. I. et al., IEEE Trans. Electron. DeV. 2004, 51, 371. Jin, H. C. et al., Vac. Sci. Technol., B: Microelectron. Nanometer Struct.-Process., Meas., Phenom. 2004, 22, 2548. Nathan, A.; et al., Microelectron. J. 2000, 31, 883. Someya, T. et al., Proc. Natl. Acad. Sci. U.S.A. 2005, 103, 12321. Lacour, S. P. et al., Proc. IEEE 2005, 93, 1459. (c). Lacour, S. P., et al., Appl. Phys. Lett. 2003, 82, 2404. Khang, D.-Y. et al., Science 2006, 311, 208. Sun, Y. et al., Adv. Mater. 2006, 18, 2857. Sun, Y. et al., Nat. Nanotechnol. 2007, 1, 201. Ouyang, M. et al., Chem. Mater. 2000, 12, 1591. Childs, W. R.; Nuzzo, R. G. J. Am. Chem. Soc. 2002, 124, 13583. Efimenko, K. et al., J. Colloid Interface Sci. 2002, 254, 306. Hillborg, H. et al., Langmuir 2004, 20, 785. Buma, T. et al., Appl. Phys. Lett. 2001, 79, 548. Properties of Silicon; INSPEC: New York, 1998. The coefficients of thermal expansion are RPDMS ) 3.1x10-4
K-1
And aSi
) 2.6x10-6
K-1
For PDMS substrate and Si nanomembrane, respectively. The thermal prestrain for the samples prepared at 150°Cwas calculated by AaAT=(3.1x10-4
- 2.6x10-6
) (150-25) = 3.8%. Timoshenko, S. Theory of Plates and Shells; McGraw-Hill: New York, 1940. Timoshenko, S.; Goodier, J. N. Theory of Elasticity, 3rd ed.; McGraw-Hill: New York, 1969. Chen, X.; Hutchinson, J. W. J. Appl. Mech. Trans. ASME 2004, 71, 597. Chen, X.; Hutchinson, J. W. Scr. Mater. 2004, 50, 797. Huang, Z. Y. et al. J. Mech. Phys. Solids 2005, 53, 2101. Bietsch, A.; Michel, B. J. Appl. Phys. 2000, 88, 4310. Ohzono, T.; Shimomura, M. Phys. Rev. B 2004, 69, 132202. Ohzono, T.; Shimomura, M. Langmuir 2005, 21, 7230. Example 4: Heterogeneous Integrated Three-Dimensional Electronic Components Obtained by Using Printed Semiconductor Nanomaterials We have developed a simple method to combine a wide variety of dissimilar materials into heterogeneous integrations with two- or three-dimensional (3D) layouts ( HGI) in electronic systems. The process begins with the synthesis of different semiconductor nanomaterials (eg, single-walled carbon nanotubes and single crystal nanowires/ribbons of gallium nitride, germanium, and gallium arsenide) on separate substrates. The additional transfer process using a soft stamp and such substrates as a donor, followed by repeated application of the formation of devices and interconnects, results in the incorporation of any combination of such (or other) semiconductor nanomaterials into the rigid or High performance 3D-HGI electronic components on flexible device substrates. This versatile approach can produce a wide range of uncommon electronic systems that are difficult or impossible to achieve using other technologies. Many existing and emerging electronic devices benefit from the overall heterogeneous integration (HGI) of a heterogeneous class of semiconductors into a single system of two or three dimensional (2D or 3D) layouts. Examples include multi-function RF communication devices, infrared (IR) imaging cameras, addressable sensor arrays, and hybrid CMOS/nanowire/nano device circuits (3-7). In some representative systems, compound semiconductors or other materials provide high speed operation, effective light detection or sensing capabilities, while CMOS provides digital readout and signal processing in circuits that typically include stacked 3D configurations. Wafer bonding (8) and epitaxial growth (9, 10) represent the two most widely used methods for achieving these types of 3D-HGI systems. The former process involves the physical combination of integrated circuits, photodiodes or inductors formed on different semiconductor wafers by using an adhesive or thermal initiation interface chemistry. This method works in many situations, but it has important drawbacks, including (i) limited ability to scale to larger areas or layers in a third (ie, stacked) dimension, (ii) to uncommon materials (eg , the material of the nanostructure) or the incompatibility of the low temperature material and the substrate, (iii) the challenging manufacturing and alignment of the electrical interconnection through the wafer, (iv) the height of the flat, planar bonding surface Requirements and (v) tortuosity and cracking due to mechanical strain caused by differential thermal expansion/contraction of dissimilar materials. Epitaxial growth provides a different approach involving the direct formation of thinner layers of semiconductor material on the surface of wafers of other materials by molecular beam epitaxy or other means. While this approach avoids some of the aforementioned problems, the requirements for the epitaxial process impose strict limits on the quality and type of materials that can be grown, even when using buffer layers and other advanced techniques. Conversely, nanoscale wires such as inorganic materials, webbing, films or particles or emerging classes of semiconductors based on carbon-based systems such as single-walled carbon nanotubes (SWNTs) or graphite sheets (11-14) The nanomaterial can be grown and then suspended in a solvent or transferred to the substrate in a manner that avoids the need for epitaxial growth or wafer bonding. Recent work has demonstrated, for example, the integration of crossed nanowire diodes formed by solution casting (15) in a 2D layout. The results presented herein illustrate how different single crystal inorganic semiconductors (eg, nanowires/ribbons of GaN, Si, and GaAs) can be combined with each other by using scalable and deterministic printing techniques and also with other classes of nanometers. Materials (eg, SWNTs) are combined to produce a complex HGI electronic system in a 2D or 3D layout. In particular, high-performance metal-oxide-semiconductor field-effect transistors (MOSFETs) and metal-semiconductor field-effect transistors integrated into device arrays, logic gates, and active addressable photodetectors on rigid inorganic and flexible plastic substrates. Ultra-thin multi-layer stacks of crystalline (MESFET), thin film transistors (TFT), photodiodes, and other components demonstrate some of these capabilities. Figure 57 illustrates representative steps for fabricating such 3D-HGI systems. The process begins with the synthesis of semiconductor nanomaterials on their own source substrates. The device presented here integrates nanowires and nanowebs (16-21) of single crystal Si, GaN, and GaAs formed by using wafer-based source materials and photolithography etching processes and by chemical vapor deposition. The network of SWNTs that grew up (13, 21). The scanning electron micrograph at the top of Figure 57 shows these semiconductor nanomaterials after removal from the source substrate. For circuit fabrication, these components are still in a configuration defined on the wafer during the manufacturing or growth phase: in the case of Si, GaN, and GaAs nanowires/webbing, the alignment array, and for the SWNT sub-monolayer Random network. A high temperature doping and annealing process for achieving ohmic contact with Si, GaN, and GaAs can be performed on the source substrate. The next step involves transferring the otherwise processed elements from the source substrate to a device substrate (such as the sheet of polyimpenimine (PI) illustrated in Figure 57) using the previously described elastomer-based impression-based printing techniques. In particular, the impression of the polydimethylsiloxane (PDMS) against the source substrate establishes a soft van der Waals contact with the semiconductor nanomaterial component. Contacting an "inked" stamp with a device substrate (eg, a PI sheet) having a thin spin casting layer of a liquid prepolymer (eg, polylysine) on the surface, and then curing the polymer such that These semiconductor materials are embedded on this layer as the stamp is removed and adhere well to this layer (16-20). Similar procedures apply to a range of substrates (ie, rigid or flexible, organic or inorganic) and one of the semiconductor nanomaterials [a slightly modified version of this process for SWNT (21). ]. The thickness of the intermediate layer (PI in this case) can be as small as 500 nm and is typically from 1 to 1.5 μm for the system described herein. After some additional processing including the formation of gate dielectrics, electrodes, and interconnects, the transfer and device fabrication steps can be repeated, starting with the spin-coating of a new prepolymer interlayer on top of the previously completed circuit level. . Automated tables or conventional mask aligners specifically designed for transfer enable stacking coincidence accuracy of ~1 μm over a few square centimeters. (22) (Fig. 61). The layer-to-layer interconnection (23) is formed simply by vaporizing the metal lines on the openings defined by photo-patterning and/or dry etching in the intermediate layer and evaporating the metal lines into the openings. This uncommon method for obtaining 3D-HGI electronic components has several important features. First, all processing on the device substrate occurs at low temperatures, thereby avoiding differential thermal expansion/contraction effects that can result in undesirable deformations in the multilayer stacking system. This operation also enables the use of low temperature plastic substrates and interlayer materials, and it helps to ensure that the underlying circuit layer is not thermally degraded by the processing of the overlying device. Second, the method can be applied to a wide range of semiconductor nanomaterials, including emerging materials such as SWNT films. Third, the soft stamp enables non-destructive contact with the underlying device layer; these stamps, along with the ultra-thin semiconductor material, also permit surfaces having a certain configuration. Fourth, ultra-thin device geometries (<1 μm) and intermediate layers (<1.5 μm) allow simple formation of electrical interconnections of layers. These features of many of the disadvantages of overcoming conventional methods are illustrated in several circuit demonstrations described below. Figure 58 shows the use of SiO with plasma-doped chemical vapor deposition using doped contacts (formed on the source wafer) by using the overall process flow illustrated in Figure 57.2
A three-layer 3D stacked array Si MOSFET fabricated from a dielectric and a Cr/Au metallized single crystal nanoribbon ribbon (24) for source, drain and gate. Each device uses three aligned nanoribbon webs with widths, thicknesses, and lengths of 87 μm, 290 nm, and 250 μm, respectively. 2A shows a top view optical micrograph of the edge of the system having a layout designed to respectively display portions of the substrate supporting one, two, and three MOSFET layers. The 90 degree rotation of the device geometry of the second layer relative to the first and third layers helps to clarify the layout of the system. A schematic cross-sectional view and a tilted view of the stacked structure appear in Figure 58B. Confocal optical microscopy can be used to view the sample in three dimensions. Figure 58C shows a top view and an oblique view of the images, which are colored for easy viewing. (Image quality is slightly degraded with depth due to scattering and absorption from the upper layer). Figure 58D presents a representative device for each layer [having a channel length of 19 μm (L c
), the channel overlap distance (Lo) of 5.5 μm defined by the distance of the gate electrode extending over the doped source/drain region and the top gate MOSFET of the channel width (W) of 200 μm] result. The device formed on the PI substrate on each of the three layers exhibits excellent characteristics (470 ± 30 cm)2
Linear mobility of /Vs, >104
The switching ratio is between -0.1 ± 0.2 V threshold voltage, and there is no systematic difference between devices in different layers. Additional layers can be added to this system by repeating the same procedure. As illustrated in Figure 59, in addition to a 3D circuit having a single semiconductor, various semiconductors can be used in multiple layers to form a complete 3D-HGI system. To illustrate this capability, we used GaN and Si nanowebs and SWNT films to fabricate arrays of MESFETs (specifically, high electron mobility transistor HEMTs), MOSFETs, and TFTs on PI substrates. Figures 59A and 59B show high magnification optical images and confocal images of the resulting device, respectively. The GaN HEMT on the first layer uses ohmic contacts (Ti/Al/Mo/Au, which is annealed on the source wafer) for the source and drain, and Schottky (Ni/Au) contact for the gate. point. Channel length and width and gate width are 20 μm, 170 μm and 5 μm, respectively. Each device uses a GaN webbing (consisting of a multilayer stack of AlGaN/GaN/AlN) having electrical thicknesses, widths, and lengths of 1.2 μm, 10 μm, and 150 μm, respectively, by processing on the device substrate. SWNT TFT on the second layer uses SiO for the gate dielectric2
/ Epoxy, and Cr/Au for source, drain and gate, with channel lengths and widths of 50 μm and 200 μm, respectively. The Si MOSFET uses the same design as that shown in FIG. Various other 3D-HGI devices can be constructed by using different combinations of Si, SWNT, and GaN (Fig. 61 and Fig. 62). Figure 59C presents the current-voltage characteristics of a typical device in the system of Figures 59A and 59B. In all cases, the characteristics are similar to those fabricated on the source wafer: GaN HEMTs have a threshold voltage of -2.4 ± 0.2 V (VTh
), >106
Switching ratio and transconductance of 0.6±0.5 mS; SWNT TFT has VTh
=-5.3±1.5 V, >105
Switch ratio and 5.9±2.0 cm2
Linear mobility of /Vs; Si MOSFET with VTh
=0.2±0.3 V, >104
Switch ratio and 500±30 cm2
Linear mobility of /Vs. One of these devices is of interest (which is derived from the use of thin PI substrates (25 μm), equipment (2.4 μm) and PI/PU intermediate layer (5 μm) for its mechanical flexibility. This is important for applications in flexible electronic components. We will effectively transduce Si, SWNT and GaN devices in the 3D-HGI system of Figure 59A (g Eff
) is evaluated as a function of the deflection radius. Demonstrate transduction as normalized to undeflected state (g 0eff
Figure 59D of this data illustrates the stable performance for deflection radii as low as 3.7 mm. Electrical interconnections between different stages formed in such 3D-HGI devices can create circuit capabilities that cause concern. The thinner polymeric intermediate layer enables such interconnects to be formed simply by vaporizing metal lines on the openings defined by the lithography or by vapor depositing the metal lines into the openings. Figure 60 presents some examples. The first shown in Figure 60A is a 3D NMOS inverter (logic gate) in which the drive (L = 4 μm, W = 200 μm) is different from the load (L = 4 μm, W = 30 μm) Si MOSFET Level. In the case of a supply voltage of 5 V, the dual-layer inverter exhibits a well-defined transfer characteristic with a gain of ~2, which is comparable to the performance of a conventional planar inverter (25) using a similar transistor. . Figure 60B shows a complementary design (CMOS) inverter with integrated n-channel Si MOSFETs and p-channel SWNT TFTs designed to equalize the current drive capability in the pull-up and pull-down directions (Figure 65). The transfer curve collected with a 5 V bias of the VDD terminal and a gate voltage (input) from 0 V to 5 V appears in Figure 60A. The curve shape and gain (up to ~7) are qualitatively consistent with the numerical circuit simulation (Figure 65). As a third example, we have established a metal-semiconductor-metal (MSM) infrared (IR) detector (26) integrated with a Si MOSFET on a flexible PI substrate to demonstrate that it can be used in an active IR imager. The ability of a single cell. In this case, the GaAs printed nanowebs (thickness, width, and length of 270 μm, 100 nm, and 400 μm, respectively) transferred onto a substrate having a printed array of Si nanoweb MOSFETs form the basis of the MSM. The electrodes (Ti/Au = 5/70 nm) deposited on the ends of the GaAs nanowebs formed back-to-back Schottky diodes with a spacing of 10 μm. The resulting detector unit showed an increase in current as a function of IR illumination (Fig. 60C), which is consistent with the circuit simulation (Fig. 66). The response rate of about 0.30 A/W at a wavelength of 850 nm was observed at 1 V to 5 V without considering the light reflected from the surface of the semiconductor. The system also exhibits flexibility with a radius of curvature of less than 1 cm, which may be useful for advanced systems such as curved focal plane arrays of wide-angle IR night vision imagers. Printed semiconductor nanomaterials provide a new approach to 3D-HGI systems and can be used in a variety of applications, not only in the application areas suggested by the systems reported here, but also in other application areas, including integrated readout. And a microfluidic device for inductive electronic components, a biochemical sensing system that combines unusual inductive materials with conventional germanium-based electronic components, and a photonic/photovoltaic subsystem that combines a compound semiconductor illuminator with a germanium drive electronic component or a microelectromechanical structure. In addition, the compatibility of this method with thinner lightweight plastic substrates can create additional opportunities for devices with unusual form factors or mechanical flexibility as key features. Materials and Methods: Equipment Manufacturing: Tantalum Equipment: Manufacturing begins with the processing of silicon-on-insulator wafers (SOI; Soitec unibond with a top Si layer of 290 nm, which has 6.0 to 9.4×1014
/cm3
The doping level is performed to define the contact point of the single crystal germanium doped thin webbing. The first step involves phosphorus doping using solid-state and spin-on dopants (Filmtronic, P509) and using plasma enhanced chemical vapor deposition (PECVD) SiO2
(Plasmatherm, 300 nm, 900 mTorr, 350 sccm, 2% SiH4
/He, 795 sccm NO2
The layer defined by the photolithography of 250 ° C) acts as a mask to control where the dopant diffuses into the crucible. SF after patterning via a patterned layer of photoresist6
Plasma etching defines the webbing. The undercut etching of the buried oxide by concentrated HF solution (Fisher Chemicals) releases the webbing from the wafer. This procedure completes the fabrication of a single point germanium contact point doped webbing. In the next step, a flat elastomeric stamp of polydimethyl methoxyalkane (PDMS, A: B = 1:10, Sylgard 184, Dow Corning) is contacted with a photoresist coated webbing, and then peeled off. The mold, thereby removing the webbing from the wafer, and the webbing still adheres to the surface of the stamp by the van der Waals force between the hydrophobic PDMS and the photoresist. Lamination of a 25 μm polyimine (PI) sheet spin-coated with a thin liquid PI precursor polyglycine (Sigma_Aldrich Inc.) layer (~1.5 μm) so as to s-Si from the wafer The ribbon is printed with the "ink" impression. The precursor was cured, the PDMS stamp was peeled off and the stripping photoresist was left to be embedded on the surface of the PI substrate and adhered well to the surface. The gate dielectric layer is deposited by CVD at a relatively low temperature, 250 ° C by PECVD2
Layer (thickness ~100 nm) composition. Light lithography and CF4
The plasma etch defines an opening to the doped source/drain region of the erbium. Defining the source and bungee of Cr/Au (5/100 nm, formed by electron beam evaporation from bottom to top, Temescal FC-1800) in a single step by photolithography and wet etching And gate electrode. GaN device: A GaN microstructure was fabricated on a bulk wafer of GaN having a heterostructure [AlGaN (18 nm) / GaN (0.6 μm) / AlN (0.6 μm) / Si]. The ohmic contact region is defined by AZ 5214 photoresist and then in the RIE system with SiCl4
Wash with plasma. The Ti/Al/Mo/Au (15 nm/60 nm/35 nm/50 nm) metal layer was then deposited by electron beam evaporation (Ti/Al/Mo) and thermal evaporation (Au). The complete resist is washed away to leave the metal contacts on the GaN. At N2
Thermal annealing at ambient temperature of 850 ° C for 30 seconds forms an ohmic contact. SiO2
(Plasmatherm, 300 nm, 900 mTorr, 350 sccm, 2% SiH4
/He, 795 sccm NO2
, 250 ° C) and Cr metal (electron beam evaporator, 150 nm) layer was deposited as a mask material for subsequent inductively coupled plasma (ICP) etching. Photolithography, wet etching and RIE treatment (50 mTorr, 40 sccm CF4
, 100 W, 14 minutes) defines the ribbon geometry of GaN. After removing the photoresist with acetone, use ICP dry etching (3.2 mTorr, 15 sccm Cl2
, 5 sccm Ar, -100 V bias, 14 minutes) to remove the exposed GaN and slightly etch into Si (~1.5 μm) to facilitate subsequent anisotropic etching. Si was then etched away from the underside of GaN by using tetramethylammonium hydroxide (Aldrich, 150 ° C for 4 minutes and 30 seconds). Immerse the sample in BOE (6:1, NH4
F: HF) takes 30 seconds to remove PECVD SiO2
And a new 50 nm electron beam evaporated SiO2
A layer is deposited on top of the GaN webbing. The PDMS slabs which were "inked" by GaN webbing from the mother wafer were then laminated against PI sheets coated with 2 μm polyurethane (PU, Norland optical adhesive, No. 73). . Expose the sample to UV light (173 μWcm-2
) for 15 minutes to cure the PU. Peel off PDMS and remove electron beam SiO by immersing in BOE for 20 seconds2
Lead to the transfer of GaN components to the plastic substrate. A negative photoresist (AZ nLOF2020) was used to pattern the Schottky contact of Ni/Au (80/180 nm). The photoresist was removed by an AZ stripper (KWIK, which lasted 30 minutes). SWNT equipment: using chemical vapor deposition (CVD) to SiO2
A random network of individual single-walled carbon nanotubes grown on the /Si wafer. Ferritin (Sigma Aldrich) deposited on the substrate together with methanol was used as a catalyst. The feed gas is methane (1900 sccm CH4
Together with 300 sccm H2
). The quartz tube in the furnace is flushed by the high flow of Ar gas to be cleaned prior to growth. During the growth, the temperature was maintained at 900 ° C for 20 minutes. Transfer involves a process similar to printing as described previously or applying a thick Au layer and a PI precursor to a SiO with a tube2
A slightly different method on the /Si substrate. The Au/PI was peeled off after the PI was cured. The layer is laminated with respect to a pre-patterned device substrate coated with a thin epoxy layer (SU8, 150 nm), and then PI and Au are removed by oxygen reactive ion etching and wet etching, respectively. The layer completes the transfer. In the case of a bottom gate device, the substrate supports the pre-patterned gate electrode and dielectric. In particular, the gate electrode of Cr/Au/Cr (2 nm/10 nm/10 nm) is patterned by photolithography, and then 300 nm of SiO is used by PECVD.2
Deposited on the substrate. The source and drain electrodes of Cr/Au (2 nm/20 nm) are defined directly at the top of the tube. 3D Circuitry: 3D Si NMOS Inverter: Constructs a multi-layer device by repeatedly applying the same manufacturing process. Specifically, the PI precursor is spun cast on top of the existing layer of the device and the webbing is transferred to the top. The same process is then used to fabricate the device. For vertical metal interconnects, by optically patterning openings in the layer of AZ4620 photoresist, and then by using CF in the RIE system4
And O2
Plasma etches away SiO in this exposed area2
And the PI defines the electrode area. Depositing 300 nm of Al into this region establishes contact at the bottom and is etched by SiO2
Electrically continuous connections are provided on the step edges formed by the PI. SWNT and Si CMOS Inverters: SWNT devices consist of source/drain contacts at Au (20 nm) defined by photolithography on the tube network. SiO2
The (100 nm)/Si wafer substrate provides gate dielectric and gate. An epoxy resin (SU8, 500 nm) was then spin coated onto the substrate after selectively coating the SWNT transistor with a photoresist (AZ5214). After UV exposure for curing of the epoxy resin, a PDMS slab that is "ink-coated" with an undoped Si web is laminated against the substrate, and then the slab is removed by slow manual stripping to complete the transfer. Printing process. Cr/Au (5 nm/100 nm) was used as the Schottky contact point for the source and drain electrodes in the germanium device. Al (100 nm) was used to connect the SWNT to the Si transistor. GaAs MSM IR detector integrated with Si TFT: GaAs wafers (IQE Inc., Bethlehem, PA.) were used to create back-to-back Schottky diodes. High quality bulk crystals of GaAs with multiple epitaxial layers [n-doped n-type GaAs (120 nm) / semi-insulating (SI) - GaAs (150 nm) / AlAs (200 nm) / SI-GaAs] The circle produces a webbing. The carrier concentration of n-type GaAs is 4×1017
Cm-3
. In the etchant (4 mL H3
PO4
(85% by weight), 52 mL H2
O2
Anisotropic etching of a GaAs wafer having a photoresist mask pattern was performed (30% by weight) and 48 mL of deionized water. The AlAs layer was etched away with a dilute HF solution in ethanol (1:2 in volume). Then deposit 2 nm of Ti and 28 nm of SiO by electron beam evaporation2
Layer. Next, a PDMS stamp coated with a GaAs web was brought into contact with a layer of a Si-coated Si transistor (having a thickness of 1.5 μm). Stripping PDMS and removing Ti and SiO by BOE etchant2
The transfer of GaAs to the device substrate is completed. The metal for the Schottky contact (Ti/Au = 5 nm / 70 nm) was deposited by electron beam evaporation. By first patterning the layer of AZ4620 photoresist, then using CF in the RIE system4
And O2
The plasma is etched through the opening and then 300 nm of Al is deposited to define the electrical interconnection between the GaAs back-to-back Schottky diode and the Si MOSFET. Equipment Characterization: Electrical characterization of diodes and transistors was performed using a semiconductor parameter analyzer (Agilent, 4155C) and a conventional probe station. The IR response was measured at an IR LED source with a wavelength of 850 nm. Circuit Simulation: A 2-stage PSPICE model for n-channel Si MOSFETs and p-channel SWNT TFTs is empirically generated to compare the transfer curves of a CMOS inverter with a simulation. These PSPICE models are generated based on a preset PSPICE MOSFET model (MbreakN and MbreakP) having extracted parameters to match the four curves of the Si NMOS and SWNT PMOS measurements shown in FIG. 65B. The PSPICE model for a GaAs MSM photodetector is empirically generated by using a back-to-back Schottky diode connected in series with a Si MOSFET. References for Example 4: 1. K. Banerjee, S. J. Souri, P. Kapur, K. C. Saraswat, Proc. IEEE, 89, 602 (2001). 2. S. F. Al-Sarawi, D. Abbott, P. D. Franzon, IEEE Trans. Components, Packaging, and Manufacturing Technology, Part B, 21, 2 (1998). 3. A. S. Brown, W. A. Doolittle, N. M. Jokerst, S. Kang, S. Huang, S. W. Seo Materials Science and Engineering B 87, 317 (2001). 4. Y.-C. Tseng, P. Xuan, A. Javey, R. Malloy, Q. Wang, J. Bokor, H. Dai, Nano letters 4, 123 (2004). 5. C. Joachim, J. K. Gimzewski, A. Aviram, Nature 408, 541 (2000). 6. G. Roelkens et al., Optics Express 13, 10102 (2005). 7. D. B. Strukov, K. K. Likharev, Nanotechnology 16, 888 (2005). 8. K. Vanhollebeke, I. Moerman, P. Van Daele, P. Demeester, Prog. Cryst. Growth Charact. Mater. 41, 1 (2000). 9. H. Amano, N. Sawaki, I. Akasaki, Y. Toyoda, Appl. Phys. Lett. 48, 353 (1986). 10. T. Kuykendall, P. J. Pauzauskie, Y. Zhang, J. Goldberger, D. Sirbuly, J. Denlinger, P. Yang, Nature Materials 3, 524, (2004). 11. A. M. Morales, C. M. Lieber, Science 279, 208 (1998). 12. M. Law, D. J. Sirbuly, J. C. Johnson, J. Goldberger, R. J. Saykally, P. Yang, Science 305, 1269 (2004). 13. J. Kong, H. T. Soh, A. M. Cassell, C. F. Quate and H. Dai, Nature 395, 878 (1998). 14. K. S. Novoselov, A. K. Geim, S. V. Morozov, D. Jiang, Y. Zhang, S. V. Dubonos, I. V. Grigorieva, A. A. Firsov, Science 306, 666 (2004). 15. Y. Huang, X. Duan, C. M. Lieber, Small 1, 1 (2005). 16. M. A. Meitl, Z. Zhu, V. Kumar, K. Lee, X. Feng, Y. Huang, R. G. Nuzzo, J. A. Rogers, Nature Materials 5, 33 (2006). 17. E. Menard, K. J. Lee, D. Y. Khang, R. G. Nuzzo, J. A. Rogers, Appl. Phys. Lett. 84, 5398 (2004). 18. Y. Sun, S. Kim, I. Adesida, J. A. Rogers, Appl. Phys. Lett. 87, 083501 (2005). 19. K. Lee, M. A. Meitl, V. Kumar, J.-H. Ahn, I. Adesida, J. A. Rogers, R. G. Nuzzo, Appl. Phys. Lett, accepted. 20. S.-H. Hur, D.-Y. Khang, C. Kocabas, J. A. Rogers, Appl. Phys. Lett. 85, 5730 (2004). 21. Materials and Methods are available as supporting materials on Science Online. 22. J. Dong, M. A. Meitl, E. Menard, P. Ferreira and J. A. Rogers, unpublished. 23. S. Linder, H. Baltes, F. Gnaedinger and E. Doering: Proc. IEEE Micro Eletro Mech. Systems 349, (1994). 24. J.-H. Ahn, H.-S. Kim, K. Lee, Z.-T. Zhu, E. Menard, R. G. Nuzzo, J. A. Rogers, IEEE Electron Devices Lett. 27, 460 (2006). 25. J.-H. Ahn, H.-S. Kim, K. Lee, Z.-T. Zhu, E. Menard, R. G. Nuzzo, J. A. Rogers, unpublished. 26. J. B. D. Soole, H. Schumacher, IEEE J. Quantum Electron. 27, 737 (1991). U.S. Patent Application Serial Nos. 11/115,954, 11/145,574, 11/145,542, 60/863,248, 11/465,317, 11/423,287, 11/423,192, and 11/421,654 The number is incorporated herein by reference to the extent that it is not inconsistent with the description of the invention. All references (such as patent documents including patents or equivalents granted or granted); patent application publications; and non-patent literature or other source materials are at least partially inconsistent with each reference in this application. To the extent that the disclosure of the application is inconsistent (e.g., a partially inconsistent reference is incorporated by reference to a portion other than the inconsistent portion of the reference), which is incorporated herein by reference in its entirety as if individually The reference is incorporated into the general. The terms and expressions used herein are used to describe terms and not to limit the terms, and the use of such terms and expressions are not intended to exclude any equivalents or parts of the features shown and described, but Various modifications are possible within the scope of the claimed invention. Therefore, it is to be understood that the invention may be <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; Such modifications and variations are considered to be within the scope of the invention as defined by the appended claims. The specific embodiments provided herein are examples of useful embodiments of the present invention and will be readily understood by those skilled in the art, which can be practiced by a large number of variations of the apparatus, device components, and method steps described in the description of the invention. this invention. As will be apparent to those skilled in the art, the methods and apparatus useful for the methods of the present invention can include a wide variety of optional components and processing elements and steps. Each expression or combination of components described or exemplified herein may be used to practice the invention, unless otherwise specified. Whenever a range (eg, temperature range, time range, or composition or concentration range) is given in the specification, all intermediate ranges and sub-ranges and all individual values included in the range given are intended to be included in the disclosure. . It is understood that any sub-range or range of sub-ranges or sub-ranges included in the description herein may be excluded from the scope of the patent application herein. All patents and publications mentioned in the specification are indicative of the skill of those skilled in the art. The references cited herein are hereby incorporated by reference in their entirety to the extent of the disclosure of the disclosure of the disclosure of the disclosure of . For example, when advocating the composition of a substance, it is to be understood that the compounds are known and available in the prior art prior to the applicant's invention (including the disclosure of the compounds referred to in the references cited herein) It is not intended to be included in the composition of matter claimed herein. "comprising" is used synonymously with "including" or "characterized" and is intended to be inclusive or open-ended, and does not exclude additional elements or method steps that are not described. As used herein, "consisting of" excludes any element, step or component that is not specified in the claimed element. As used herein, "consisting essentially of" does not exclude materials or steps that do not materially affect the basic and novel characteristics of the claimed invention. In each of the examples herein, any of the terms "comprising," "consisting essentially of," and "consisting of" may be replaced by any of the other two terms. The invention as described herein suitably illustrated in the present specification may be practiced in the absence of any elements or limitations not specifically disclosed herein. It will be apparent to those skilled in the art that starting materials, biological materials, reagents, synthetic methods, purification methods, analytical methods, assay methods, and biological methods other than those specifically illustrated may be used in the practice of the present invention without Excessive experimentation was used. Functional equivalents of all techniques known to the materials and methods are intended to be included in the present invention. The use of the terms and expressions are used to describe terms and not to limit the terms, and the use of such terms and expressions is not intended to exclude any equivalents or parts of the features shown and described, but it should be recognized that Various modifications are possible within the scope of the claimed invention. Therefore, it is to be understood that the invention may be <Desc/Clms Page number>> Variations are considered to be within the scope of the invention as defined by the scope of the appended claims. Table 1: Parameters of the bending extraction from Figure 31A (from experiments and calculations). These calculations assume that the width of the active area (i.e., 10 μm for the sample shown in the drawing) is the same before and after the extension.Table 2: Parameters extracted from the bend shown in Figure 31D (from experiments and calculations)