TWI385734B - 形成場效電晶體之方法，形成場效電晶體閘極之方法，形成具有電晶體閘極陣列及在該閘極陣列週邊之電路的積體電路之方法，以及形成包含具有第一閘極與第二接地絕緣閘極之電晶體閘極陣列的積體電路之方法 - Google Patents

形成場效電晶體之方法，形成場效電晶體閘極之方法，形成具有電晶體閘極陣列及在該閘極陣列週邊之電路的積體電路之方法，以及形成包含具有第一閘極與第二接地絕緣閘極之電晶體閘極陣列的積體電路之方法 Download PDF

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TWI385734B
TWI385734B TW096103708A TW96103708A TWI385734B TW I385734 B TWI385734 B TW I385734B TW 096103708 A TW096103708 A TW 096103708A TW 96103708 A TW96103708 A TW 96103708A TW I385734 B TWI385734 B TW I385734B
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Young Pil Kim
Kunal R Parekh
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Micron Technology Inc
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Description

形成場效電晶體之方法，形成場效電晶體閘極之方法，形成具有電晶體閘極陣列及在該閘極陣列週邊之電路的積體電路之方法，以及形成包含具有第一閘極與第二接地絕緣閘極之電晶體閘極陣列的積體電路之方法
本發明係關於場效電晶體及其元件之製造。
場效電晶體係用於積體電路(例如：邏輯電路、記憶體電路及記憶體電路之控制電路)中之常見器件。該等器件通常包括一對在其之間容納有一通道區域之源極區域/汲極區域。一導電閘極運作地靠近該通道區域設置，且藉由一閘極介電區域自此處隔開。施加一合適電壓至導電閘極，在源極/汲極區域之間經由通道區域形成電流。
僅舉例而言，閘極之導電材料可形成於半導電材料上方或之上或半導電材料中所形成之開孔內且舉例而言無論是塊單晶基板材料內還是絕緣體上半導體材料內。當形成於半導電材料之溝道或其他開孔中時，該等導電材料之某些被稱作凹進存取裝置。此時，在基板之半導電材料上設置遮罩材料並經圖案化以在該基板內形成閘極線溝道。在如此形成溝道之情況下，移除遮罩材料，且然後藉由(舉例而言)熱氧化該溝道內暴露之半導電材料，在溝道開孔中形成閘極介電質。然後沈積閘極材料以過度填充該等溝道。然後通常使用微影蝕刻法及蝕刻法圖案化該等溝道外部接納之閘極材料以在亦接納閘極材料之溝道上方形成所期望之閘極輪廓。
通常，閘極材料圖案化在該等溝道上方形成與底層溝道同寬或極為接近之閘極線。光罩欠對準可不合意地將所期望閘極線圖案之一邊緣置於先前所蝕刻溝道之側面邊界內。此極其不可取，乃因閘極圖案蝕刻可蝕刻到溝道內之閘極材料，最終導致電路故障或至少導致不能接受之器件組態及效能。
雖然本發明之動機係解決上文所標識之問題，但其絕不受此限制。本發明僅受未對本說明書做解釋性或其他限制性參考之文字表達之隨附申請專利範圍及根據等效原則限制。
本發明包括：形成場效電晶體之方法、形成場效電晶體閘極之方法、形成包括一電晶體閘極陣列及該閘極陣列週邊之電路之積體電路之方法及形成包含一具有第一閘極及第二接地絕緣閘極之電晶體閘極陣列的積體電路之方法。在一實施方案中，一種形成一場效電晶體之方法包括在一基板之半導電材料上方形成遮罩材料。經由該遮罩材料且進入到該半導電材料內部形成一溝道。在該半導電材料內之溝道中形成閘極介電材料。在該遮罩材料內之溝道中且在該閘極介電材料上方半導電材料內之溝道中沈積閘極材料。形成源極/汲極區域。
在一實施方案中，一種形成一場效電晶體閘極之方法包括在一基板之半導電材料上方形成一含有氮化矽之遮罩材料。經由該含有氮化矽之遮罩材料且進入到該半導電材料內部形成一溝道。在形成進入到該半導電材料內部之溝道後移除該遮罩材料之氮化矽。在移除該遮罩材料之氮化矽之前，在該半導電材料內之溝道中形成閘極介電材料。在該閘極介電材料上方該半導電材料內之溝道中沈積閘極材料。
在一實施方案中，一種形成包括一電晶體閘極陣列及該閘極陣列週邊之電路的積體電路之方法包括在一基板之半導電材料上方形成遮罩材料。經由該遮罩材料且進入到該半導電材料內形成陣列電路溝道。在遮罩材料內該等陣列電路溝道中及該半導電材料內該等陣列電路溝道中沈積陣列閘極材料。在沈積該陣列閘極材料之後，經由該遮罩材料形成週邊電路溝道。在該遮罩材料內該等週邊電路溝道中沈積週邊電路閘極材料。
在一實施方案中，一種形成包括一電晶體閘極陣列及該閘極陣列週邊之電路的積體電路之方法包括在一基板之半導電材料上方形成遮罩材料。經由該遮罩材料且進入到該半導電材料內形成陣列電路溝道。在遮罩材料內該等陣列電路溝道中及該半導電材料內該等陣列電路溝道中沈積陣列閘極材料。經由該陣列閘極材料且經由該遮罩材料形成週邊電路溝道。在該陣列閘極材料及該遮罩材料內該等週邊電路溝道中沈積週邊電路閘極材料。
在一實施方案中，一種形成場效電晶體閘極之方法包括在一基板之半導電材料上方形成遮罩材料。該基板包括一溝道隔離區。在一共同遮罩步驟中，經由該遮罩材料且進入到該半導電材料內部形成一第一溝道且經由該溝道隔離區上方該遮罩材料形成一第二接地絕緣閘極溝道。在一共同沈積步驟中，在該等第一溝道及第二溝道內沈積閘極材料。
在一實施方案中，一種形成包含具有第一閘極與第二接地絕緣閘極電晶體閘極陣列的積體電路之方法包括在一基板之半導電材料上方形成遮罩材料。該基板包括多個溝道隔離區。經由該遮罩材料且進入到該等第一閘極之該半導電材料內形成第一溝道。經由該等溝道隔離區上方之遮罩材料形成第二接地絕緣閘極溝道。在該等第一溝道及第二溝道內沈積閘極材料。
本發明亦涵蓋其他態樣及實施方案。
提交本發明之揭示內容係為促進美國專利法之"以促進科學及有用技術之進步"(條款1，部分8)的憲法目的。
本發明包括：形成場效電晶體閘極之方法、形成場效電晶體之方法及形成具有一電晶體閘極陣列及在該閘極陣列週邊之電路的積體電路之方法。該內容主要參照形成包括一電晶體閘極陣列及該閘極陣列週邊之電路之積體電路而繼續，而技術人員將理解本發明之態樣亦可用於形成一單個場效電晶體及多個場效電晶體及其一個或多個場效電晶體閘極。
開始參照圖1，一般使用參考符號10指示製程中之一半導體基板。在本文件之上下文中，術語"半導體基板"或"半導電基板"被定義為意旨包括半導電材料之任何結構，該半導電材料包括但不限於諸如半導電晶圓(單獨或在於其上包括其他材料之組件中)及半導電材料層(單獨或在包括其他材料之組件中)之塊狀半導電材料。術語"基板"係指任一支撐結構，其包括但不限於上文所述之半導電基板。所繪示基板10包括一陣列區域或區12及閘極陣列區域12週邊之一週邊電路區域14，在陣列區域12內將製造一場效電晶體閘極陣列。僅舉例而言，陣列區域12可用於製造記憶體電路，舉例而言DRAM電路，而週邊電路區域14可包括用於運作/控制陣列區域12內記憶體電路之控制電路。本發明當然涵蓋替代組態，舉例而言在邏輯電路、控制電路或其他電路內應用閘極陣列及場效電晶體。
所繪示基板10包括半導電材料11，舉例而言塊狀單晶矽。本發明當然亦涵蓋其他半導電材料基板，舉例而言絕緣體上半導電基板且無論已存在或尚未被開發。理想上，半導電材料11適合背底摻雜或經摻雜以形成一經摻雜井以成為一合適之電導類型及濃度。已相對於半導電基板材料11製造出實例性較佳之溝道隔離區13、15、16、17及18。
參照圖2，已在基板10之半導電材料11上形成遮罩材料20。所繪示遮罩材料20包括：一最內部墊氧化層22(自30埃至100埃之實例性較佳厚度範圍)、一接納於材料22上具有不同於材料22組成之組成的遮罩層24(自50埃至300埃之一較佳實例性厚度範圍)及一形成於遮罩層24上且具有不同於遮罩層24之材料的材料之遮罩層26(自1,000埃至3,000埃之一實例性較佳厚度範圍)。所有或部分遮罩材料20可能犧牲，因此最終被自該基板上移除。因此，遮罩材料20之某些部分或全部可能係電絕緣、半導電或導電之任一者。用於層24之一實例性較佳材料係氮化矽，而用於層26之一實例性較佳材料係未經摻雜之二氧化矽。另一實例性替代實施例(且舉例而言)形成包括二氧化矽之層24及包括氮化矽之層26。無論如何且因此僅在一個較佳實施方案中，遮罩材料20包括二氧化矽及氮化矽，且在一更佳實施例中包括接納於氮化矽上之二氧化矽。
在一較佳實施方案中，可考量層26包括一外部絕緣材料層且可考量層24包括一內部絕緣材料層，其中可相對於該內部絕緣材料層選擇性地蝕刻該外部絕緣材料層，且與是否在內部絕緣材料層24內部接納另一絕緣材料層(例如層22)無關。在一較佳實施方案中，外部絕緣材料層26較內部絕緣材料層24為厚，且在所示之一個較佳實施方案中，外部絕緣材料層26接觸內部絕緣材料層24。另外在所繪示之實例性實施例中，外部絕緣材料層26至少在遮罩材料20圖案化結束時係係遮罩材料20之最外部材料。另外，在僅一實例性實施方案中，層24較佳地厚於層22。
參照圖3，已藉由遮罩材料20形成陣列電路溝道28。一實例性較佳技術包括使用一個或多個光阻劑層或其他層(未顯示)之微影蝕刻圖案化及蝕刻。圖3繪示該等光阻劑層或其他層已在遮罩材料20上移除，當然在圖3之處理結束時在應用微影蝕刻之處保留部分或全部光阻劑層或其他層。
參照圖4，已將遮罩材料20用作一遮罩以形成進入到半導電材料11內之陣列電路溝道30。因此在一較佳實施例中，使用一單個遮罩步驟(舉例而言，使用微影蝕刻)形成所繪示之溝道28及30。半導電材料11內溝道30之一實例性較佳深度範圍自其一外表面係自300埃至2,500埃。
參照圖5，已在半導電材料11內之溝道30中形成閘極介電材料32。在一較佳實施方案中，藉由溝道30內半導電材料11之熱氧化來形成閘極介電材料32之至少一主要部分。雖然所繪示之實例性實施例實質上繪示已藉由熱氧化形成所有該等閘極介電材料，但本發明當然亦涵蓋對陣列溝道30內之材料11進行或不進行熱氧化之情況下沈積閘極介電材料。
參照圖6，已在遮罩材料20內之陣列電路溝道28內及在半導電材料11內之陣列電路溝道30內及在閘極介電材料32上沈積陣列閘極材料34。較佳地，將陣列閘極材料34沈積成至少填充溝道28及30，且最佳地沈積成過度充填該等溝道，且亦沈積閘極材料34來覆蓋遮罩材料20。實例性較佳材料34包括導電摻雜型半導電材料，例如在沈積期間或隨後原位摻雜之導電摻雜型多晶矽。亦可使用其他導電材料，例如導電金屬或金屬化合物，但在該製程中在此處其他導電材料並非首選。
參照圖7，在沈積陣列閘極材料34之後，已經由遮罩材料20(在所繪示之實施例中，其中在遮罩材料20上接納材料34)及亦經由陣列閘極材料34形成週邊電路溝道36。圖7亦在一實施方案中繪示經由(舉例而言)一個或多個溝道隔離區上方陣列區12內遮罩材料20之一接地閘極溝道37之製造。在本文件之上下文中，一接地閘極係一絕緣閘極，其被製造成接納於至少某些場隔離上且保持接地或其他合適電位以用於提供一隔離功能，以便排除或減少場隔離區下方或周圍之寄生場效電晶體電流之形成。若需要，溝道36、37之部分或全部可製造成蝕刻/延伸進入半導電材料11及/或場/溝道隔離材料之材料內。
參照圖7及圖8，溝道36、37之較佳實施例較佳地暴露出基板10之半導電材料11。圖8繪示一較佳實施方案，其中在週邊電路溝道36內所暴露之半導電材料11上形成一閘極介電層38。可藉由(僅舉例而言)一熱氧化形成閘極介電層，其中該閘極介電層之至少大部分包括經氧化之半導電材料(如圖所示)。此作業當然亦可在基板材料11經熱氧化或未經熱氧化之情況下與一閘極介電層之沈積組合或由閘極介電層之沈積所替代。此外，在所繪示之實例性實施例中，閘極介電層38實質上亦形成於陣列閘極材料34上方(且如圖所示在上面)，且如下文所述，隨後通常將其自陣列閘極材料34上方移除。無論如何，閘極介電材料38可與陣列電路溝道30之閘極介電材料32相同或不同，藉此使電路不同區域之閘極介電質最佳化可行。形成溝道36及37之一較佳方式係(舉例而言)使用微影蝕刻在對兩類溝道之形成一樣之一單個遮罩步驟中。在某些實施方案中，可根本不形成溝道36及37之一者或兩者，或在其他時間形成(若形成)，在下文僅以實例形式在可能之可能替代實施例中進行說明。
無論如何，圖7繪示一實例性較佳實施例，其中在該相同遮罩步驟中形成該陣列之接地閘極溝道及週邊電路溝道。此外，當然亦可在週邊電路區域14內製造接地閘極溝道。
參照圖9，已在遮罩材料20內之週邊電路溝道36內且(在所繪示之實例性實施例中)在亦形成於陣列閘極材料34內之相應週邊電路溝道內沈積週邊電路閘極材料40。閘極材料40可與材料34相同或不同，藉此使為不同閘極形成之導電閘極材料之導電類型及/或功函之最佳化可行。此外在所繪示之實例性實施例中，在接地閘極之製造中亦使用週邊電路閘極材料40，亦在接地閘極溝道37內沈積閘極材料40。在所繪示之實例性較佳實施例中，將週邊電路閘極材料40沈積成一如下厚度：使用週邊電路閘極材料40至少填滿且較佳地過度充填週邊電路溝道36且至少填滿且較佳地過度充填接地閘極溝道37。
參照圖10，已相對於遮罩材料20選擇性地移除陣列閘極材料34、週邊電路閘極材料40及兩者之間的介電層38，且外露遮罩材料20，以有效地隔離遮罩材料20及如此形成之半導電材料11內各自溝道中之各自閘極材料。在本文件之上下文中，選擇性移除需要以移除一個材料相對於另一個材料以2：1或更大之比率移除(舉例而言藉由蝕刻或其他方法)。在所繪示之實例性實施例中，該移除已有效地使形成於遮罩材料20內所繪示溝道28、36及37中之閘極材料34及40凹進。實例性較佳技術包括化學機械拋光、光阻劑回蝕或定時化學蝕刻之任一者或組合。此處，舉例而言，材料34及40包括多晶矽，且遮罩材料20之外層26包括氮化矽，一能夠在一定時蝕刻中形成圖10結構之實例性蝕刻化學包括氫氧化四甲銨，隨後將其暴露於一氫氟酸溶液中。
參照圖11，一實例性更高導電層42(即一難熔金屬、其他金屬或金屬矽)已經沈積及拋光或回蝕，隨後沈積一絕緣金屬層44，然後對絕緣金屬層44進行拋光或其他回蝕。在一實例性較佳實施例中，絕緣金屬層44藉此以絕緣材料44帽蓋遮罩材料20內之凹進閘極材料34及40。在一較佳實施例中，絕緣材料44具有與遮罩材料20之其中由絕緣材料形成之內層24之組成相同之組成。因此，僅舉例而言，材料44及24可包括氮化矽，其中材料26包括二氧化矽，或在一較佳實施例中相反。
參照圖12，且僅在一較佳實施例中，已相對於內層24選擇性地蝕刻掉遮罩材料20之外層26，且帽蓋接納於凹進閘極材料34及40上之絕緣材料44。在一較佳實施方案中，本發明之一態樣包括當使用閘極介電材料時，在移除遮罩材料之氮化矽之前，在該等溝道內形成閘極介電材料(舉例而言材料32)。
參照圖13，且僅在一較佳實施例中，如圖所示，已在基板10上沈積較佳地具有與遮罩材料20內部絕緣材料層24之組成相同組成的絕緣材料50。
參照圖14，已各向異性地蝕刻掉材料50及材料24，有效地在閘極材料34、40及42周圍形成絕緣側壁間隔層52。可在該製程早期或此時移除墊氧化層22(當使用墊氧化層時)之部分或全部，或可將其部分保留為最終電路構造之一部分。無論如何，在一較佳實施例中，本發明之態樣包括在已沈積至少閘極材料34之後的某時刻移除遮罩材料之至少大部分。在大多數較佳實施例中，此類形成場效電晶體閘極、場效電晶體及電晶體閘極陣列及閘極陣列週邊電路之方法較佳地在沈積閘極材料34、38及42之任一者或其組合之後不對其進行微影蝕刻圖案化。
圖14繪示源極/汲極區域56之製造，其中源極/汲極區域56大部分較佳地形成於基板10之半導電材料11內。在上述處理步驟之任一者期間，可藉由一個合適之電導增強型摻雜劑之離子植入中之一者或其組合來形成源極/汲極區域56。此外，在上述處理之任一者期間，當然可實施其他通道、通道填塞或其他植入(無論已存在或尚未形成)。
本發明當然亦涵蓋替代實施例，而本發明僅由字面措辭的申請專利範圍來限制，而不自其他申請專利範圍、圖式或說明書中讀取限制。僅舉例而言，現在將說明若干實例性替代實施例。參照圖15，其繪示一對應於圖4中關於第一所述實施例之所繪示處理之半導體基板10a或其替代物。已使用所說明第一實施例中之相同編號，若需要，藉助後綴"a"或不同之編號以示區別。圖15繪示基板片斷10a，其包括在其中形成陣列電路溝道28及30之相同遮罩步驟中經由該陣列中之遮罩材料20之接地閘極溝道37a之形成。另外，僅舉例而言，在所繪示之實施例中，接地閘極溝道37a已形成為延伸進入該等溝道隔離區(例如溝道隔離區15)內。
參照圖16，已形成閘極介電材料32，且已將閘極材料34a沈積至接地閘極溝道37a內。
參照圖17，後繼處理已發生至各向異性地蝕刻絕緣側壁間隔層52及源極/汲極區域56之製造的階段。在其他方面，處理、材料等均較佳按照圖1－14所述第一實施例中所提供。
進一步僅舉例而言，參照圖18及19說明關於一基板片斷10b之另一實例性實施例處理。已使用所述第一及第二實施例中之相同編號，若需要，藉助後綴"b"或不同編號以示區別。圖18在處理程序上對應於圖4之處理，且其中已形成與陣列電路溝道28、30之形成相當之一個或多個週邊電路溝道36b。可能較佳地使用週邊電路溝道，其中期望週邊之電路及陣列電路之某些電晶體係相同之電導類型及/或功函數及/或其他所期望之性質。
圖19繪示隨後之閘極介電質32之製造、閘極材料34b之沈積及隨後對遮罩材料20b及閘極材料34b之圖案化以形成(僅舉例而言)接地閘極溝道37b及另一個週邊電路溝道36b。因此，可與陣列電路溝道之形成相當地形成部分週邊電路溝道。可(舉例而言)類似於或不同於關於圖8－14之繪示及說明發生隨後之處理。
圖20(僅舉例而言)繪示關於一基板片斷10c之替代實例性處理。已使用上述實施例中之相同編號，若需要，藉助後綴"c"或不同編號以示區別。圖20繪示一處理，藉由該處理已使用一獨立於製造所繪示剖面上任何其他線性溝道之遮罩步驟製造出陣列溝道28、30。在此之後，已在一共用遮罩步驟中製造接地閘極隔離溝道37及一週邊之電路閘極溝道70，且在其上沈積閘極材料40c。爾後，已經由遮罩材料20及先前所沈積之閘極材料實施另一遮罩，以形成另一個週邊電路溝道74。已形成閘極介電質71(舉例而言藉由關於閘極介電質材料製造之上述製程之任一者)。隨後，已沈積閘極材料76，閘極材料76可與上述實例性閘極材料之任一者相同或不同。在其他方面，處理隨後可理想地與關於(舉例而言)圖8－14所繪示及說明之上述實施例相同或不同地繼續。
本發明之態樣亦涵蓋一種形成場效電晶體閘極之方法，其包括在該基板之半導電材料上形成遮罩材料，且其中該基板包括一溝道隔離區。僅舉例而言，實例性實施例係彼等上述實施例。在一共用遮罩步驟中，經由遮罩材料形成一第一溝道，且進入該半導電材料內，且經由該場隔離區上方之該遮罩材料形成一第二接地絕緣閘極溝道。一較佳實施方案中之一遮罩步驟包括微影蝕刻。此外在一實施方案中，在所述共用遮罩步驟期間可將該第二接地絕緣閘極溝道製造成延伸進入該場隔離區內。
隨後在一共用沈積步驟中，在該第一溝道及該第二溝道內沈積閘極材料。此共用沈積步驟較佳地使用閘極材料至少填充且較佳地過度充填該等第一溝道及第二溝道。在一較佳實施方案中，在沈積閘極材料之後移除遮罩材料之至少大部分。在一較佳實施方案中，在沈積閘極材料之後，該製程不對閘極材料進行任何微影蝕刻圖案化。在一實施方案中，所沈積之閘極材料以閘極材料覆蓋該遮罩材料，且該製程進一步包括相對於該遮罩材料選擇性地移除該閘極材料並暴露出該遮罩材料，以有效地隔離該等第一溝道與第二溝道內之閘極材料。
在一實施方案中，本發明之一態樣囊括一種形成包含具有第一閘極與第二接地絕緣閘極電晶體閘極陣列的積體電路之方法。在一基板之半導電材料上方形成遮罩材料，且該基板包括多個溝道隔離區。經由遮罩材料且進入第一閘極之半導電材料內部形成第一溝道。經由對應於該第二接地絕緣閘極之場隔離區上方之遮罩材料形成第二接地絕緣閘極溝道。在該等第一溝道及第二溝道內沈積閘極材料。
可同時或不同時(舉例而言，一個在另一個的前面或後面)形成該等第一溝道及第二溝道。第二溝道可形成於場隔離區內部或僅接納於場隔離區外部。
可在相同沈積步驟或在不同沈積步驟中發生閘極材料在第一溝道與第二溝道內之沈積。此外，可在相同沈積步驟中進行閘極材料在第一溝道與第二溝道內之部分沈積，且可在不同沈積步驟中發生在第一溝道與第二溝道內閘極材料之另一部分沈積。無論如何且較佳地，閘極材料之沈積使用閘極材料至少填充且更佳地過度充填該等第一溝道與第二溝道。在其他方面，處理較佳按照上文關於其他實施例之說明。
按照條例，已使用在結構及組織特徵上或多或少特定之語言風格說明瞭本發明。然而，應瞭解本發明並不限定於所示及所說明之該等具體特徵，乃因本文所揭示之方法包括實施本發明之較佳形式。因此，以本發明根據等效原則適當解釋之隨附申請專利範圍適當範疇內之形式或修改之任一者來主張本發明。
10．．．半導體基板
10a．．．半導體基板
10b．．．半導體基板
10c．．．半導體基板
11．．．半導電材料
12．．．陣列區域或區
13．．．溝道隔離區
14．．．週邊電路區域
15．．．溝道隔離區
16．．．溝道隔離區
17．．．溝道隔離區
18．．．溝道隔離區
20．．．遮罩材料
20b．．．遮罩材料
22．．．最內部墊氧化層
24．．．內部絕緣材料層
26．．．外部絕緣材料層
28．．．陣列電路溝道
30．．．陣列電路溝道
32．．．閘極介電材料
34．．．陣列閘極材料
34a．．．閘極材料
34b．．．閘極材料
36．．．週邊電路溝道
36b．．．週邊電路溝道
37．．．接地閘極溝道
37a．．．接地閘極溝道
37b．．．接地閘極溝道
38．．．閘極介電層
40．．．週邊電路閘極材料
40c．．．閘極材料
42．．．更高導電層
44．．．絕緣金屬層
50．．．絕緣材料
52．．．絕緣側壁間隔層
56．．．源極/汲極區域
70．．．電路閘極溝道
71．．．閘極介電質
74．．．週邊電路溝道
76．．．閘極材料
上文已參照以下隨附圖式說明本發明之較佳實施例。
圖1係根據本發明一態樣在製程中之一半導體基板片斷之示意性剖面圖。
圖2係繼圖1所示步驟後一處理步驟處圖1基板片斷之視圖。
圖3係繼圖2所示步驟後一處理步驟處圖2基板片斷之視圖。
圖4係繼圖3所示步驟後一處理步驟處圖3基板片斷之視圖。
圖5係繼圖4所示步驟後一處理步驟處圖4基板片斷之視圖。
圖6係繼圖5所示步驟後一處理步驟處圖5基板片斷之視圖。
圖7係繼圖6所示步驟後一處理步驟處圖6基板片斷之視圖。
圖8係繼圖7所示步驟後一處理步驟處圖7基板片斷之視圖。
圖9係繼圖8所示步驟後一處理步驟處圖8基板片斷之視圖。
圖10係繼圖9所示步驟後一處理步驟處圖9基板片斷之視圖。
圖11係繼圖10所示步驟後一處理步驟處圖10基板片斷之視圖。
圖12係繼圖11所示步驟後一處理步驟處圖11基板片斷之視圖。
圖13係繼圖12所示步驟後一處理步驟處圖12基板片斷之視圖。
圖14係繼圖13所示步驟後一處理步驟處圖13基板片斷之視圖。
圖15係根據本發明一態樣在製程中一替代實施例半導體基板片斷之一示意性剖面圖。
圖16係繼圖15所示步驟後一處理步驟處圖15基板片斷之視圖。
圖17係繼圖16所示步驟後一處理步驟處圖16基板片斷之視圖。
圖18係根據本發明一態樣在製程中另一替代實施例半導體基板片斷之一示意性剖面圖。
圖19係繼圖18所示步驟後一處理步驟處圖18基板片斷之視圖。
圖20係根據本發明一態樣在製程中另一替代實施例半導體基板片斷之一示意性剖面圖。
10b．．．半導體基板
11．．．半導電材料
13．．．溝道隔離區
15．．．溝道隔離區
16．．．溝道隔離區
17．．．溝道隔離區
18．．．溝道隔離區
20．．．遮罩材料
20b．．．遮罩材料
22．．．最內部墊氧化層
24．．．內部絕緣材料層
26．．．外部絕緣材料層
30．．．陣列電路溝道
32．．．閘極介電材料
34b．．．閘極材料
36b．．．週邊電路溝道
37b．．．接地閘極溝道

Claims (29)

  1. 一種形成一場效電晶體之方法，其包括：在一基板之半導電材料上方形成遮罩材料，該遮罩材料係由一最外部材料、一最內部層及一中間層等三種材料所組成，該最外部材料包含二氧化矽與氮化矽的其中之一，該最內部層包含墊氧化物，該中間層包含氮化矽及二氧化矽的其中之一；透過該遮罩材料且進入該半導電材料內形成一溝道；當該最外部材料存在於該基板之該半導體材料上方時，在該半導電材料內之該溝道中形成閘極介電材料；在該遮罩材料內之該溝道中且在該閘極介電材料上方該半導電材料內之該溝道中沈積閘極材料；在該最外部材料存在的情況下，使該閘極材料凹進，以具有一被接納於該遮罩材料內之該溝道中之平面的最外部表面，該平面的最外部表面完全橫跨該遮罩材料中之該溝道；在使該閘極材料凹進之後，移除該遮罩材料之至少大部分；及形成源極/汲極區域。
  2. 如請求項1之方法，其中該遮罩材料包括接納於氮化矽材料上之二氧化矽。
  3. 如請求項1之方法，其中形成該閘極介電材料之至少大部分包括對該溝道內之該半導電材料進行熱氧化。
  4. 如請求項1之方法，其中該閘極材料之該沈積係至少填 充該遮罩材料內之該溝道及該半導電材料內之該溝道。
  5. 如請求項1之方法，其中該閘極材料之該沈積係過度充填該遮罩材料內之該溝道及該半導電材料內之該溝道。
  6. 如請求項1之方法，其中在該基板之該半導電材料內形成該等源極/汲極區域。
  7. 如請求項1之方法，在閘極材料之沈積之後不對該閘極材料進行微影蝕刻圖案化。
  8. 如請求項1之方法，其中沈積該閘極材料以用該閘極材料覆蓋該遮罩材料，且包括相對於該遮罩材料選擇性地移除該閘極材料且暴露該遮罩材料，以有效地隔離該遮罩材料內之該溝道及該半導電材料內該溝道中之該閘極材料。
  9. 一種形成一場效電晶體之方法，其包括：在一基板之半導電材料上方形成遮罩材料，該遮罩材料係由一最外部絕緣材料層、一中間絕緣層及一內部絕緣材料層等三層所組成，可相對於該內部絕緣材料層選擇性地蝕刻該最外部絕緣材料層；透過該遮罩材料且進入該半導電材料內形成一溝道；當該最外部絕緣材料存在於該基板之該半導體材料上方時，在該半導電材料內之該溝道中形成閘極介電材料；在該遮罩材料內之該溝道及該閘極介電材料上方該半導電材料內之該溝道中沈積閘極材料；在該最外部絕緣材料存在的情況下，使該遮罩材料內 該溝道中之該閘極材料凹進；相對於該內部絕緣材料層及接納於該凹進閘極材料上方之該帽蓋絕緣材料選擇性地蝕刻掉該最外部絕緣材料層；在蝕刻掉該最外部絕緣材料層之後，沈積其組成與該內部絕緣材料層相同之帽蓋絕緣材料；各向異性地蝕刻該組成與該內部絕緣材料層之組成相同之帽蓋絕緣材料，以有效地圍繞該閘極材料形成絕緣側壁間隔層；及形成源極/汲極區域。
  10. 如請求項9之方法，其中該最外部絕緣材料層厚於該內部絕緣材料層。
  11. 如請求項9之方法，其中該最外部絕緣材料層接觸該內部絕緣材料層。
  12. 如請求項9之方法，其進一步包括接納於該內部絕緣材料層內之另一個絕緣材料層。
  13. 如請求項9之方法，其中該最外部絕緣材料層包括二氧化矽且該內部絕緣材料層包括氮化矽。
  14. 如請求項9之方法，其中該最外部絕緣材料層包括氮化矽且該內部絕緣材料層包括二氧化矽。
  15. 如請求項9之方法，其中該閘極材料之該沈積使該閘極材料至少填充該遮罩材料內之該溝道及該半導電材料內之該溝道。
  16. 如請求項9之方法，其中在該基板之該半導電材料內形 成該等源極/汲極區域。
  17. 如請求項9之方法，在該閘極材料之沈積之後不對該閘極材料進行微影蝕刻圖案化。
  18. 如請求項1之方法，其中該遮罩材料具有兩種不同組成，該閘極材料之該平面的最外部表面係與該兩種不同組成之一內部的一平面的最外部表面共平面。
  19. 一種形成一場效電晶體之方法，其包括：在一基板之半導電材料上方形成遮罩材料，該遮罩材料具有一蓋過該半導體材料之厚度，該遮罩材料係由一最外部絕緣材料、一最內部絕緣材料及一中間絕緣材料所組成；形成一透過該遮罩材料且進入該半導電材料內之溝道；當該最外部材料存在於該基板之該半導體材料上方時，在該半導電材料內之該溝道中形成閘極介電材料；在該遮罩材料內之該溝道及該半導電材料內之該溝道中該閘極介電材料上方沈積閘極材料；在該最外部絕緣材料存在的情況下，使該閘極材料凹進，以具有一被完全接納於該遮罩材料之該覆蓋厚度內之該溝道中的平面的最外部表面，該平面的最外部表面完全橫跨該遮罩材料中之該溝道；在使該閘極材料凹進之後，移除該遮罩材料之至少大部分；及形成源極/汲極區域。
  20. 一種形成一場效電晶體之方法，其包括：在一基板之半導電材料上方形成遮罩材料，該遮罩材料係由一最外部絕緣材料、一最內部絕緣材料及一中間絕緣材料層所組成；形成一透過該遮罩材料且進入該半導電材料內之溝道；當該最外部材料存在於該基板之該半導體材料上方時，在該半導電材料內之該溝道中形成閘極介電材料；在該遮罩材料內之該溝道中且在該半導電材料內之該溝道中該閘極介電材料上方沈積閘極材料；在該最外部絕緣材料存在的情況下，使該閘極材料凹進，以具有一被接納於該遮罩材料內之該溝道中之平面的最外部表面，該平面的最外部表面完全橫跨該遮罩材料中之該溝道，該閘極材料凹進後在該半導體材料與該遮罩材料內之溝道中具有T形之側向橫截面；在使該閘極材料凹進之後，移除該遮罩材料之至少大部分；及形成源極/汲極區域。
  21. 一種形成一場效電晶體之方法，其包括：在一基板之半導電材料上方形成遮罩材料，該遮罩材料係由一最外部絕緣材料層、一中間絕緣材料層及一內部絕緣材料層，可相對於該內部絕緣材料層選擇性地蝕刻該最外部絕緣材料層；形成一透過該遮罩材料且進入該半導電材料內之溝 道；當該最外部絕緣材料存在於該基板之該半導體材料上方時，在該半導電材料內之該溝道中形成閘極介電材料；在該遮罩材料內之該溝道及該半導電材料內之該溝道中該閘極介電材料上方及該遮罩材料之該最外部絕緣材料上方沈積閘極材料；在該最外部絕緣材料存在的情況下，使該遮罩材料內該溝道中之該閘極材料凹進；使用絕緣材料覆蓋該遮罩材料內該溝道中之該凹進閘極材料；相對於該內部絕緣材料層及接納於該凹進閘極材料上方之該帽蓋絕緣材料選擇性地蝕刻掉該外部絕緣材料層；在蝕刻掉該外部絕緣材料層之後，沈積其組成與該內部絕緣材料層相同之絕緣材料；各向異性地蝕刻該組成與該內部絕緣材料層之組成相同之絕緣材料，以有效地圍繞該閘極材料形成絕緣側壁間隔層；及形成源極/汲極區域。
  22. 一種形成一場效電晶體之方法，其包括：在一基板之半導電材料上方形成遮罩材料，該遮罩材料係由一最外部絕緣材料、一內部絕緣材料層及一中間絕緣材料層所組成； 形成一透過該遮罩材料且進入該半導電材料內之溝道；當該最外部材料存在於該基板之該半導體材料上方時，在該半導電材料內之該溝道中形成閘極介電材料；在該遮罩材料內之該溝道及該半導電材料內之該溝道中該閘極介電材料上方沈積閘極材料；在該最外部絕緣材料存在的情況下，使該閘極材料凹進，以具有一被接納於該遮罩材料內之該溝道中之最外部表面；使用絕緣用材料覆蓋該遮罩材料內該溝道中之該凹進閘極材料；在使用絕緣用材料覆蓋該遮罩材料內該溝道中之該凹進閘極材料後，移除該遮罩材料之至少大部分；在移除之後，在該基板上方沈積絕緣材料；各向異性地蝕刻該絕緣材料以圍繞該閘極材料形成絕緣側壁間隔層；及形成源極/汲極區域。
  23. 如請求項22之方法，其中該絕緣用材料與該絕緣材料之組成相同。
  24. 如請求項1之方法，其中該閘極介電材料覆蓋於該半導體材料中之溝道之一基底及側壁上。
  25. 如請求項9之方法，其中該閘極介電材料覆蓋於該半導體材料中之溝道之一基底及側壁上。
  26. 如請求項19之方法，其中該閘極介電材料覆蓋於該半導 體材料中之溝道之一基底及側壁上。
  27. 如請求項20之方法，其中該閘極介電材料覆蓋於該半導體材料中之溝道之一基底及側壁上。
  28. 如請求項21之方法，其中該閘極介電材料覆蓋於該半導體材料中之溝道之一基底及側壁上。
  29. 如請求項22之方法，其中該閘極介電材料覆蓋於該半導體材料中之溝道之一基底及側壁上。
TW096103708A 2006-02-02 2007-02-01 形成場效電晶體之方法，形成場效電晶體閘極之方法，形成具有電晶體閘極陣列及在該閘極陣列週邊之電路的積體電路之方法，以及形成包含具有第一閘極與第二接地絕緣閘極之電晶體閘極陣列的積體電路之方法 TWI385734B (zh)

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