KR950021018A - 반도체 기판 및 이를 이용한 반도체 장치 - Google Patents

반도체 기판 및 이를 이용한 반도체 장치 Download PDF

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KR950021018A
KR950021018A KR1019940035389A KR19940035389A KR950021018A KR 950021018 A KR950021018 A KR 950021018A KR 1019940035389 A KR1019940035389 A KR 1019940035389A KR 19940035389 A KR19940035389 A KR 19940035389A KR 950021018 A KR950021018 A KR 950021018A
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plane
ion implantation
substrate
semiconductor substrate
degrees
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KR0143374B1 (ko
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히로시 기따지마
아끼요시 고바야시
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가네꼬 히사시
닛뽕덴끼 가부시끼가이샤
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • HELECTRICITY
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
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    • H01L29/107Substrate region of field-effect devices
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    • H01L29/107Substrate region of field-effect devices
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    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET

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  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

(100) 면의 근방에서는, (100) 면에 따른 (011) 면과 (011) 면인 (100) 형 결정 면들에 의한 면 채널링은 이온주입의 균일성을 저하시킨다. 그러므로, 기판의 주면은 (100) 면과 수직으로 교차하는 두개의 면과 3.5도 이상의 각도를 형성하는 결정방위에 수직한 면에 형성된다. 즉, 이온 주입장치와 이온 주입각도의 설정시의 변동을 고려하면, 범위 (104) 내의 표면 방위를 갖는 기판이 이용된다. 또한, (100) 면으로 부터 10 도 이하로 방위를 제한함으로써, 이온주입은 공정조건을 변경함이 없이 기판에 수직으로 행해질 수 있다. 이에 의해, 반도체 기판은 실리콘 기판의 표면에 수직방향으로 이온주입을 행하더라도 면채널링을 야기하지 않는다.

Description

반도체 기판 및 이를 이용한 반도체 장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명에 따른 반도체 기판의 일실시예에서의 표면 방위범위를 나타내는 평면도;
제4a 도 내지 제4b 도는 본 발명에 따른 반도체 기판의 제 1 실시예에 대해 고에너지 이온주입을 행하는 경우의 층 저항과 종래 기판에 대한 고에너지 이온 주입을 행하는 경우의 층 저항을 비교하여 나타내는 도면;
제5도는 제 4b 도의 반도체 기판의 깊이 방향으로 캐리어 프로파일을 나타내는 그래프;

Claims (3)

  1. (100) 면에 수직한<100>방향과 10도 이하의 각도를 형성하고, 상기 (100)면에 직교하는 (011)면 및 (011)면의 각각과 3.5도 이상이 각도들을 형성하는 면상에 한 주면을 갖는 반도체 기판.
  2. 제 1 항에 기재된 반도체 기판상에, 기판 표면에 대하여 수직방향으로 그 기판에 대해 이온주입을 행하는 이온 주입기술을 적용하여 소자를 형성함으로써 제조한 반도체 장치.
  3. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940035389A 1993-12-20 1994-12-20 반도체 기판 및 이를 이용한 반도체 장치 KR0143374B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP34494193A JP3145851B2 (ja) 1993-12-20 1993-12-20 半導体基板及び半導体装置
JP93-344941 1993-12-20

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KR950021018A true KR950021018A (ko) 1995-07-26
KR0143374B1 KR0143374B1 (ko) 1998-08-17

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Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6825543B2 (en) * 2000-12-28 2004-11-30 Canon Kabushiki Kaisha Semiconductor device, method for manufacturing the same, and liquid jet apparatus
GB0116310D0 (en) * 2001-07-04 2001-08-29 New Transducers Ltd Contact sensitive device
JP2003273016A (ja) * 2002-01-11 2003-09-26 Sharp Corp 半導体膜およびその形成方法、並びに、その半導体膜を用いた半導体装置、ディスプレイ装置。
JP2004207571A (ja) * 2002-12-26 2004-07-22 Toshiba Corp 半導体装置の製造方法、半導体製造装置及びステンシルマスク
JP2004296496A (ja) * 2003-03-25 2004-10-21 Fujitsu Ltd 半導体装置の製造方法
JP2004339003A (ja) * 2003-05-15 2004-12-02 Shin Etsu Handotai Co Ltd シリコンエピタキシャルウェーハ及びシリコンエピタキシャルウェーハの製造方法
JP2005285518A (ja) 2004-03-29 2005-10-13 Toshiba Corp イオン注入装置およびイオン注入方法
JP4789463B2 (ja) 2004-12-28 2011-10-12 キヤノン株式会社 光電変換装置とその製造方法,及び撮像システム
JP4544360B2 (ja) * 2008-10-24 2010-09-15 トヨタ自動車株式会社 Igbtの製造方法
JP5906463B2 (ja) 2011-06-13 2016-04-20 パナソニックIpマネジメント株式会社 半導体装置の製造方法
JP6588323B2 (ja) * 2015-12-10 2019-10-09 住友重機械イオンテクノロジー株式会社 イオン注入方法およびイオン注入装置
JP6644596B2 (ja) * 2016-03-18 2020-02-12 住友重機械イオンテクノロジー株式会社 イオン注入方法およびイオン注入装置
KR20220153127A (ko) * 2017-04-20 2022-11-17 실텍트라 게엠베하 구성 요소가 제공된 고상 층의 두께를 감소시키는 방법

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61144017A (ja) * 1984-12-18 1986-07-01 Fujitsu Ltd 半導体ウエハ
JP2597976B2 (ja) * 1985-03-27 1997-04-09 株式会社東芝 半導体装置及びその製造方法
JPS6433924A (en) * 1987-07-29 1989-02-03 Sony Corp Semiconductor wafer
JPH02177426A (ja) * 1988-12-28 1990-07-10 Hitachi Cable Ltd 半導体ウェハの製造方法
JPH04343479A (ja) * 1991-05-21 1992-11-30 Nec Yamagata Ltd 可変容量ダイオード

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US5838058A (en) 1998-11-17
JP3145851B2 (ja) 2001-03-12
KR0143374B1 (ko) 1998-08-17
JPH07172990A (ja) 1995-07-11

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