JPS6410648A - Method of multilayer metallization for integrated circuit - Google Patents

Method of multilayer metallization for integrated circuit

Info

Publication number
JPS6410648A
JPS6410648A JP63140341A JP14034188A JPS6410648A JP S6410648 A JPS6410648 A JP S6410648A JP 63140341 A JP63140341 A JP 63140341A JP 14034188 A JP14034188 A JP 14034188A JP S6410648 A JPS6410648 A JP S6410648A
Authority
JP
Japan
Prior art keywords
layer
metal
bonding pads
titanium
aluminum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63140341A
Other languages
English (en)
Inventor
Asu Nataashiya
Kimu Bongii
Baagu Jiyon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SMC STANDARD MICROSYST CORP
Standard Microsystems LLC
Original Assignee
SMC STANDARD MICROSYST CORP
Standard Microsystems LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SMC STANDARD MICROSYST CORP, Standard Microsystems LLC filed Critical SMC STANDARD MICROSYST CORP
Publication of JPS6410648A publication Critical patent/JPS6410648A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP63140341A 1987-06-22 1988-06-07 Method of multilayer metallization for integrated circuit Pending JPS6410648A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/064,501 US4824803A (en) 1987-06-22 1987-06-22 Multilayer metallization method for integrated circuits

Publications (1)

Publication Number Publication Date
JPS6410648A true JPS6410648A (en) 1989-01-13

Family

ID=22056421

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63140341A Pending JPS6410648A (en) 1987-06-22 1988-06-07 Method of multilayer metallization for integrated circuit

Country Status (4)

Country Link
US (1) US4824803A (ja)
JP (1) JPS6410648A (ja)
CA (1) CA1282188C (ja)
GB (1) GB2206234B (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02205323A (ja) * 1989-02-03 1990-08-15 Seiko Epson Corp 半導体装置の製造方法
DE112020001076T5 (de) 2019-03-06 2021-12-09 Nidec Corporation Motoreinheit

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4796081A (en) * 1986-05-02 1989-01-03 Advanced Micro Devices, Inc. Low resistance metal contact for silicon devices
US4988423A (en) * 1987-06-19 1991-01-29 Matsushita Electric Industrial Co., Ltd. Method for fabricating interconnection structure
US5570119A (en) * 1988-07-26 1996-10-29 Canon Kabushiki Kaisha Multilayer device having integral functional element for use with an ink jet recording apparatus, and recording apparatus
NL8900010A (nl) * 1989-01-04 1990-08-01 Philips Nv Halfgeleiderinrichting en werkwijze voor het vervaardigen van een halfgeleiderinrichting.
JPH02222148A (ja) * 1989-02-22 1990-09-04 Yamaha Corp 半導体装置
JP2859288B2 (ja) * 1989-03-20 1999-02-17 株式会社日立製作所 半導体集積回路装置及びその製造方法
GB2229575B (en) * 1989-03-22 1993-05-12 Intel Corp Method of reducing hot-electron degradation in semiconductor devices
US5229311A (en) * 1989-03-22 1993-07-20 Intel Corporation Method of reducing hot-electron degradation in semiconductor devices
GB8907898D0 (en) 1989-04-07 1989-05-24 Inmos Ltd Semiconductor devices and fabrication thereof
JPH02285638A (ja) * 1989-04-27 1990-11-22 Toshiba Corp 半導体装置
US4943539A (en) * 1989-05-09 1990-07-24 Motorola, Inc. Process for making a multilayer metallization structure
EP0418540A3 (en) * 1989-08-11 1991-08-07 Sanyo Electric Co., Ltd. Dry etching method
US5070391A (en) * 1989-11-30 1991-12-03 Sgs-Thomson Microelectronics, Inc. Semiconductor contact via structure and method
JP2662446B2 (ja) * 1989-12-11 1997-10-15 キヤノン株式会社 記録ヘッド及び記録ヘッド用素子基板
DE3940820C2 (de) * 1989-12-11 1998-07-09 Leybold Ag Verfahren zur Behandlung von Werkstücken durch reaktives Ionenätzen
US5556810A (en) * 1990-06-01 1996-09-17 Kabushiki Kaisha Toshiba Method for manufacturing a semiconductor device wherein a semiconductor chip is connected to a lead frame by metal plating
US5260234A (en) * 1990-12-20 1993-11-09 Vlsi Technology, Inc. Method for bonding a lead to a die pad using an electroless plating solution
US5252382A (en) * 1991-09-03 1993-10-12 Cornell Research Foundation, Inc. Interconnect structures having patterned interfaces to minimize stress migration and related electromigration damages
JPH05175191A (ja) * 1991-10-22 1993-07-13 Mitsubishi Electric Corp 積層導電配線
JPH06120218A (ja) * 1992-10-02 1994-04-28 Miyazaki Oki Electric Co Ltd 半導体素子の金属配線
US5345213A (en) * 1992-10-26 1994-09-06 The United States Of America, As Represented By The Secretary Of Commerce Temperature-controlled, micromachined arrays for chemical sensor fabrication and operation
US5464966A (en) * 1992-10-26 1995-11-07 The United States Of America As Represented By The Secretary Of Commerce Micro-hotplate devices and methods for their fabrication
JPH06151434A (ja) * 1992-11-10 1994-05-31 Sony Corp 金属配線およびその形成方法
US5436801A (en) * 1993-09-09 1995-07-25 Crosscheck Technology, Inc. Method and structure for routing power for optimum cell utilization with two and three level metal in a partially predesigned integrated circuit
US5391519A (en) * 1993-12-09 1995-02-21 United Microelectronics Corp. Method for increasing pad bonding of an IC (1)
US5439731A (en) * 1994-03-11 1995-08-08 Cornell Research Goundation, Inc. Interconnect structures containing blocked segments to minimize stress migration and electromigration damage
JP4417439B2 (ja) * 1994-06-29 2010-02-17 フリースケール セミコンダクター インコーポレイテッド エッチング・ストップ層を利用する半導体装置構造とその方法
JP2797994B2 (ja) * 1995-02-17 1998-09-17 ヤマハ株式会社 半導体装置
US5960306A (en) * 1995-12-15 1999-09-28 Motorola, Inc. Process for forming a semiconductor device
KR100278561B1 (ko) * 1996-10-15 2001-02-01 포만 제프리 엘 테이퍼를구비하며에칭성이감소된다층의금속샌드위치구조및그형성방법
US6154188A (en) * 1997-04-30 2000-11-28 Candescent Technologies Corporation Integrated metallization for displays
US6409930B1 (en) 1999-11-01 2002-06-25 Bmc Industries, Inc. Lamination of circuit sub-elements while assuring registration
US6468439B1 (en) 1999-11-01 2002-10-22 Bmc Industries, Inc. Etching of metallic composite articles
AU1448301A (en) * 1999-11-01 2001-05-14 Bmc Industries, Inc. Metal composite articles and method of manufacture
US6365057B1 (en) 1999-11-01 2002-04-02 Bmc Industries, Inc. Circuit manufacturing using etched tri-metal media
JP3449333B2 (ja) * 2000-03-27 2003-09-22 セイコーエプソン株式会社 半導体装置の製造方法
JP3480416B2 (ja) * 2000-03-27 2003-12-22 セイコーエプソン株式会社 半導体装置
US6866943B2 (en) * 2002-04-30 2005-03-15 Infineon Technologies Ag Bond pad structure comprising tungsten or tungsten compound layer on top of metallization level

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60103645A (ja) * 1983-11-11 1985-06-07 Hitachi Ltd 電子装置およびその形成方法
JPS62190850A (ja) * 1986-02-18 1987-08-21 Matsushita Electronics Corp 半導体装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58137231A (ja) * 1982-02-09 1983-08-15 Nec Corp 集積回路装置
DE3244461A1 (de) * 1982-12-01 1984-06-07 Siemens AG, 1000 Berlin und 8000 München Integrierte halbleiterschaltung mit einer aus einer aluminium/silizium-legierung bestehenden kontaktleiterbahnebene
US4507852A (en) * 1983-09-12 1985-04-02 Rockwell International Corporation Method for making a reliable ohmic contact between two layers of integrated circuit metallizations
JPS60183726A (ja) * 1984-03-02 1985-09-19 Toshiba Corp 半導体装置の電極パタ−ンの形成方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60103645A (ja) * 1983-11-11 1985-06-07 Hitachi Ltd 電子装置およびその形成方法
JPS62190850A (ja) * 1986-02-18 1987-08-21 Matsushita Electronics Corp 半導体装置

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02205323A (ja) * 1989-02-03 1990-08-15 Seiko Epson Corp 半導体装置の製造方法
DE112020001076T5 (de) 2019-03-06 2021-12-09 Nidec Corporation Motoreinheit
DE112020001077T5 (de) 2019-03-06 2021-12-09 Nidec Corporation Motoreinheit
DE112020001073T5 (de) 2019-03-06 2021-12-23 Nidec Corporation Motoreinheit

Also Published As

Publication number Publication date
GB2206234A (en) 1988-12-29
US4824803A (en) 1989-04-25
GB2206234B (en) 1990-11-21
GB8809912D0 (en) 1988-06-02
CA1282188C (en) 1991-03-26

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