JPS5647996A - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- JPS5647996A JPS5647996A JP12122279A JP12122279A JPS5647996A JP S5647996 A JPS5647996 A JP S5647996A JP 12122279 A JP12122279 A JP 12122279A JP 12122279 A JP12122279 A JP 12122279A JP S5647996 A JPS5647996 A JP S5647996A
- Authority
- JP
- Japan
- Prior art keywords
- addresses
- matrix
- blocks
- access period
- rom
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
- G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
- G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
- G11C17/123—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices comprising cells having several storage transistors connected in series
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Static Random-Access Memory (AREA)
- Read Only Memory (AREA)
Abstract
PURPOSE:To attain the high-speed operation of a dynamic semiconductor ROM by dividing memory elements into blocks by addresses and by assigning addresses of blocks in the order of blocks while overlapping them. CONSTITUTION:Dynamic ROM memory cell matrixes 11 and 12 consists of FET memory cells divided into two by even addresses and odd addresses. Matrix 11 is accessed by sequential even addresses through address decoder 13 and column decoder 15 synchronizing with it to invert clock pulses in the former half and latter half of the access period, so that the output and inverted output of an FET cell selected via the clocked inverter will be read out. Matrix 12 is similarly read to over-lap the former half of the access period of matrix 12 with the latter half of the access period of matrix 11, so that the speed of the operation of ROM will be increased twice the normal speed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12122279A JPS5647996A (en) | 1979-09-20 | 1979-09-20 | Semiconductor memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12122279A JPS5647996A (en) | 1979-09-20 | 1979-09-20 | Semiconductor memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5647996A true JPS5647996A (en) | 1981-04-30 |
Family
ID=14805911
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12122279A Pending JPS5647996A (en) | 1979-09-20 | 1979-09-20 | Semiconductor memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5647996A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS589285A (en) * | 1981-07-08 | 1983-01-19 | Toshiba Corp | Semiconductor device |
JPS61233495A (en) * | 1985-04-08 | 1986-10-17 | Nec Corp | Semiconductor storage device |
JPS62211644A (en) * | 1986-03-03 | 1987-09-17 | フエリツクス・シエラ−・ユニオ−ル・ゲ−・エム・ベ−・ハ−・ウント・コンパニ−・コマンデイ−トゲゼルシヤフト | Polyolefine resin-covered water resistant photography supporting paper |
JPS62252590A (en) * | 1986-04-24 | 1987-11-04 | Ascii Corp | Memory device |
JPS62271291A (en) * | 1986-05-20 | 1987-11-25 | Ascii Corp | Memory device |
JPS63180949A (en) * | 1987-01-21 | 1988-07-26 | Mitsubishi Paper Mills Ltd | Base for photographic paper |
JPH07211064A (en) * | 1993-12-24 | 1995-08-11 | Samsung Electron Co Ltd | Method and device for memory addressing |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5230388A (en) * | 1975-09-04 | 1977-03-08 | Hitachi Ltd | Semiconductor integrated circuit device constructed with insulating ga te field effect transistor |
JPS5380931A (en) * | 1976-12-27 | 1978-07-17 | Hitachi Ltd | Semiconductor lead-only memory |
JPS54109730A (en) * | 1978-02-17 | 1979-08-28 | Hitachi Ltd | Semiconductor read-only memory |
-
1979
- 1979-09-20 JP JP12122279A patent/JPS5647996A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5230388A (en) * | 1975-09-04 | 1977-03-08 | Hitachi Ltd | Semiconductor integrated circuit device constructed with insulating ga te field effect transistor |
JPS5380931A (en) * | 1976-12-27 | 1978-07-17 | Hitachi Ltd | Semiconductor lead-only memory |
JPS54109730A (en) * | 1978-02-17 | 1979-08-28 | Hitachi Ltd | Semiconductor read-only memory |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS589285A (en) * | 1981-07-08 | 1983-01-19 | Toshiba Corp | Semiconductor device |
JPH0373080B2 (en) * | 1981-07-08 | 1991-11-20 | Tokyo Shibaura Electric Co | |
JPS61233495A (en) * | 1985-04-08 | 1986-10-17 | Nec Corp | Semiconductor storage device |
JPS62211644A (en) * | 1986-03-03 | 1987-09-17 | フエリツクス・シエラ−・ユニオ−ル・ゲ−・エム・ベ−・ハ−・ウント・コンパニ−・コマンデイ−トゲゼルシヤフト | Polyolefine resin-covered water resistant photography supporting paper |
JPS62252590A (en) * | 1986-04-24 | 1987-11-04 | Ascii Corp | Memory device |
JPS62271291A (en) * | 1986-05-20 | 1987-11-25 | Ascii Corp | Memory device |
JPS63180949A (en) * | 1987-01-21 | 1988-07-26 | Mitsubishi Paper Mills Ltd | Base for photographic paper |
JPH07211064A (en) * | 1993-12-24 | 1995-08-11 | Samsung Electron Co Ltd | Method and device for memory addressing |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0136414A3 (en) | Dynamic memory with high speed nibble mode | |
BE787291A (en) | ADDRESSING PROCESS AND HIERARCHICAL MEMORY WITH BUFFER MEMORIES RESERVED FOR PARTICULAR USERS | |
JPS52130532A (en) | Address conversion system | |
JPS5647996A (en) | Semiconductor memory device | |
ES8302945A1 (en) | Multiport memory array | |
JPS5668990A (en) | Memory circuit | |
JPS5220732A (en) | Memory circuit | |
JPS5532270A (en) | Read control circuit for memory unit | |
JPS57181494A (en) | Refreshing method for dynamic memory | |
JPS5514530A (en) | Refresh control unit | |
JPS5715286A (en) | Memory device | |
JPS56137580A (en) | Semiconductor storage device | |
JPS53148347A (en) | Dynamic memory unit | |
JPS57167185A (en) | Memory circuit | |
JPS5411648A (en) | Semiconductor memory unit | |
JPS5619595A (en) | Semiconductor memory unit | |
JPS5538683A (en) | Mass-storage static shift register | |
JPS5271141A (en) | Word line driving circuit | |
JPS57127982A (en) | Memory address system | |
JPS52155927A (en) | Mos random access memory | |
JPS558615A (en) | Refresh control system | |
JPS52110530A (en) | Mos random access memory | |
JPS56137581A (en) | Random access memory circuit | |
JPS57203288A (en) | Memory circuit | |
JPS57147183A (en) | Shift register |