JPS56137581A - Random access memory circuit - Google Patents

Random access memory circuit

Info

Publication number
JPS56137581A
JPS56137581A JP3991580A JP3991580A JPS56137581A JP S56137581 A JPS56137581 A JP S56137581A JP 3991580 A JP3991580 A JP 3991580A JP 3991580 A JP3991580 A JP 3991580A JP S56137581 A JPS56137581 A JP S56137581A
Authority
JP
Japan
Prior art keywords
signal
readout
write
data
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3991580A
Other languages
Japanese (ja)
Inventor
Yasunori Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3991580A priority Critical patent/JPS56137581A/en
Publication of JPS56137581A publication Critical patent/JPS56137581A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store

Landscapes

  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To prevent data inversion at data readout and to reduce the number of elements to be used, by delaying a gate signal against another one gate signal where the gates are for data readout and write-in. CONSTITUTION:The circuit consists of FF48 constituted with parallel connection of transfer gates 46, 47 of different polarity and series connection of inverters 43, 45, data write-in transfer gate 42 of one polarity connected between FF48 and bus line 41, and data readout transfer gate 44 of another polarity. Further, in write-in mode, the readout signal and the gate control data storage signal for FF48 are supplied with a delay to the write-in signal, and on the other hand, the write-in signal and the data storage signal are fed with a delay to the readout signal, at readout mode.
JP3991580A 1980-03-28 1980-03-28 Random access memory circuit Pending JPS56137581A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3991580A JPS56137581A (en) 1980-03-28 1980-03-28 Random access memory circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3991580A JPS56137581A (en) 1980-03-28 1980-03-28 Random access memory circuit

Publications (1)

Publication Number Publication Date
JPS56137581A true JPS56137581A (en) 1981-10-27

Family

ID=12566227

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3991580A Pending JPS56137581A (en) 1980-03-28 1980-03-28 Random access memory circuit

Country Status (1)

Country Link
JP (1) JPS56137581A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60229297A (en) * 1984-04-06 1985-11-14 トムソン‐セーエスエフ　テレフオンヌ Reading/writing memory cell and memory
JPS6435795A (en) * 1987-07-30 1989-02-06 Nec Corp Semiconductor memory circuit
WO1995016266A1 (en) * 1993-12-07 1995-06-15 Texas Instruments Italia Spa Improvements in or relating to field memories
US6005820A (en) * 1993-12-07 1999-12-21 Texas Instruments Incorporated Field memories

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60229297A (en) * 1984-04-06 1985-11-14 トムソン‐セーエスエフ　テレフオンヌ Reading/writing memory cell and memory
JPS6435795A (en) * 1987-07-30 1989-02-06 Nec Corp Semiconductor memory circuit
WO1995016266A1 (en) * 1993-12-07 1995-06-15 Texas Instruments Italia Spa Improvements in or relating to field memories
US6005820A (en) * 1993-12-07 1999-12-21 Texas Instruments Incorporated Field memories

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