JPS5582465A - Semiconductor device and its preparation - Google Patents

Semiconductor device and its preparation

Info

Publication number
JPS5582465A
JPS5582465A JP15417078A JP15417078A JPS5582465A JP S5582465 A JPS5582465 A JP S5582465A JP 15417078 A JP15417078 A JP 15417078A JP 15417078 A JP15417078 A JP 15417078A JP S5582465 A JPS5582465 A JP S5582465A
Authority
JP
Japan
Prior art keywords
film
gate
thin
sio2 film
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15417078A
Other languages
Japanese (ja)
Inventor
Katsuyuki Doi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15417078A priority Critical patent/JPS5582465A/en
Publication of JPS5582465A publication Critical patent/JPS5582465A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/0883Combination of depletion and enhancement field effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To decrease the gate delay of an E/D inverter, and to integrate this device to a high degree, by mounting not less than two IG-FETs, whose conductivity under a gate differs, onto the same substrate, and by forming a gate insulating film by an oxide film of the substrate while making the thickness of films differ. CONSTITUTION:A thin SiO2 film 12 is made up to an element forming portion of a p-type Si substrate 11 and a thick SiO2 film 13 between elements. Boron is injected to an E-type switch MOST forming portion through the thin SiO2 film 12, the thin SiO2 film 12 of a D-type load MOST forming portion is removed and arsenic is injected. A thin SiO2 film 14 is built up to the D-type element portion by means of dry oxidation treatment. Thin SiO2 films, which thickness differs, are made up because the thickness of the SiO2 film 12 of the E-type element portion is also increased at that time. This device is completed by means of Si gate technique and Al wiring technique. Thus, drain currents are made greater because the gate film of the D-type element portion is thin, and the gate delay of an E/D inverter is diminished.
JP15417078A 1978-12-15 1978-12-15 Semiconductor device and its preparation Pending JPS5582465A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15417078A JPS5582465A (en) 1978-12-15 1978-12-15 Semiconductor device and its preparation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15417078A JPS5582465A (en) 1978-12-15 1978-12-15 Semiconductor device and its preparation

Publications (1)

Publication Number Publication Date
JPS5582465A true JPS5582465A (en) 1980-06-21

Family

ID=15578355

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15417078A Pending JPS5582465A (en) 1978-12-15 1978-12-15 Semiconductor device and its preparation

Country Status (1)

Country Link
JP (1) JPS5582465A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4627153A (en) * 1981-02-06 1986-12-09 Tokyo Shibaura Denki Kabushiki Kaisha Method of producing a semiconductor memory device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4627153A (en) * 1981-02-06 1986-12-09 Tokyo Shibaura Denki Kabushiki Kaisha Method of producing a semiconductor memory device

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