JPH03167859A - Package for semiconductor-element - Google Patents
Package for semiconductor-elementInfo
- Publication number
- JPH03167859A JPH03167859A JP30860489A JP30860489A JPH03167859A JP H03167859 A JPH03167859 A JP H03167859A JP 30860489 A JP30860489 A JP 30860489A JP 30860489 A JP30860489 A JP 30860489A JP H03167859 A JPH03167859 A JP H03167859A
- Authority
- JP
- Japan
- Prior art keywords
- external lead
- lead terminal
- semiconductor element
- glass member
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 44
- 239000011521 glass Substances 0.000 claims abstract description 26
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 14
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims abstract description 12
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 7
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 7
- 229910052810 boron oxide Inorganic materials 0.000 claims abstract description 6
- JKWMSGQKBLHBQQ-UHFFFAOYSA-N diboron trioxide Chemical compound O=BOB=O JKWMSGQKBLHBQQ-UHFFFAOYSA-N 0.000 claims abstract description 6
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 6
- 239000011787 zinc oxide Substances 0.000 claims abstract description 5
- 229910052751 metal Inorganic materials 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims description 2
- 150000002739 metals Chemical class 0.000 claims 1
- 239000000758 substrate Substances 0.000 abstract description 8
- 238000007789 sealing Methods 0.000 abstract description 6
- 239000004020 conductor Substances 0.000 abstract description 3
- 238000000034 method Methods 0.000 abstract description 2
- 239000000126 substance Substances 0.000 abstract description 2
- 230000007774 longterm Effects 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
- 239000005394 sealing glass Substances 0.000 description 21
- 238000002844 melting Methods 0.000 description 5
- 230000008018 melting Effects 0.000 description 5
- 229910000833 kovar Inorganic materials 0.000 description 4
- 238000002425 crystallisation Methods 0.000 description 3
- 230000008025 crystallization Effects 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 230000008646 thermal stress Effects 0.000 description 3
- LTPBRCUWZOMYOC-UHFFFAOYSA-N Beryllium oxide Chemical compound O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 230000000644 propagated effect Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910001374 Invar Inorganic materials 0.000 description 1
- 240000007594 Oryza sativa Species 0.000 description 1
- 235000007164 Oryza sativa Nutrition 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000002238 attenuated effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 239000011812 mixed powder Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 235000009566 rice Nutrition 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000005303 weighing Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は半導体素子を収容する半導体素子収納用パッケ
ージの改良に関するものである．（従来の技術）
従来、半導体素子を収容するためのパッケージ、特にガ
ラスの溶着によって封止するガラス封止型半導体素子収
納用パッケージは、ｖＩｉ縁基体と蓋体とから戒り、内
部に半導体素子を収容する空所を有する絶縁容器と、該
容器内に収容ざれる半導体素子を外部電気回路に電気的
に接続するための外部リード端子とから構威されており
、絶縁基体及び蓋体の相対向する主面に予め封止用のガ
ラス部材を被着形或すると共に、絶縁基体主面に外部リ
ード端子を固定し、半導体素子の各電極と外部リード端
子とをワイヤボンド接続した後、絶縁基体及び蓋体のそ
れぞに被着させた封止用のガラス部材を溶融一体化させ
ることによって内部に半導体素子を気密に封止している
。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an improvement in a package for housing a semiconductor element. (Prior Art) Conventionally, a package for accommodating a semiconductor element, especially a glass-sealed semiconductor element accommodating package sealed by glass welding, has a vIi edge base body and a lid body, and a semiconductor element inside. It consists of an insulating container having a cavity for accommodating the insulating base and an external lead terminal for electrically connecting the semiconductor element housed in the container to an external electric circuit. A glass member for sealing is preliminarily applied to the main surface of the insulating substrate, and external lead terminals are fixed to the main surface of the insulating substrate, and each electrode of the semiconductor element and the external lead terminal are connected by wire bonding. The semiconductor element is hermetically sealed inside by melting and integrating sealing glass members attached to each of the base and the lid.
（発明が解決しようとする課題）
しかし乍ら、この従来のガラス封止型半導体素子収納用
パッケージは通常、外部リード端子がコハール（２９
ＷｔＸ Ｎｉ−１６ ＷｔＸ Ｃｏ−５５ ＷｔＸＦｅ
合金）や４２Ａ１１ｏｙ（４２ ＨｔＸ Ｎｉ−５８
ＷｔＺ Ｆｅ合金）の導電性材料から戒っており、該コ
バールや４２Ａ１１ｏｙ等は導電率が低いことから以下
に述べる欠点を有する。(Problem to be Solved by the Invention) However, in this conventional glass-sealed semiconductor element housing package, the external lead terminals are usually cohar (29 mm).
WtX Ni-16 WtX Co-55 WtXFe
alloy) and 42A11oy (42 HtX Ni-58
Kovar, 42A11oy, etc. have the following disadvantages due to their low conductivity.
即ち、
■コバールや４２４ Ｉ ｔｏｙはその導電率が３．０
〜３．５χ（ＩＡＣＳ）と低い。そのためこのコバール
や４２Ａ ｌ ｌｏｙ等から或る外部リード端子に信号
を伝搬させた場合、信号の伝搬速度が極めて遅いものと
なり、高速駆動を行う半導体素子はその収容が不可とな
ってしまう、
■半導体素子収納用パッケージの内部に収容する半導体
素子の高密度化、高集積化の進展に伴い、半導体素子の
電極数が大幅に増大しており、半導体素子の各電極を外
部電気回路に接続する外部リード端子の線幅も極めて細
くなってきている。そのため外部リード端子は上記のに
記載のコバールや４２Ａ１１ｏｙの導電率が低いことと
相俊って電気抵抗が極めて大きなものになってきており
、外部リード端子に信号を伝搬させると、該外部リード
端子の電気抵抗に起因して信号が大きく減衰し、内部に
収容する半導体素子に信号を正確に人力することができ
ず、半導体素子に誤動作を生じさせてしまう、
等の欠点を有していた。In other words, Kovar and 424 I toy have an electrical conductivity of 3.0.
It is low at ~3.5χ (IACS). Therefore, when a signal is propagated from this Kovar or 42Al loy to a certain external lead terminal, the signal propagation speed becomes extremely slow, making it impossible to accommodate semiconductor elements that drive at high speed. ■Semiconductor With the progress of higher density and higher integration of semiconductor elements housed inside element storage packages, the number of electrodes on semiconductor elements has increased significantly. The line width of lead terminals is also becoming extremely thin. Therefore, the electrical resistance of the external lead terminal has become extremely large due to the low conductivity of Kovar and 42A11oy described above, and when a signal is propagated to the external lead terminal, The signal is greatly attenuated due to the electrical resistance of the device, making it impossible to accurately transmit the signal to the semiconductor device housed inside, resulting in malfunction of the semiconductor device.
（発明の目的）
本発明は上記欠点に鑑み案出されたもので、その目的は
外部リード端子における信号の減衰を極小となし、内部
に収容する半導体素子への信号の入出力を確実に行うこ
とを可能として半導体素子を長期間にわたり正常、且つ
安定に作動させることができる半導体素子収納用パッケ
ージを提供することにある。(Object of the Invention) The present invention was devised in view of the above drawbacks, and its purpose is to minimize the attenuation of signals at external lead terminals and ensure the input and output of signals to and from semiconductor elements housed inside. It is an object of the present invention to provide a package for storing a semiconductor element, which enables the semiconductor element to operate normally and stably for a long period of time.
また本発明の他の目的は高速駆動を行う半導体素子を収
容することができる半導体素子収納用パッケージを提供
することにある。Another object of the present invention is to provide a semiconductor device storage package that can accommodate semiconductor devices that operate at high speed.
（課題を解決するための手段）
本発明は内部に半導体素子を収容するための空所を有す
る絶縁容器に外部リード端子をガラス部材を介して取着
して或る半導体素子収納用パンケージにおいて、前記絶
縁容器を炭化珪素質焼結体で、外部リード端子を熱膨張
係数３０乃至４０Ｘ１０−’７℃、導電率２０χ（ＩＡ
ＣＳ）以上の金属で、ガラス部材を酸化亜鉛５５．０乃
至６５．ＯＷｔ＄ 、酸化ホウ素１５．０乃至２５．０
Ｗｔ％ 、シリカｌ０６０乃至１５．ＯＷｔχから成る
ガラスで形成したことを特徴とするものである。(Means for Solving the Problems) The present invention provides a semiconductor device storage pancase in which an external lead terminal is attached via a glass member to an insulating container having a cavity for accommodating a semiconductor device inside. The insulating container is made of silicon carbide sintered body, and the external lead terminal has a thermal expansion coefficient of 30 to 40X10-'7℃ and a conductivity of 20χ (IA
CS) or higher, the glass member is made of zinc oxide of 55.0 to 65. OWt$, boron oxide 15.0 to 25.0
Wt%, silica 1060 to 15. It is characterized in that it is made of glass made of OWtχ.
（実施例） 次に本発明を添付図面に基づき詳細に説明する。(Example) Next, the present invention will be explained in detail based on the accompanying drawings.
第１図及び第２図は本発明の半導体素子収納用パッケー
ジの一実施例を示し、１は絶縁基体、２は蓋体である。FIGS. 1 and 2 show an embodiment of the semiconductor element storage package of the present invention, where 1 is an insulating base and 2 is a lid.
この絶縁基体１と蓋体２とにより絶縁容器３が構威され
る。The insulating base 1 and the lid 2 constitute an insulating container 3.
前記絶縁基体１及び蓋体２はそれぞれの中央部に半導体
素子を収容する空所を形或するための凹部が設けてあ、
り、゛絶縁基体１の凹部底面には半導体素子４が樹脂、
ガラス、ロウ剤等の接着剤を介し取着固定される。The insulating base body 1 and the lid body 2 are each provided with a recess in the center thereof to form a cavity for accommodating a semiconductor element,
``On the bottom of the recess of the insulating substrate 1, the semiconductor element 4 is covered with resin.
It is attached and fixed via adhesive such as glass or wax.
前記絶縁基体ｌ及び蓋体２は炭化珪素質焼結体から戒り
、第１図に示すような絶縁基体１及び蓋体２に対応した
形状を有するプレス型内に、炭化珪素（ＳｉＣ） 、ベ
リリア（Ｂｅｄ）等の原料籾末を充填させ、しかる後、
これに一定圧力を印加しながら約２０００〜２２００℃
の温度で加熱焼成することによって製作される。The insulating base 1 and lid 2 are made of silicon carbide sintered body, and silicon carbide (SiC), After filling with raw material rice powder such as beryllia (Bed),
Approximately 2000 to 2200℃ while applying a constant pressure to this
It is manufactured by heating and firing at a temperature of .
尚、前記絶縁基体ｌ及び蓋体２を形成する炭化珪素質焼
結体はその熱膨張係数が３０乃至４０Ｘ１０−７／℃で
あり、後述する封止用ガラス部材の熱膨張係数との関係
において絶縁基体ｌ及び蓋体２と封止用ガラス部材間に
大きな熱膨張の差が生じることはない。The silicon carbide sintered body forming the insulating base 1 and the lid 2 has a thermal expansion coefficient of 30 to 40 x 10-7/°C, and in relation to the thermal expansion coefficient of the sealing glass member described later. A large difference in thermal expansion does not occur between the insulating base 1, the lid 2, and the sealing glass member.
また前記絶縁基体１及び蓋体２にはその相対向する主面
に封止用のガラス部材６が予め被着形成されており、該
絶縁基体１及び蓋体２の各々に被着されている封止用ガ
ラス部材６を加熱溶融させ一体化させることにより絶縁
容器３内の半導体素子４を気密に封止する。Further, a sealing glass member 6 is formed in advance on the opposing main surfaces of the insulating base 1 and the lid 2, and is adhered to each of the insulating base 1 and the lid 2. The semiconductor element 4 inside the insulating container 3 is hermetically sealed by heating and melting the sealing glass member 6 to integrate it.
前記絶縁基体１及び蓋体２の相対向する主面に被着され
る封止用ガラス部材６は、酸化亜鉛５５．０乃至６５．
０れχ、酸化ホウ素１５．０乃至２５．ＯＷｔＺ 、シ
リカ１０．０乃至１５．ＯＷｔχより形成されるガラス
より或り、上記各威分を所定の値となるように秤量混合
すると共に、該混合粉末を１２００〜１３００℃の温度
で加熱溶融させることによって製作される。このガラス
部材６の熱膨張係数は３０乃至５０Ｘ１０−’／ ’Ｃ
である．
前記封止用ガラス部材６は、その熱膨張係数が３０乃至
５０Ｘ１０−’／ ’Ｃであり、絶縁基体ｌ及び蓋体２
の各々の熱膨張係数と近似することから絶縁基体ｌ及び
蓋体２の各々に被着されている封止用ガラス部材６を加
熱溶融させ一体化させることにより絶縁容器３内の半導
体素子４を気密に封止する際、絶縁基体ｌ及び蓋体２と
封止用ガラス部材６との間には両者の熱膨張係数の相違
に起因する熱応力が発生することは殆どなく、絶縁基体
ｌと蓋体２とを封止用ガラス部材６を介し強固に接合す
ることが可能となる。The sealing glass member 6 attached to the opposing main surfaces of the insulating base 1 and the lid 2 is made of zinc oxide of 55.0 to 65.0%.
0reχ, boron oxide 15.0 to 25. OWtZ, silica 10.0 to 15. It is manufactured from glass made of OWtχ by weighing and mixing the above-mentioned components to a predetermined value, and heating and melting the mixed powder at a temperature of 1200 to 1300°C. The thermal expansion coefficient of this glass member 6 is 30 to 50X10-'/'C
It is. The sealing glass member 6 has a thermal expansion coefficient of 30 to 50X10-'/'C, and has a thermal expansion coefficient of 30 to 50X10-'/'C.
Since the coefficient of thermal expansion is similar to that of each of When sealing airtightly, there is almost no thermal stress generated between the insulating base l and lid 2 and the sealing glass member 6 due to the difference in coefficient of thermal expansion between the two. It becomes possible to firmly join the lid body 2 via the sealing glass member 6.
尚、前記封止用ガラス部材６は酸化亜鉛（ＺｎＯ）がｓ
ｓ．ｏｗｔχ未満であるとガラス化が困難となってガラ
ス部材６としての機能を喪失してしまい、また６５．Ｏ
Ｗｔχを越えるとガラスの結晶化が進んで絶縁容器３の
気密封止が困難となるため酸化亜鉛（ＺｎＯ）は５５．
０乃至６５．ＯＷｔχの範囲に限定される．また酸化ホ
ウ素（Ｂ＊Ｏｓ）が１５．０Ｗｔ％未満であるとガラス
の結晶化が進んで絶縁容器３の気密封止が困難となり、
また２５．０Ｗｔ％を越えるとガラスの耐薬品性が劣化
して絶縁容器３の気密封止の信頼性が大きく低下するた
め酸化ホウ素（ＢｇＯｚ）は１５．０乃至２５．０Ｗｔ
％の範囲に限定される。The sealing glass member 6 is made of zinc oxide (ZnO).
s. If it is less than owtχ, it will be difficult to vitrify and the function as the glass member 6 will be lost, and 65. O
If Wtχ is exceeded, crystallization of the glass will progress and it will be difficult to hermetically seal the insulating container 3, so zinc oxide (ZnO) should be 55.
0 to 65. limited to the range of OWtχ. Moreover, if boron oxide (B*Os) is less than 15.0 Wt%, crystallization of the glass will progress and it will be difficult to hermetically seal the insulating container 3.
Moreover, if it exceeds 25.0 Wt%, the chemical resistance of the glass will deteriorate and the reliability of the hermetic seal of the insulating container 3 will be greatly reduced.
% range.
またシリカ（Ｓｉ（ｈ）が１０．０Ｗｔ１未満であると
ガラスの結晶化が進んで絶縁容器３の気密封止が困難と
なり、また１５．０Ｗｔ％を越えると絶縁容器３に外部
リード端子５をガラス部材６を介して取着する際、ガラ
スの溶融温度が上がり、絶縁容器３内部に収容する半導
体素子に熱劣化を招来させることからシリカ（Ｓｔ（ｈ
）は１０．０乃至１５．０Ｗｔ％ （７）範囲に限定さ
れる。Furthermore, if the silica (Si(h) content is less than 10.0 Wt%, the crystallization of the glass will progress and it will be difficult to hermetically seal the insulating container 3. If it exceeds 15.0 Wt%, the external lead terminal 5 will not be connected to the insulating container 3. Silica (St(h)
) is limited to a range of 10.0 to 15.0 Wt% (7).
前記封止用ガラス部材６は前述した戒分から成るガラス
に適当な有機溶剤、溶媒を添加して得たガラスペースト
を従来周知の厚膜手法を採用することによって絶縁基体
１及び蓋体２の相対向する主面に被着形成される。The sealing glass member 6 is made by applying a well-known thick film method to a glass paste obtained by adding an appropriate organic solvent or solvent to the glass made of the above-mentioned precepts, and then attaching the insulating base 1 and the lid 2 to each other. It is deposited and formed on the main surface facing the opposite direction.
前記絶縁基体１と蓋体２との間には導電性材料から或る
外部リード端子５が配されており、該外部リード端子５
は半導体素子４の各電極がワイヤ７を介し電気的に接続
され、外部リード端子５を外部電気回路に接続すること
によって半導体素子４が外部電気回路に接続されること
となる．前記外部リード端子５は絶縁基体１と蓋体２の
相対向する主面に被着させた封止用ガラス部材６を溶融
一体化させ、絶縁容器３を気密封止する際に同時に絶縁
基体ｌと蓋体２との間に取着される．前記外部リード端
子５はインバー合金（３６．５ＷｔＸＮｉ−６３．５
ＷｔχＦｅ合金）の上下面に非磁性体金属である銅（Ｃ
ｕ）を接合させたもの等から威り、その導電率は２０Ｘ
（ＩＡＣＳ）以上、熱膨張係数は３０乃至４０ＸＩＯ−
’／ ℃の導電性材料から或る。An external lead terminal 5 made of a conductive material is disposed between the insulating base 1 and the lid 2.
Each electrode of the semiconductor element 4 is electrically connected via the wire 7, and the semiconductor element 4 is connected to the external electric circuit by connecting the external lead terminal 5 to the external electric circuit. The external lead terminal 5 is formed by melting and integrating the sealing glass member 6 attached to the opposing main surfaces of the insulating base 1 and the lid 2, and simultaneously sealing the insulating base l when the insulating container 3 is hermetically sealed. and lid body 2. The external lead terminal 5 is made of invar alloy (36.5WtXNi-63.5
Copper (C
u), and its conductivity is 20X.
(IACS) or higher, thermal expansion coefficient is 30 to 40XIO-
'/°C made of conductive material.
前記外部リード端子５はその導電率が２０２ （ ＩＡ
ＣＳ）以上であり、電気を流し易いことから外部リード
端子５の信号伝搬速度を極めて速いものとなすことがで
き、絶縁容器３内に収容した半導体素子４を高速駆動さ
せたとしても半導体素子４と外部電気回路との間におけ
る信号の出し入れは常に安定、且つ確実となすことがで
きる。The external lead terminal 5 has a conductivity of 202 (IA
CS) As above, since electricity can easily flow, the signal propagation speed of the external lead terminal 5 can be made extremely fast, and even if the semiconductor element 4 housed in the insulating container 3 is driven at high speed, the semiconductor element 4 The input/output of signals between the external electric circuit and the external electric circuit can always be performed stably and reliably.
また外部リード端子５の導電率が高いことから外部リー
ド端子５の線幅が細くなったとしても外部リード端子５
の電気抵抗を低く抑えることができ、その結果、外部リ
ード端子５における信号の減衰を極小として内部に収容
する半導体素子４に外部電気回路から供給される電気信
号を正確に人力することができる。Furthermore, since the conductivity of the external lead terminal 5 is high, even if the line width of the external lead terminal 5 becomes thin, the external lead terminal 5
As a result, the attenuation of the signal at the external lead terminal 5 can be minimized, and the electric signal supplied from the external electric circuit to the semiconductor element 4 housed inside can be accurately input manually.
更に前記外部リード端子５はその熱膨張係数が３０乃至
４０Ｘ１０−’／ ”Ｃであり、封止用ガラス部材６の
熱膨張係数と近似することから外部リード端子５を絶縁
基体１と蓋体２の間に封止用ガラス部材６を用いて固定
する際、外部リード端子５と封止用ガラス部材６との間
には両者の熱膨張係数の相違に起因５する熱応力が発生
することはなく、外部リード端子５を封止用ガラス部材
６で強固に固定することも可能となる。Furthermore, the external lead terminal 5 has a thermal expansion coefficient of 30 to 40×10-'/''C, which is similar to the thermal expansion coefficient of the sealing glass member 6. When fixing using the sealing glass member 6 between the external lead terminals 5 and the sealing glass member 6, it is possible to prevent thermal stress from occurring between the external lead terminals 5 and the sealing glass member 6 due to the difference in coefficient of thermal expansion between the two. Therefore, it is also possible to firmly fix the external lead terminal 5 with the sealing glass member 6.
かくして、この半導体素子収納用パッケージによれば絶
縁基体１の凹部底面に半導体素子４を取着固定するとと
もに該半導体素子４の各電極をボンディングワイヤ７に
より外部リード端子５に接続させ、しかる後、絶縁基体
１と蓋体２とを該絶縁基体工及び蓋体２の相対向する主
面に予め被着させておいた封止用ガラス部材６を溶融一
体化させることによって接合させ、これによって最終製
品としての半導体装置が完威する。Thus, according to this semiconductor element storage package, the semiconductor element 4 is attached and fixed to the bottom surface of the recess of the insulating substrate 1, and each electrode of the semiconductor element 4 is connected to the external lead terminal 5 by the bonding wire 7, and then, The insulating base 1 and the lid 2 are joined together by melting and integrating the sealing glass member 6 that has been previously applied to the insulating base and the opposing main surfaces of the lid 2. Semiconductor devices as products become fully successful.
（発明の効果）
本発明の半導体素子収納用パッケージによれば、半導体
素子を収容するための絶縁容器を炭化珪素質焼結体で、
外部リード端子を導電率が２０χ（ＩＡＣＳ）以上、熱
膨張係数が３０乃至４０Ｘ１０−？／ ’Ｃの金属で、
ガラス部材を酸化亜鉛５５．０乃至６５．０Ｗｔχ、酸
化ホウ素１５．０乃至２５．０れχ、シリカ１０．０乃
至１５．０Ｗｔ％から戒るガラスで形成したことから外
部リード端子の信号伝搬速度を極めて速いものとなすこ
とができ、絶縁容器内に収容した半導体素子を高速駆動
させたとしても半導体素子と外部電気回路との間におけ
る信号の出し入れを常に安定、且つ確実となすことが可
能となる。(Effects of the Invention) According to the semiconductor device storage package of the present invention, the insulating container for accommodating the semiconductor device is made of a silicon carbide sintered body,
The external lead terminal has a conductivity of 20χ (IACS) or more and a thermal expansion coefficient of 30 to 40X10-? / 'C metal,
The signal propagation speed of the external lead terminal is low because the glass member is made of glass containing 55.0 to 65.0 Wt% of zinc oxide, 15.0 to 25.0 Wt% of boron oxide, and 10.0 to 15.0 Wt% of silica. Even if the semiconductor device housed in the insulating container is driven at high speed, the signal can be sent in and out between the semiconductor device and the external electric circuit consistently and reliably. Become.
また外部リード端子の線幅が細くなったとしても外部リ
ード端子の電気抵抗を低く抑えることができ、その結果
、外部リード端子における信号の減衰を極小として内部
に収容する半導体素子に外部電気回路から供給される電
気信号を正確に人力することが可能となる。In addition, even if the line width of the external lead terminal becomes thinner, the electrical resistance of the external lead terminal can be kept low, and as a result, the signal attenuation at the external lead terminal is minimized, and the external electrical circuit is connected to the semiconductor element housed inside. It becomes possible to manually input the supplied electrical signals accurately.
更に、外部リード端子はその熱膨張係数が絶縁基体、蓋
体及び封止用ガラス部材の各々の熱膨張係数と近似し、
絶縁基体と蓋体との間に外部リード端子を挟み、各々を
封止用ガラス部材で取着接合したとしても絶縁基体及び
蓋体と封止用ガラス部材との間、外部リード端子と封止
用ガラス部材との間のいずれにも熱膨張係数の相違に起
因する熱応力は発生せず、すべてを強固に取着接合する
ことも可能となる。Furthermore, the external lead terminal has a coefficient of thermal expansion that approximates each of the coefficients of thermal expansion of the insulating base, the lid, and the sealing glass member,
Even if the external lead terminal is sandwiched between the insulating base and the lid and each is attached and bonded with a sealing glass member, the external lead terminal and the seal will be removed between the insulating base, the lid, and the sealing glass member. No thermal stress due to the difference in coefficient of thermal expansion occurs between the glass member and the glass member, and it is possible to firmly attach and bond all the members.
第１図は本発明の半導体素子収納用パッケージの一実施
例を示す断面図、第２図は第１図に示すパッケージの絶
縁基体上面より見た平面図である。
ｌ・・絶縁基体 ２ ・・蓋体
３・・絶縁容器 ５ ・・外部リード端子６・・封止
用ガラス部材FIG. 1 is a sectional view showing an embodiment of the semiconductor element storage package of the present invention, and FIG. 2 is a plan view of the package shown in FIG. 1, viewed from the top surface of the insulating base. l...Insulating base 2...Lid 3...Insulating container 5...External lead terminal 6...Glass member for sealing
Claims (1)
容器に外部リード端子をガラス部材を介して取着して成
る半導体素子収納用パッケージにおいて、前記絶縁容器
を炭化珪素質焼結体で、外部リード端子を熱膨張係数３
０乃至４０×１０＾−＾７／℃、導電率２０％（ＩＡＣ
Ｓ）以上の金属で、ガラス部材を酸化亜鉛５５．０乃至
６５．０Ｗｔ％、酸化ホウ素１５．０乃至２５．０Ｗｔ
％、シリカ１０．０乃至１５．０Ｗｔ％から成るガラス
で形成したことを特徴とする半導体素子収納用パッケー
ジ。In a package for storing a semiconductor element, the insulating container is made of a silicon carbide sintered body, and the external lead terminal is attached via a glass member to an insulating container having a cavity for accommodating the semiconductor element inside. The lead terminal has a thermal expansion coefficient of 3
0 to 40 x 10^-^7/℃, conductivity 20% (IAC
S) The glass member is made of the above metals, including zinc oxide 55.0 to 65.0 Wt% and boron oxide 15.0 to 25.0 Wt%.
% and 10.0 to 15.0 Wt % of silica.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1308604A JP2736456B2 (en) | 1989-11-27 | 1989-11-27 | Package for storing semiconductor elements |
| US07/574,472 US5168126A (en) | 1989-08-25 | 1990-08-27 | Container package for semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1308604A JP2736456B2 (en) | 1989-11-27 | 1989-11-27 | Package for storing semiconductor elements |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03167859A true JPH03167859A (en) | 1991-07-19 |
| JP2736456B2 JP2736456B2 (en) | 1998-04-02 |
Family
ID=17983039
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1308604A Expired - Lifetime JP2736456B2 (en) | 1989-08-25 | 1989-11-27 | Package for storing semiconductor elements |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2736456B2 (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5851405A (en) * | 1981-09-12 | 1983-03-26 | 京セラ株式会社 | Method of producing electrically insulating silicon carbide sintered material |
| JPS6243155A (en) * | 1985-08-21 | 1987-02-25 | Hitachi Ltd | Integrated circuit package |
| JPS6265954A (en) * | 1985-09-18 | 1987-03-25 | Nippon Electric Glass Co Ltd | Borosilicate glass for sealing alumina |
-
1989
- 1989-11-27 JP JP1308604A patent/JP2736456B2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5851405A (en) * | 1981-09-12 | 1983-03-26 | 京セラ株式会社 | Method of producing electrically insulating silicon carbide sintered material |
| JPS6243155A (en) * | 1985-08-21 | 1987-02-25 | Hitachi Ltd | Integrated circuit package |
| JPS6265954A (en) * | 1985-09-18 | 1987-03-25 | Nippon Electric Glass Co Ltd | Borosilicate glass for sealing alumina |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2736456B2 (en) | 1998-04-02 |
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