JP6558367B2 - 半導体積層体、半導体積層体の製造方法および半導体装置の製造方法 - Google Patents
半導体積層体、半導体積層体の製造方法および半導体装置の製造方法 Download PDFInfo
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- JP6558367B2 JP6558367B2 JP2016527754A JP2016527754A JP6558367B2 JP 6558367 B2 JP6558367 B2 JP 6558367B2 JP 2016527754 A JP2016527754 A JP 2016527754A JP 2016527754 A JP2016527754 A JP 2016527754A JP 6558367 B2 JP6558367 B2 JP 6558367B2
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- 239000004065 semiconductor Substances 0.000 title claims description 149
- 238000004519 manufacturing process Methods 0.000 title claims description 55
- 239000000758 substrate Substances 0.000 claims description 72
- 238000000034 method Methods 0.000 claims description 28
- 229910002601 GaN Inorganic materials 0.000 description 25
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 25
- 239000007789 gas Substances 0.000 description 14
- 239000012535 impurity Substances 0.000 description 14
- 239000000969 carrier Substances 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 229910052760 oxygen Inorganic materials 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- 239000006185 dispersion Substances 0.000 description 3
- 238000002474 experimental method Methods 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 229910000077 silane Inorganic materials 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000002484 cyclic voltammetry Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
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- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/66196—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices with an active layer made of a group 13/15 material
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
Description
最初に本発明の実施態様を列記して説明する。本発明の実施形態に係る半導体積層体は、基板を含むベース層と、ベース層上に配置され、導電型がn型のGaNからなる半導体層と、を備えている。そして、この半導体層におけるn型キャリア濃度の、基板の径方向における平均値は1.5×1016cm−3以下であり、最大値と最小値との差は1.5×1015cm−3以下である。
次に、本発明に係る半導体積層体、半導体積層体の製造方法および半導体装置の製造方法の一実施の形態を、以下に図面を参照しつつ説明する。なお、以下の図面において同一または相当する部分には同一の参照番号を付しその説明は繰返さない。
Claims (3)
- 基板を含むベース層を準備する工程と、
前記ベース層上に、導電型がn型のGaNからなる半導体層を形成する工程と、を備え、
前記ベース層を準備する工程では、直径が74mm以上である前記ベース層が準備され、
前記半導体層を形成する工程では、n型キャリア濃度の、前記基板の径方向における平均値が1.5×1016cm−3以下、最大値と最小値との差が2.5×1014cm−3以下となるように前記半導体層が形成され、
前記半導体層を形成する工程では、
前記ベース層をサセプタの凹部内に保持した状態で、前記サセプタの前記凹部以外の領域における表面である上面に沿った方向に原料ガスが流されることにより、前記ベース層の主面に前記原料ガスが供給され、
前記ベース層と前記サセプタの前記上面との高さの差は、前記上面を基準にして上方向を正、下方向を負と表した場合、−0.1mm〜0mmの範囲とされる、半導体積層体の製造方法。 - 請求項1に記載の半導体積層体の製造方法により製造された半導体積層体を準備する工程と、
前記半導体積層体上に電極を形成する工程と、を備えた、半導体装置の製造方法。 - 前記電極を形成する工程では、前記半導体層とショットキー接触する前記電極が形成される、請求項2に記載の半導体装置の製造方法。
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JP2014122261 | 2014-06-13 | ||
JP2014122261 | 2014-06-13 | ||
PCT/JP2015/065895 WO2015190351A1 (ja) | 2014-06-13 | 2015-06-02 | 半導体積層体、半導体積層体の製造方法および半導体装置の製造方法 |
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JPWO2015190351A1 JPWO2015190351A1 (ja) | 2017-04-20 |
JP6558367B2 true JP6558367B2 (ja) | 2019-08-14 |
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US (1) | US9825134B2 (ja) |
JP (1) | JP6558367B2 (ja) |
WO (1) | WO2015190351A1 (ja) |
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JP7296509B2 (ja) * | 2020-10-21 | 2023-06-22 | 住友化学株式会社 | 半導体積層物 |
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JP2000195801A (ja) * | 1998-12-24 | 2000-07-14 | Fujitsu Ltd | 半導体装置の製造方法 |
JP4177124B2 (ja) * | 2002-04-30 | 2008-11-05 | 古河電気工業株式会社 | GaN系半導体装置 |
JP4720125B2 (ja) * | 2004-08-10 | 2011-07-13 | 日立電線株式会社 | Iii−v族窒化物系半導体基板及びその製造方法並びにiii−v族窒化物系半導体 |
JP2009164345A (ja) | 2008-01-07 | 2009-07-23 | Sumitomo Electric Ind Ltd | 半導体デバイスの製造方法 |
JP5228583B2 (ja) | 2008-04-04 | 2013-07-03 | 住友電気工業株式会社 | サセプタおよび気相成長装置 |
JP5453867B2 (ja) * | 2009-03-24 | 2014-03-26 | 株式会社デンソー | ショットキーバリアダイオードを備えた炭化珪素半導体装置およびその製造方法 |
JP5071427B2 (ja) | 2009-04-13 | 2012-11-14 | 日立電線株式会社 | 窒化物半導体基板 |
FR2977260B1 (fr) * | 2011-06-30 | 2013-07-19 | Soitec Silicon On Insulator | Procede de fabrication d'une couche epitaxiale epaisse de nitrure de gallium sur un substrat de silicium ou analogue et couche obtenue par ledit procede |
JP2013058626A (ja) | 2011-09-08 | 2013-03-28 | Advanced Power Device Research Association | 半導体基板の製造方法及び半導体装置 |
DE102013216195B4 (de) * | 2013-08-14 | 2015-10-29 | Infineon Technologies Ag | Verfahren zur Nachdotierung einer Halbleiterscheibe |
EP3067935A1 (en) * | 2015-03-10 | 2016-09-14 | ABB Technology AG | Power semiconductor rectifier with controllable on-state voltage |
US9530846B2 (en) * | 2015-03-31 | 2016-12-27 | Coorstek Kk | Nitride semiconductor substrate |
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2015
- 2015-06-02 US US15/315,523 patent/US9825134B2/en active Active
- 2015-06-02 WO PCT/JP2015/065895 patent/WO2015190351A1/ja active Application Filing
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WO2015190351A1 (ja) | 2015-12-17 |
US9825134B2 (en) | 2017-11-21 |
US20170207308A1 (en) | 2017-07-20 |
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