JP5449203B2 - 半導体ダイのための分離されたトランジスタおよびダイオードならびに分離および終端構造 - Google Patents
半導体ダイのための分離されたトランジスタおよびダイオードならびに分離および終端構造 Download PDFInfo
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- JP5449203B2 JP5449203B2 JP2010548708A JP2010548708A JP5449203B2 JP 5449203 B2 JP5449203 B2 JP 5449203B2 JP 2010548708 A JP2010548708 A JP 2010548708A JP 2010548708 A JP2010548708 A JP 2010548708A JP 5449203 B2 JP5449203 B2 JP 5449203B2
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Description
本出願は、2008年2月14日に出願された出願番号12/069,941の一部継続出願である。
(a) 2004年8月14日に出願された出願番号10/918,316、この出願は2002年8月14日に出願された出願番号10/218,668(現在米国特許第6,900,091号)の分割出願、および
(b) 2005年8月15日に出願された出願番号11/204,215、この出願は2002年8月14日に出願された出願番号10/218,678(現在米国特許第6,943,426号)の分割出願。
本発明に従う実施の形態がエピタキシャル層を含まない第1の導電型の半導体基板に一般的に形成される。分離された横型DMOSトランジスタ(LDMOS)の1つの実施形態は、第2の導電型のフロア(floor)分離領域と、基板の表面からフロア分離領域に延びる、誘電体で満たされたトレンチを含み、トレンチおよびフロア分離領域は基板の分離ポケットを形成する。LDMOSは、LDMOSのボディとして機能する、分離ポケット中の第1の導電型のウェルを含み、ウェルは浅い部分と深い部分とを備える。浅い部分は基板の表面に隣接して位置し、深い部分は浅い部分の下に位置する。浅い部分は第1のドーピング濃度を有し、深い部分は第2のドーピング濃度を有する。第2のドーピング濃度は第1のドーピング濃度よりも大きい。
図1は、本発明に従って形成されてエピタキシャル成長または高温拡散を必要としない、十分に分離されたNチャネル横型DMOS(LDMOS)400の概略的断面を示す。LDMOS400は、分離されたP型領域464に作製される。P型領域464とP型領域464に作製された横型DMOS400は高エネルギ注入されたN型フロア分離領域462と誘電体で満たされたトレンチ463Aおよび463BによってP型領域461から分離される。
変数αはSTI346の形成後に残るドリフト領域342における注入された通常の電荷のパーセントを示し、注入された通常の電荷とはすなわちSTI346を固定するトレンチをエッチングすることによって除去されないドーパントである。減少した電荷はゲート355の下の表面電界における減少を引き起こし、ゲート355のフィールドプレート効果と合わさって、衝撃電離およびホットキャリアダメージのリスクを減少する。
「ノーマリオフ」デバイスである従来のエンハンスメントモードMOSFETと異なり、JFETとデプレッションモードMOSFETはそれらのゲートがソース電位にバイアスされていてもドレイン電流を流す。すなわち、それらはVGS=0で導通する。そのようなデバイスは他のトランジスタがまだ動作状態ではないときに起動回路のための電流源を形成するのに便利である。その理由はトランジスタがノーマリ「オン」であるためである。
多くのパワーアプリケーションにおいて、分離された高電圧整流ダイオードが、たとえばスイッチングコンバータにおける時間的間隔をとる前の遮断の間におけるインダクタ電流を再循環させるために望ましい。
パワー集積回路の他の望ましい特徴は、分離されたデバイスを、基板電位よりも高い電圧に「浮遊」させることを可能にする能力である。フローティングデバイスまたは分離ポケットの最大電圧は、分離ポケットの内部が何であるかに依存せず、その代わり分離ポケットがどのようにして終端されるか、すなわちどのようなフィーチャがトレンチ分離側壁の外部と境を接するかに依存する。
Claims (11)
- 第1の導電型の半導体基板に形成される、分離された接合電界効果トランジスタ(JFET)であって、前記基板はエピタキシャル層を備えておらず、前記分離されたJFETは、
前記基板中に埋め込まれた、前記第1の導電型と反対の第2の導電型のフロア分離領域と、
前記基板の表面から少なくとも前記フロア分離領域へと延びるトレンチであって、前記トレンチは、誘電性材料を備え、前記トレンチと前記フロア分離領域とはともに前記基板の分離ポケットを形成する、前記トレンチと、
前記分離ポケット中の前記基板の前記表面におけるソース領域と、
前記分離ポケット中の前記基板の前記表面において、前記ソース領域から離れて配置されるドレイン領域と、
前記ソース領域と前記ドレイン領域との間の前記基板の前記表面におけるトップゲート領域と、
前記ソース領域と前記ドレイン領域との間に延びるとともに、前記トップゲート領域の下かつ前記フロア分離領域の上に位置するチャネル領域とを備える、分離されたJFET。 - 前記ソース領域、前記ドレイン領域および前記チャネル領域は前記第1の導電型であり、前記トップゲートは前記第2の導電型である、請求項1に記載の分離されたJFET。
- 第1の導電型の半導体基板に形成される、分離された接合電界効果トランジスタ(JFET)であって、前記基板はエピタキシャル層を備えておらず、前記分離されたJFETは、
前記基板中に埋め込まれた、前記第1の導電型と反対の第2の導電型のフロア分離領域と、
前記基板の表面から少なくとも前記フロア分離領域へと延びるトレンチであって、前記トレンチは、誘電性材料を備え、前記トレンチと前記フロア分離領域とはともに前記基板の分離ポケットを形成する、前記トレンチと、
前記分離ポケット中の前記基板の前記表面における、前記第2の導電型のソース領域と、
前記分離ポケット中の前記基板の前記表面において、前記ソース領域から離れて配置される、前記第2の導電型のドレイン領域と、
前記ソース領域と前記ドレイン領域との間に配置される、前記第1の導電型のトップゲート領域と、
前記トップゲート領域の下の前記分離ポケット中に埋め込まれる、前記第1の導電型のボトムゲート領域と、
前記ソース領域と前記ドレイン領域との間に延びる前記第2の導電型のチャネル領域とを備え、前記チャネル領域は、前記トップゲート領域の下かつ前記ボトムゲート領域の上に位置する、分離されたJFET。 - 前記ソース領域と前記トップゲート領域との間の、第1の誘電体で満たされたトレンチと、
前記ドレイン領域と前記トップゲート領域との間の、第2の誘電体で満たされたトレンチとを備える、請求項1または3に記載の分離されたJFET。 - 前記基板の前記表面から前記ボトムゲート領域まで延びる、前記分離ポケット中の前記第1の導電型のウェルを備える、請求項3に記載の分離されたJFET。
- 前記ウェルは、前記基板の前記表面に隣接するボトムゲートコンタクト領域を備え、前記ボトムゲートコンタクト領域は、前記ウェルの残りの部分のドーピング濃度よりも大きいドーピング濃度を有し、前記分離された接合電界効果トランジスタ(JFET)は、前記基板の前記表面および前記ボトムゲートコンタクト領域に隣接する、第3の誘電体で満たされたトレンチを備える、請求項5に記載の分離されたJFET。
- 前記トレンチは、導電性材料で満たされた中央部と、前記トレンチの前記壁を覆う誘電性材料とを有する、請求項1または3に記載の分離されたJFET。
- 第1の導電型の半導体基板に形成される、分離された接合電界効果トランジスタ(JFET)であって、前記基板はエピタキシャル層を備えておらず、前記分離されたJFETは、
前記基板中に埋め込まれた、前記第1の導電型と反対の第2の導電型のフロア分離領域と、
前記基板の表面から少なくとも前記フロア分離領域へと延びるトレンチであって、前記トレンチは、誘電性材料を備え、前記トレンチと前記フロア分離領域とはともに前記基板の分離ポケットを形成する、前記トレンチと、
前記分離ポケット中の前記基板の前記表面における、前記第1の導電型のソース領域と、
前記分離ポケット中の前記基板の前記表面において、前記ソース領域から離れて配置される、前記第1の導電型のドレイン領域と、
前記分離ポケット中の前記基板の前記表面において、前記ソース領域と前記ドレイン領域との間に配置される、前記第2の導電型のトップゲート領域と、
前記ソース領域と前記ドレイン領域との間に延びる前記第1の導電型のチャネル領域とを備え、前記チャネル領域は、前記トップゲート領域の下かつ前記フロア分離領域の上に位置する、分離されたJFET。 - 前記ソース領域と前記トップゲート領域との間かつ前記ソース領域および前記トップゲート領域に隣接する、第1の誘電体で満たされたトレンチと、
前記ドレイン領域と前記トップゲート領域との間かつ前記ドレイン領域および前記トップゲート領域に隣接する、第2の誘電体で満たされたトレンチとを備える、請求項8に記載の分離されたJFET。 - 前記トレンチは、導電性材料で満たされた中央部と、前記トレンチの前記壁を覆う誘電性材料とを有し、前記導電性材料は、前記フロア分離領域から前記基板の前記表面への接触を与える、請求項8に記載の分離されたJFET。
- 前記フロア分離領域は前記JFETのボトムゲートを備える、請求項1または8に記載の分離されたJFET。
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US7812403B2 (en) * | 2002-08-14 | 2010-10-12 | Advanced Analogic Technologies, Inc. | Isolation structures for integrated circuit devices |
US8513087B2 (en) * | 2002-08-14 | 2013-08-20 | Advanced Analogic Technologies, Incorporated | Processes for forming isolation structures for integrated circuit devices |
US8089129B2 (en) * | 2002-08-14 | 2012-01-03 | Advanced Analogic Technologies, Inc. | Isolated CMOS transistors |
US7902630B2 (en) * | 2002-08-14 | 2011-03-08 | Advanced Analogic Technologies, Inc. | Isolated bipolar transistor |
US7825488B2 (en) | 2006-05-31 | 2010-11-02 | Advanced Analogic Technologies, Inc. | Isolation structures for integrated circuits and modular methods of forming the same |
US7667268B2 (en) * | 2002-08-14 | 2010-02-23 | Advanced Analogic Technologies, Inc. | Isolated transistor |
US20080197408A1 (en) * | 2002-08-14 | 2008-08-21 | Advanced Analogic Technologies, Inc. | Isolated quasi-vertical DMOS transistor |
US7939420B2 (en) * | 2002-08-14 | 2011-05-10 | Advanced Analogic Technologies, Inc. | Processes for forming isolation structures for integrated circuit devices |
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US8030731B2 (en) * | 2007-03-28 | 2011-10-04 | Advanced Analogic Technologies, Inc. | Isolated rectifier diode |
US7737526B2 (en) * | 2007-03-28 | 2010-06-15 | Advanced Analogic Technologies, Inc. | Isolated trench MOSFET in epi-less semiconductor sustrate |
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EP2248162A4 (en) | 2015-08-12 |
TWI415262B (zh) | 2013-11-11 |
US20110260246A1 (en) | 2011-10-27 |
TW200945589A (en) | 2009-11-01 |
KR20130103640A (ko) | 2013-09-23 |
CN102867843B (zh) | 2015-05-20 |
KR20140065485A (ko) | 2014-05-29 |
CN102037562B (zh) | 2014-11-26 |
US8664715B2 (en) | 2014-03-04 |
JP2011514675A (ja) | 2011-05-06 |
KR101303405B1 (ko) | 2013-09-05 |
KR101363663B1 (ko) | 2014-02-14 |
CN102867843A (zh) | 2013-01-09 |
WO2009108311A3 (en) | 2009-10-22 |
EP2248162A2 (en) | 2010-11-10 |
KR20120115600A (ko) | 2012-10-18 |
KR101483404B1 (ko) | 2015-01-15 |
US7667268B2 (en) | 2010-02-23 |
CN102037562A (zh) | 2011-04-27 |
US20100133611A1 (en) | 2010-06-03 |
KR20110007109A (ko) | 2011-01-21 |
US20080191277A1 (en) | 2008-08-14 |
US8659116B2 (en) | 2014-02-25 |
WO2009108311A2 (en) | 2009-09-03 |
KR101456408B1 (ko) | 2014-11-04 |
HK1176462A1 (en) | 2013-07-26 |
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